mirror of
https://github.com/holub/mame
synced 2025-05-25 23:35:26 +03:00
495 lines
17 KiB
C
495 lines
17 KiB
C
/*
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Cristaltec "Game Cristal" (MAME bootleg)
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Skeleton driver by R. Belmont, based on taitowlf.c by Ville Linde
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Note:
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- bp 000F16B5 do bx=0x16bb (can't skip this check?)
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Specs: P3-866, SiS 630 graphics card, SiS 7018 sound, Windows 98, DirectX 8.1.
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Input is via a custom COM1 port JAMMA adaptor.
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The custom emulator is a heavily modified version of MAME32. If you extract the
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disk image, it's in C:\GH4\GH4.EXE. It's UPX compressed, so unpack it before doing
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any forensics. The emulator does run on Windows as new as XP Pro SP2 but you can't
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control it due to the lack of the custom input.
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Updates 27/11/2007 (Diego Nappino):
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The COM1 port is opened at 19200 bps, No parity, 8 bit data,1 stop bit.
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The protocol is based on a 6 bytes frame with a leading byte valued 0x05 and a trailing one at 0x02
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The four middle bytes are used, in negative logic (0xFF = No button pressed), to implement the inputs.
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Each bit meaning as follows :
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Byte 1 Byte 2 Byte 3 Byte 4
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Bit 0 P1-Credit P1-Button C P2-Left UNUSED
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Bit 1 P1-Start P1-Button D P2-Right UNUSED
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Bit 2 P1-Down P1-Button E P2-Button A SERVICE
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Bit 3 P1-Up TEST P2-Button B UNUSED
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Bit 4 P1-Left P2-Credit P2-Button C UNUSED
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Bit 5 P1-Right P2-Start P2-Button D UNUSED
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Bit 6 P1-Button A P2-Down P2-Button E UNUSED
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Bit 7 P1-Button B P2-Up VIDEO-MODE UNUSED
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The JAMMA adaptor sends a byte frame each time an input changes. So, in example, if the P1-Button A and P1-Button B are both pressed, it will send :
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0x05 0xFC 0xFF 0xFF 0xFF 0x02
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And when the buttons are both released
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0x05 0xFF 0xFF 0xFF 0xFF 0x02
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CPUID info:
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Original set:
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CPUID Level: EAX: EBX: ECX: EDX:
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00000000 00000003 756E6547 6C65746E 49656E69
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00000001 0000068A 00000002 00000000 0387F9FF
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00000002 03020101 00000000 00000000 0C040882
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00000003 00000000 00000000 CA976D2E 000082F6
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80000000 00000000 00000000 CA976D2E 000082F6
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C0000000 00000000 00000000 CA976D2E 000082F6
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Version 2:
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CPUID Level: EAX: EBX: ECX: EDX:
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00000000 00000003 756E6547 6C65746E 49656E69
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00000001 0000068A 00000002 00000000 0387F9FF
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00000002 03020101 00000000 00000000 0C040882
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00000003 00000000 00000000 B8BA1941 00038881
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80000000 00000000 00000000 B8BA1941 00038881
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C0000000 00000000 00000000 B8BA1941 00038881
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*/
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#include "emu.h"
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#include "cpu/i386/i386.h"
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#include "machine/lpci.h"
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#include "machine/pcshare.h"
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#include "machine/pckeybrd.h"
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#include "machine/idectrl.h"
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class gamecstl_state : public pcat_base_state
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{
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public:
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gamecstl_state(const machine_config &mconfig, device_type type, const char *tag)
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: pcat_base_state(mconfig, type, tag),
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m_cga_ram(*this, "cga_ram"),
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m_gfxdecode(*this, "gfxdecode"),
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m_palette(*this, "palette") { }
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required_shared_ptr<UINT32> m_cga_ram;
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required_device<gfxdecode_device> m_gfxdecode;
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required_device<palette_device> m_palette;
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UINT32 *m_bios_ram;
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UINT8 m_mtxc_config_reg[256];
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UINT8 m_piix4_config_reg[4][256];
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DECLARE_WRITE32_MEMBER(pnp_config_w);
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DECLARE_WRITE32_MEMBER(pnp_data_w);
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DECLARE_WRITE32_MEMBER(bios_ram_w);
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DECLARE_DRIVER_INIT(gamecstl);
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virtual void machine_start();
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virtual void machine_reset();
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virtual void video_start();
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UINT32 screen_update_gamecstl(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
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void draw_char(bitmap_ind16 &bitmap, const rectangle &cliprect, gfx_element *gfx, int ch, int att, int x, int y);
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void intel82439tx_init();
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};
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static const rgb_t cga_palette[16] =
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{
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rgb_t( 0x00, 0x00, 0x00 ), rgb_t( 0x00, 0x00, 0xaa ), rgb_t( 0x00, 0xaa, 0x00 ), rgb_t( 0x00, 0xaa, 0xaa ),
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rgb_t( 0xaa, 0x00, 0x00 ), rgb_t( 0xaa, 0x00, 0xaa ), rgb_t( 0xaa, 0x55, 0x00 ), rgb_t( 0xaa, 0xaa, 0xaa ),
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rgb_t( 0x55, 0x55, 0x55 ), rgb_t( 0x55, 0x55, 0xff ), rgb_t( 0x55, 0xff, 0x55 ), rgb_t( 0x55, 0xff, 0xff ),
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rgb_t( 0xff, 0x55, 0x55 ), rgb_t( 0xff, 0x55, 0xff ), rgb_t( 0xff, 0xff, 0x55 ), rgb_t( 0xff, 0xff, 0xff ),
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};
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void gamecstl_state::video_start()
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{
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int i;
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for (i=0; i < 16; i++)
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m_palette->set_pen_color(i, cga_palette[i]);
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}
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void gamecstl_state::draw_char(bitmap_ind16 &bitmap, const rectangle &cliprect, gfx_element *gfx, int ch, int att, int x, int y)
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{
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int i,j;
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const UINT8 *dp;
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int index = 0;
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dp = gfx->get_data(ch);
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for (j=y; j < y+8; j++)
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{
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UINT16 *p = &bitmap.pix16(j);
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for (i=x; i < x+8; i++)
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{
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UINT8 pen = dp[index++];
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if (pen)
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p[i] = gfx->colorbase() + (att & 0xf);
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else
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p[i] = gfx->colorbase() + ((att >> 4) & 0x7);
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}
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}
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}
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UINT32 gamecstl_state::screen_update_gamecstl(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
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{
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int i, j;
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gfx_element *gfx = m_gfxdecode->gfx(0);
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UINT32 *cga = m_cga_ram;
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int index = 0;
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bitmap.fill(0, cliprect);
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for (j=0; j < 25; j++)
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{
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for (i=0; i < 80; i+=2)
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{
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int att0 = (cga[index] >> 8) & 0xff;
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int ch0 = (cga[index] >> 0) & 0xff;
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int att1 = (cga[index] >> 24) & 0xff;
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int ch1 = (cga[index] >> 16) & 0xff;
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draw_char(bitmap, cliprect, gfx, ch0, att0, i*8, j*8);
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draw_char(bitmap, cliprect, gfx, ch1, att1, (i*8)+8, j*8);
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index++;
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}
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}
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return 0;
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}
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// Intel 82439TX System Controller (MTXC)
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static UINT8 mtxc_config_r(device_t *busdevice, device_t *device, int function, int reg)
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{
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gamecstl_state *state = busdevice->machine().driver_data<gamecstl_state>();
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printf("MTXC: read %d, %02X\n", function, reg);
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return state->m_mtxc_config_reg[reg];
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}
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static void mtxc_config_w(device_t *busdevice, device_t *device, int function, int reg, UINT8 data)
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{
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gamecstl_state *state = busdevice->machine().driver_data<gamecstl_state>();
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printf("%s:MTXC: write %d, %02X, %02X\n", busdevice->machine().describe_context(), function, reg, data);
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switch(reg)
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{
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case 0x59: // PAM0
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{
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if (data & 0x10) // enable RAM access to region 0xf0000 - 0xfffff
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{
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state->membank("bank1")->set_base(state->m_bios_ram);
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}
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else // disable RAM access (reads go to BIOS ROM)
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{
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state->membank("bank1")->set_base(state->memregion("bios")->base() + 0x30000);
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}
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break;
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}
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}
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state->m_mtxc_config_reg[reg] = data;
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}
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void gamecstl_state::intel82439tx_init()
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{
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m_mtxc_config_reg[0x60] = 0x02;
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m_mtxc_config_reg[0x61] = 0x02;
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m_mtxc_config_reg[0x62] = 0x02;
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m_mtxc_config_reg[0x63] = 0x02;
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m_mtxc_config_reg[0x64] = 0x02;
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m_mtxc_config_reg[0x65] = 0x02;
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}
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static UINT32 intel82439tx_pci_r(device_t *busdevice, device_t *device, int function, int reg, UINT32 mem_mask)
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{
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UINT32 r = 0;
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if (ACCESSING_BITS_24_31)
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{
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r |= mtxc_config_r(busdevice, device, function, reg + 3) << 24;
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}
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if (ACCESSING_BITS_16_23)
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{
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r |= mtxc_config_r(busdevice, device, function, reg + 2) << 16;
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}
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if (ACCESSING_BITS_8_15)
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{
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r |= mtxc_config_r(busdevice, device, function, reg + 1) << 8;
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}
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if (ACCESSING_BITS_0_7)
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{
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r |= mtxc_config_r(busdevice, device, function, reg + 0) << 0;
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}
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return r;
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}
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static void intel82439tx_pci_w(device_t *busdevice, device_t *device, int function, int reg, UINT32 data, UINT32 mem_mask)
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{
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if (ACCESSING_BITS_24_31)
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{
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mtxc_config_w(busdevice, device, function, reg + 3, (data >> 24) & 0xff);
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}
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if (ACCESSING_BITS_16_23)
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{
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mtxc_config_w(busdevice, device, function, reg + 2, (data >> 16) & 0xff);
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}
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if (ACCESSING_BITS_8_15)
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{
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mtxc_config_w(busdevice, device, function, reg + 1, (data >> 8) & 0xff);
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}
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if (ACCESSING_BITS_0_7)
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{
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mtxc_config_w(busdevice, device, function, reg + 0, (data >> 0) & 0xff);
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}
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}
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// Intel 82371AB PCI-to-ISA / IDE bridge (PIIX4)
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static UINT8 piix4_config_r(device_t *busdevice, device_t *device, int function, int reg)
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{
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gamecstl_state *state = busdevice->machine().driver_data<gamecstl_state>();
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printf("PIIX4: read %d, %02X\n", function, reg);
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return state->m_piix4_config_reg[function][reg];
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}
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static void piix4_config_w(device_t *busdevice, device_t *device, int function, int reg, UINT8 data)
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{
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gamecstl_state *state = busdevice->machine().driver_data<gamecstl_state>();
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printf("%s:PIIX4: write %d, %02X, %02X\n", busdevice->machine().describe_context(), function, reg, data);
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state->m_piix4_config_reg[function][reg] = data;
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}
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static UINT32 intel82371ab_pci_r(device_t *busdevice, device_t *device, int function, int reg, UINT32 mem_mask)
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{
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UINT32 r = 0;
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if (ACCESSING_BITS_24_31)
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{
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r |= piix4_config_r(busdevice, device, function, reg + 3) << 24;
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}
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if (ACCESSING_BITS_16_23)
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{
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r |= piix4_config_r(busdevice, device, function, reg + 2) << 16;
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}
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if (ACCESSING_BITS_8_15)
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{
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r |= piix4_config_r(busdevice, device, function, reg + 1) << 8;
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}
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if (ACCESSING_BITS_0_7)
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{
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r |= piix4_config_r(busdevice, device, function, reg + 0) << 0;
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}
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return r;
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}
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static void intel82371ab_pci_w(device_t *busdevice, device_t *device, int function, int reg, UINT32 data, UINT32 mem_mask)
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{
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if (ACCESSING_BITS_24_31)
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{
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piix4_config_w(busdevice, device, function, reg + 3, (data >> 24) & 0xff);
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}
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if (ACCESSING_BITS_16_23)
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{
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piix4_config_w(busdevice, device, function, reg + 2, (data >> 16) & 0xff);
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}
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if (ACCESSING_BITS_8_15)
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{
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piix4_config_w(busdevice, device, function, reg + 1, (data >> 8) & 0xff);
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}
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if (ACCESSING_BITS_0_7)
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{
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piix4_config_w(busdevice, device, function, reg + 0, (data >> 0) & 0xff);
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}
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}
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// ISA Plug-n-Play
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WRITE32_MEMBER(gamecstl_state::pnp_config_w)
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{
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if (ACCESSING_BITS_8_15)
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{
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// osd_printf_debug("PNP Config: %02X\n", (data >> 8) & 0xff);
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}
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}
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WRITE32_MEMBER(gamecstl_state::pnp_data_w)
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{
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if (ACCESSING_BITS_8_15)
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{
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// osd_printf_debug("PNP Data: %02X\n", (data >> 8) & 0xff);
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}
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}
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WRITE32_MEMBER(gamecstl_state::bios_ram_w)
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{
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if (m_mtxc_config_reg[0x59] & 0x20) // write to RAM if this region is write-enabled
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{
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COMBINE_DATA(m_bios_ram + offset);
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}
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}
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/*****************************************************************************/
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static ADDRESS_MAP_START( gamecstl_map, AS_PROGRAM, 32, gamecstl_state )
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AM_RANGE(0x00000000, 0x0009ffff) AM_RAM
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AM_RANGE(0x000a0000, 0x000affff) AM_RAM
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AM_RANGE(0x000b0000, 0x000b7fff) AM_RAM AM_SHARE("cga_ram")
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AM_RANGE(0x000e0000, 0x000effff) AM_RAM
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AM_RANGE(0x000f0000, 0x000fffff) AM_ROMBANK("bank1")
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AM_RANGE(0x000f0000, 0x000fffff) AM_WRITE(bios_ram_w)
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AM_RANGE(0x00100000, 0x01ffffff) AM_RAM
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AM_RANGE(0xfffc0000, 0xffffffff) AM_ROM AM_REGION("bios", 0) /* System BIOS */
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ADDRESS_MAP_END
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static ADDRESS_MAP_START(gamecstl_io, AS_IO, 32, gamecstl_state )
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AM_IMPORT_FROM(pcat32_io_common)
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AM_RANGE(0x00e8, 0x00eb) AM_NOP
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AM_RANGE(0x00ec, 0x00ef) AM_NOP
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AM_RANGE(0x01f0, 0x01f7) AM_DEVREADWRITE16("ide", ide_controller_device, read_cs0, write_cs0, 0xffffffff)
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AM_RANGE(0x0300, 0x03af) AM_NOP
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AM_RANGE(0x03b0, 0x03df) AM_NOP
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AM_RANGE(0x0278, 0x027b) AM_WRITE(pnp_config_w)
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AM_RANGE(0x03f0, 0x03f7) AM_DEVREADWRITE16("ide", ide_controller_device, read_cs1, write_cs1, 0xffffffff)
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AM_RANGE(0x0a78, 0x0a7b) AM_WRITE(pnp_data_w)
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AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE("pcibus", pci_bus_legacy_device, read, write)
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ADDRESS_MAP_END
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/*****************************************************************************/
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static const gfx_layout CGA_charlayout =
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{
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8,8, /* 8 x 16 characters */
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256, /* 256 characters */
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1, /* 1 bits per pixel */
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{ 0 }, /* no bitplanes; 1 bit per pixel */
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/* x offsets */
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{ 0,1,2,3,4,5,6,7 },
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/* y offsets */
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{ 0*8,1*8,2*8,3*8,
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4*8,5*8,6*8,7*8 },
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8*8 /* every char takes 8 bytes */
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};
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static GFXDECODE_START( CGA )
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/* Support up to four CGA fonts */
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GFXDECODE_ENTRY( "gfx1", 0x0000, CGA_charlayout, 0, 256 ) /* Font 0 */
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GFXDECODE_ENTRY( "gfx1", 0x0800, CGA_charlayout, 0, 256 ) /* Font 1 */
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GFXDECODE_ENTRY( "gfx1", 0x1000, CGA_charlayout, 0, 256 ) /* Font 2 */
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GFXDECODE_ENTRY( "gfx1", 0x1800, CGA_charlayout, 0, 256 ) /* Font 3*/
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GFXDECODE_END
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#define AT_KEYB_HELPER(bit, text, key1) \
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PORT_BIT( bit, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_NAME(text) PORT_CODE(key1)
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static INPUT_PORTS_START(gamecstl)
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PORT_START("pc_keyboard_0")
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PORT_BIT ( 0x0001, 0x0000, IPT_UNUSED ) /* unused scancode 0 */
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AT_KEYB_HELPER( 0x0002, "Esc", KEYCODE_Q ) /* Esc 01 81 */
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PORT_START("pc_keyboard_1")
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AT_KEYB_HELPER( 0x0020, "Y", KEYCODE_Y ) /* Y 15 95 */
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AT_KEYB_HELPER( 0x1000, "Enter", KEYCODE_ENTER ) /* Enter 1C 9C */
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PORT_START("pc_keyboard_2")
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PORT_START("pc_keyboard_3")
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AT_KEYB_HELPER( 0x0002, "N", KEYCODE_N ) /* N 31 B1 */
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AT_KEYB_HELPER( 0x0800, "F1", KEYCODE_S ) /* F1 3B BB */
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PORT_START("pc_keyboard_4")
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PORT_START("pc_keyboard_5")
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PORT_START("pc_keyboard_6")
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AT_KEYB_HELPER( 0x0040, "(MF2)Cursor Up", KEYCODE_UP ) /* Up 67 e7 */
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AT_KEYB_HELPER( 0x0080, "(MF2)Page Up", KEYCODE_PGUP ) /* Page Up 68 e8 */
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AT_KEYB_HELPER( 0x0100, "(MF2)Cursor Left", KEYCODE_LEFT ) /* Left 69 e9 */
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AT_KEYB_HELPER( 0x0200, "(MF2)Cursor Right", KEYCODE_RIGHT ) /* Right 6a ea */
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AT_KEYB_HELPER( 0x0800, "(MF2)Cursor Down", KEYCODE_DOWN ) /* Down 6c ec */
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AT_KEYB_HELPER( 0x1000, "(MF2)Page Down", KEYCODE_PGDN ) /* Page Down 6d ed */
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AT_KEYB_HELPER( 0x4000, "Del", KEYCODE_A ) /* Delete 6f ef */
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PORT_START("pc_keyboard_7")
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INPUT_PORTS_END
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void gamecstl_state::machine_start()
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{
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}
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void gamecstl_state::machine_reset()
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{
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membank("bank1")->set_base(memregion("bios")->base() + 0x30000);
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}
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static MACHINE_CONFIG_START( gamecstl, gamecstl_state )
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/* basic machine hardware */
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MCFG_CPU_ADD("maincpu", PENTIUM3, 200000000)
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MCFG_CPU_PROGRAM_MAP(gamecstl_map)
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MCFG_CPU_IO_MAP(gamecstl_io)
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MCFG_CPU_IRQ_ACKNOWLEDGE_DEVICE("pic8259_1", pic8259_device, inta_cb)
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MCFG_FRAGMENT_ADD( pcat_common )
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MCFG_PCI_BUS_LEGACY_ADD("pcibus", 0)
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MCFG_PCI_BUS_LEGACY_DEVICE(0, NULL, intel82439tx_pci_r, intel82439tx_pci_w)
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MCFG_PCI_BUS_LEGACY_DEVICE(7, NULL, intel82371ab_pci_r, intel82371ab_pci_w)
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MCFG_IDE_CONTROLLER_ADD("ide", ata_devices, "hdd", NULL, true)
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MCFG_ATA_INTERFACE_IRQ_HANDLER(DEVWRITELINE("pic8259_2", pic8259_device, ir6_w))
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/* video hardware */
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MCFG_SCREEN_ADD("screen", RASTER)
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MCFG_SCREEN_REFRESH_RATE(60)
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MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
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MCFG_SCREEN_SIZE(640, 480)
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MCFG_SCREEN_VISIBLE_AREA(0, 639, 0, 199)
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MCFG_SCREEN_UPDATE_DRIVER(gamecstl_state, screen_update_gamecstl)
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MCFG_SCREEN_PALETTE("palette")
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MCFG_GFXDECODE_ADD("gfxdecode", "palette", CGA)
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MCFG_PALETTE_ADD("palette", 16)
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MACHINE_CONFIG_END
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DRIVER_INIT_MEMBER(gamecstl_state,gamecstl)
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{
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m_bios_ram = auto_alloc_array(machine(), UINT32, 0x10000/4);
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intel82439tx_init();
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}
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/*****************************************************************************/
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// not the correct BIOS, f205v owes me a dump of it...
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ROM_START(gamecstl)
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ROM_REGION32_LE(0x40000, "bios", 0)
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ROM_LOAD( "bios.bin", 0x000000, 0x040000, BAD_DUMP CRC(27834ce9) SHA1(134c546dd75138c6f4bc5729b40e20e118454df9) )
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ROM_REGION(0x08100, "gfx1", 0)
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ROM_LOAD("cga.chr", 0x00000, 0x01000, BAD_DUMP CRC(42009069) SHA1(ed08559ce2d7f97f68b9f540bddad5b6295294dd))
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DISK_REGION( "ide:0:hdd:image" )
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DISK_IMAGE( "gamecstl", 0, SHA1(b431af3c42c48ba07972d77a3d24e60ee1e4359e) )
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ROM_END
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ROM_START(gamecst2)
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ROM_REGION32_LE(0x40000, "bios", 0)
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ROM_LOAD( "bios.bin", 0x000000, 0x040000, BAD_DUMP CRC(27834ce9) SHA1(134c546dd75138c6f4bc5729b40e20e118454df9) )
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ROM_REGION(0x08100, "gfx1", 0)
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ROM_LOAD("cga.chr", 0x00000, 0x01000, BAD_DUMP CRC(42009069) SHA1(ed08559ce2d7f97f68b9f540bddad5b6295294dd))
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DISK_REGION( "ide:0:hdd:image" )
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DISK_IMAGE( "gamecst2", 0, SHA1(14e1b311cb474801c7bdda3164a0c220fb102159) )
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ROM_END
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/*****************************************************************************/
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GAME(2002, gamecstl, 0, gamecstl, gamecstl, gamecstl_state, gamecstl, ROT0, "Cristaltec", "GameCristal", GAME_NOT_WORKING | GAME_NO_SOUND)
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GAME(2002, gamecst2, gamecstl, gamecstl, gamecstl, gamecstl_state, gamecstl, ROT0, "Cristaltec", "GameCristal (version 2.613)", GAME_NOT_WORKING | GAME_NO_SOUND)
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