mirror of
https://github.com/holub/mame
synced 2025-04-23 08:49:55 +03:00
hcd62121: several small cleanups (nw)
This commit is contained in:
Wilbert Pol
parent
8d6054db1e
commit
fc16e06975
@ -611,7 +611,6 @@ if (CPUS["HCD62121"]~=null) then
|
||||
files {
|
||||
MAME_DIR .. "src/devices/cpu/hcd62121/hcd62121.cpp",
|
||||
MAME_DIR .. "src/devices/cpu/hcd62121/hcd62121.h",
|
||||
MAME_DIR .. "src/devices/cpu/hcd62121/hcd62121_ops.h",
|
||||
}
|
||||
end
|
||||
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@ -20,17 +20,10 @@ enum
|
||||
};
|
||||
|
||||
|
||||
/* I/O ports */
|
||||
enum
|
||||
{
|
||||
/* Output ports */
|
||||
HCD62121_KOL=0x00,
|
||||
HCD62121_KOH,
|
||||
/* Input ports */
|
||||
HCD62121_KI,
|
||||
/* Other I/O ports */
|
||||
HCD62121_IN0
|
||||
};
|
||||
#define MCFG_HCD62121_KOL_CB(_devcb) devcb = &hcd62121_cpu_device::set_kol_callback(*device, DEVCB_##_devcb);
|
||||
#define MCFG_HCD62121_KOH_CB(_devcb) devcb = &hcd62121_cpu_device::set_koh_callback(*device, DEVCB_##_devcb);
|
||||
#define MCFG_HCD62121_KI_CB(_devcb) devcb = &hcd62121_cpu_device::set_ki_callback(*device, DEVCB_##_devcb);
|
||||
#define MCFG_HCD62121_IN0_CB(_devcb) devcb = &hcd62121_cpu_device::set_in0_callback(*device, DEVCB_##_devcb);
|
||||
|
||||
|
||||
class hcd62121_cpu_device : public cpu_device
|
||||
@ -39,58 +32,85 @@ public:
|
||||
// construction/destruction
|
||||
hcd62121_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
template<class _Object> static devcb_base &set_kol_callback(device_t &device, _Object object) { return downcast<hcd62121_cpu_device &>(device).m_kol_cb.set_callback(object); }
|
||||
template<class _Object> static devcb_base &set_koh_callback(device_t &device, _Object object) { return downcast<hcd62121_cpu_device &>(device).m_koh_cb.set_callback(object); }
|
||||
template<class _Object> static devcb_base &set_ki_callback(device_t &device, _Object object) { return downcast<hcd62121_cpu_device &>(device).m_ki_cb.set_callback(object); }
|
||||
template<class _Object> static devcb_base &set_in0_callback(device_t &device, _Object object) { return downcast<hcd62121_cpu_device &>(device).m_in0_cb.set_callback(object); }
|
||||
|
||||
protected:
|
||||
// device-level overrides
|
||||
virtual void device_start() override;
|
||||
virtual void device_reset() override;
|
||||
|
||||
// device_execute_interface overrides
|
||||
virtual uint32_t execute_min_cycles() const override { return 4; }
|
||||
virtual uint32_t execute_max_cycles() const override { return 48; }
|
||||
virtual uint32_t execute_input_lines() const override { return 2; }
|
||||
virtual u32 execute_min_cycles() const override { return 4; }
|
||||
virtual u32 execute_max_cycles() const override { return 48; }
|
||||
virtual u32 execute_input_lines() const override { return 2; }
|
||||
virtual void execute_run() override;
|
||||
|
||||
// device_memory_interface overrides
|
||||
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const override { return (spacenum == AS_PROGRAM) ? &m_program_config : ( (spacenum == AS_IO) ? &m_io_config : nullptr ); }
|
||||
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const override { return (spacenum == AS_PROGRAM) ? &m_program_config : nullptr; }
|
||||
|
||||
// device_state_interface overrides
|
||||
virtual void state_export(const device_state_entry &entry) override;
|
||||
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
|
||||
|
||||
// device_disasm_interface overrides
|
||||
virtual uint32_t disasm_min_opcode_bytes() const override { return 1; }
|
||||
virtual uint32_t disasm_max_opcode_bytes() const override { return 18; }
|
||||
virtual offs_t disasm_disassemble(std::ostream &stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
|
||||
virtual u32 disasm_min_opcode_bytes() const override { return 1; }
|
||||
virtual u32 disasm_max_opcode_bytes() const override { return 18; }
|
||||
virtual offs_t disasm_disassemble(std::ostream &stream, offs_t pc, const u8 *oprom, const u8 *opram, u32 options) override;
|
||||
|
||||
uint8_t read_op();
|
||||
uint8_t datasize( uint8_t op );
|
||||
void read_reg( int size, uint8_t op1 );
|
||||
void write_reg( int size, uint8_t op1 );
|
||||
void read_regreg( int size, uint8_t op1, uint8_t op2, bool op_is_logical );
|
||||
void write_regreg( int size, uint8_t op1, uint8_t op2 );
|
||||
void read_iregreg( int size, uint8_t op1, uint8_t op2 );
|
||||
void write_iregreg( int size, uint8_t op1, uint8_t op2 );
|
||||
void write_iregreg2( int size, uint8_t op1, uint8_t op2 );
|
||||
int check_cond( uint8_t op );
|
||||
private:
|
||||
u8 read_op();
|
||||
u8 datasize(u8 op);
|
||||
void read_reg(int size, u8 op1);
|
||||
void write_reg(int size, u8 op1);
|
||||
void read_regreg(int size, u8 op1, u8 op2, bool op_is_logical);
|
||||
void write_regreg(int size, u8 op1, u8 op2);
|
||||
void read_iregreg(int size, u8 op1, u8 op2);
|
||||
void write_iregreg(int size, u8 op1, u8 op2);
|
||||
void write_iregreg2(int size, u8 op1, u8 op2);
|
||||
bool check_cond(u8 op);
|
||||
void set_zero_flag(bool is_zero);
|
||||
void set_carry_flag(bool is_carry);
|
||||
void set_zl_flag(bool is_zl);
|
||||
void set_zh_flag(bool is_zh);
|
||||
void set_cl_flag(bool is_cl);
|
||||
void op_msk(int size);
|
||||
void op_imsk(int size);
|
||||
void op_and(int size);
|
||||
void op_or(int size);
|
||||
void op_xor(int size);
|
||||
void op_add(int size);
|
||||
void op_addb(int size);
|
||||
void op_sub(int size);
|
||||
void op_pushw(u16 source);
|
||||
u16 op_popw();
|
||||
|
||||
address_space_config m_program_config;
|
||||
address_space_config m_io_config;
|
||||
|
||||
uint32_t m_prev_pc;
|
||||
uint16_t m_sp;
|
||||
uint16_t m_ip;
|
||||
uint8_t m_dsize;
|
||||
uint8_t m_cseg;
|
||||
uint8_t m_dseg;
|
||||
uint8_t m_sseg;
|
||||
uint8_t m_f;
|
||||
uint16_t m_lar;
|
||||
uint8_t m_reg[0x80];
|
||||
uint8_t m_temp1[0x10];
|
||||
uint8_t m_temp2[0x10];
|
||||
u32 m_prev_pc;
|
||||
u16 m_sp;
|
||||
u16 m_ip;
|
||||
u8 m_dsize;
|
||||
u8 m_cseg;
|
||||
u8 m_dseg;
|
||||
u8 m_sseg;
|
||||
u8 m_f;
|
||||
u16 m_lar;
|
||||
u8 m_reg[0x80];
|
||||
u8 m_temp1[0x10];
|
||||
u8 m_temp2[0x10];
|
||||
u32 m_rtemp;
|
||||
|
||||
address_space *m_program;
|
||||
address_space *m_io;
|
||||
|
||||
int m_icount;
|
||||
|
||||
devcb_write8 m_kol_cb;
|
||||
devcb_write8 m_koh_cb;
|
||||
devcb_read8 m_ki_cb;
|
||||
devcb_read8 m_in0_cb;
|
||||
};
|
||||
|
||||
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@ -2,139 +2,214 @@
|
||||
// copyright-holders:Wilbert Pol
|
||||
|
||||
#include "emu.h"
|
||||
#include "debugger.h"
|
||||
#include "hcd62121.h"
|
||||
|
||||
#ifdef _MSC_VER
|
||||
#undef _SP
|
||||
#endif
|
||||
|
||||
enum
|
||||
{
|
||||
_REG=1, /* register */
|
||||
_REGREG, /* register1, register2, or register2, register1 or register1, imm byte */
|
||||
_IRG, /* register indirect */
|
||||
_IRGREG, /* 2 register indirect */
|
||||
_A16, /* 16bit address */
|
||||
_A24, /* seg:address */
|
||||
_F, /* flag register */
|
||||
_CS, /* cs register */
|
||||
_DS, /* ds register */
|
||||
_SS, /* ss register */
|
||||
_PC, /* program counter */
|
||||
_SP, /* stack pointer */
|
||||
_I8, /* immediate 8 bit value */
|
||||
_I16, /* immediate 16 bit value */
|
||||
_I64, /* immediate 64 bit value */
|
||||
_I80, /* immediate 80 bit value */
|
||||
_ILR, /* indirect last address register access */
|
||||
_LAR, /* last address register */
|
||||
_DSZ, /* dsize register? */
|
||||
_TIM, /* timing related register? */
|
||||
_KLO, /* KO1 - KO8 output lines */
|
||||
_KHI, /* KO9 - KO14(?) output lines */
|
||||
_KI, /* K input lines */
|
||||
_4 /* for nibble shifts */
|
||||
ARG_NONE=0, /* no argument or unknown */
|
||||
ARG_REG, /* register */
|
||||
ARG_REGREG, /* register1, register2, or register2, register1 or register1, imm byte */
|
||||
ARG_IRG, /* register indirect */
|
||||
ARG_IRGREG, /* 2 register indirect */
|
||||
ARG_A16, /* 16bit address */
|
||||
ARG_A24, /* seg:address */
|
||||
ARG_F, /* flag register */
|
||||
ARG_CS, /* cs register */
|
||||
ARG_DS, /* ds register */
|
||||
ARG_SS, /* ss register */
|
||||
ARG_PC, /* program counter */
|
||||
ARG_SP, /* stack pointer */
|
||||
ARG_I8, /* immediate 8 bit value */
|
||||
ARG_I16, /* immediate 16 bit value */
|
||||
ARG_I64, /* immediate 64 bit value */
|
||||
ARG_I80, /* immediate 80 bit value */
|
||||
ARG_ILR, /* indirect last address register access */
|
||||
ARG_LAR, /* last address register */
|
||||
ARG_DSZ, /* dsize register? */
|
||||
ARG_TIM, /* timing related register? */
|
||||
ARG_KLO, /* KO1 - KO8 output lines */
|
||||
ARG_KHI, /* KO9 - KO14(?) output lines */
|
||||
ARG_KI, /* K input lines */
|
||||
ARG_4 /* for nibble shifts */
|
||||
};
|
||||
|
||||
struct hcd62121_dasm
|
||||
{
|
||||
const char *str;
|
||||
uint8_t arg1;
|
||||
uint8_t arg2;
|
||||
u8 arg1;
|
||||
u8 arg2;
|
||||
};
|
||||
|
||||
|
||||
static const hcd62121_dasm hcd62121_ops[256] =
|
||||
{
|
||||
/* 0x00 */
|
||||
{ "un00?", 0, 0 }, { "un01?", 0, 0 }, { "un02?", 0, 0 }, { "un03?", 0, 0 },
|
||||
{ "mskb", _REGREG, 0 }, { "mskw", _REGREG, 0 }, { "mskq", _REGREG, 0 }, { "mskt", _REGREG, 0 },
|
||||
{ "sh?b", _REG, _4 }, { "sh?w", _REG, _4 }, { "sh?q", _REG, _4 }, { "sh?t", _REG, _4 },
|
||||
{ "tstb", _REGREG, 0 }, { "tstw", _REGREG, 0 }, { "tstq", _REGREG, 0 }, { "tstt", _REGREG, 0 },
|
||||
{ "xorb", _REGREG, 0 }, { "xorw", _REGREG, 0 }, { "xorq", _REGREG, 0 }, { "xort", _REGREG, 0 },
|
||||
{ "cmpb", _REGREG, 0 }, { "cmpw", _REGREG, 0 }, { "cmpq", _REGREG, 0 }, { "cmpt", _REGREG, 0 },
|
||||
{ "movb", _REGREG, 0 }, { "movw", _REGREG, 0 }, { "movq", _REGREG, 0 }, { "movt", _REGREG, 0 },
|
||||
{ "imskb", _REGREG, 0 }, { "imskw", _REGREG, 0 }, { "imskq", _REGREG, 0 }, { "imskt", _REGREG, 0 },
|
||||
{ "un00?", ARG_NONE, ARG_NONE }, { "un01?", ARG_NONE, ARG_NONE },
|
||||
{ "un02?", ARG_NONE, ARG_NONE }, { "un03?", ARG_NONE, ARG_NONE },
|
||||
{ "mskb", ARG_REGREG, ARG_NONE }, { "mskw", ARG_REGREG, ARG_NONE },
|
||||
{ "mskq", ARG_REGREG, ARG_NONE }, { "mskt", ARG_REGREG, ARG_NONE },
|
||||
{ "sh?b", ARG_REG, ARG_4 }, { "sh?w", ARG_REG, ARG_4 },
|
||||
{ "sh?q", ARG_REG, ARG_4 }, { "sh?t", ARG_REG, ARG_4 },
|
||||
{ "tstb", ARG_REGREG, ARG_NONE }, { "tstw", ARG_REGREG, ARG_NONE },
|
||||
{ "tstq", ARG_REGREG, ARG_NONE }, { "tstt", ARG_REGREG, ARG_NONE },
|
||||
|
||||
/* 0x10 */
|
||||
{ "xorb", ARG_REGREG, ARG_NONE }, { "xorw", ARG_REGREG, ARG_NONE },
|
||||
{ "xorq", ARG_REGREG, ARG_NONE }, { "xort", ARG_REGREG, ARG_NONE },
|
||||
{ "cmpb", ARG_REGREG, ARG_NONE }, { "cmpw", ARG_REGREG, ARG_NONE },
|
||||
{ "cmpq", ARG_REGREG, ARG_NONE }, { "cmpt", ARG_REGREG, ARG_NONE },
|
||||
{ "movb", ARG_REGREG, ARG_NONE }, { "movw", ARG_REGREG, ARG_NONE },
|
||||
{ "movq", ARG_REGREG, ARG_NONE }, { "movt", ARG_REGREG, ARG_NONE },
|
||||
{ "imskb", ARG_REGREG, ARG_NONE }, { "imskw", ARG_REGREG, ARG_NONE },
|
||||
{ "imskq", ARG_REGREG, ARG_NONE }, { "imskt", ARG_REGREG, ARG_NONE },
|
||||
|
||||
/* 0x20 */
|
||||
{ "shrb", _REG, 0 }, { "shrw", _REG, 0 }, { "shrq", _REG, 0 }, { "shrt", _REG, 0 },
|
||||
{ "orb", _REGREG, 0 }, { "orw", _REGREG, 0 }, { "orq", _REGREG, 0 }, { "ort", _REGREG, 0 },
|
||||
{ "shlb", _REG, 0 }, { "shlw", _REG, 0 }, { "shlq", _REG, 0 }, { "shlt", _REG, 0 },
|
||||
{ "andb", _REGREG, 0 }, { "andw", _REGREG, 0 }, { "andq", _REGREG, 0 }, { "andt", _REGREG, 0 },
|
||||
{ "sbbb", _REGREG, 0 }, { "sbbw", _REGREG, 0 }, { "sbbq", _REGREG, 0 }, { "sbbt", _REGREG, 0 }, /* BCD SUB */
|
||||
{ "subb", _REGREG, 0 }, { "subw", _REGREG, 0 }, { "subq", _REGREG, 0 }, { "subt", _REGREG, 0 },
|
||||
{ "adbb", _REGREG, 0 }, { "adbw", _REGREG, 0 }, { "adbq", _REGREG, 0 }, { "adbt", _REGREG, 0 }, /* BCD ADD */
|
||||
{ "addb", _REGREG, 0 }, { "addw", _REGREG, 0 }, { "addq", _REGREG, 0 }, { "addt", _REGREG, 0 },
|
||||
{ "shrb", ARG_REG, ARG_NONE }, { "shrw", ARG_REG, ARG_NONE },
|
||||
{ "shrq", ARG_REG, ARG_NONE }, { "shrt", ARG_REG, ARG_NONE },
|
||||
{ "orb", ARG_REGREG, ARG_NONE }, { "orw", ARG_REGREG, ARG_NONE },
|
||||
{ "orq", ARG_REGREG, ARG_NONE }, { "ort", ARG_REGREG, ARG_NONE },
|
||||
{ "shlb", ARG_REG, ARG_NONE }, { "shlw", ARG_REG, ARG_NONE },
|
||||
{ "shlq", ARG_REG, ARG_NONE }, { "shlt", ARG_REG, ARG_NONE },
|
||||
{ "andb", ARG_REGREG, ARG_NONE }, { "andw", ARG_REGREG, ARG_NONE },
|
||||
{ "andq", ARG_REGREG, ARG_NONE }, { "andt", ARG_REGREG, ARG_NONE },
|
||||
|
||||
/* 0x30 */
|
||||
{ "sbbb", ARG_REGREG, ARG_NONE }, { "sbbw", ARG_REGREG, ARG_NONE }, /* BCD SUB */
|
||||
{ "sbbq", ARG_REGREG, ARG_NONE }, { "sbbt", ARG_REGREG, ARG_NONE }, /* BCD SUB */
|
||||
{ "subb", ARG_REGREG, ARG_NONE }, { "subw", ARG_REGREG, ARG_NONE },
|
||||
{ "subq", ARG_REGREG, ARG_NONE }, { "subt", ARG_REGREG, ARG_NONE },
|
||||
{ "adbb", ARG_REGREG, ARG_NONE }, { "adbw", ARG_REGREG, ARG_NONE }, /* BCD ADD */
|
||||
{ "adbq", ARG_REGREG, ARG_NONE }, { "adbt", ARG_REGREG, ARG_NONE }, /* BCD ADD */
|
||||
{ "addb", ARG_REGREG, ARG_NONE }, { "addw", ARG_REGREG, ARG_NONE },
|
||||
{ "addq", ARG_REGREG, ARG_NONE }, { "addt", ARG_REGREG, ARG_NONE },
|
||||
|
||||
/* 0x40 */
|
||||
{ "shrb?", _IRG, 0 }, { "shrw?", _IRG, 0 }, { "shrq?", _IRG, 0 }, { "shrt?", _IRG, 0 },
|
||||
{ "mskb", _IRGREG, 0 }, { "mskw", _IRGREG, 0 }, { "mskq", _IRGREG, 0 }, { "mskt", _IRGREG, 0 },
|
||||
{ "shrb", _IRG, 0 }, { "shrw", _IRG, 0 }, { "shrq", _IRG, 0 }, { "shrt", _IRG, 0 },
|
||||
{ "tstb", _IRGREG, 0 }, { "tstw", _IRGREG, 0 }, { "tstq", _IRGREG, 0 }, { "tstt", _IRGREG, 0 },
|
||||
{ "xorb", _IRGREG, 0 }, { "xorw", _IRGREG, 0 }, { "xorq", _IRGREG, 0 }, { "xort", _IRGREG, 0 },
|
||||
{ "cmpb", _IRGREG, 0 }, { "cmpw", _IRGREG, 0 }, { "cmpq", _IRGREG, 0 }, { "cmpt", _IRGREG, 0 },
|
||||
{ "movb", _IRGREG, 0 }, { "movw", _IRGREG, 0 }, { "movq", _IRGREG, 0 }, { "movt", _IRGREG, 0 },
|
||||
{ "imskb", _IRGREG, 0 }, { "imskw", _IRGREG, 0 }, { "imskq", _IRGREG, 0 }, { "imskt", _IRGREG, 0 },
|
||||
{ "shrb?", ARG_IRG, ARG_NONE }, { "shrw?", ARG_IRG, ARG_NONE },
|
||||
{ "shrq?", ARG_IRG, ARG_NONE }, { "shrt?", ARG_IRG, ARG_NONE },
|
||||
{ "mskb", ARG_IRGREG, ARG_NONE }, { "mskw", ARG_IRGREG, ARG_NONE },
|
||||
{ "mskq", ARG_IRGREG, ARG_NONE }, { "mskt", ARG_IRGREG, ARG_NONE },
|
||||
{ "shrb", ARG_IRG, ARG_NONE }, { "shrw", ARG_IRG, ARG_NONE },
|
||||
{ "shrq", ARG_IRG, ARG_NONE }, { "shrt", ARG_IRG, ARG_NONE },
|
||||
{ "tstb", ARG_IRGREG, ARG_NONE }, { "tstw", ARG_IRGREG, ARG_NONE },
|
||||
{ "tstq", ARG_IRGREG, ARG_NONE }, { "tstt", ARG_IRGREG, ARG_NONE },
|
||||
|
||||
/* 0x50 */
|
||||
{ "xorb", ARG_IRGREG, ARG_NONE }, { "xorw", ARG_IRGREG, ARG_NONE },
|
||||
{ "xorq", ARG_IRGREG, ARG_NONE }, { "xort", ARG_IRGREG, ARG_NONE },
|
||||
{ "cmpb", ARG_IRGREG, ARG_NONE }, { "cmpw", ARG_IRGREG, ARG_NONE },
|
||||
{ "cmpq", ARG_IRGREG, ARG_NONE }, { "cmpt", ARG_IRGREG, ARG_NONE },
|
||||
{ "movb", ARG_IRGREG, ARG_NONE }, { "movw", ARG_IRGREG, ARG_NONE },
|
||||
{ "movq", ARG_IRGREG, ARG_NONE }, { "movt", ARG_IRGREG, ARG_NONE },
|
||||
{ "imskb", ARG_IRGREG, ARG_NONE }, { "imskw", ARG_IRGREG, ARG_NONE },
|
||||
{ "imskq", ARG_IRGREG, ARG_NONE }, { "imskt", ARG_IRGREG, ARG_NONE },
|
||||
|
||||
/* 0x60 */
|
||||
{ "shrb", _IRG, 0 }, { "shrw", _IRG, 0 }, { "shrq", _IRG, 0 }, { "shrt", _IRG, 0 },
|
||||
{ "orb", _IRGREG, 0 }, { "orw", _IRGREG, 0 }, { "orq", _IRGREG, 0 }, { "ort", _IRGREG, 0 },
|
||||
{ "shlb", _IRG, 0 }, { "shlw", _IRG, 0 }, { "shlq", _IRG, 0 }, { "shlt", _IRG, 0 },
|
||||
{ "andb", _IRGREG, 0 }, { "andw", _IRGREG, 0 }, { "andq", _IRGREG, 0 }, { "andt", _IRGREG, 0 },
|
||||
{ "sbbb", _IRGREG, 0 }, { "sbbw", _IRGREG, 0 }, { "sbbq", _IRGREG, 0 }, { "sbbt", _IRGREG, 0 }, /* BCD SUB */
|
||||
{ "subb", _IRGREG, 0 }, { "subw", _IRGREG, 0 }, { "subq", _IRGREG, 0 }, { "subt", _IRGREG, 0 },
|
||||
{ "adbb", _IRGREG, 0 }, { "adbw", _IRGREG, 0 }, { "adbq", _IRGREG, 0 }, { "adbt", _IRGREG, 0 }, /* BCD ADD */
|
||||
{ "addb", _IRGREG, 0 }, { "addw", _IRGREG, 0 }, { "addq", _IRGREG, 0 }, { "addt", _IRGREG, 0 },
|
||||
{ "shrb", ARG_IRG, ARG_NONE }, { "shrw", ARG_IRG, ARG_NONE },
|
||||
{ "shrq", ARG_IRG, ARG_NONE }, { "shrt", ARG_IRG, ARG_NONE },
|
||||
{ "orb", ARG_IRGREG, ARG_NONE }, { "orw", ARG_IRGREG, ARG_NONE },
|
||||
{ "orq", ARG_IRGREG, ARG_NONE }, { "ort", ARG_IRGREG, ARG_NONE },
|
||||
{ "shlb", ARG_IRG, ARG_NONE }, { "shlw", ARG_IRG, ARG_NONE },
|
||||
{ "shlq", ARG_IRG, ARG_NONE }, { "shlt", ARG_IRG, ARG_NONE },
|
||||
{ "andb", ARG_IRGREG, ARG_NONE }, { "andw", ARG_IRGREG, ARG_NONE },
|
||||
{ "andq", ARG_IRGREG, ARG_NONE }, { "andt", ARG_IRGREG, ARG_NONE },
|
||||
|
||||
/* 0x70 */
|
||||
{ "sbbb", ARG_IRGREG, ARG_NONE }, { "sbbw", ARG_IRGREG, ARG_NONE }, /* BCD SUB */
|
||||
{ "sbbq", ARG_IRGREG, ARG_NONE }, { "sbbt", ARG_IRGREG, ARG_NONE }, /* BCD SUB */
|
||||
{ "subb", ARG_IRGREG, ARG_NONE }, { "subw", ARG_IRGREG, ARG_NONE },
|
||||
{ "subq", ARG_IRGREG, ARG_NONE }, { "subt", ARG_IRGREG, ARG_NONE },
|
||||
{ "adbb", ARG_IRGREG, ARG_NONE }, { "adbw", ARG_IRGREG, ARG_NONE }, /* BCD ADD */
|
||||
{ "adbq", ARG_IRGREG, ARG_NONE }, { "adbt", ARG_IRGREG, ARG_NONE }, /* BCD ADD */
|
||||
{ "addb", ARG_IRGREG, ARG_NONE }, { "addw", ARG_IRGREG, ARG_NONE },
|
||||
{ "addq", ARG_IRGREG, ARG_NONE }, { "addt", ARG_IRGREG, ARG_NONE },
|
||||
|
||||
/* 0x80 */
|
||||
{ "un80?", 0, 0 }, { "un81?", 0, 0 }, { "un82?", 0, 0 }, { "un83?", 0, 0 },
|
||||
{ "un84?", 0, 0 }, { "un85?", 0, 0 }, { "un86?", 0, 0 }, { "un87?", 0, 0 },
|
||||
{ "jump", _A16, 0 }, { "jump", _A24, 0 }, { "call", _A16, 0 }, { "un8b?", 0, 0 },
|
||||
{ "un8C?", 0, 0 }, { "un8D?", 0, 0 }, { "un8E?", 0, 0 }, { "un8F?", 0, 0 },
|
||||
{ "retzh", 0, 0 }, { "retzl", 0, 0 }, { "retc", 0, 0 }, { "retz", 0, 0 },
|
||||
{ "retzc", 0, 0 }, { "retcl", 0, 0 }, { "retnc", 0, 0 }, { "retnz", 0, 0 },
|
||||
{ "jump", _IRG, 0 }, { "un99?", 0, 0 }, { "un9A?", 0, 0 }, { "un9b?", 0, 0 },
|
||||
{ "un9C?", 0, 0 }, { "un9D?", 0, 0 }, { "reti", 0, 0 }, { "ret", 0, 0 },
|
||||
{ "un80?", ARG_NONE, ARG_NONE }, { "un81?", ARG_NONE, ARG_NONE },
|
||||
{ "un82?", ARG_NONE, ARG_NONE }, { "un83?", ARG_NONE, ARG_NONE },
|
||||
{ "un84?", ARG_NONE, ARG_NONE }, { "un85?", ARG_NONE, ARG_NONE },
|
||||
{ "un86?", ARG_NONE, ARG_NONE }, { "un87?", ARG_NONE, ARG_NONE },
|
||||
{ "jump", ARG_A16, ARG_NONE }, { "jump", ARG_A24, ARG_NONE },
|
||||
{ "call", ARG_A16, ARG_NONE }, { "un8b?", ARG_NONE, ARG_NONE },
|
||||
{ "un8C?", ARG_NONE, ARG_NONE }, { "un8D?", ARG_NONE, ARG_NONE },
|
||||
{ "un8E?", ARG_NONE, ARG_NONE }, { "un8F?", ARG_NONE, ARG_NONE },
|
||||
|
||||
/* 0x90 */
|
||||
{ "retzh", ARG_NONE, ARG_NONE }, { "retzl", ARG_NONE, ARG_NONE },
|
||||
{ "retc", ARG_NONE, ARG_NONE }, { "retz", ARG_NONE, ARG_NONE },
|
||||
{ "retzc", ARG_NONE, ARG_NONE }, { "retcl", ARG_NONE, ARG_NONE },
|
||||
{ "retnc", ARG_NONE, ARG_NONE }, { "retnz", ARG_NONE, ARG_NONE },
|
||||
{ "jump", ARG_IRG, ARG_NONE }, { "un99?", ARG_NONE, ARG_NONE },
|
||||
{ "un9A?", ARG_NONE, ARG_NONE }, { "un9b?", ARG_NONE, ARG_NONE },
|
||||
{ "un9C?", ARG_NONE, ARG_NONE }, { "un9D?", ARG_NONE, ARG_NONE },
|
||||
{ "reti", ARG_NONE, ARG_NONE }, { "ret", ARG_NONE, ARG_NONE },
|
||||
|
||||
/* 0xa0 */
|
||||
{ "jmpzh", _A16, 0 }, { "jmpzl", _A16, 0 }, { "jmpc", _A16, 0 }, { "jmpz", _A16, 0 },
|
||||
{ "jmpzc", _A16, 0 }, { "jmpcl", _A16, 0 }, { "jmpnc", _A16, 0 }, { "jmpnz", _A16, 0 },
|
||||
{ "callzh", _A16, 0 }, { "callzl", _A16, 0 }, { "callc", _A16, 0 }, { "callz", _A16, 0 },
|
||||
{ "callzc", _A16, 0 }, { "callcl", _A16, 0 }, { "callnc", _A16, 0 }, { "callnz", _A16, 0 },
|
||||
{ "unB0?", 0, 0 }, { "unB1?", _I8, 0 }, { "unB2?", 0, 0 }, { "unB3?", _I8, 0 },
|
||||
{ "out", _KHI, _REG }, { "out", _KHI, _I8 }, { "out", _KLO, _REG }, { "out", _KLO, _I8 },
|
||||
{ "unB8?", 0, 0 }, { "unB9?", _I8, 0 }, { "unBA?", 0, 0 }, { "jmpcl?", _A16, 0 },
|
||||
{ "unBC?", 0, 0 }, { "unBD?", 0, 0 }, { "unBE?", 0, 0 }, { "jmpncl?", _A16, 0 },
|
||||
{ "jmpzh", ARG_A16, ARG_NONE }, { "jmpzl", ARG_A16, ARG_NONE },
|
||||
{ "jmpc", ARG_A16, ARG_NONE }, { "jmpz", ARG_A16, ARG_NONE },
|
||||
{ "jmpzc", ARG_A16, ARG_NONE }, { "jmpcl", ARG_A16, ARG_NONE },
|
||||
{ "jmpnc", ARG_A16, ARG_NONE }, { "jmpnz", ARG_A16, ARG_NONE },
|
||||
{ "callzh", ARG_A16, ARG_NONE }, { "callzl", ARG_A16, ARG_NONE },
|
||||
{ "callc", ARG_A16, ARG_NONE }, { "callz", ARG_A16, ARG_NONE },
|
||||
{ "callzc", ARG_A16, ARG_NONE }, { "callcl", ARG_A16, ARG_NONE },
|
||||
{ "callnc", ARG_A16, ARG_NONE }, { "callnz", ARG_A16, ARG_NONE },
|
||||
|
||||
/* 0xb0 */
|
||||
{ "unB0?", ARG_NONE, ARG_NONE }, { "unB1?", ARG_I8, ARG_NONE },
|
||||
{ "unB2?", ARG_NONE, ARG_NONE }, { "unB3?", ARG_I8, ARG_NONE },
|
||||
{ "out", ARG_KHI, ARG_REG }, { "out", ARG_KHI, ARG_I8 },
|
||||
{ "out", ARG_KLO, ARG_REG }, { "out", ARG_KLO, ARG_I8 },
|
||||
{ "unB8?", ARG_NONE, ARG_NONE }, { "unB9?", ARG_I8, ARG_NONE },
|
||||
{ "unBA?", ARG_NONE, ARG_NONE }, { "jmpcl?", ARG_A16, ARG_NONE },
|
||||
{ "unBC?", ARG_NONE, ARG_NONE }, { "unBD?", ARG_NONE, ARG_NONE },
|
||||
{ "unBE?", ARG_NONE, ARG_NONE }, { "jmpncl?", ARG_A16, ARG_NONE },
|
||||
|
||||
/* 0xc0 */
|
||||
{ "movb", _REG, _I8 }, { "movw", _REG, _I16 }, { "movq", _REG, _I64 }, { "movt", _REG, _I80 },
|
||||
{ "movb", _ILR, _ILR }, { "movw", _ILR, _ILR }, { "movq", _ILR, _ILR }, { "movt", _ILR, _ILR },
|
||||
{ "unC8?", 0, 0 }, { "unC9?", 0, 0 }, { "unCA?", 0, 0 }, { "unCb?", 0, 0 },
|
||||
{ "swapb", _IRGREG, 0 }, { "swapw", _IRGREG, 0 }, { "swapq", _IRGREG, 0 }, { "swapt", _IRGREG, 0 },
|
||||
{ "movb", _CS, _REG }, { "movb", _CS, _I8 }, { "movb", _DSZ, _REG }, { "movb", _DSZ, _I8 },
|
||||
{ "movb", _SS, _REG }, { "movb", _SS, _I8 }, { "movw", _SP, _REG }, { "movw", _SP, _I16 },
|
||||
{ "movb", _F, _REG }, { "movb", _F, _I8 }, { "unDA?", 0, 0 }, { "unDb?", 0, 0 },
|
||||
{ "movb", _DS, _REG }, { "movb", _DS, _I8 }, { "movw", _LAR, _REG }, { "movw?", _LAR, _I16 },
|
||||
{ "movb", ARG_REG, ARG_I8 }, { "movw", ARG_REG, ARG_I16 },
|
||||
{ "movq", ARG_REG, ARG_I64 }, { "movt", ARG_REG, ARG_I80 },
|
||||
{ "movb", ARG_ILR, ARG_ILR }, { "movw", ARG_ILR, ARG_ILR },
|
||||
{ "movq", ARG_ILR, ARG_ILR }, { "movt", ARG_ILR, ARG_ILR },
|
||||
{ "unC8?", ARG_NONE, ARG_NONE }, { "unC9?", ARG_NONE, ARG_NONE },
|
||||
{ "unCA?", ARG_NONE, ARG_NONE }, { "unCb?", ARG_NONE, ARG_NONE },
|
||||
{ "swapb", ARG_IRGREG, ARG_NONE }, { "swapw", ARG_IRGREG, ARG_NONE },
|
||||
{ "swapq", ARG_IRGREG, ARG_NONE }, { "swapt", ARG_IRGREG, ARG_NONE },
|
||||
|
||||
/* 0xd0 */
|
||||
{ "movb", ARG_CS, ARG_REG }, { "movb", ARG_CS, ARG_I8 },
|
||||
{ "movb", ARG_DSZ, ARG_REG }, { "movb", ARG_DSZ, ARG_I8 },
|
||||
{ "movb", ARG_SS, ARG_REG }, { "movb", ARG_SS, ARG_I8 },
|
||||
{ "movw", ARG_SP, ARG_REG }, { "movw", ARG_SP, ARG_I16 },
|
||||
{ "movb", ARG_F, ARG_REG }, { "movb", ARG_F, ARG_I8 },
|
||||
{ "unDA?", ARG_NONE, ARG_NONE }, { "unDb?", ARG_NONE, ARG_NONE },
|
||||
{ "movb", ARG_DS, ARG_REG }, { "movb", ARG_DS, ARG_I8 },
|
||||
{ "movw", ARG_LAR, ARG_REG }, { "movw?", ARG_LAR, ARG_I16 },
|
||||
|
||||
/* 0xe0 */
|
||||
{ "in0", _REG, 0 }, { "unE1?", _I8, 0 }, { "in", _REG, _KI }, { "movb", _REG, _DSZ },
|
||||
{ "movb", _REG, _F }, { "movb", _REG, _TIM }, { "unE6?", _I8, 0 }, { "unE7?", _I8, 0 },
|
||||
{ "movw", _REG, _LAR }, { "movw?", _REG, _LAR }, { "movw", _REG, _PC }, { "movw", _REG, _SP },
|
||||
{ "unEC?", 0, 0 }, { "movb", _REG, _DS }, { "movb", _REG, _CS }, { "movb", _REG, _SS },
|
||||
{ "unF0?", _I8, 0 }, { "unF1?", _I8, 0 }, { "unF2?", _I8, 0 }, { "unF3?", _I8, 0 },
|
||||
{ "unF4?", _I8, 0 }, { "unF5?", _I8, 0 }, { "unF6?", _I8, 0 }, { "unF7?", _I8, 0 },
|
||||
{ "unF8?", 0, 0 }, { "unF9?", 0, 0 }, { "unFA?", 0, 0 }, { "unFb?", 0, 0 },
|
||||
{ "unFC?", 0, 0 }, { "unFD?", 0, 0 }, { "unFE?", 0, 0 }, { "nop", 0, 0 }
|
||||
{ "in0", ARG_REG, ARG_NONE }, { "unE1?", ARG_I8, ARG_NONE },
|
||||
{ "in", ARG_REG, ARG_KI }, { "movb", ARG_REG, ARG_DSZ },
|
||||
{ "movb", ARG_REG, ARG_F }, { "movb", ARG_REG, ARG_TIM },
|
||||
{ "unE6?", ARG_I8, ARG_NONE }, { "unE7?", ARG_I8, ARG_NONE },
|
||||
{ "movw", ARG_REG, ARG_LAR }, { "movw?", ARG_REG, ARG_LAR },
|
||||
{ "movw", ARG_REG, ARG_PC }, { "movw", ARG_REG, ARG_SP },
|
||||
{ "unEC?", ARG_NONE, ARG_NONE }, { "movb", ARG_REG, ARG_DS },
|
||||
{ "movb", ARG_REG, ARG_CS }, { "movb", ARG_REG, ARG_SS },
|
||||
|
||||
/* 0xf0 */
|
||||
{ "unF0?", ARG_I8, ARG_NONE }, { "unF1?", ARG_I8, ARG_NONE },
|
||||
{ "unF2?", ARG_I8, ARG_NONE }, { "unF3?", ARG_I8, ARG_NONE },
|
||||
{ "unF4?", ARG_I8, ARG_NONE }, { "unF5?", ARG_I8, ARG_NONE },
|
||||
{ "unF6?", ARG_I8, ARG_NONE }, { "unF7?", ARG_I8, ARG_NONE },
|
||||
{ "unF8?", ARG_NONE, ARG_NONE }, { "unF9?", ARG_NONE, ARG_NONE },
|
||||
{ "unFA?", ARG_NONE, ARG_NONE }, { "unFb?", ARG_NONE, ARG_NONE },
|
||||
{ "unFC?", ARG_NONE, ARG_NONE }, { "unFD?", ARG_NONE, ARG_NONE },
|
||||
{ "unFE?", ARG_NONE, ARG_NONE }, { "nop", ARG_NONE, ARG_NONE }
|
||||
};
|
||||
|
||||
|
||||
CPU_DISASSEMBLE(hcd62121)
|
||||
{
|
||||
uint8_t op;
|
||||
uint8_t op1;
|
||||
uint8_t op2;
|
||||
int pos = 0;
|
||||
u8 op;
|
||||
u8 op1;
|
||||
u8 op2;
|
||||
u32 pos = 0;
|
||||
const hcd62121_dasm *inst;
|
||||
|
||||
op = oprom[pos++];
|
||||
@ -142,213 +217,213 @@ CPU_DISASSEMBLE(hcd62121)
|
||||
inst = &hcd62121_ops[op];
|
||||
|
||||
/* Special case for nibble shift instruction */
|
||||
if ( inst->arg2 == _4 )
|
||||
util::stream_format(stream, "sh%c%c ", ( oprom[pos] & 0x80 ) ? 'l' : 'r', inst->str[3]);
|
||||
if (inst->arg2 == ARG_4)
|
||||
util::stream_format(stream, "sh%c%c ", (oprom[pos] & 0x80) ? 'l' : 'r', inst->str[3]);
|
||||
else
|
||||
util::stream_format(stream, "%-8s", inst->str);
|
||||
|
||||
switch( inst->arg1 )
|
||||
switch(inst->arg1)
|
||||
{
|
||||
case _REGREG:
|
||||
case ARG_REGREG:
|
||||
op1 = oprom[pos++];
|
||||
op2 = oprom[pos++];
|
||||
if ( op1 & 0x80 )
|
||||
if (op1 & 0x80)
|
||||
{
|
||||
util::stream_format( stream, "r%02x,0x%02x", op1 & 0x7f, op2 );
|
||||
util::stream_format(stream, "r%02x,0x%02x", op1 & 0x7f, op2);
|
||||
}
|
||||
else
|
||||
{
|
||||
if ( op2 & 0x80 )
|
||||
util::stream_format( stream, "r%02x,r%02x", op1 & 0x7f, op2 & 0x7f );
|
||||
if (op2 & 0x80)
|
||||
util::stream_format(stream, "r%02x,r%02x", op1 & 0x7f, op2 & 0x7f);
|
||||
else
|
||||
util::stream_format( stream, "r%02x,r%02x", op2 & 0x7f, op1 & 0x7f );
|
||||
util::stream_format(stream, "r%02x,r%02x", op2 & 0x7f, op1 & 0x7f);
|
||||
}
|
||||
break;
|
||||
case _REG:
|
||||
util::stream_format( stream, "r%02x", oprom[pos++] & 0x7f );
|
||||
case ARG_REG:
|
||||
util::stream_format(stream, "r%02x", oprom[pos++] & 0x7f);
|
||||
break;
|
||||
case _IRGREG:
|
||||
case ARG_IRGREG:
|
||||
/* bit 6 = direction. 0 - regular, 1 - reverse */
|
||||
op1 = oprom[pos++];
|
||||
op2 = oprom[pos++];
|
||||
if ( op1 & 0x80 )
|
||||
if (op1 & 0x80)
|
||||
{
|
||||
util::stream_format( stream, "(r%02x),0x%02x", 0x40 | ( op1 & 0x3f ), op2 );
|
||||
util::stream_format(stream, "(r%02x),0x%02x", 0x40 | (op1 & 0x3f), op2);
|
||||
}
|
||||
else
|
||||
{
|
||||
if ( op2 & 0x80 )
|
||||
util::stream_format( stream, "(r%02x%s),r%02x", 0x40 | ( op1 & 0x3f ), (op1 & 0x40) ? ".r" : "", op2 & 0x7f );
|
||||
if (op2 & 0x80)
|
||||
util::stream_format(stream, "(r%02x%s),r%02x", 0x40 | (op1 & 0x3f), (op1 & 0x40) ? ".r" : "", op2 & 0x7f);
|
||||
else
|
||||
util::stream_format( stream, "r%02x,(r%02x%s)", op2 & 0x7f, 0x40 | ( op1 & 0x3f ), (op1 & 0x40) ? ".r" : "" );
|
||||
util::stream_format(stream, "r%02x,(r%02x%s)", op2 & 0x7f, 0x40 | (op1 & 0x3f), (op1 & 0x40) ? ".r" : "");
|
||||
}
|
||||
break;
|
||||
case _IRG:
|
||||
case ARG_IRG:
|
||||
/* bit 6 = direction. 0 - regular, 1 - reverse */
|
||||
op1 = oprom[pos++];
|
||||
util::stream_format( stream, "(r%02x%s)", 0x40 | ( op1 & 0x3f ), (op1 & 0x40) ? ".r" : "" );
|
||||
util::stream_format(stream, "(r%02x%s)", 0x40 | (op1 & 0x3f), (op1 & 0x40) ? ".r" : "");
|
||||
break;
|
||||
case _F:
|
||||
util::stream_format( stream, "F" );
|
||||
case ARG_F:
|
||||
util::stream_format(stream, "F");
|
||||
break;
|
||||
case _CS:
|
||||
util::stream_format( stream, "CS" );
|
||||
case ARG_CS:
|
||||
util::stream_format(stream, "CS");
|
||||
break;
|
||||
case _DS:
|
||||
util::stream_format( stream, "DS" );
|
||||
case ARG_DS:
|
||||
util::stream_format(stream, "DS");
|
||||
break;
|
||||
case _SS:
|
||||
util::stream_format( stream, "SS" );
|
||||
case ARG_SS:
|
||||
util::stream_format(stream, "SS");
|
||||
break;
|
||||
case _PC:
|
||||
util::stream_format( stream, "PC" );
|
||||
case ARG_PC:
|
||||
util::stream_format(stream, "PC");
|
||||
break;
|
||||
case _SP:
|
||||
util::stream_format( stream, "SP" );
|
||||
case ARG_SP:
|
||||
util::stream_format(stream, "SP");
|
||||
break;
|
||||
case _I8:
|
||||
util::stream_format( stream, "0x%02x", oprom[pos++] );
|
||||
case ARG_I8:
|
||||
util::stream_format(stream, "0x%02x", oprom[pos++]);
|
||||
break;
|
||||
case _I16:
|
||||
case _A16:
|
||||
util::stream_format( stream, "0x%02x", oprom[pos++] );
|
||||
util::stream_format( stream, "%02x", oprom[pos++] );
|
||||
case ARG_I16:
|
||||
case ARG_A16:
|
||||
util::stream_format(stream, "0x%02x", oprom[pos++]);
|
||||
util::stream_format(stream, "%02x", oprom[pos++]);
|
||||
break;
|
||||
case _I64:
|
||||
util::stream_format( stream, "0x%02x", oprom[pos++] );
|
||||
util::stream_format( stream, "%02x", oprom[pos++] );
|
||||
util::stream_format( stream, "%02x", oprom[pos++] );
|
||||
util::stream_format( stream, "%02x", oprom[pos++] );
|
||||
util::stream_format( stream, "%02x", oprom[pos++] );
|
||||
util::stream_format( stream, "%02x", oprom[pos++] );
|
||||
util::stream_format( stream, "%02x", oprom[pos++] );
|
||||
util::stream_format( stream, "%02x", oprom[pos++] );
|
||||
case ARG_I64:
|
||||
util::stream_format(stream, "0x%02x", oprom[pos++]);
|
||||
util::stream_format(stream, "%02x", oprom[pos++]);
|
||||
util::stream_format(stream, "%02x", oprom[pos++]);
|
||||
util::stream_format(stream, "%02x", oprom[pos++]);
|
||||
util::stream_format(stream, "%02x", oprom[pos++]);
|
||||
util::stream_format(stream, "%02x", oprom[pos++]);
|
||||
util::stream_format(stream, "%02x", oprom[pos++]);
|
||||
util::stream_format(stream, "%02x", oprom[pos++]);
|
||||
break;
|
||||
case _I80:
|
||||
util::stream_format( stream, "0x%02x", oprom[pos++] );
|
||||
util::stream_format( stream, "%02x", oprom[pos++] );
|
||||
util::stream_format( stream, "%02x", oprom[pos++] );
|
||||
util::stream_format( stream, "%02x", oprom[pos++] );
|
||||
util::stream_format( stream, "%02x", oprom[pos++] );
|
||||
util::stream_format( stream, "%02x", oprom[pos++] );
|
||||
util::stream_format( stream, "%02x", oprom[pos++] );
|
||||
util::stream_format( stream, "%02x", oprom[pos++] );
|
||||
util::stream_format( stream, "%02x", oprom[pos++] );
|
||||
util::stream_format( stream, "%02x", oprom[pos++] );
|
||||
case ARG_I80:
|
||||
util::stream_format(stream, "0x%02x", oprom[pos++]);
|
||||
util::stream_format(stream, "%02x", oprom[pos++]);
|
||||
util::stream_format(stream, "%02x", oprom[pos++]);
|
||||
util::stream_format(stream, "%02x", oprom[pos++]);
|
||||
util::stream_format(stream, "%02x", oprom[pos++]);
|
||||
util::stream_format(stream, "%02x", oprom[pos++]);
|
||||
util::stream_format(stream, "%02x", oprom[pos++]);
|
||||
util::stream_format(stream, "%02x", oprom[pos++]);
|
||||
util::stream_format(stream, "%02x", oprom[pos++]);
|
||||
util::stream_format(stream, "%02x", oprom[pos++]);
|
||||
break;
|
||||
case _A24:
|
||||
util::stream_format( stream, "0x%02x:", oprom[pos++] );
|
||||
util::stream_format( stream, "0x%02x", oprom[pos++] );
|
||||
util::stream_format( stream, "%02x", oprom[pos++] );
|
||||
case ARG_A24:
|
||||
util::stream_format(stream, "0x%02x:", oprom[pos++]);
|
||||
util::stream_format(stream, "0x%02x", oprom[pos++]);
|
||||
util::stream_format(stream, "%02x", oprom[pos++]);
|
||||
break;
|
||||
case _ILR:
|
||||
case ARG_ILR:
|
||||
op1 = oprom[pos++];
|
||||
op2 = oprom[pos++];
|
||||
if ( ( op1 & 0x80 ) || ( op2 & 0x80 ) )
|
||||
if ((op1 & 0x80) || (op2 & 0x80))
|
||||
{
|
||||
/* (lar),reg */
|
||||
util::stream_format( stream, "(%slar%s),r%02x", (op1 & 0x20) ? ( (op1 & 0x40) ? "--" : "++" ) : "", (op1 & 0x20) ? "" : ( (op1 & 0x40) ? "--" : "++" ), op2 & 0x7f );
|
||||
util::stream_format(stream, "(%slar%s),r%02x", (op1 & 0x20) ? ((op1 & 0x40) ? "--" : "++") : "", (op1 & 0x20) ? "" : ((op1 & 0x40) ? "--" : "++"), op2 & 0x7f);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* reg,(lar) */
|
||||
util::stream_format( stream, "r%02x,(%slar%s)", op2 & 0x7f, (op1 & 0x20) ? ( (op1 & 0x40) ? "--" : "++" ) : "", (op1 & 0x20) ? "" : ( (op1 & 0x40) ? "--" : "++" ) );
|
||||
util::stream_format(stream, "r%02x,(%slar%s)", op2 & 0x7f, (op1 & 0x20) ? ((op1 & 0x40) ? "--" : "++") : "", (op1 & 0x20) ? "" : ((op1 & 0x40) ? "--" : "++"));
|
||||
}
|
||||
break;
|
||||
case _LAR:
|
||||
util::stream_format( stream, "lar" );
|
||||
case ARG_LAR:
|
||||
util::stream_format(stream, "lar");
|
||||
break;
|
||||
case _DSZ:
|
||||
util::stream_format( stream, "dsize" );
|
||||
case ARG_DSZ:
|
||||
util::stream_format(stream, "dsize");
|
||||
break;
|
||||
case _TIM:
|
||||
util::stream_format( stream, "TIM?" );
|
||||
case ARG_TIM:
|
||||
util::stream_format(stream, "TIM?");
|
||||
break;
|
||||
case _KLO:
|
||||
util::stream_format( stream, "KOL" );
|
||||
case ARG_KLO:
|
||||
util::stream_format(stream, "KOL");
|
||||
break;
|
||||
case _KHI:
|
||||
util::stream_format( stream, "KOH" );
|
||||
case ARG_KHI:
|
||||
util::stream_format(stream, "KOH");
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
switch( inst->arg2 )
|
||||
switch(inst->arg2)
|
||||
{
|
||||
case _REG:
|
||||
util::stream_format( stream, ",r%02x", oprom[pos++] & 0x7f );
|
||||
case ARG_REG:
|
||||
util::stream_format(stream, ",r%02x", oprom[pos++] & 0x7f);
|
||||
break;
|
||||
case _F:
|
||||
util::stream_format( stream, ",F" );
|
||||
case ARG_F:
|
||||
util::stream_format(stream, ",F");
|
||||
break;
|
||||
case _CS:
|
||||
util::stream_format( stream, ",CS" );
|
||||
case ARG_CS:
|
||||
util::stream_format(stream, ",CS");
|
||||
break;
|
||||
case _DS:
|
||||
util::stream_format( stream, ",DS" );
|
||||
case ARG_DS:
|
||||
util::stream_format(stream, ",DS");
|
||||
break;
|
||||
case _SS:
|
||||
util::stream_format( stream, ",SS" );
|
||||
case ARG_SS:
|
||||
util::stream_format(stream, ",SS");
|
||||
break;
|
||||
case _PC:
|
||||
util::stream_format( stream, ",PC" );
|
||||
case ARG_PC:
|
||||
util::stream_format(stream, ",PC");
|
||||
break;
|
||||
case _SP:
|
||||
util::stream_format( stream, ",SP" );
|
||||
case ARG_SP:
|
||||
util::stream_format(stream, ",SP");
|
||||
break;
|
||||
case _I8:
|
||||
util::stream_format( stream, ",0x%02x", oprom[pos++] );
|
||||
case ARG_I8:
|
||||
util::stream_format(stream, ",0x%02x", oprom[pos++]);
|
||||
break;
|
||||
case _I16:
|
||||
case _A16:
|
||||
util::stream_format( stream, ",0x%02x", oprom[pos++] );
|
||||
util::stream_format( stream, "%02x", oprom[pos++] );
|
||||
case ARG_I16:
|
||||
case ARG_A16:
|
||||
util::stream_format(stream, ",0x%02x", oprom[pos++]);
|
||||
util::stream_format(stream, "%02x", oprom[pos++]);
|
||||
break;
|
||||
case _I64:
|
||||
util::stream_format( stream, ",0x%02x", oprom[pos++] );
|
||||
util::stream_format( stream, "%02x", oprom[pos++] );
|
||||
util::stream_format( stream, "%02x", oprom[pos++] );
|
||||
util::stream_format( stream, "%02x", oprom[pos++] );
|
||||
util::stream_format( stream, "%02x", oprom[pos++] );
|
||||
util::stream_format( stream, "%02x", oprom[pos++] );
|
||||
util::stream_format( stream, "%02x", oprom[pos++] );
|
||||
util::stream_format( stream, "%02x", oprom[pos++] );
|
||||
case ARG_I64:
|
||||
util::stream_format(stream, ",0x%02x", oprom[pos++]);
|
||||
util::stream_format(stream, "%02x", oprom[pos++]);
|
||||
util::stream_format(stream, "%02x", oprom[pos++]);
|
||||
util::stream_format(stream, "%02x", oprom[pos++]);
|
||||
util::stream_format(stream, "%02x", oprom[pos++]);
|
||||
util::stream_format(stream, "%02x", oprom[pos++]);
|
||||
util::stream_format(stream, "%02x", oprom[pos++]);
|
||||
util::stream_format(stream, "%02x", oprom[pos++]);
|
||||
break;
|
||||
case _I80:
|
||||
util::stream_format( stream, ",0x%02x", oprom[pos++] );
|
||||
util::stream_format( stream, "%02x", oprom[pos++] );
|
||||
util::stream_format( stream, "%02x", oprom[pos++] );
|
||||
util::stream_format( stream, "%02x", oprom[pos++] );
|
||||
util::stream_format( stream, "%02x", oprom[pos++] );
|
||||
util::stream_format( stream, "%02x", oprom[pos++] );
|
||||
util::stream_format( stream, "%02x", oprom[pos++] );
|
||||
util::stream_format( stream, "%02x", oprom[pos++] );
|
||||
util::stream_format( stream, "%02x", oprom[pos++] );
|
||||
util::stream_format( stream, "%02x", oprom[pos++] );
|
||||
case ARG_I80:
|
||||
util::stream_format(stream, ",0x%02x", oprom[pos++]);
|
||||
util::stream_format(stream, "%02x", oprom[pos++]);
|
||||
util::stream_format(stream, "%02x", oprom[pos++]);
|
||||
util::stream_format(stream, "%02x", oprom[pos++]);
|
||||
util::stream_format(stream, "%02x", oprom[pos++]);
|
||||
util::stream_format(stream, "%02x", oprom[pos++]);
|
||||
util::stream_format(stream, "%02x", oprom[pos++]);
|
||||
util::stream_format(stream, "%02x", oprom[pos++]);
|
||||
util::stream_format(stream, "%02x", oprom[pos++]);
|
||||
util::stream_format(stream, "%02x", oprom[pos++]);
|
||||
break;
|
||||
case _A24:
|
||||
util::stream_format( stream, ",0x%02x:", oprom[pos++] );
|
||||
util::stream_format( stream, "0x%02x", oprom[pos++] );
|
||||
util::stream_format( stream, "%02x", oprom[pos++] );
|
||||
case ARG_A24:
|
||||
util::stream_format(stream, ",0x%02x:", oprom[pos++]);
|
||||
util::stream_format(stream, "0x%02x", oprom[pos++]);
|
||||
util::stream_format(stream, "%02x", oprom[pos++]);
|
||||
break;
|
||||
case _ILR:
|
||||
/* Implemented by _ILR section for arg1 */
|
||||
case ARG_ILR:
|
||||
/* Implemented by ARG_ILR section for arg1 */
|
||||
break;
|
||||
case _LAR:
|
||||
util::stream_format( stream, ",lar" );
|
||||
case ARG_LAR:
|
||||
util::stream_format(stream, ",lar");
|
||||
break;
|
||||
case _DSZ:
|
||||
util::stream_format( stream, ",dsize" );
|
||||
case ARG_DSZ:
|
||||
util::stream_format(stream, ",dsize");
|
||||
break;
|
||||
case _TIM:
|
||||
util::stream_format( stream, ",TIM?" );
|
||||
case ARG_TIM:
|
||||
util::stream_format(stream, ",TIM?");
|
||||
break;
|
||||
case _KI:
|
||||
util::stream_format( stream, ",KI" );
|
||||
case ARG_KI:
|
||||
util::stream_format(stream, ",KI");
|
||||
break;
|
||||
case _4:
|
||||
util::stream_format( stream, ",4" );
|
||||
case ARG_4:
|
||||
util::stream_format(stream, ",4");
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
|
||||
@ -30,219 +30,185 @@ public:
|
||||
: driver_device(mconfig, type, tag),
|
||||
m_video_ram(*this, "video_ram"),
|
||||
m_display_ram(*this, "display_ram"),
|
||||
m_ko1(*this, "KO1"),
|
||||
m_ko2(*this, "KO2"),
|
||||
m_ko3(*this, "KO3"),
|
||||
m_ko4(*this, "KO4"),
|
||||
m_ko5(*this, "KO5"),
|
||||
m_ko6(*this, "KO6"),
|
||||
m_ko7(*this, "KO7"),
|
||||
m_ko8(*this, "KO8"),
|
||||
m_ko9(*this, "KO9"),
|
||||
m_ko10(*this, "KO10"),
|
||||
m_ko11(*this, "KO11"),
|
||||
m_ko12(*this, "KO12") ,
|
||||
m_ko_port(*this, "KO.%u", 0),
|
||||
m_maincpu(*this, "maincpu") { }
|
||||
|
||||
DECLARE_WRITE8_MEMBER(cfx9850_kol_w);
|
||||
DECLARE_WRITE8_MEMBER(cfx9850_koh_w);
|
||||
DECLARE_READ8_MEMBER(cfx9850_ki_r);
|
||||
DECLARE_READ8_MEMBER(cfx9850_battery_level_r);
|
||||
required_shared_ptr<uint8_t> m_video_ram;
|
||||
required_shared_ptr<uint8_t> m_display_ram;
|
||||
uint16_t m_ko; /* KO lines KO1 - KO14 */
|
||||
DECLARE_WRITE8_MEMBER(kol_w);
|
||||
DECLARE_WRITE8_MEMBER(koh_w);
|
||||
DECLARE_READ8_MEMBER(ki_r);
|
||||
DECLARE_READ8_MEMBER(in0_r);
|
||||
required_shared_ptr<u8> m_video_ram;
|
||||
required_shared_ptr<u8> m_display_ram;
|
||||
u16 m_ko; // KO lines KO1 - KO14
|
||||
DECLARE_PALETTE_INIT(cfx9850);
|
||||
uint32_t screen_update_cfx9850(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
u32 screen_update_cfx9850(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
|
||||
protected:
|
||||
required_ioport m_ko1;
|
||||
required_ioport m_ko2;
|
||||
required_ioport m_ko3;
|
||||
required_ioport m_ko4;
|
||||
required_ioport m_ko5;
|
||||
required_ioport m_ko6;
|
||||
required_ioport m_ko7;
|
||||
required_ioport m_ko8;
|
||||
required_ioport m_ko9;
|
||||
required_ioport m_ko10;
|
||||
required_ioport m_ko11;
|
||||
required_ioport m_ko12;
|
||||
required_ioport_array<12> m_ko_port;
|
||||
required_device<cpu_device> m_maincpu;
|
||||
};
|
||||
|
||||
|
||||
static ADDRESS_MAP_START( cfx9850, AS_PROGRAM, 8, cfx9850_state )
|
||||
static ADDRESS_MAP_START(cfx9850, AS_PROGRAM, 8, cfx9850_state)
|
||||
AM_RANGE( 0x000000, 0x007fff ) AM_ROM
|
||||
AM_RANGE( 0x080000, 0x0807ff ) AM_RAM AM_SHARE("video_ram")
|
||||
// AM_RANGE( 0x100000, 0x10ffff ) /* some memory mapped i/o? */
|
||||
// AM_RANGE( 0x110000, 0x11ffff ) /* some memory mapped i/o? */
|
||||
// AM_RANGE( 0x100000, 0x10ffff ) // some memory mapped i/o?
|
||||
// AM_RANGE( 0x110000, 0x11ffff ) // some memory mapped i/o?
|
||||
AM_RANGE( 0x200000, 0x27ffff ) AM_ROM AM_REGION( "bios", 0 )
|
||||
AM_RANGE( 0x400000, 0x40ffff ) AM_RAM
|
||||
AM_RANGE( 0x600000, 0x6007ff ) AM_MIRROR(0xf800) AM_RAM AM_SHARE("display_ram")
|
||||
// AM_RANGE( 0xe10000, 0xe1ffff ) /* some memory mapped i/o? */
|
||||
// AM_RANGE( 0xe10000, 0xe1ffff ) // some memory mapped i/o?
|
||||
ADDRESS_MAP_END
|
||||
|
||||
|
||||
WRITE8_MEMBER( cfx9850_state::cfx9850_kol_w )
|
||||
WRITE8_MEMBER(cfx9850_state::kol_w)
|
||||
{
|
||||
m_ko = ( m_ko & 0xff00 ) | data;
|
||||
m_ko = (m_ko & 0xff00) | data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( cfx9850_state::cfx9850_koh_w )
|
||||
WRITE8_MEMBER(cfx9850_state::koh_w)
|
||||
{
|
||||
m_ko = ( m_ko & 0x00ff ) | ( data << 8 );
|
||||
m_ko = (m_ko & 0x00ff) | (data << 8);
|
||||
}
|
||||
|
||||
|
||||
READ8_MEMBER( cfx9850_state::cfx9850_ki_r )
|
||||
READ8_MEMBER(cfx9850_state::ki_r)
|
||||
{
|
||||
uint8_t data = 0;
|
||||
u8 data = 0;
|
||||
|
||||
if ( m_ko & ( 1 << 0 ) ) data |= m_ko1->read();
|
||||
if ( m_ko & ( 1 << 1 ) ) data |= m_ko2->read();
|
||||
if ( m_ko & ( 1 << 2 ) ) data |= m_ko3->read();
|
||||
if ( m_ko & ( 1 << 3 ) ) data |= m_ko4->read();
|
||||
if ( m_ko & ( 1 << 4 ) ) data |= m_ko5->read();
|
||||
if ( m_ko & ( 1 << 5 ) ) data |= m_ko6->read();
|
||||
if ( m_ko & ( 1 << 6 ) ) data |= m_ko7->read();
|
||||
if ( m_ko & ( 1 << 7 ) ) data |= m_ko8->read();
|
||||
if ( m_ko & ( 1 << 8 ) ) data |= m_ko9->read();
|
||||
if ( m_ko & ( 1 << 9 ) ) data |= m_ko10->read();
|
||||
if ( m_ko & ( 1 << 10 ) ) data |= m_ko11->read();
|
||||
if ( m_ko & ( 1 << 11 ) ) data |= m_ko12->read();
|
||||
for (int i = 0; i < 12; i++)
|
||||
{
|
||||
if (BIT(m_ko, i))
|
||||
{
|
||||
data |= m_ko_port[i]->read();
|
||||
}
|
||||
}
|
||||
|
||||
return data;
|
||||
}
|
||||
|
||||
|
||||
READ8_MEMBER( cfx9850_state::cfx9850_battery_level_r )
|
||||
READ8_MEMBER(cfx9850_state::in0_r)
|
||||
{
|
||||
// battery level
|
||||
return 0x30;
|
||||
}
|
||||
|
||||
|
||||
static ADDRESS_MAP_START( cfx9850_io, AS_IO, 8, cfx9850_state )
|
||||
AM_RANGE( HCD62121_KOL, HCD62121_KOL ) AM_WRITE( cfx9850_kol_w )
|
||||
AM_RANGE( HCD62121_KOH, HCD62121_KOH ) AM_WRITE( cfx9850_koh_w )
|
||||
AM_RANGE( HCD62121_KI, HCD62121_KI ) AM_READ( cfx9850_ki_r )
|
||||
AM_RANGE( HCD62121_IN0, HCD62121_IN0 ) AM_READ( cfx9850_battery_level_r )
|
||||
ADDRESS_MAP_END
|
||||
static INPUT_PORTS_START(cfx9850)
|
||||
PORT_START("KO.0")
|
||||
PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("AC On/Off") PORT_CODE(KEYCODE_BACKSLASH)
|
||||
PORT_BIT(0xfe, IP_ACTIVE_HIGH, IPT_UNUSED)
|
||||
|
||||
PORT_START("KO.1")
|
||||
PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("EXE Enter") PORT_CODE(KEYCODE_ENTER)
|
||||
PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("(-) Ares") PORT_CODE(KEYCODE_MINUS)
|
||||
PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("EXP Pi") PORT_CODE(KEYCODE_EQUALS)
|
||||
PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME(". SPACE") PORT_CODE(KEYCODE_SPACE)
|
||||
PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("0 Z") PORT_CODE(KEYCODE_Z)
|
||||
PORT_BIT(0x83, IP_ACTIVE_HIGH, IPT_UNUSED)
|
||||
|
||||
static INPUT_PORTS_START( cfx9850 )
|
||||
PORT_START( "KO1" )
|
||||
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME( "AC On/Off" ) PORT_CODE(KEYCODE_BACKSLASH)
|
||||
PORT_BIT( 0xfe, IP_ACTIVE_HIGH, IPT_UNUSED )
|
||||
PORT_START("KO.2")
|
||||
PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("- ] Y") PORT_CODE(KEYCODE_Y)
|
||||
PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("+ [ X") PORT_CODE(KEYCODE_X)
|
||||
PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("3 W") PORT_CODE(KEYCODE_W)
|
||||
PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("2 V") PORT_CODE(KEYCODE_V)
|
||||
PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("1 U") PORT_CODE(KEYCODE_U)
|
||||
PORT_BIT(0x83, IP_ACTIVE_HIGH, IPT_UNUSED)
|
||||
|
||||
PORT_START( "KO2" )
|
||||
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME( "EXE Enter" ) PORT_CODE(KEYCODE_ENTER)
|
||||
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME( "(-) Ares" ) PORT_CODE(KEYCODE_MINUS)
|
||||
PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME( "EXP Pi" ) PORT_CODE(KEYCODE_EQUALS)
|
||||
PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME( ". SPACE" ) PORT_CODE(KEYCODE_SPACE)
|
||||
PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME( "0 Z" ) PORT_CODE(KEYCODE_Z)
|
||||
PORT_BIT( 0x83, IP_ACTIVE_HIGH, IPT_UNUSED )
|
||||
PORT_START("KO.3")
|
||||
PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("/ } T") PORT_CODE(KEYCODE_T)
|
||||
PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("* { S") PORT_CODE(KEYCODE_S)
|
||||
PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("6 R") PORT_CODE(KEYCODE_R)
|
||||
PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("5 Q") PORT_CODE(KEYCODE_Q)
|
||||
PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("4 P") PORT_CODE(KEYCODE_P)
|
||||
PORT_BIT(0x83, IP_ACTIVE_HIGH, IPT_UNUSED)
|
||||
|
||||
PORT_START( "KO3" )
|
||||
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME( "- ] Y" ) PORT_CODE(KEYCODE_Y)
|
||||
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME( "+ [ X" ) PORT_CODE(KEYCODE_X)
|
||||
PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME( "3 W" ) PORT_CODE(KEYCODE_W)
|
||||
PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME( "2 V" ) PORT_CODE(KEYCODE_V)
|
||||
PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME( "1 U" ) PORT_CODE(KEYCODE_U)
|
||||
PORT_BIT( 0x83, IP_ACTIVE_HIGH, IPT_UNUSED )
|
||||
PORT_START("KO.4")
|
||||
PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("DEL DG") PORT_CODE(KEYCODE_BACKSPACE)
|
||||
PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("9 O") PORT_CODE(KEYCODE_O)
|
||||
PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("8 N") PORT_CODE(KEYCODE_N)
|
||||
PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("7 M") PORT_CODE(KEYCODE_M)
|
||||
PORT_BIT(0x87, IP_ACTIVE_HIGH, IPT_UNUSED)
|
||||
|
||||
PORT_START( "KO4" )
|
||||
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME( "/ } T" ) PORT_CODE(KEYCODE_T)
|
||||
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME( "* { S" ) PORT_CODE(KEYCODE_S)
|
||||
PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME( "6 R" ) PORT_CODE(KEYCODE_R)
|
||||
PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME( "5 Q" ) PORT_CODE(KEYCODE_Q)
|
||||
PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME( "4 P" ) PORT_CODE(KEYCODE_P)
|
||||
PORT_BIT( 0x83, IP_ACTIVE_HIGH, IPT_UNUSED )
|
||||
PORT_START("KO.5")
|
||||
PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("TAB L") PORT_CODE(KEYCODE_L)
|
||||
PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME(", K") PORT_CODE(KEYCODE_K)
|
||||
PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME(") x^-1 J") PORT_CODE(KEYCODE_J)
|
||||
PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("( .. I") PORT_CODE(KEYCODE_I)
|
||||
PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("F<=>0 H") PORT_CODE(KEYCODE_H)
|
||||
PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("a b/c G") PORT_CODE(KEYCODE_G)
|
||||
PORT_BIT(0x81, IP_ACTIVE_HIGH, IPT_UNUSED)
|
||||
|
||||
PORT_START( "KO5" )
|
||||
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME( "DEL DG" ) PORT_CODE(KEYCODE_BACKSPACE)
|
||||
PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME( "9 O" ) PORT_CODE(KEYCODE_O)
|
||||
PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME( "8 N" ) PORT_CODE(KEYCODE_N)
|
||||
PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME( "7 M" ) PORT_CODE(KEYCODE_M)
|
||||
PORT_BIT( 0x87, IP_ACTIVE_HIGH, IPT_UNUSED )
|
||||
PORT_START("KO.6")
|
||||
PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("tan tan^-1 F") PORT_CODE(KEYCODE_F)
|
||||
PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("cos cas^-1 E") PORT_CODE(KEYCODE_E)
|
||||
PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("sin sin^-1 D") PORT_CODE(KEYCODE_D)
|
||||
PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("ln e^x C") PORT_CODE(KEYCODE_C)
|
||||
PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("log 10^x B") PORT_CODE(KEYCODE_B)
|
||||
PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("x,d,t A") PORT_CODE(KEYCODE_A)
|
||||
PORT_BIT(0x81, IP_ACTIVE_HIGH, IPT_UNUSED)
|
||||
|
||||
PORT_START( "KO6" )
|
||||
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME( "TAB L" ) PORT_CODE(KEYCODE_L)
|
||||
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME( ", K" ) PORT_CODE(KEYCODE_K)
|
||||
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME( ") x^-1 J" ) PORT_CODE(KEYCODE_J)
|
||||
PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME( "( .. I" ) PORT_CODE(KEYCODE_I)
|
||||
PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME( "F<=>0 H" ) PORT_CODE(KEYCODE_H)
|
||||
PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME( "a b/c G" ) PORT_CODE(KEYCODE_G)
|
||||
PORT_BIT( 0x81, IP_ACTIVE_HIGH, IPT_UNUSED )
|
||||
PORT_START("KO.7")
|
||||
PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Right") PORT_CODE(KEYCODE_RIGHT)
|
||||
PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Down") PORT_CODE(KEYCODE_DOWN)
|
||||
PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("EXIT QUIT") PORT_CODE(KEYCODE_STOP)
|
||||
PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("/\\ .. ..") PORT_CODE(KEYCODE_COMMA)
|
||||
PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("x^2 sqrt ..") PORT_CODE(KEYCODE_SLASH)
|
||||
PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("ALPHA ..-LOCK") PORT_CODE(KEYCODE_CAPSLOCK)
|
||||
PORT_BIT(0x81, IP_ACTIVE_HIGH, IPT_UNUSED)
|
||||
|
||||
PORT_START( "KO7" )
|
||||
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME( "tan tan^-1 F" ) PORT_CODE(KEYCODE_F)
|
||||
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME( "cos cas^-1 E" ) PORT_CODE(KEYCODE_E)
|
||||
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME( "sin sin^-1 D" ) PORT_CODE(KEYCODE_D)
|
||||
PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME( "ln e^x C" ) PORT_CODE(KEYCODE_C)
|
||||
PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME( "log 10^x B" ) PORT_CODE(KEYCODE_B)
|
||||
PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME( "x,d,t A" ) PORT_CODE(KEYCODE_A)
|
||||
PORT_BIT( 0x81, IP_ACTIVE_HIGH, IPT_UNUSED )
|
||||
PORT_START("KO.8")
|
||||
PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Up") PORT_CODE(KEYCODE_UP)
|
||||
PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Left") PORT_CODE(KEYCODE_LEFT)
|
||||
PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("MENU SET UP") PORT_CODE(KEYCODE_OPENBRACE)
|
||||
PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("VARS PRGM") PORT_CODE(KEYCODE_CLOSEBRACE)
|
||||
PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("OPTN") PORT_CODE(KEYCODE_LCONTROL)
|
||||
PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("SHIFT") PORT_CODE(KEYCODE_LSHIFT)
|
||||
PORT_BIT(0x81, IP_ACTIVE_HIGH, IPT_UNUSED)
|
||||
|
||||
PORT_START( "KO8" )
|
||||
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME( "Right" ) PORT_CODE(KEYCODE_RIGHT)
|
||||
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME( "Down" ) PORT_CODE(KEYCODE_DOWN)
|
||||
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME( "EXIT QUIT" ) PORT_CODE(KEYCODE_STOP)
|
||||
PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME( "/\\ .. .." ) PORT_CODE(KEYCODE_COMMA)
|
||||
PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME( "x^2 sqrt .." ) PORT_CODE(KEYCODE_SLASH)
|
||||
PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME( "ALPHA ..-LOCK" ) PORT_CODE(KEYCODE_CAPSLOCK)
|
||||
PORT_BIT( 0x81, IP_ACTIVE_HIGH, IPT_UNUSED )
|
||||
PORT_START("KO.9")
|
||||
PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("F6 G<=>T") PORT_CODE(KEYCODE_F6)
|
||||
PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("F5 G-Solv") PORT_CODE(KEYCODE_F5)
|
||||
PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("F4 Sketch") PORT_CODE(KEYCODE_F4)
|
||||
PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("F3 V-Window") PORT_CODE(KEYCODE_F3)
|
||||
PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("F2 Zoom") PORT_CODE(KEYCODE_F2)
|
||||
PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("F1 Trace") PORT_CODE(KEYCODE_F1)
|
||||
PORT_BIT(0x81, IP_ACTIVE_HIGH, IPT_UNUSED)
|
||||
|
||||
PORT_START( "KO9" )
|
||||
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME( "Up" ) PORT_CODE(KEYCODE_UP)
|
||||
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME( "Left" ) PORT_CODE(KEYCODE_LEFT)
|
||||
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME( "MENU SET UP" ) PORT_CODE(KEYCODE_OPENBRACE)
|
||||
PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME( "VARS PRGM" ) PORT_CODE(KEYCODE_CLOSEBRACE)
|
||||
PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME( "OPTN" ) PORT_CODE(KEYCODE_LCONTROL)
|
||||
PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME( "SHIFT" ) PORT_CODE(KEYCODE_LSHIFT)
|
||||
PORT_BIT( 0x81, IP_ACTIVE_HIGH, IPT_UNUSED )
|
||||
// KO11 is not connected
|
||||
PORT_START("KO.10")
|
||||
PORT_BIT(0xff, IP_ACTIVE_HIGH, IPT_UNUSED)
|
||||
|
||||
PORT_START( "KO10" )
|
||||
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME( "F6 G<=>T" ) PORT_CODE(KEYCODE_F6)
|
||||
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME( "F5 G-Solv" ) PORT_CODE(KEYCODE_F5)
|
||||
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME( "F4 Sketch" ) PORT_CODE(KEYCODE_F4)
|
||||
PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME( "F3 V-Window" ) PORT_CODE(KEYCODE_F3)
|
||||
PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME( "F2 Zoom" ) PORT_CODE(KEYCODE_F2)
|
||||
PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME( "F1 Trace" ) PORT_CODE(KEYCODE_F1)
|
||||
PORT_BIT( 0x81, IP_ACTIVE_HIGH, IPT_UNUSED )
|
||||
|
||||
/* KO11 is not connected */
|
||||
PORT_START( "KO11" )
|
||||
PORT_BIT( 0xff, IP_ACTIVE_HIGH, IPT_UNUSED )
|
||||
|
||||
PORT_START( "KO12" )
|
||||
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME( "TEST" ) PORT_CODE(KEYCODE_TILDE)
|
||||
PORT_BIT( 0xf7, IP_ACTIVE_HIGH, IPT_UNUSED )
|
||||
PORT_START("KO.11")
|
||||
PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("TEST") PORT_CODE(KEYCODE_TILDE)
|
||||
PORT_BIT(0xf7, IP_ACTIVE_HIGH, IPT_UNUSED)
|
||||
INPUT_PORTS_END
|
||||
|
||||
|
||||
PALETTE_INIT_MEMBER(cfx9850_state, cfx9850)
|
||||
{
|
||||
palette.set_pen_color( 0, 0xff, 0xff, 0xff );
|
||||
palette.set_pen_color( 1, 0x00, 0x00, 0xff );
|
||||
palette.set_pen_color( 2, 0x00, 0xff, 0x00 );
|
||||
palette.set_pen_color( 3, 0xff, 0x00, 0x00 );
|
||||
palette.set_pen_color(0, 0xff, 0xff, 0xff);
|
||||
palette.set_pen_color(1, 0x00, 0x00, 0xff);
|
||||
palette.set_pen_color(2, 0x00, 0xff, 0x00);
|
||||
palette.set_pen_color(3, 0xff, 0x00, 0x00);
|
||||
}
|
||||
|
||||
|
||||
uint32_t cfx9850_state::screen_update_cfx9850(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
|
||||
u32 cfx9850_state::screen_update_cfx9850(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
|
||||
{
|
||||
uint16_t offset = 0;
|
||||
u16 offset = 0;
|
||||
|
||||
for ( int i = 0; i < 16; i++ )
|
||||
for (int i = 0; i < 16; i++)
|
||||
{
|
||||
int x = 120 - i * 8;
|
||||
|
||||
for ( int j = 0; j < 64; j++ )
|
||||
for (int j = 0; j < 64; j++)
|
||||
{
|
||||
uint8_t data1 = m_display_ram[ offset ];
|
||||
uint8_t data2 = m_display_ram[ offset + 0x400 ];
|
||||
u8 data1 = m_display_ram[offset];
|
||||
u8 data2 = m_display_ram[offset + 0x400];
|
||||
|
||||
for ( int b = 0; b < 8; b++ )
|
||||
for (int b = 0; b < 8; b++)
|
||||
{
|
||||
bitmap.pix16(63-j, x+b) = ( data1 & 0x80 ) ? ( data2 & 0x80 ? 3 : 2 ) : ( data2 & 0x80 ? 1 : 0 );
|
||||
data1 <<= 1;
|
||||
@ -257,37 +223,40 @@ uint32_t cfx9850_state::screen_update_cfx9850(screen_device &screen, bitmap_ind1
|
||||
}
|
||||
|
||||
|
||||
static MACHINE_CONFIG_START( cfx9850, cfx9850_state )
|
||||
MCFG_CPU_ADD( "maincpu", HCD62121, 4300000 ) /* 4.3 MHz */
|
||||
MCFG_CPU_PROGRAM_MAP( cfx9850 )
|
||||
MCFG_CPU_IO_MAP( cfx9850_io )
|
||||
static MACHINE_CONFIG_START(cfx9850, cfx9850_state)
|
||||
MCFG_CPU_ADD("maincpu", HCD62121, 4300000) /* 4.3 MHz */
|
||||
MCFG_CPU_PROGRAM_MAP(cfx9850)
|
||||
MCFG_HCD62121_KOL_CB(WRITE8(cfx9850_state, kol_w))
|
||||
MCFG_HCD62121_KOH_CB(WRITE8(cfx9850_state, koh_w))
|
||||
MCFG_HCD62121_KI_CB(READ8(cfx9850_state, ki_r))
|
||||
MCFG_HCD62121_IN0_CB(READ8(cfx9850_state, in0_r))
|
||||
|
||||
MCFG_SCREEN_ADD( "screen", LCD )
|
||||
MCFG_SCREEN_REFRESH_RATE( 60 )
|
||||
MCFG_SCREEN_SIZE( 128, 64 )
|
||||
MCFG_SCREEN_VISIBLE_AREA( 0, 127, 0, 63 )
|
||||
MCFG_SCREEN_ADD("screen", LCD)
|
||||
MCFG_SCREEN_REFRESH_RATE(60)
|
||||
MCFG_SCREEN_SIZE(128, 64)
|
||||
MCFG_SCREEN_VISIBLE_AREA(0, 127, 0, 63)
|
||||
MCFG_SCREEN_UPDATE_DRIVER(cfx9850_state, screen_update_cfx9850)
|
||||
MCFG_SCREEN_PALETTE("palette")
|
||||
|
||||
MCFG_DEFAULT_LAYOUT(layout_lcd)
|
||||
|
||||
/* TODO: It uses a color display, but I'm being lazy here. 3 colour lcd */
|
||||
MCFG_PALETTE_ADD( "palette", 4 )
|
||||
// TODO: Verify amount of colors and palette
|
||||
MCFG_PALETTE_ADD("palette", 4)
|
||||
MCFG_PALETTE_INIT_OWNER(cfx9850_state, cfx9850)
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
|
||||
ROM_START( cfx9850 )
|
||||
ROM_REGION( 0x8000, "maincpu", 0 )
|
||||
ROM_LOAD( "hcd62121.bin", 0x0000, 0x8000, CRC(e72075f8) SHA1(f50d176e1c225dab69abfc67702c9dfb296b6a78) )
|
||||
ROM_START(cfx9850)
|
||||
ROM_REGION(0x8000, "maincpu", 0)
|
||||
ROM_LOAD("hcd62121.bin", 0x0000, 0x8000, CRC(e72075f8) SHA1(f50d176e1c225dab69abfc67702c9dfb296b6a78))
|
||||
|
||||
ROM_REGION( 0x80000, "bios", 0 )
|
||||
/* No idea yet which rom is what version. */
|
||||
ROM_SYSTEM_BIOS( 0, "rom1", "rom1, version unknown" )
|
||||
ROMX_LOAD( "cfx9850.bin", 0x00000, 0x80000, CRC(6c9bd903) SHA1(d5b6677ab4e0d3f84e5769e89e8f3d101f98f848), ROM_BIOS(1) )
|
||||
ROM_SYSTEM_BIOS( 1, "rom2", "rom2, version unknown" )
|
||||
ROMX_LOAD( "cfx9850b.bin", 0x00000, 0x80000, CRC(cd3c497f) SHA1(1d1aa38205eec7aba3ed6bef7389767e38afe075), ROM_BIOS(2) )
|
||||
ROM_REGION(0x80000, "bios", 0)
|
||||
// Unknown yet which rom is which version.
|
||||
ROM_SYSTEM_BIOS(0, "rom1", "rom1, version unknown")
|
||||
ROMX_LOAD("cfx9850.bin", 0x00000, 0x80000, CRC(6c9bd903) SHA1(d5b6677ab4e0d3f84e5769e89e8f3d101f98f848), ROM_BIOS(1))
|
||||
ROM_SYSTEM_BIOS(1, "rom2", "rom2, version unknown")
|
||||
ROMX_LOAD("cfx9850b.bin", 0x00000, 0x80000, CRC(cd3c497f) SHA1(1d1aa38205eec7aba3ed6bef7389767e38afe075), ROM_BIOS(2))
|
||||
ROM_END
|
||||
|
||||
|
||||
COMP( 1996, cfx9850, 0, 0, cfx9850, cfx9850, driver_device, 0, "Casio", "CFX-9850G", MACHINE_NO_SOUND | MACHINE_NOT_WORKING )
|
||||
COMP(1996, cfx9850, 0, 0, cfx9850, cfx9850, driver_device, 0, "Casio", "CFX-9850G", MACHINE_NO_SOUND | MACHINE_NOT_WORKING)
|
||||
|
||||
Loading…
Reference in New Issue
Block a user