Commit Graph

931 Commits

Author SHA1 Message Date
Quench
740ae26ae6 PIC16C5x CPU - Count input fix
- Fixed the T0CKI count input being controlled by the wrong edge sensing
2009-09-09 13:58:19 +00:00
Aaron Giles
50b4a43bfd Fix CPP_COMPILE (except for internal compiler error on snes.c). 2009-09-08 16:58:02 +00:00
Aaron Giles
96d7f2cf3b Remove remaining references to machine->cpu[n]. Removed cpu[n] array.
Replaced with machine->firstcpu which is a fast access to the head
of the list of CPUs.
2009-09-08 09:13:10 +00:00
Curt Coder
2e98a0f2de [Z8] Fixed disassembler argument order. 2009-09-07 12:47:40 +00:00
Aaron Giles
8fbe10c91f Cleanups and version bump. 2009-09-07 01:34:34 +00:00
Aaron Giles
03b5da1a55 Added 'options' parameter to the CPU_DISASSEMBLE prototype. For now, the
debugger always passes 0 for this. unidasm has been updated to accept a
mode parameter, which is passed for the options.
2009-09-07 00:26:56 +00:00
Aaron Giles
191fe9cdc3 > From: Atari Ace [mailto:atari_ace@verizon.net]
> Sent: Sunday, September 06, 2009 7:25 AM
> To: submit@mamedev.org
> Cc: atariace@hotmail.com
> Subject: [patch] Deglobalize input.c
> 
> Hi mamedev,
> 
> These patches deglobalize input.c.  The first adds running_machine to
> some driver apis.  The (large) second patch adds the machine parameter
> to the most input_code_pressed apis (generated by script, not
> compilable).  The last patch then actually changes those apis and
> others to take running_machine, and adds struct _input_private to hold
> the input state variables.
> 
> ~aa
2009-09-06 22:28:58 +00:00
Aaron Giles
ad2a5144ad > From: Gabriele Gorla [mailto:gorlik@penguintown.net]
> Sent: Saturday, September 05, 2009 2:11 PM
> To: submit@mamedev.org
> Subject: I386: fix loop instructions when address_size is 16-bit
> 
> Original code always assume address_size to be 32-bit
> The patch will use the correct size based on the status of the
> address_size flag.
>
2009-09-06 21:56:17 +00:00
Curt Coder
814b15eaf3 Fixed 64-bit MSVC compile. 2009-09-06 13:48:20 +00:00
Ryan Holtz
3548990629 Fixed carry handling in ADC, ADCI, SBC and SBCI opcodes. Fixes many SNES SuperFX bugs. [Harmony] 2009-09-05 04:34:51 +00:00
Curt Coder
1c56a127d5 Added preliminary Zilog Z8 CPU core for MESS. 2009-09-04 12:40:47 +00:00
Ryan Holtz
f09c9059f9 Added a compile-time flag to select between ABI and Manual register names in the MIPS core. [Harmony]
Fixed a MESS-side compile warning in the SNES S-DD1 code. [Harmony]
2009-09-04 11:40:49 +00:00
Ryan Holtz
faf695bfc9 SNES updates: [R. Belmont, Harmony]
- Corrected ROM loading behavior for SuperFX games
- Added more ROM mirroring needed by certain SuperFX 2 games
- Corrected the behavior of certain bit-restricted SuperFX registers.  Doom, Yoshi's Island, Dirt Trax FX and Voxel Demo show things now.
- Improved S-DD1 emulation, neither game using S-DD1 boots yet
2009-09-04 05:00:05 +00:00
Ryan Holtz
b54790792a Fixed numerous opcodes in the AVR8 core [Harmony]
Fixed a register naming issue in the MIPS core [Harmony]
Numerous SuperFX updates: [Harmony]
 - Hooked up RAM and ROM buffering
 - Inlined several more functions
 - Removed debug spew
 - Added the ability to define an external IRQ line callback, and hooked it up to the 65C816
 - Fixed flag calculation for HIB opcode
 - Hooked SuperFX chip up to the SNES machine driver
2009-09-03 23:53:43 +00:00
R. Belmont
85d9b4decb M377xx: fix CLB/SEB when not in bank 0 2009-09-03 23:21:51 +00:00
Ryan Holtz
a9a3f05218 SuperFX updates: [Harmony]
- Inlined a number of functions for possible speed increase
- Removed some memory buffering cruft, to be re-added later
- Fixed behavior of ASR opcode
- With additional MESS-side changes, Stunt Race FX is playable, and Vortex shows much more.
2009-09-02 23:28:18 +00:00
Ryan Holtz
64b84113e9 SuperFX fixes: [Anonymous]
- At least partly fixed PLOT and RPIX behavior.  This fixes many gfxs in Star Fox and Vortex, but no polys yet.
2009-08-31 02:53:53 +00:00
Ryan Holtz
8b572ae6f8 SuperFX updates [Anonymous]
- Fixed disassembly of LMULT/FMULT ops
- Fixed reads using LDW/LDB
- Fixed writes using STW/STB
- Fixed SBC carry behavior
- Fixed GETC ROM access behavior
- Some SuperFX games begin to show things in MESS
2009-08-30 22:20:17 +00:00
Quench
e77505b9a2 Fixes to the PIC16C5x CPU core:
- Indirect addressing was not taking into account special purpose memory mapped locations.
 - 'iorlw' instruction was saving the result to memory instead of the W register.                               
 - 'tris' instruction no longer modifies Port-C on PIC models that do not have Port-C implemented.


Also added difficulty DIP to BigTwin
2009-08-30 14:16:50 +00:00
Michaël Banaan Ananas
4f4af5ca30 > Shouldn't you also add a return statement?
yes, but it doesn't matter: ifs/cases afterwards would be FALSE anyway
2009-08-30 11:25:29 +00:00
Michaël Banaan Ananas
4bb09d5632 fixed i386 carry/borrow flag in ADC/SBB [Gabriele Gorla]
> -----Original Message-----
> From: Gabriele Gorla [mailto:gorlik@penguintown.net]
> Sent: Saturday, August 29, 2009 5:39 AM
> To: submit@mamedev.org
> Cc: Gabriele Gorla
> Subject: Re: i386: fix carry/borrow flag in ADC/SBB
>
> > the original code implements ADC and SBB as 2 consecutive ADDs.
> > This will not produce the correct result when the carry is generated
> by
> > the first addition as it is overwritten by the second operation.
>
> updated patch, fixes a typo.
2009-08-30 11:19:07 +00:00
Aaron Giles
81d248c448 MSVC compile fixes. 2009-08-30 02:04:21 +00:00
Aaron Giles
5df39c5473 Cleanups and version bump. 2009-08-29 23:18:28 +00:00
Aaron Giles
1173ae9493 Fixed dependencies for the 57002dasm 2009-08-29 21:54:42 +00:00
Ryan Holtz
23dd52a582 SuperFX changes: [Anonymous]
- Fixed overflow flag calculation on ADDI / ADCI
- Fixed lack of register reset after ADD / ADC / ADDI / ADCI
2009-08-29 10:00:14 +00:00
Ryan Holtz
0915000ffa SuperFX updates: [Anonymous]
- Disabled RAM/ROM clocking, going with instant transfer for now
- Understood and re-enabled pipelined instruction architecture, Star Fox runs farther
- Fixed a ridiculous typo in ROL instruction
2009-08-29 04:28:36 +00:00
Ryan Holtz
25d5307394 SuperFX core updates: [Anonymous]
- Corrected carry flag behavior in ROL opcode
- Corrected BRA target address calculation (maybe still wrong)
- Corrected LOOP target address calculation
- Made sure that FROM sets cpustate->sreg_idx
2009-08-27 04:47:58 +00:00
Ryan Holtz
67fc4827bb Multiple SuperFX updates: [Anonymous]
- Added LSR and ROL opcodes
- Updated instructions to use the safer superfx_gpr_write: LOOP, PLOT, INC, DEC
- Added missing register writeback to LMS
2009-08-27 01:59:38 +00:00
Ryan Holtz
4e3a2c0e17 Argonaut SuperFX core: [Anonymous]
- Improved disassembler to more gracefully handle ALT* opcode effects.
- Corrected instruction behaviors: STOP, SUB, SBC, SUBI, CMP
2009-08-26 06:29:36 +00:00
Michaël Banaan Ananas
7e2794ad21 Fixed IM2 interrupt cycles [eke]
http://www.mameworld.info/ubbthreads/showthreaded.php?Cat=&Number=199853&page=0&view=expanded&sb=5&o=&fpart=1&vc=1
I don't know this z80 emulator well enough to look into his first two points. Juergen?

1/ In the cc_xy[] table which lists instructions with DD or FD prefixes, "illegal" combos are returning 4 cycles when they should return 4 + cc_op (the normal instruction being executed). Another way to handle this correctly is to call EXEC(z80,fd,xx) or EXEC(z80,dd,xx) instead of op_xx(z80) when such pair of opcode is detected, to be sure the correct amount of cycles is used.

2/ According to Sean Young, R register is NOT incremented when chaining multiple DD or FD prefixes: [...]

This one was already fixed, dunno when:
2/ In the cc_ed[] table, INI (ED A2) and IND (ED AA) should return 16 cycles, like other instructions from this group, not 12. This seems to be a typo error.
2009-08-24 11:57:26 +00:00
Ryan Holtz
89d4356142 Improved some aspects of SuperFX emulation, Star Fox now executes SuperFX code, but does not stop. [Anonymous] 2009-08-24 01:57:02 +00:00
Ryan Holtz
eb25141647 Fixed a handful of SuperFX core bugs. Star Fox begins to run code. [Anonymous]
Over to you, Kale...
2009-08-23 15:19:30 +00:00
Ryan Holtz
2618dfaabc Hooked up Branch instructions in the Argonaut SuperFX core. [Anonymous] 2009-08-23 08:23:09 +00:00
Ryan Holtz
a820e450c3 Fixes the build. 2009-08-23 08:10:51 +00:00
Ryan Holtz
76a4664cb9 Implemented basic Argonaut SuperFX support, needs to be hooked to the SNES driver. [Anonymous] 2009-08-23 08:06:50 +00:00
Olivier Galibert
26dee2df8e Fix the i386 disassembler duplication. 2009-08-22 19:55:33 +00:00
Aaron Giles
f474114e1d Added infrastructure to compile universal standalone disassembler:
- added unidasm to the tools build
 - split the disassemblers out of libcpu and into new libdasm
 - ensured the disassembly entry points for all disassemblers are
    in the source file for the disassembler (sometimes new generic
    versions were created)

Still needs command line options and file loading, but the 
fundamentals are present, and it links.
2009-08-22 06:25:07 +00:00
Curt Coder
b2dcbb3b68 Intel 8085:
- refactored callbacks to use devcb
- added 8080A variant
2009-08-21 08:19:17 +00:00
Aaron Giles
ac3d58fad5 Cleanups and version bump. 2009-08-21 01:52:51 +00:00
Wilbert Pol
dd46ee883a Added support TMS1000 family models TMS1000/1070/1100/1200/1270/1300.
Added support for configuration of output PLA to the tms0980/tms1000 interface.
2009-08-20 19:15:30 +00:00
R. Belmont
6106e6bae4 mcs51: fix GCC 64-bit warning 2009-08-19 20:48:21 +00:00
Michaël Banaan Ananas
93d7716c87 - fixed cycle deduction on unconditional CALL / RET, it took about half too many cycles
- added cycle tables and cleaned up source layout. This was done very carefully, it should be errorfree.
- removed HLT cycle eating (earlier, HLT after EI could theoretically fail)
- fixed parity flag on add/sub/cmp. Bug was caused by z80 overflow detection accidentally left in
- renamed temp register XX to official name WZ
- renamed flags from Z80 style S Z Y H X V N C  to  S Z X5 H X3 P V C, and fixed X5 / V flags where accidentally broken due to flag names confusion
2009-08-19 15:42:35 +00:00
Michaël Banaan Ananas
8a74f58d3b obsolete file 2009-08-19 15:30:28 +00:00
Michaël Banaan Ananas
06829cb2f7 Z80 changes:
- Fixed X/Y flags in CCF/SCF/BIT, ZEXALL is happy now
- Simplified DAA, renamed MEMPTR (3.8) to WZ (same temp register as the officially named WZ in the 8080), added TODO

the cycle fix by Marshmellow, in the 3.9 z80.c comments was already committed in june, just added there for documentation
2009-08-19 15:27:22 +00:00
Aaron Giles
df435f8701 Attempt to define an I64FMT string that can be used for printf'ing 64-bit
integers. This is defined to be "I64" on MSVC and recent mingw compilers,
and "ll" for all others.

Updated all instances of 64-bit prints to use the new macro.
2009-08-19 08:49:01 +00:00
Aaron Giles
03d5253dca Added some missing casts and other minor tweaks. 2009-08-19 04:58:54 +00:00
Aaron Giles
e3f1f454f8 Cleanups and version bump. 2009-08-13 05:56:25 +00:00
Aaron Giles
6f8be150e6 From: hoge hoge [c8cv@hotmail.com]
Sent: Friday, August 07, 2009 9:33 AM
To: submit@mamedev.org
Subject: z180 daatable removed
Since I removed the daatable from i8085, and the z180 one is exactly the 
same, I might as well remove that one too, see attached diff.

hap
2009-08-13 05:07:00 +00:00
Aaron Giles
8ff3556c40 From: hoge hoge [c8cv@hotmail.com]
Sent: Friday, August 07, 2009 6:45 AM
To: submit@mamedev.org
Subject: spacwalk dips and player2 support
Hello,

Attached is a diff for 0133u1 Space Walk that adds game time and coinage 
DIP switches, as well as service mode and input test. DIP switches 5 and 6 
are still unknown. It also adds support for the 2nd controller and 
coincounter, similar to clowns. I've removed the GAME_NOT_WORKING flag, since 
other than a glitch with the CPU controlled pad on the left side, the gameplay 
is working fine. The fact that the middle section is inaccessible looks 
deliberate: there's probably a vertical-shape object in the original artwork 
the clown (astronaut in this case:P) can bump into.

Greets,
hap
2009-08-13 05:04:23 +00:00
Aaron Giles
9b0333264b Should have been deleted. 2009-08-13 05:02:21 +00:00