Commit Graph

13601 Commits

Author SHA1 Message Date
cam900
f530835c8f
cpu/upd7725.cpp: Improved host interface, suppress side effects for debugger reads. (#13530)
* Split host interface into separate data_r, data_w and status_r.
* Added access mask for µPD96050 data RAM write, simplified downstream code that uses it.
* bus/snes/event.cpp, bus/snes/upd.cpp: Added logging for writes to DSP status register address.
2025-04-25 02:25:13 +10:00
angelosa
b6df288773 nec/pc9821.cpp: bump 7220 couple to use A revision
* fix win95 overlaying startup text on desktop graphics
2025-04-24 11:46:23 +02:00
angelosa
249df925a8 cbus/pc9801_26.cpp: hookup irq select, guesswork for DE-9 output pins 2025-04-24 11:46:23 +02:00
hap
955ac69f84 ymfm: remove 2608/2610 ssg gain workaround 2025-04-23 22:53:12 +02:00
angelosa
de28051b3b bus/cbus: preliminary conversion of MSX style DE-9 ports in -26 and -86
* -86 uses only one port not two;
* Remove joystick readback from -118, mounts a DA-15 PC gameport instead;
* Remove pc9801_snd_device glue logic;
2025-04-23 11:30:18 +02:00
Patrick Mackinlay
9058810fe2
osd: remove mac address filter from osd (fixes #13586) (#13614)
* dp8390: improve address filtering

* osd: remove mac address filter from osd (fixes #13586)
2025-04-22 17:35:20 +02:00
m1macrophage
4b2084a6c3
linn/linndrum.cpp: Modeled click filter, improved hihat decay emulation, and did cleanups. (#13610)
* linn/linndrum.cpp: Modeled click filter, improved hihat decay emulation.

Primary changes:
* Hihat decay knob will alway have an effect, not just at trigger time.
* Modeling the "click" filter.
* sound/flt_biquad.cpp: Fixed LOWPASS1P and HIGHPASS1P modes for flt_biquad.

Other changes:
* Renamed input for hihat decay pot.
* Updated "mux drums" section comments.
* Updated snare_w comments.
* Other minor comment changes.

* flt_biquad: Added HIGHPASS1P1Z implementation and used in the linndrum.
Reverted HIGHPASS1P changes.
2025-04-22 14:53:19 +02:00
smf-
8c4c35d34d check correct irr0 bits, after the register size was corrected in b26662f1bb [smf] 2025-04-22 08:34:50 +01:00
Vas Crabb
c10ecb0941 Fixed the last GCC class memory access warnings and cleaned up some stuff.
* shared/exidysound.cpp: Use real 8253 PIT device rather than a local
  implementation, fixed class memory access error, cleaned up code to
  use virtual member functions idiomatically.
* cpu/alto2: Fixed class memory access error (was nuking unique
  pointers).
* interton/vc4000_v.cpp: Fixed class memory access error, got rid of
  indirection on bitmap, cleaned up a little.
* Enabled error for GCC class memory access warning to avoid rot.
2025-04-21 05:28:13 +10:00
arbee
dc62387260 video/bt47x.cpp: Enable Bt473 device. [R. Belmont] 2025-04-20 10:40:21 -04:00
arbee
78f0031145 video/bt45x.cpp: Make 16-color variants generate visible colors. [R. Belmont] 2025-04-20 10:02:20 -04:00
holub
47ea392f4d
cpu/z80/z80.cpp: Get rid of some flag LUTs (#13607) 2025-04-20 10:59:31 +02:00
Vas Crabb
8ab7404eac bus/a2bus/mouse.cpp: Synchronise comminication with the microcontroller.
Also added ROM bank to saved states, use explicitly sized integer types,
etc.
2025-04-20 05:03:12 +10:00
arbee
68315a6625 machine/pseudovia.cpp: Moved from mame/apple because some bus devices will need this soon. [R. Belmont] 2025-04-19 14:50:33 -04:00
Vas Crabb
8c28d3ff7e Cleaned up build scripts and compiling documentation:
* Made it a bit easier to cross-compile for x86-64 or i686 on an AArch64
  Windows system.
* Choose the default native recompiler back-end based on predefined
  macros rather than requiring the build scripts to set it.
* Don't require every target without a native recompiler to declare
  this.
* Got rid of the code that was supposed to set -m32 or -m64 when
  building GENie (it didn't work - it tried to use ARCHITECTURE before
  setting it).
* Avoid relying on the unreliable PROCESSOR_ARCHITECTURE environment
  variable.
* Got rid of stuff for versions of Xcode that are definitely no longer
  supported.
* Got rid of workarounds for very old Linux distros.
* Use newer makefile syntax for if/else/if structures, comment some else
  and endif statements for clarity.
2025-04-20 02:36:58 +10:00
Vas Crabb
5bd60d58c0 -cpu/e132xs: Cleaned up disassembler a bit, disassemble most invalid instructions as D.HU.
-bimg: There should be no need to force SSE2 for 64-bit builds.
2025-04-19 02:28:03 +10:00
AJR
728014a2b1 MIPS disassembler refinements (mips1, mips3, psx, rsp)
* Change hexadecimal prefix from $ to 0x ($ means something else in MIPS assembler syntax) and omit for small numbers
* mips1, mips3, psx: Use shorthand mnemonics bal, beqz(l), bnez(l), li, move, neg, negu, not where applicable
* mips1, mips3, psx: Add delay slot to jr ra for stepping out
* mips1, mips3: Remove invalid instructions from other MIPS cores and use .word syntax for invalid instructions
* mips3: Fix field spacing for some instructions
2025-04-17 22:17:58 -04:00
smf-
b26662f1bb Implemented specific SH3/SH4 chips & pass the required endian into the constructor, SH4 internal registers now work when using big endian. The debugger is now aware that the SH3/SH4 has an MMU. [smf] 2025-04-17 18:29:29 +01:00
smf-
7fc77f3f4c Work round a race condition in the Compaq i8042 rom. Fixes using ctmouse.exe (v2.1 beta4) in shutms11. [smf] 2025-04-17 18:29:29 +01:00
Vas Crabb
1f6f0197df cpu/drcbex64.cpp: Always keep UML floating point registers in memory for SysV ABI.
This was changed in 822c3b4232 but it
never worked for multiple reasons:
* The comment mentions saving around CALLC, but there is no code to save
  and restore around CALLC, DEBUG and RECOVER, all of which can clobber
  callee-saved registers.
* Numerous opcode handlers assume XMM0 and XMM1 can be used as scratch
  registers, but this change mapped them to UML F0 and F1.  This
  resulted in F0 and F1 getting clobbered by many UML instructions.
2025-04-17 05:40:59 +10:00
cam900
c6313f8049
sound/gb.cpp: Fixed master volume control and cleaned up code: (#13483)
* Fixed master volume control.
* Fixed output range.
* Fixed sweep, wave RAM corruption and GBA read/write emulation.
* Use integer bit fields for pulse duty cycle tables.
* Reduced duplication made some variables const, improved member names.
2025-04-17 04:15:29 +10:00
Devin Acker
ec7eb50bf6
casio/cps200.cpp: Added a skeleton Casio CPS-2000 driver; also improved µPD934 and MSM6200 emulation. (#13591)
* machine/msm6200.cpp: Scan matrix on a timer until a change is detected.
* sound/upd934g.cpp: Fixed play sample command.
* casio/cz1.cpp: Added MSM6200 clock input frequency.

New systems marked not working
---------------
Casio CPS-2000 [BCM, Devin Acker]
2025-04-17 04:08:49 +10:00
Vas Crabb
519cbd956c cpu/drcbearm64.cpp: Fixed more cases where ROLAND clobbered source registers.
ROLAND could clobber source registers or produce incorrect results if
the desination was the same UML register as the shift or mask.

Fixed a bug in the logic for deciding whether to use a temporary
register for the mask for ROLINS.

Also optimised ROLAND and ROLINS some more (particularly translation
from UML's left rotate to ARM's right rotate) and removed a special case
that the simplifier now takes care of.
2025-04-17 03:29:30 +10:00
Vas Crabb
ae41239b49 -misc/dgpix.cpp: Marked Elfin as having unemulated protection.
* Elfin will eventually get into a state where it ignores coins.
  Protection is conceptually similar to The X-Files.

-cpu/uml.cpp, cpu/drcuml.cpp: Made it possible to build with logging
 simplifications enabled (in uml.cpp it logs each step, in drcuml.cpp it
 logs the net change).  It will produce absoluely massive logs, though.

-cpu/drcuml.cpp: Removed woefully inadequate and badly rotted "backend
 validation" code.
2025-04-17 00:56:56 +10:00
Vas Crabb
2d31b39b20 A couple of recompiler improvements involving the carry flag:
* cpu/drcbearm64.cpp: Optimised setting up carry flag for ADDC and SUBB.
  There's no need to preserve the NZV flags so a two-instruction
  sequence can be used.
* cpu/drcbex64.cpp: Simplified code generation for CARRY.  I have no
  idea why it was preserving RAX at all - it always uses RAX as a
  scratch register.
2025-04-16 05:50:05 +10:00
Adam Billyard
fb033d7a24
machine/nscsi_bus.cpp: Changed data release delay to 400ns to match the comment. (#13593)
It was previously using a value of 40ns.
2025-04-16 05:31:35 +10:00
cam900
596378bfe0
cpu/avr8/avr8.cpp: Fixed program address masks and boot ROM sizes. (#13578)
* Fixed program address masks for word addressing.
* Fixed PC shift in state string export.
* handheld/pensebem.cpp: Fixed internal ROM region size.
* makerbot/replicator.cpp: Use lowercase hexadecimal literals.
* skeleton/venteta.cpp: Fixed CPU type for fix PC size (16 bits - also word unit) and internal RAM size (4000 bytes).
* ultimachine/rambo.cpp: Fixed internal ROM region size, use lowercase hexadecimal literals.
2025-04-16 05:23:13 +10:00
cam900
edf127cded
sound/k007232.cpp: Suppress side effects for debugger reads and cleaned up code. (#13580)
* Use references rather than pointers where appropriate, made some variables const.
* Made parameter names match in header and source and reformatted code.
2025-04-16 05:21:11 +10:00
Vas Crabb
5785f30e7f Even more recompiler fixes:
* cpu/drcbearm64.cpp: Fixed ROLAND, ROLINS and CARRY clobbering the
  shift input when it's a a register.
* cpu/drcbex86.cpp: Fixed DROLINS clobbering source in I0 and
  miscalculating flags when destination is I0.
* cpu/uml.h: Removed assertion that's no longer valid.
* cpu/drcbearm64.cpp: Added minimal operand swizzling to allow AND, OR
  and XOR to work without the simplifier.
* cpu/drcbex64.cpp: Optimised shift operations slightly.
* cpu/drcbec.cpp: Added stub implementations for TEST with no flag
  outputs to allow running with simplifier disabled.
* cpu/drcbec.cpp: Implemented DREADM/DWRITEM with byte size access.
* cpu/drcbec.cpp: Store pointer to address space directly in instruction
  stream.
* cpu/drcbearm64.cpp: Removed some special cases for situations the
  simplifier deals with for ROLAND and ROLINS.
* cpu/drcbec.cpp: Added some actual detail to error messages on
  encountering unexpected instructions.
2025-04-15 06:12:17 +10:00
holub
7bb6cd259c
cpu/z80/z80.cpp: Avoided wrong isunset() detection in some Spectrum clones (#13590) 2025-04-14 11:00:55 +02:00
m1macrophage
6794099d89
machine/rescap.h: Implemented audio potentiometer law. (#13588)
* machine/rescap.h: Implemented audio potentiometer law.
Used it in oberheim/dmx.cpp and linn/linndrum.cpp.

* machine/rescap.h: Function should not be a constexpr.
Also avoiding pow in constexpr constants.
2025-04-13 21:58:52 +02:00
Vas Crabb
50178bb8a0 -apple/rbv.cpp, apple/maciici.cpp: Implemented monochrome mode, cleaned up clocks.
* apple/rbv.cpp: Send blue channel to all outputs when a monochrome
  monitor is connected.
* apple/rbv.cpp: Implement device_palette_interface rathr than using a
  separate palette device.
* apple/rbv.cpp: Derive 60.15 Hz timer and pseudo-VIA clock from clock
  input.
* apple/maciici.cpp: Derive clocks from RBV clock crystal.

-docs: Link more configuration options to their descriptions.
2025-04-14 03:31:55 +10:00
hap
d406685313 i8085: optimize set_status by checking if devcb is unset 2025-04-13 16:07:55 +02:00
cam900
075fffa097
bus/snes/st018.cpp: Add primary support of ST018 coprocessor (#13553)
* bus/snes/st018.cpp: Add primary support of ST018 coprocessor
moritas2 now boots, but still hangs at in-game.

* bus/snes/st018.cpp: Fix CPU latch accessing
2025-04-13 08:09:29 -04:00
Vas Crabb
82718c58c4 cpu/drcbex64.cpp: Fixed another bug uncovered after fixing a bug in the DRC tester. 2025-04-13 03:59:41 +10:00
Vas Crabb
de40641555 More recompiler fixes:
* cpu/drcbec.cpp: Interpret index operand for load/store instructions as
  a signed value for consistency with other back-ends.
* cpu/drcbec.cpp: Honour alignment rules when packing immediate values.
* cpu/drcbex64.cpp: Don't special-case SEXT with an immediate source -
  the simplifier takes care of this.
* cpu/drcbex86.cpp: Be explicit about preserving flags in load/store
  instructions.
* docs: Added a couple more UML data movement instructions.
2025-04-12 13:25:58 +10:00
donohoe00
9cdce3047e
act/victor9k.cpp: Get audio working on Victor 9000 (victor9k) (#13549)
* 6522via: Don't generate a signal on PB7 when the timer 1 latch is
programmed with 0.

On the Victor 9000, the clock for the audio codec is generated by a
via6522.  PB7 is connected to the codec's clock input.  Non-speech
sounds (e.g. beeps, musical notes) are produced by outputting a cyclical
waveform from the codec, with the pitch determined by the frequency of
the codec clock.

Software running on the Victor 9000 has been observed to attempt to
silence the audio by writing 0 to the T1 timer latch (not by turning off
continuous mode or PB7 output).  With the emulated via6522, this resulted
in a high-frequency clock signal being output on PB7, causing a
high-pitched squeal whenever notes are not being played.

From this observed behavior we could infer that the original 6522 HW
does not output a signal on PB7 when the latch value is 0, and that the
Victor 9000 software was relying on this behaviour to silence the audio
output (one would have to assume that the real hardware didn't produce
a squeal).

* mc6852: fix various transmit-related issues which were preventing
victor9k Audio output from working.

The expected behavior of mc6852 is to write the data received in the
FIFO register serially via tx_data_callback().  However, this was not
implemented, and the only way data in the transmit FIFO could be
removed and transmitted was by calling get_tx_byte(), and to then
serially transmit the data by some external mechanism.

Only m68sfdc.cpp calls get_tx_byte(), so it's hard to see how any
other device using the mc6852 would have been able to transmit data.

Software running on victor9k attempting to play audio would hang,
since it would block waiting for the TX FIFO to empty.  With these
changes, Victor 9000 audio playback works as expected, with the data
getting sent serially to the Audio codec.

In order to avoid breaking m68sfdc, a new API call is added to allow
data to be sent the "old" way.  m68sfdc now calls
set_tx_pull_mode(true), to get the previous behavior.  As I understand
it, other devices using mc6852 must be broken, and would need to
be revisited.

* victor9k: complete Audio support, adding a low-pass filter after
the HC-55516 codec.  Mark victor9k Audio as working.
2025-04-11 18:48:57 -04:00
Vas Crabb
3e3d27dde5 Started moving UML instruction reference to main documentation, fixed more recompiler issues:
* cpu/drcbearm64.cpp Interpret index operand for load and store
  instructions as a signed 32-bit value for consistency with x86-64.
  Moved code to interpret load and scale the index for integer
  load/store to a helper function to make it easier to update if it
  needs changes or fixes.
* cpu/drcbearm64.cpp: Use and/orr to set carry flag directly rahter than
  using an intermediate register when both operands of a CARRY
  instruction are immediates.
* cpu/drcbearm64.cpp: Fixed incorrect operand type assertion for FREAD.
* cpu/drcbearm64.cpp: Use less verbose asmjit helper functions for shift
  operations and addressing modes.
* cpu/drcbex64.cpp: Interpret index operand for floating point
  load/store as a signed 32-bit value for consistency with integer
  load/store.
* cpu/drcbex64.cpp: Guard against any possibility of load and store
  instructions altering the flags.
* cpu/drcbex64.cpp: Reduced copy/paste in floating point load/store
  instructions.
* cpu/drcbex64.cpp: Cleaned up some casts between integer types with
  differing size and signedness.
* docs: Added reference for UML flow control, data movement and emulated
  memory access instructions.
* cpu/uml.cpp: Truncate immediates to size for a few more instructions.
* cpu/uml.cpp: Added SPACE_OPCODES since it's a well-known address space
  now.
* cpu/uml.cpp: Removed SCALE_DEFAULT.  It's unimplemented by back-ends
  and unused by front-ends.
* cpu/uml.h, cpu/drcumlsh.h: Less confusing names for parameters to read
  and write instruction generators.
* cpu/drcbex86.cpp: Templated 64-bit multiplication helpers on the
  zero/sign flag source, cleaned up casting pointers to integers.
2025-04-12 02:58:15 +10:00
holub
08ff607f3f
cpu/z80/z84c015.cpp: Isolated cpu-specific memory translate functions (#13581) 2025-04-11 17:04:01 +02:00
hap
f34dcc20ec dsp56ops: fix regression from prev commit 2025-04-11 15:34:34 +02:00
hap
74877969c1 misc cpu: no need to check debug enabled flag manually 2025-04-11 15:21:15 +02:00
hap
dcca8368e8 z80make: sort prefixes to have consistent generated output 2025-04-10 15:02:43 +02:00
fulivi
defaf6283c
MSX: add Video80 homebrew card (#13568)
* MSX: fixed vy0010 ROM image
2025-04-10 08:10:58 -04:00
hap
b8f93608a7 t6a84: remove unneeded devcb 2025-04-10 13:55:49 +02:00
holub
6e595d751f
z80/z80make.py: Revisited z80 code generator (#13573)
* z80/z80make.py: Revisited z80 code generator
* cpu/z80/t6a84.cpp: isolate device specific callbacks
2025-04-10 13:19:01 +02:00
m1macrophage
e0ea6961f7
sound/dac76.cpp: Emulating multiplying capability. (#13577)
* Added support for reference current (multiplying capability).
* Added support for voltage output.
* Added support for streaming reference current.
* Used those capabilities in oberheim/dmx.cpp and linn/linndrum.cpp.
2025-04-10 11:04:35 +02:00
Lord-Nightmare
6bc01c176c Fix cases where specific segment register settings could cause the i80186/188 peripherals to fail to be properly mapped into memory space. [crazyc, Lord Nightmare] 2025-04-09 17:26:39 -04:00
Vas Crabb
1c8234fb80 cpu/drcbex86.cpp: Fixed flags for 64-bit multiply instructions. 2025-04-10 07:00:50 +10:00
Vas Crabb
67a0fb4af4 cpu/drcbearm64.cpp: Don't clear carry for ROLC/RORC with zero shift count. 2025-04-10 02:24:51 +10:00
Vas Crabb
51c9a3a0b1 Still more recompiler fixes:
* cpu/uml.cpp: Fixed some cases where simplifying multiplication
  instructons incorrectly changed output flags.
* cpu/drcbex64.cpp: Fixed some cases where a ROLC/RORC with zero shift
  count could incorrectly clear the carry flag.
* cpu/drcbex86.cpp: Made 64-bit ROLC/RORC with zero bit count preserve
  the carry flag.
* cpu/drcbec.cpp: Fixed FSMOV/FDMOV turning things that look like
  signalling NaNs into quiet NaNs on i686.
* cpu/drcbex64.cpp: Greatly reduced copy/paste in the code generation
  for multiply instructions.
2025-04-10 01:58:08 +10:00