111 lines
2.7 KiB
C++
111 lines
2.7 KiB
C++
// license:BSD-3-Clause
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// copyright-holders:David Haywood
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/* 68307 MBUS module */
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/* all ports on this are 8-bit? */
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#include "emu.h"
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#include "68307bus.h"
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#define m68307BUS_MADR (0x01)
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#define m68307BUS_MFDR (0x03)
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#define m68307BUS_MBCR (0x05)
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#define m68307BUS_MBSR (0x07)
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#define m68307BUS_MBDR (0x09)
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READ8_MEMBER( m68307_cpu_device::m68307_internal_mbus_r )
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{
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assert(m_m68307MBUS);
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m68307_mbus &mbus = *m_m68307MBUS;
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uint8_t retval;
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int pc = space.device().safe_pc();
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switch (offset)
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{
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case m68307BUS_MADR:
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logerror("%08x m68307_internal_mbus_r %08x (MADR - M-Bus Address Register)\n", pc, offset);
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return space.machine().rand();
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case m68307BUS_MFDR:
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logerror("%08x m68307_internal_mbus_r %08x (MFDR - M-Bus Frequency Divider Register)\n", pc, offset);
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return space.machine().rand();
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case m68307BUS_MBCR:
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logerror("%08x m68307_internal_mbus_r %08x (MFCR - M-Bus Control Register)\n", pc, offset);
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return mbus.m_MFCR;//space.machine().rand();
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case m68307BUS_MBSR:
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logerror("%08x m68307_internal_mbus_r %08x (MBSR - M-Bus Status Register)\n", pc, offset);
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retval = 0;
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if (mbus.m_busy) retval |= 0x20;
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if (mbus.m_intpend) retval |= 0x02;
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return retval;
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case m68307BUS_MBDR:
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logerror("%08x m68307_internal_mbus_r %08x (MBDR - M-Bus Data I/O Register)\n", pc, offset);
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mbus.m_intpend = true;
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return 0xff;//space.machine().rand();
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default:
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logerror("%08x m68307_internal_mbus_r %08x (UNKNOWN / ILLEGAL)\n", pc, offset);
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return 0x00;
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}
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return 0xff;
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}
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WRITE8_MEMBER( m68307_cpu_device::m68307_internal_mbus_w )
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{
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assert(m_m68307MBUS);
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m68307_mbus &mbus = *m_m68307MBUS;
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int pc = space.device().safe_pc();
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switch (offset)
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{
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case m68307BUS_MADR:
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logerror("%08x m68307_internal_mbus_w %08x, %02x (MADR - M-Bus Address Register)\n", pc, offset,data);
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break;
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case m68307BUS_MFDR:
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logerror("%08x m68307_internal_mbus_w %08x, %02x (MFDR - M-Bus Frequency Divider Register)\n", pc, offset,data);
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break;
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case m68307BUS_MBCR:
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logerror("%08x m68307_internal_mbus_w %08x, %02x (MFCR - M-Bus Control Register)\n", pc, offset,data);
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mbus.m_MFCR = data;
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if (data & 0x80)
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{
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mbus.m_busy = false;
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mbus.m_intpend = false;
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}
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if (data & 0x20) mbus.m_busy = true;
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break;
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case m68307BUS_MBSR:
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logerror("%08x m68307_internal_mbus_w %08x, %02x (MBSR - M-Bus Status Register)\n", pc, offset,data);
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break;
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case m68307BUS_MBDR:
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logerror("%08x m68307_internal_mbus_w %08x, %02x (MBDR - M-Bus Data I/O Register)\n", pc, offset,data);
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mbus.m_intpend = true;
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break;
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default:
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logerror("%08x m68307_internal_mbus_w %08x, %02x (UNKNOWN / ILLEGAL)\n", pc, offset,data);
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break;
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}
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}
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void m68307_cpu_device::m68307_mbus::reset()
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{
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m_busy = false;
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}
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