mirror of
https://github.com/holub/mame
synced 2025-04-29 11:30:28 +03:00
341 lines
9.1 KiB
C++
341 lines
9.1 KiB
C++
// license:BSD-3-Clause
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// copyright-holders:Angelo Salese
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/***************************************************************************
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Casio FP-6000
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preliminary driver by Angelo Salese
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TODO:
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- keyboard;
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- fdc / cmt;
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- gvram color pen is a rather crude guess (the layer is monochrome on
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BASIC?);
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- everything else
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Debug trick for the keyboard:
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- bp 0xfc93e, ip+=2 then define al = ASCII code
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****************************************************************************/
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#include "emu.h"
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#include "cpu/i86/i86.h"
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#include "video/mc6845.h"
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#include "emupal.h"
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#include "screen.h"
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class fp6000_state : public driver_device
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{
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public:
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fp6000_state(const machine_config &mconfig, device_type type, const char *tag)
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: driver_device(mconfig, type, tag),
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m_gvram(*this, "gvram"),
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m_vram(*this, "vram"),
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m_maincpu(*this, "maincpu"),
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m_crtc(*this, "crtc"),
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m_gfxdecode(*this, "gfxdecode"),
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m_palette(*this, "palette")
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{ }
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void fp6000(machine_config &config);
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private:
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uint8_t *m_char_rom;
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required_shared_ptr<uint16_t> m_gvram;
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required_shared_ptr<uint16_t> m_vram;
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uint8_t m_crtc_vreg[0x100],m_crtc_index;
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struct {
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uint16_t cmd;
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}m_key;
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DECLARE_READ8_MEMBER(fp6000_pcg_r);
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DECLARE_WRITE8_MEMBER(fp6000_pcg_w);
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DECLARE_WRITE8_MEMBER(fp6000_6845_address_w);
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DECLARE_WRITE8_MEMBER(fp6000_6845_data_w);
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DECLARE_READ8_MEMBER(fp6000_key_r);
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DECLARE_WRITE8_MEMBER(fp6000_key_w);
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DECLARE_READ16_MEMBER(unk_r);
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DECLARE_READ16_MEMBER(ex_board_r);
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DECLARE_READ16_MEMBER(pit_r);
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virtual void machine_start() override;
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virtual void machine_reset() override;
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virtual void video_start() override;
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uint32_t screen_update_fp6000(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
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required_device<cpu_device> m_maincpu;
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required_device<mc6845_device>m_crtc;
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required_device<gfxdecode_device> m_gfxdecode;
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required_device<palette_device> m_palette;
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void fp6000_io(address_map &map);
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void fp6000_map(address_map &map);
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};
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void fp6000_state::video_start()
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{
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}
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#define mc6845_h_char_total (m_crtc_vreg[0])
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#define mc6845_h_display (m_crtc_vreg[1])
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#define mc6845_h_sync_pos (m_crtc_vreg[2])
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#define mc6845_sync_width (m_crtc_vreg[3])
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#define mc6845_v_char_total (m_crtc_vreg[4])
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#define mc6845_v_total_adj (m_crtc_vreg[5])
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#define mc6845_v_display (m_crtc_vreg[6])
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#define mc6845_v_sync_pos (m_crtc_vreg[7])
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#define mc6845_mode_ctrl (m_crtc_vreg[8])
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#define mc6845_tile_height (m_crtc_vreg[9]+1)
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#define mc6845_cursor_y_start (m_crtc_vreg[0x0a])
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#define mc6845_cursor_y_end (m_crtc_vreg[0x0b])
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#define mc6845_start_addr (((m_crtc_vreg[0x0c]<<8) & 0x3f00) | (m_crtc_vreg[0x0d] & 0xff))
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#define mc6845_cursor_addr (((m_crtc_vreg[0x0e]<<8) & 0x3f00) | (m_crtc_vreg[0x0f] & 0xff))
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#define mc6845_light_pen_addr (((m_crtc_vreg[0x10]<<8) & 0x3f00) | (m_crtc_vreg[0x11] & 0xff))
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#define mc6845_update_addr (((m_crtc_vreg[0x12]<<8) & 0x3f00) | (m_crtc_vreg[0x13] & 0xff))
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uint32_t fp6000_state::screen_update_fp6000(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
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{
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int x,y;
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int xi,yi;
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uint8_t *gfx_rom = memregion("pcg")->base();
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uint32_t count;
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count = 0;
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for(y=0;y<400;y++)
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{
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for(x=0;x<640/4;x++)
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{
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for(xi=0;xi<4;xi++)
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{
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int dot = (m_gvram[count] >> (12-xi*4)) & 0xf;
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if(y < 400 && x*4+xi < 640) /* TODO: safety check */
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bitmap.pix16(y, x*4+xi) = m_palette->pen(dot);
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}
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count++;
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}
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}
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for(y=0;y<mc6845_v_display;y++)
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{
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for(x=0;x<mc6845_h_display;x++)
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{
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int tile = m_vram[x+y*mc6845_h_display] & 0xff;
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int color = (m_vram[x+y*mc6845_h_display] & 0x700) >> 8;
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int pen;
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for(yi=0;yi<mc6845_tile_height;yi++)
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{
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for(xi=0;xi<8;xi++)
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{
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pen = (gfx_rom[tile*16+yi] >> (7-xi) & 1) ? color : -1;
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if(pen != -1)
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if(y*mc6845_tile_height < 400 && x*8+xi < 640) /* TODO: safety check */
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bitmap.pix16(y*mc6845_tile_height+yi, x*8+xi) = m_palette->pen(pen);
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}
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}
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}
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}
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/* quick and dirty way to do the cursor */
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for(yi=0;yi<mc6845_tile_height;yi++)
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{
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for(xi=0;xi<8;xi++)
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{
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if(mc6845_h_display)
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{
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x = mc6845_cursor_addr % mc6845_h_display;
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y = mc6845_cursor_addr / mc6845_h_display;
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bitmap.pix16(y*mc6845_tile_height+yi, x*8+xi) = m_palette->pen(7);
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}
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}
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}
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return 0;
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}
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READ8_MEMBER(fp6000_state::fp6000_pcg_r)
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{
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return m_char_rom[offset];
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}
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WRITE8_MEMBER(fp6000_state::fp6000_pcg_w)
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{
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m_char_rom[offset] = data;
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m_gfxdecode->gfx(0)->mark_dirty(offset >> 4);
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}
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WRITE8_MEMBER(fp6000_state::fp6000_6845_address_w)
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{
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m_crtc_index = data;
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m_crtc->address_w(data);
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}
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WRITE8_MEMBER(fp6000_state::fp6000_6845_data_w)
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{
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m_crtc_vreg[m_crtc_index] = data;
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m_crtc->register_w(data);
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}
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void fp6000_state::fp6000_map(address_map &map)
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{
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map.unmap_value_high();
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map(0x00000, 0xbffff).ram();
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map(0xc0000, 0xdffff).ram().share("gvram");//gvram
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map(0xe0000, 0xe0fff).ram().share("vram");
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map(0xe7000, 0xe7fff).rw(FUNC(fp6000_state::fp6000_pcg_r), FUNC(fp6000_state::fp6000_pcg_w));
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map(0xf0000, 0xfffff).rom().region("ipl", 0);
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}
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/* Hack until I understand what UART is this one ... */
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READ8_MEMBER(fp6000_state::fp6000_key_r)
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{
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if(offset)
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{
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switch(m_key.cmd)
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{
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case 0x7e15: return 3;
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case 0x1b15: return 1;
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case 0x2415: return 0;
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default: printf("%04x\n",m_key.cmd);
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}
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return 0;
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}
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return 0x40;
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}
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WRITE8_MEMBER(fp6000_state::fp6000_key_w)
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{
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if(offset)
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m_key.cmd = (data & 0xff) | (m_key.cmd << 8);
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else
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m_key.cmd = (data << 8) | (m_key.cmd & 0xff);
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}
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READ16_MEMBER(fp6000_state::unk_r)
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{
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return 0x40;
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}
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READ16_MEMBER(fp6000_state::ex_board_r)
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{
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return 0xffff;
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}
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READ16_MEMBER(fp6000_state::pit_r)
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{
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return machine().rand();
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}
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void fp6000_state::fp6000_io(address_map &map)
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{
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map.unmap_value_high();
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map(0x08, 0x09).r(FUNC(fp6000_state::ex_board_r)); // BIOS of some sort ...
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map(0x0a, 0x0b).portr("DSW"); // installed RAM id?
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map(0x10, 0x11).nopr();
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map(0x20, 0x23).rw(FUNC(fp6000_state::fp6000_key_r), FUNC(fp6000_state::fp6000_key_w)).umask16(0x00ff);
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map(0x38, 0x39).r(FUNC(fp6000_state::pit_r)); // pit?
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map(0x70, 0x70).w(FUNC(fp6000_state::fp6000_6845_address_w));
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map(0x72, 0x72).w(FUNC(fp6000_state::fp6000_6845_data_w));
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map(0x74, 0x75).r(FUNC(fp6000_state::unk_r)); //bit 6 busy flag
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}
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/* Input ports */
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static INPUT_PORTS_START( fp6000 )
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PORT_START("DSW")
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PORT_DIPNAME( 0x01, 0x00, "DSW" )
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PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x02, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x04, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x08, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x10, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0xe0, 0x40, "Installed RAM banks" )
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PORT_DIPSETTING( 0xe0, "0" )
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PORT_DIPSETTING( 0xc0, "1" )
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PORT_DIPSETTING( 0xa0, "2" )
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PORT_DIPSETTING( 0x80, "3" )
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PORT_DIPSETTING( 0x60, "4" )
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PORT_DIPSETTING( 0x40, "5" )
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PORT_DIPSETTING( 0x20, "6 (INVALID)" ) //exceeds 768KB limit (writes to gvram et al)
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PORT_DIPSETTING( 0x00, "7 (INVALID)" )
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INPUT_PORTS_END
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static const gfx_layout fp6000_charlayout =
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{
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8, 16,
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RGN_FRAC(1,1),
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1,
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{ 0 },
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{ STEP8(0,1) },
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{ STEP16(0,8) },
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8*16
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};
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static GFXDECODE_START( gfx_fp6000 )
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GFXDECODE_ENTRY( "pcg", 0x0000, fp6000_charlayout, 0, 1 )
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GFXDECODE_END
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void fp6000_state::machine_start()
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{
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m_char_rom = memregion("pcg")->base();
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}
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void fp6000_state::machine_reset()
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{
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}
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MACHINE_CONFIG_START(fp6000_state::fp6000)
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/* basic machine hardware */
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MCFG_DEVICE_ADD("maincpu", I8086, 16000000/2)
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MCFG_DEVICE_PROGRAM_MAP(fp6000_map)
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MCFG_DEVICE_IO_MAP(fp6000_io)
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/* video hardware */
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MCFG_SCREEN_ADD("screen", RASTER)
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MCFG_SCREEN_REFRESH_RATE(60)
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MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500)) /* not accurate */
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MCFG_SCREEN_SIZE(640, 480)
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MCFG_SCREEN_VISIBLE_AREA(0, 640-1, 0, 480-1)
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MCFG_SCREEN_UPDATE_DRIVER(fp6000_state, screen_update_fp6000)
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MCFG_SCREEN_PALETTE("palette")
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H46505(config, m_crtc, 16000000/5); /* unknown clock, hand tuned to get ~60 fps */
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m_crtc->set_screen("screen");
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m_crtc->set_show_border_area(false);
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m_crtc->set_char_width(8);
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MCFG_PALETTE_ADD("palette", 8)
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// MCFG_PALETTE_INIT(black_and_white)
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GFXDECODE(config, m_gfxdecode, m_palette, gfx_fp6000);
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MACHINE_CONFIG_END
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/* ROM definition */
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ROM_START( fp6000 )
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ROM_REGION( 0x10000, "ipl", ROMREGION_ERASEFF )
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ROM_LOAD( "ipl.rom", 0x0000, 0x10000, CRC(c72fe40a) SHA1(0e4c60dc27f6c7f461c4bc382b81602b3327a7a4))
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ROM_REGION( 0x1000, "mcu", ROMREGION_ERASEFF )
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ROM_LOAD( "mcu", 0x0000, 0x1000, NO_DUMP ) //unknown MCU type
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ROM_REGION( 0x10000, "pcg", ROMREGION_ERASE00 )
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ROM_END
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/* Driver */
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/* YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS */
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COMP( 1985, fp6000, 0, 0, fp6000, fp6000, fp6000_state, empty_init, "Casio", "FP-6000", MACHINE_NOT_WORKING | MACHINE_NO_SOUND)
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