mirror of
https://github.com/holub/mame
synced 2025-04-25 01:40:16 +03:00
mc6845, crtc_ega: Simplify read/write handlers (nw)
This commit is contained in:
parent
3426c5ead6
commit
e67155ed08
@ -195,7 +195,7 @@ uint8_t a2bus_videx160_device::read_c0nx(uint8_t offset)
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switch (offset)
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{
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case 1:
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return m_crtc->read_register(); // status_r?
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return m_crtc->register_r(); // status_r?
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case 2:
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return m_ctrl1;
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@ -219,11 +219,11 @@ void a2bus_videx160_device::write_c0nx(uint8_t offset, uint8_t data)
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switch (offset)
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{
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case 0:
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m_crtc->write_address(data);
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m_crtc->address_w(data);
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break;
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case 1:
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m_crtc->write_register(data);
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m_crtc->register_w(data);
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break;
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case 2:
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@ -241,7 +241,7 @@ uint8_t a2bus_videx80_device::read_c0nx(uint8_t offset)
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if (offset == 1)
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{
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return m_crtc->read_register(); // status_r?
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return m_crtc->register_r(); // status_r?
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}
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return 0xff;
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@ -256,11 +256,11 @@ void a2bus_videx80_device::write_c0nx(uint8_t offset, uint8_t data)
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{
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if (offset == 0)
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{
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m_crtc->write_address(data);
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m_crtc->address_w(data);
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}
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else if (offset == 1)
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{
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m_crtc->write_register(data);
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m_crtc->register_w(data);
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}
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m_rambank = ((offset>>2) & 3) * 512;
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@ -82,8 +82,8 @@ void acorn_vdu40_device::device_reset()
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address_space &space = m_bus->memspace();
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space.install_ram(0x0400, 0x07ff, m_videoram.get());
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space.install_readwrite_handler(0x0800, 0x0800, read8_delegate(FUNC(mc6845_device::status_r), m_crtc.target()), write8_delegate(FUNC(mc6845_device::address_w), m_crtc.target()));
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space.install_readwrite_handler(0x0801, 0x0801, read8_delegate(FUNC(mc6845_device::register_r), m_crtc.target()), write8_delegate(FUNC(mc6845_device::register_w), m_crtc.target()));
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space.install_readwrite_handler(0x0800, 0x0800, read8smo_delegate(FUNC(mc6845_device::status_r), m_crtc.target()), write8smo_delegate(FUNC(mc6845_device::address_w), m_crtc.target()));
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space.install_readwrite_handler(0x0801, 0x0801, read8smo_delegate(FUNC(mc6845_device::register_r), m_crtc.target()), write8smo_delegate(FUNC(mc6845_device::register_w), m_crtc.target()));
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}
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@ -152,15 +152,15 @@ void acorn_vdu80_device::device_reset()
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{
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space.install_ram(0xf000, 0x0f7ff, m_videoram.get());
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space.install_readwrite_handler(0xe840, 0xe840, 0, 0x3f, 0, read8_delegate(FUNC(mc6845_device::status_r), m_crtc.target()), write8_delegate(FUNC(mc6845_device::address_w), m_crtc.target()));
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space.install_readwrite_handler(0xe841, 0xe841, 0, 0x3e, 0, read8_delegate(FUNC(mc6845_device::register_r), m_crtc.target()), write8_delegate(FUNC(mc6845_device::register_w), m_crtc.target()));
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space.install_readwrite_handler(0xe840, 0xe840, 0, 0x3f, 0, read8smo_delegate(FUNC(mc6845_device::status_r), m_crtc.target()), write8smo_delegate(FUNC(mc6845_device::address_w), m_crtc.target()));
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space.install_readwrite_handler(0xe841, 0xe841, 0, 0x3e, 0, read8smo_delegate(FUNC(mc6845_device::register_r), m_crtc.target()), write8smo_delegate(FUNC(mc6845_device::register_w), m_crtc.target()));
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}
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else
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{
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space.install_ram(0x1000, 0x017ff, m_videoram.get());
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space.install_readwrite_handler(0x1840, 0x1840, 0, 0x3f, 0, read8_delegate(FUNC(mc6845_device::status_r), m_crtc.target()), write8_delegate(FUNC(mc6845_device::address_w), m_crtc.target()));
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space.install_readwrite_handler(0x1841, 0x1841, 0, 0x3e, 0, read8_delegate(FUNC(mc6845_device::register_r), m_crtc.target()), write8_delegate(FUNC(mc6845_device::register_w), m_crtc.target()));
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space.install_readwrite_handler(0x1840, 0x1840, 0, 0x3f, 0, read8smo_delegate(FUNC(mc6845_device::status_r), m_crtc.target()), write8smo_delegate(FUNC(mc6845_device::address_w), m_crtc.target()));
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space.install_readwrite_handler(0x1841, 0x1841, 0, 0x3e, 0, read8smo_delegate(FUNC(mc6845_device::register_r), m_crtc.target()), write8smo_delegate(FUNC(mc6845_device::register_w), m_crtc.target()));
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}
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}
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@ -192,7 +192,7 @@ uint8_t c64_xl80_device::c64_cd_r(offs_t offset, uint8_t data, int sphi2, int ba
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{
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if (offset & 0x01)
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{
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data = m_crtc->register_r(machine().dummy_space(), 0);
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data = m_crtc->register_r();
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}
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}
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else if (offset >= 0x8000 && offset < 0x9000)
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@ -222,11 +222,11 @@ void c64_xl80_device::c64_cd_w(offs_t offset, uint8_t data, int sphi2, int ba, i
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{
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if (offset & 0x01)
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{
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m_crtc->register_w(machine().dummy_space(), 0, data);
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m_crtc->register_w(data);
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}
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else
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{
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m_crtc->address_w(machine().dummy_space(), 0, data);
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m_crtc->address_w(data);
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}
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}
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}
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@ -229,7 +229,7 @@ uint8_t comx_clm_device::comx_mrd_r(offs_t offset, int *extrom)
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}
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else if (offset == 0xd801)
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{
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data = m_crtc->register_r(machine().dummy_space(), 0);
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data = m_crtc->register_r();
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}
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return data;
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@ -248,10 +248,10 @@ void comx_clm_device::comx_mwr_w(offs_t offset, uint8_t data)
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}
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else if (offset == 0xd800)
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{
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m_crtc->address_w(machine().dummy_space(), 0, data);
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m_crtc->address_w(data);
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}
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else if (offset == 0xd801)
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{
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m_crtc->register_w(machine().dummy_space(), 0, data);
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m_crtc->register_w(data);
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}
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}
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@ -690,7 +690,7 @@ READ8_MEMBER ( isa8_aga_device::pc_aga_mda_r )
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/* return last written mc6845 address value here? */
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break;
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case 1: case 3: case 5: case 7:
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data = m_mc6845->register_r(space, offset);
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data = m_mc6845->register_r();
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break;
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case 10:
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data = m_vsync | 0x08 | m_hsync;
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@ -707,10 +707,10 @@ WRITE8_MEMBER ( isa8_aga_device::pc_aga_mda_w )
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switch( offset )
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{
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case 0: case 2: case 4: case 6:
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m_mc6845->address_w( space, offset, data );
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m_mc6845->address_w(data);
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break;
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case 1: case 3: case 5: case 7:
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m_mc6845->register_w( space, offset, data );
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m_mc6845->register_w(data);
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break;
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case 8:
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m_mda_mode_control = data;
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@ -741,7 +741,7 @@ READ8_MEMBER ( isa8_aga_device::pc_aga_cga_r )
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/* return last written mc6845 address value here? */
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break;
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case 1: case 3: case 5: case 7:
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data = m_mc6845->register_r( space, offset);
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data = m_mc6845->register_r();
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break;
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case 10:
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data = m_vsync | ( ( data & 0x40 ) >> 4 ) | m_hsync;
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@ -792,10 +792,10 @@ WRITE8_MEMBER (isa8_aga_device:: pc_aga_cga_w )
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if ( m_mode == AGA_COLOR ) {
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switch(offset) {
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case 0: case 2: case 4: case 6:
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m_mc6845->address_w( space, offset, data );
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m_mc6845->address_w(data);
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break;
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case 1: case 3: case 5: case 7:
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m_mc6845->register_w( space, offset, data );
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m_mc6845->register_w(data);
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break;
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case 8:
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m_cga_mode_control = data;
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@ -913,7 +913,7 @@ READ8_MEMBER( isa8_cga_device::io_read )
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/* return last written mc6845 address value here? */
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break;
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case 1: case 3: case 5: case 7:
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data = m_crtc->register_r( space, offset );
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data = m_crtc->register_r();
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break;
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case 10:
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data = m_vsync | ( ( data & 0x40 ) >> 4 ) | m_hsync;
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@ -928,10 +928,10 @@ WRITE8_MEMBER( isa8_cga_device::io_write )
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{
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switch(offset) {
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case 0: case 2: case 4: case 6:
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m_crtc->address_w( space, offset, data );
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m_crtc->address_w(data);
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break;
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case 1: case 3: case 5: case 7:
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m_crtc->register_w( space, offset, data );
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m_crtc->register_w(data);
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break;
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case 8:
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mode_control_w(data);
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@ -1170,14 +1170,14 @@ WRITE8_MEMBER( isa8_cga_pc1512_device::io_write )
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{
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case 0: case 2: case 4: case 6:
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data &= 0x1F;
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m_crtc->address_w( space, offset, data );
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m_crtc->address_w(data);
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m_mc6845_address = data;
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break;
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case 1: case 3: case 5: case 7:
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if ( ! m_mc6845_locked_register[m_mc6845_address] )
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{
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m_crtc->register_w( space, offset, data );
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m_crtc->register_w(data);
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if ( isa8_cga_pc1512_device::mc6845_writeonce_register[m_mc6845_address] )
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{
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m_mc6845_locked_register[m_mc6845_address] = 1;
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@ -1747,7 +1747,7 @@ WRITE8_MEMBER( isa8_cga_m24_device::io_write )
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{
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case 0: case 2: case 4: case 6:
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m_index = data;
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m_crtc->address_w( space, offset, data );
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m_crtc->address_w(data);
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break;
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case 1: case 3: case 5: case 7:
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switch(m_index & 0x1f) // TODO: this is handled by a pal and prom
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@ -1766,7 +1766,7 @@ WRITE8_MEMBER( isa8_cga_m24_device::io_write )
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data <<= 1;
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break;
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}
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m_crtc->register_w( space, offset, data );
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m_crtc->register_w(data);
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break;
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case 0x0e:
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m_mode2 = data;
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@ -1169,7 +1169,7 @@ READ8_MEMBER( isa8_ega_device::pc_ega8_3X0_r )
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/* CRT Controller - data register */
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case 1: case 3: case 5: case 7:
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data = m_crtc_ega->register_r( space, offset );
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data = m_crtc_ega->register_r();
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break;
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/* Input Status Register 1 */
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@ -1204,12 +1204,12 @@ WRITE8_MEMBER( isa8_ega_device::pc_ega8_3X0_w )
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{
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/* CRT Controller - address register */
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case 0: case 2: case 4: case 6:
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m_crtc_ega->address_w( space, offset, data );
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m_crtc_ega->address_w(data);
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break;
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/* CRT Controller - data register */
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case 1: case 3: case 5: case 7:
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m_crtc_ega->register_w( space, offset, data );
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m_crtc_ega->register_w(data);
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break;
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/* Set Light Pen Flip Flop */
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@ -463,10 +463,10 @@ WRITE8_MEMBER( isa8_mda_device::io_write)
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switch( offset )
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{
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case 0: case 2: case 4: case 6:
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m_crtc->address_w( space, offset, data );
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m_crtc->address_w(data);
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break;
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case 1: case 3: case 5: case 7:
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m_crtc->register_w( space, offset, data );
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m_crtc->register_w(data);
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break;
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case 8:
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mode_control_w(space, offset, data);
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@ -486,7 +486,7 @@ READ8_MEMBER( isa8_mda_device::io_read)
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/* return last written mc6845 address value here? */
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break;
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case 1: case 3: case 5: case 7:
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data = m_crtc->register_r( space, offset );
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data = m_crtc->register_r();
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break;
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case 10:
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data = status_r(space, offset);
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@ -679,10 +679,10 @@ WRITE8_MEMBER( isa8_hercules_device::io_write )
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switch( offset )
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{
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case 0: case 2: case 4: case 6:
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m_crtc->address_w( space, offset, data );
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m_crtc->address_w(data);
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break;
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case 1: case 3: case 5: case 7:
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m_crtc->register_w( space, offset, data );
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m_crtc->register_w(data);
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break;
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case 8:
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mode_control_w(space, offset, data);
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@ -726,7 +726,7 @@ READ8_MEMBER( isa8_hercules_device::io_read )
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/* return last written mc6845 address value here? */
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break;
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case 1: case 3: case 5: case 7:
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data = m_crtc->register_r( space, offset );
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data = m_crtc->register_r();
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break;
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case 10:
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data = status_r(space, offset);
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@ -78,8 +78,8 @@ void nascom_avc_device::device_start()
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void nascom_avc_device::device_reset()
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{
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io_space().install_write_handler(0xb0, 0xb0, write8_delegate(FUNC(mc6845_device::address_w), m_crtc.target()));
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io_space().install_readwrite_handler(0xb1, 0xb1, read8_delegate(FUNC(mc6845_device::register_r), m_crtc.target()), write8_delegate(FUNC(mc6845_device::register_w), m_crtc.target()));
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io_space().install_write_handler(0xb0, 0xb0, write8smo_delegate(FUNC(mc6845_device::address_w), m_crtc.target()));
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io_space().install_readwrite_handler(0xb1, 0xb1, read8smo_delegate(FUNC(mc6845_device::register_r), m_crtc.target()), write8smo_delegate(FUNC(mc6845_device::register_w), m_crtc.target()));
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io_space().install_write_handler(0xb2, 0xb2, write8_delegate(FUNC(nascom_avc_device::control_w), this));
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}
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@ -137,7 +137,7 @@ WRITE8_MEMBER( sv806_device::mreq_w )
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READ8_MEMBER( sv806_device::iorq_r )
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{
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if (offset == 0x51)
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return m_crtc->register_r(space, 0);
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return m_crtc->register_r();
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return 0xff;
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}
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@ -146,8 +146,8 @@ WRITE8_MEMBER( sv806_device::iorq_w )
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{
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switch (offset)
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{
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case 0x50: m_crtc->address_w(space, 0, data); break;
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case 0x51: m_crtc->register_w(space, 0, data); break;
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case 0x50: m_crtc->address_w(data); break;
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case 0x51: m_crtc->register_w(data); break;
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case 0x58: m_ram_enabled = data; break;
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}
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}
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@ -221,7 +221,7 @@ uint8_t vic20_video_pak_device::vic20_cd_r(offs_t offset, uint8_t data, int ram1
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{
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if (offset == 0x1bf9)
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{
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data = m_crtc->register_r(machine().dummy_space(), 0);
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data = m_crtc->register_r();
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}
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}
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@ -293,11 +293,11 @@ void vic20_video_pak_device::vic20_cd_w(offs_t offset, uint8_t data, int ram1, i
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switch (offset)
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{
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case 0x1bf8:
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m_crtc->address_w(machine().dummy_space(), 0, data);
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m_crtc->address_w(data);
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break;
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case 0x1bf9:
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m_crtc->register_w(machine().dummy_space(), 0, data);
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m_crtc->register_w(data);
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break;
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case 0x1bfc:
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@ -246,7 +246,7 @@ uint16_t wangpc_lvc_device::wangpcbus_iorc_r(address_space &space, offs_t offset
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switch (offset & 0x7f)
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{
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case 0x02/2:
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data = 0xff00 | m_crtc->register_r(space, 0);
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data = 0xff00 | m_crtc->register_r();
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break;
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case 0x30/2:
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@ -279,14 +279,14 @@ void wangpc_lvc_device::wangpcbus_aiowc_w(address_space &space, offs_t offset, u
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case 0x00/2:
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if (ACCESSING_BITS_0_7)
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{
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m_crtc->address_w(space, 0, data & 0xff);
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m_crtc->address_w(data & 0xff);
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}
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break;
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case 0x02/2:
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if (ACCESSING_BITS_0_7)
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{
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m_crtc->register_w(space, 0, data & 0xff);
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m_crtc->register_w(data & 0xff);
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}
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break;
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@ -309,11 +309,11 @@ void wangpc_mvc_device::wangpcbus_aiowc_w(address_space &space, offs_t offset, u
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switch (offset & 0x7f)
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||||
{
|
||||
case 0x00/2:
|
||||
m_crtc->address_w(space, 0, data & 0xff);
|
||||
m_crtc->address_w(data & 0xff);
|
||||
break;
|
||||
|
||||
case 0x02/2:
|
||||
m_crtc->register_w(space, 0, data & 0xff);
|
||||
m_crtc->register_w(data & 0xff);
|
||||
break;
|
||||
|
||||
case 0x10/2:
|
||||
|
@ -171,7 +171,7 @@ uint8_t mos8722_device::read(offs_t offset, uint8_t data)
|
||||
// write - register write
|
||||
//-------------------------------------------------
|
||||
|
||||
WRITE8_MEMBER( mos8722_device::write )
|
||||
void mos8722_device::write(offs_t offset, uint8_t data)
|
||||
{
|
||||
if (MCR_C64) return;
|
||||
|
||||
|
@ -57,7 +57,7 @@ public:
|
||||
auto sense40() { return m_read_sense40.bind(); }
|
||||
|
||||
uint8_t read(offs_t offset, uint8_t data);
|
||||
DECLARE_WRITE8_MEMBER( write );
|
||||
void write(offs_t offset, uint8_t data);
|
||||
|
||||
DECLARE_READ_LINE_MEMBER( fsdir_r );
|
||||
|
||||
|
@ -51,13 +51,13 @@ void crtc_ega_device::device_post_load()
|
||||
}
|
||||
|
||||
|
||||
WRITE8_MEMBER( crtc_ega_device::address_w )
|
||||
void crtc_ega_device::address_w(uint8_t data)
|
||||
{
|
||||
m_register_address_latch = data & 0x1f;
|
||||
}
|
||||
|
||||
|
||||
READ8_MEMBER( crtc_ega_device::register_r )
|
||||
uint8_t crtc_ega_device::register_r()
|
||||
{
|
||||
uint8_t ret = 0;
|
||||
|
||||
@ -78,7 +78,7 @@ READ8_MEMBER( crtc_ega_device::register_r )
|
||||
}
|
||||
|
||||
|
||||
WRITE8_MEMBER( crtc_ega_device::register_w )
|
||||
void crtc_ega_device::register_w(uint8_t data)
|
||||
{
|
||||
LOG("%s CRTC_EGA: reg 0x%02x = 0x%02x\n", machine().describe_context(), m_register_address_latch, data);
|
||||
|
||||
|
@ -40,13 +40,13 @@ public:
|
||||
void config_set_hpixels_per_column(int hpixels_per_column) { m_hpixels_per_column = hpixels_per_column; }
|
||||
|
||||
/* select one of the registers for reading or writing */
|
||||
DECLARE_WRITE8_MEMBER( address_w );
|
||||
void address_w(uint8_t data);
|
||||
|
||||
/* read from the currently selected register */
|
||||
DECLARE_READ8_MEMBER( register_r );
|
||||
uint8_t register_r();
|
||||
|
||||
/* write to the currently selected register */
|
||||
DECLARE_WRITE8_MEMBER( register_w );
|
||||
void register_w(uint8_t data);
|
||||
|
||||
/* return the current value on the MA0-MA15 pins */
|
||||
uint16_t get_ma();
|
||||
|
@ -129,13 +129,13 @@ void mc6845_device::call_on_update_address(int strobe)
|
||||
}
|
||||
|
||||
|
||||
void mc6845_device::write_address(uint8_t data)
|
||||
void mc6845_device::address_w(uint8_t data)
|
||||
{
|
||||
m_register_address_latch = data & 0x1f;
|
||||
}
|
||||
|
||||
|
||||
uint8_t mc6845_device::read_status()
|
||||
uint8_t mc6845_device::status_r()
|
||||
{
|
||||
uint8_t ret = 0;
|
||||
|
||||
@ -178,7 +178,7 @@ void mc6845_device::transparent_update()
|
||||
}
|
||||
|
||||
|
||||
uint8_t mc6845_device::read_register()
|
||||
uint8_t mc6845_device::register_r()
|
||||
{
|
||||
uint8_t ret = 0;
|
||||
|
||||
@ -200,7 +200,7 @@ uint8_t mc6845_device::read_register()
|
||||
}
|
||||
|
||||
|
||||
void mc6845_device::write_register(uint8_t data)
|
||||
void mc6845_device::register_w(uint8_t data)
|
||||
{
|
||||
LOG("%s:M6845 reg 0x%02x = 0x%02x\n", machine().describe_context(), m_register_address_latch, data);
|
||||
|
||||
@ -253,13 +253,13 @@ void mc6845_device::write_register(uint8_t data)
|
||||
}
|
||||
|
||||
|
||||
WRITE8_MEMBER( mos8563_device::address_w )
|
||||
void mos8563_device::address_w(uint8_t data)
|
||||
{
|
||||
m_register_address_latch = data & 0x3f;
|
||||
}
|
||||
|
||||
|
||||
READ8_MEMBER( mos8563_device::status_r )
|
||||
uint8_t mos8563_device::status_r()
|
||||
{
|
||||
uint8_t ret = m_revision;
|
||||
|
||||
@ -279,7 +279,7 @@ READ8_MEMBER( mos8563_device::status_r )
|
||||
}
|
||||
|
||||
|
||||
READ8_MEMBER( mos8563_device::register_r )
|
||||
uint8_t mos8563_device::register_r()
|
||||
{
|
||||
uint8_t ret = 0xff;
|
||||
|
||||
@ -329,7 +329,7 @@ READ8_MEMBER( mos8563_device::register_r )
|
||||
}
|
||||
|
||||
|
||||
WRITE8_MEMBER( mos8563_device::register_w )
|
||||
void mos8563_device::register_w(uint8_t data)
|
||||
{
|
||||
LOG("%s:MOS8563 reg 0x%02x = 0x%02x\n", machine().describe_context(), m_register_address_latch, data);
|
||||
|
||||
@ -392,13 +392,13 @@ WRITE8_MEMBER( mos8563_device::register_w )
|
||||
recompute_parameters(false);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( hd6345_device::address_w )
|
||||
void hd6345_device::address_w(uint8_t data)
|
||||
{
|
||||
m_register_address_latch = data & 0x3f;
|
||||
}
|
||||
|
||||
|
||||
READ8_MEMBER( hd6345_device::register_r )
|
||||
uint8_t hd6345_device::register_r()
|
||||
{
|
||||
uint8_t ret = 0xff;
|
||||
|
||||
@ -416,7 +416,7 @@ READ8_MEMBER( hd6345_device::register_r )
|
||||
return ret;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( hd6345_device::register_w )
|
||||
void hd6345_device::register_w(uint8_t data)
|
||||
{
|
||||
LOG("%s:HD6345 reg 0x%02x = 0x%02x\n", machine().describe_context(), m_register_address_latch, data);
|
||||
|
||||
|
@ -61,20 +61,16 @@ public:
|
||||
auto out_vsync_callback() { return m_out_vsync_cb.bind(); }
|
||||
|
||||
/* select one of the registers for reading or writing */
|
||||
DECLARE_WRITE8_MEMBER( address_w ) { write_address(data); }
|
||||
void write_address(uint8_t data);
|
||||
void address_w(uint8_t data);
|
||||
|
||||
/* read from the status register */
|
||||
DECLARE_READ8_MEMBER( status_r ) { return read_status(); }
|
||||
uint8_t read_status();
|
||||
uint8_t status_r();
|
||||
|
||||
/* read from the currently selected register */
|
||||
DECLARE_READ8_MEMBER( register_r ) { return read_register(); }
|
||||
uint8_t read_register();
|
||||
uint8_t register_r();
|
||||
|
||||
/* write to the currently selected register */
|
||||
DECLARE_WRITE8_MEMBER( register_w ) { write_register(data); }
|
||||
void write_register(uint8_t data);
|
||||
void register_w(uint8_t data);
|
||||
|
||||
// read display enable line state
|
||||
DECLARE_READ_LINE_MEMBER( de_r );
|
||||
@ -347,9 +343,9 @@ class hd6345_device : public mc6845_device
|
||||
public:
|
||||
hd6345_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
DECLARE_WRITE8_MEMBER(address_w);
|
||||
DECLARE_READ8_MEMBER(register_r);
|
||||
DECLARE_WRITE8_MEMBER(register_w);
|
||||
void address_w(uint8_t data);
|
||||
uint8_t register_r();
|
||||
void register_w(uint8_t data);
|
||||
|
||||
protected:
|
||||
virtual void device_start() override;
|
||||
@ -383,10 +379,10 @@ class mos8563_device : public mc6845_device,
|
||||
public:
|
||||
mos8563_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
DECLARE_WRITE8_MEMBER( address_w );
|
||||
DECLARE_READ8_MEMBER( status_r );
|
||||
DECLARE_READ8_MEMBER( register_r );
|
||||
DECLARE_WRITE8_MEMBER( register_w );
|
||||
void address_w(uint8_t data);
|
||||
uint8_t status_r();
|
||||
uint8_t register_r();
|
||||
void register_w(uint8_t data);
|
||||
|
||||
inline uint8_t read_videoram(offs_t offset);
|
||||
inline void write_videoram(offs_t offset, uint8_t data);
|
||||
|
@ -218,16 +218,16 @@ void amusco_state::mem_map(address_map &map)
|
||||
READ8_MEMBER( amusco_state::mc6845_r)
|
||||
{
|
||||
if(offset & 1)
|
||||
return m_crtc->register_r(space, 0);
|
||||
return m_crtc->register_r();
|
||||
|
||||
return m_crtc->status_r(space,0); // not a plain 6845, requests update bit here ...
|
||||
return m_crtc->status_r(); // not a plain 6845, requests update bit here ...
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( amusco_state::mc6845_w)
|
||||
{
|
||||
if(offset & 1)
|
||||
{
|
||||
m_crtc->register_w(space, 0,data);
|
||||
m_crtc->register_w(data);
|
||||
if(m_mc6845_address == 0x12)
|
||||
m_video_update_address = ((data & 0xff) << 8) | (m_video_update_address & 0x00ff);
|
||||
if(m_mc6845_address == 0x13)
|
||||
@ -235,7 +235,7 @@ WRITE8_MEMBER( amusco_state::mc6845_w)
|
||||
}
|
||||
else
|
||||
{
|
||||
m_crtc->address_w(space,0,data);
|
||||
m_crtc->address_w(data);
|
||||
m_mc6845_address = data;
|
||||
}
|
||||
}
|
||||
|
@ -624,19 +624,19 @@ void avt_state::avt_palette(palette_device &palette) const
|
||||
WRITE8_MEMBER( avt_state::avt_6845_address_w )
|
||||
{
|
||||
m_crtc_index = data;
|
||||
m_crtc->address_w(space, offset, data);
|
||||
m_crtc->address_w(data);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( avt_state::avt_6845_data_w )
|
||||
{
|
||||
m_crtc_vreg[m_crtc_index] = data;
|
||||
m_crtc->register_w(space, offset, data);
|
||||
m_crtc->register_w(data);
|
||||
}
|
||||
|
||||
READ8_MEMBER( avt_state::avt_6845_data_r )
|
||||
{
|
||||
//m_crtc_vreg[m_crtc_index] = data;
|
||||
return m_crtc->register_r(space, offset);
|
||||
return m_crtc->register_r();
|
||||
}
|
||||
|
||||
/*********************************************
|
||||
|
@ -142,13 +142,13 @@ READ16_MEMBER( b16_state::vblank_r )
|
||||
WRITE8_MEMBER( b16_state::b16_6845_address_w )
|
||||
{
|
||||
m_crtc_index = data;
|
||||
m_mc6845->address_w(space,offset, data);
|
||||
m_mc6845->address_w(data);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( b16_state::b16_6845_data_w )
|
||||
{
|
||||
m_crtc_vreg[m_crtc_index] = data;
|
||||
m_mc6845->register_w(space, offset, data);
|
||||
m_mc6845->register_w(data);
|
||||
}
|
||||
|
||||
/*
|
||||
|
@ -925,17 +925,17 @@ WRITE16_MEMBER(blitz68k_state::cjffruit_leds3_w)
|
||||
READ8_MEMBER(blitz68k_state::crtc_r)
|
||||
{
|
||||
if (offset)
|
||||
return m_crtc->register_r(space, 0);
|
||||
return m_crtc->register_r();
|
||||
else
|
||||
return m_crtc->status_r(space, 0);
|
||||
return m_crtc->status_r();
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(blitz68k_state::crtc_w)
|
||||
{
|
||||
if (offset)
|
||||
m_crtc->register_w(space, 0, data);
|
||||
m_crtc->register_w(data);
|
||||
else
|
||||
m_crtc->address_w(space, 0, data);
|
||||
m_crtc->address_w(data);
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(blitz68k_state::crtc_lpen_w)
|
||||
|
@ -192,9 +192,9 @@ private:
|
||||
READ8_MEMBER( bml3_state::bml3_6845_r )
|
||||
{
|
||||
if (offset)
|
||||
return m_crtc->register_r(space, 0);
|
||||
return m_crtc->register_r();
|
||||
else
|
||||
return m_crtc->status_r(space, 0);
|
||||
return m_crtc->status_r();
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( bml3_state::bml3_6845_w )
|
||||
@ -202,12 +202,12 @@ WRITE8_MEMBER( bml3_state::bml3_6845_w )
|
||||
if(offset == 0)
|
||||
{
|
||||
m_crtc_index = data;
|
||||
m_crtc->address_w(space, 0, data);
|
||||
m_crtc->address_w(data);
|
||||
}
|
||||
else
|
||||
{
|
||||
m_crtc_vreg[m_crtc_index] = data;
|
||||
m_crtc->register_w(space, 0, data);
|
||||
m_crtc->register_w(data);
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -131,8 +131,8 @@ public:
|
||||
|
||||
inline void check_interrupts();
|
||||
int read_pla(offs_t offset, offs_t ca, offs_t vma, int ba, int rw, int aec, int z80io, int ms3, int ms2, int ms1, int ms0);
|
||||
uint8_t read_memory(address_space &space, offs_t offset, offs_t vma, int ba, int aec, int z80io);
|
||||
void write_memory(address_space &space, offs_t offset, offs_t vma, uint8_t data, int ba, int aec, int z80io);
|
||||
uint8_t read_memory(offs_t offset, offs_t vma, int ba, int aec, int z80io);
|
||||
void write_memory(offs_t offset, offs_t vma, uint8_t data, int ba, int aec, int z80io);
|
||||
inline void update_iec();
|
||||
|
||||
DECLARE_READ8_MEMBER( z80_r );
|
||||
@ -335,7 +335,7 @@ int c128_state::read_pla(offs_t offset, offs_t ca, offs_t vma, int ba, int rw, i
|
||||
// read_memory -
|
||||
//-------------------------------------------------
|
||||
|
||||
uint8_t c128_state::read_memory(address_space &space, offs_t offset, offs_t vma, int ba, int aec, int z80io)
|
||||
uint8_t c128_state::read_memory(offs_t offset, offs_t vma, int ba, int aec, int z80io)
|
||||
{
|
||||
int rw = 1, ms0 = 1, ms1 = 1, ms2 = 1, ms3 = 1, cas0 = 1, cas1 = 1;
|
||||
int io1 = 1, io2 = 1;
|
||||
@ -423,11 +423,11 @@ uint8_t c128_state::read_memory(address_space &space, offs_t offset, offs_t vma,
|
||||
case 2: // CS8563
|
||||
if (BIT(offset, 0))
|
||||
{
|
||||
data = m_vdc->register_r(space, 0);
|
||||
data = m_vdc->register_r();
|
||||
}
|
||||
else
|
||||
{
|
||||
data = m_vdc->status_r(space, 0);
|
||||
data = m_vdc->status_r();
|
||||
}
|
||||
break;
|
||||
|
||||
@ -462,7 +462,7 @@ uint8_t c128_state::read_memory(address_space &space, offs_t offset, offs_t vma,
|
||||
// write_memory -
|
||||
//-------------------------------------------------
|
||||
|
||||
void c128_state::write_memory(address_space &space, offs_t offset, offs_t vma, uint8_t data, int ba, int aec, int z80io)
|
||||
void c128_state::write_memory(offs_t offset, offs_t vma, uint8_t data, int ba, int aec, int z80io)
|
||||
{
|
||||
int rw = 0, ms0 = 1, ms1 = 1, ms2 = 1, ms3 = 1, cas0 = 1, cas1 = 1;
|
||||
int io1 = 1, io2 = 1;
|
||||
@ -507,11 +507,11 @@ void c128_state::write_memory(address_space &space, offs_t offset, offs_t vma, u
|
||||
case 2: // CS8563
|
||||
if (BIT(offset, 0))
|
||||
{
|
||||
m_vdc->register_w(space, 0, data);
|
||||
m_vdc->register_w(data);
|
||||
}
|
||||
else
|
||||
{
|
||||
m_vdc->address_w(space, 0, data);
|
||||
m_vdc->address_w(data);
|
||||
}
|
||||
break;
|
||||
|
||||
@ -538,7 +538,7 @@ void c128_state::write_memory(address_space &space, offs_t offset, offs_t vma, u
|
||||
|
||||
m_exp->cd_w(ca, data, sphi2, ba, roml, romh, io1, io2);
|
||||
|
||||
m_mmu->write(space, offset, data);
|
||||
m_mmu->write(offset, data);
|
||||
}
|
||||
|
||||
|
||||
@ -551,7 +551,7 @@ READ8_MEMBER( c128_state::z80_r )
|
||||
int ba = 1, aec = 1, z80io = 1;
|
||||
offs_t vma = 0;
|
||||
|
||||
return read_memory(space, offset, vma, ba, aec, z80io);
|
||||
return read_memory(offset, vma, ba, aec, z80io);
|
||||
}
|
||||
|
||||
|
||||
@ -564,7 +564,7 @@ WRITE8_MEMBER( c128_state::z80_w )
|
||||
int ba = 1, aec = 1, z80io = 1;
|
||||
offs_t vma = 0;
|
||||
|
||||
write_memory(space, offset, vma, data, ba, aec, z80io);
|
||||
write_memory(offset, vma, data, ba, aec, z80io);
|
||||
}
|
||||
|
||||
|
||||
@ -577,7 +577,7 @@ READ8_MEMBER( c128_state::z80_io_r )
|
||||
int ba = 1, aec = 1, z80io = 0;
|
||||
offs_t vma = 0;
|
||||
|
||||
return read_memory(space, offset, vma, ba, aec, z80io);
|
||||
return read_memory(offset, vma, ba, aec, z80io);
|
||||
}
|
||||
|
||||
|
||||
@ -590,7 +590,7 @@ WRITE8_MEMBER( c128_state::z80_io_w )
|
||||
int ba = 1, aec = 1, z80io = 0;
|
||||
offs_t vma = 0;
|
||||
|
||||
write_memory(space, offset, vma, data, ba, aec, z80io);
|
||||
write_memory(offset, vma, data, ba, aec, z80io);
|
||||
}
|
||||
|
||||
|
||||
@ -603,7 +603,7 @@ READ8_MEMBER( c128_state::read )
|
||||
int ba = 1, aec = 1, z80io = 1;
|
||||
offs_t vma = 0;
|
||||
|
||||
return read_memory(space, offset, vma, ba, aec, z80io);
|
||||
return read_memory(offset, vma, ba, aec, z80io);
|
||||
}
|
||||
|
||||
|
||||
@ -616,7 +616,7 @@ WRITE8_MEMBER( c128_state::write )
|
||||
int ba = 1, aec = 1, z80io = 1;
|
||||
offs_t vma = 0;
|
||||
|
||||
write_memory(space, offset, vma, data, ba, aec, z80io);
|
||||
write_memory(offset, vma, data, ba, aec, z80io);
|
||||
}
|
||||
|
||||
|
||||
@ -628,7 +628,7 @@ READ8_MEMBER( c128_state::vic_videoram_r )
|
||||
{
|
||||
int ba = 0, aec = 0, z80io = 1;
|
||||
|
||||
return read_memory(space, 0, offset, ba, aec, z80io);
|
||||
return read_memory(0, offset, ba, aec, z80io);
|
||||
}
|
||||
|
||||
|
||||
@ -1512,7 +1512,7 @@ READ8_MEMBER( c128_state::exp_dma_cd_r )
|
||||
int ba = 0, aec = 1, z80io = 1;
|
||||
offs_t vma = 0;
|
||||
|
||||
return read_memory(space, offset, vma, ba, aec, z80io);
|
||||
return read_memory(offset, vma, ba, aec, z80io);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( c128_state::exp_dma_cd_w )
|
||||
@ -1520,7 +1520,7 @@ WRITE8_MEMBER( c128_state::exp_dma_cd_w )
|
||||
int ba = 0, aec = 1, z80io = 1;
|
||||
offs_t vma = 0;
|
||||
|
||||
return write_memory(space, offset, data, vma, ba, aec, z80io);
|
||||
return write_memory(offset, data, vma, ba, aec, z80io);
|
||||
}
|
||||
|
||||
WRITE_LINE_MEMBER( c128_state::exp_dma_w )
|
||||
|
@ -521,11 +521,11 @@ READ8_MEMBER( cbm2_state::read )
|
||||
{
|
||||
if (A0)
|
||||
{
|
||||
data = m_crtc->register_r(space, 0);
|
||||
data = m_crtc->register_r();
|
||||
}
|
||||
else
|
||||
{
|
||||
data = m_crtc->status_r(space, 0);
|
||||
data = m_crtc->status_r();
|
||||
}
|
||||
}
|
||||
if (!sidcs)
|
||||
@ -614,11 +614,11 @@ WRITE8_MEMBER( cbm2_state::write )
|
||||
{
|
||||
if (A0)
|
||||
{
|
||||
m_crtc->register_w(space, 0, data);
|
||||
m_crtc->register_w(data);
|
||||
}
|
||||
else
|
||||
{
|
||||
m_crtc->address_w(space, 0, data);
|
||||
m_crtc->address_w(data);
|
||||
}
|
||||
}
|
||||
if (!sidcs)
|
||||
|
@ -170,13 +170,13 @@ WRITE8_MEMBER(fp6000_state::fp6000_pcg_w)
|
||||
WRITE8_MEMBER(fp6000_state::fp6000_6845_address_w)
|
||||
{
|
||||
m_crtc_index = data;
|
||||
m_crtc->address_w(space, offset, data);
|
||||
m_crtc->address_w(data);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(fp6000_state::fp6000_6845_data_w)
|
||||
{
|
||||
m_crtc_vreg[m_crtc_index] = data;
|
||||
m_crtc->register_w(space, offset, data);
|
||||
m_crtc->register_w(data);
|
||||
}
|
||||
|
||||
void fp6000_state::fp6000_map(address_map &map)
|
||||
|
@ -239,7 +239,7 @@ READ16_MEMBER( hp9k_state::hp9k_videoram_r )
|
||||
if (offset==0x0001)
|
||||
{
|
||||
//printf("m6845 read at [%x] mem_mask [%x]\n",offset,mem_mask);
|
||||
return m_6845->register_r(space,0);
|
||||
return m_6845->register_r();
|
||||
}
|
||||
else
|
||||
{
|
||||
@ -262,13 +262,13 @@ WRITE16_MEMBER( hp9k_state::hp9k_videoram_w )
|
||||
{
|
||||
//printf("6845 address write [%x] at [%x] mask [%x]\n",data,offset,mem_mask);
|
||||
data&=0x1f;
|
||||
m_6845->address_w( space, 0, data );
|
||||
m_6845->address_w(data);
|
||||
crtc_curreg=data;
|
||||
}
|
||||
else if (offset==0x0001)
|
||||
{
|
||||
//printf("6845 register write [%x] at [%x] mask [%x]\n",data,offset,mem_mask);
|
||||
m_6845->register_w( space, 0, data );
|
||||
m_6845->register_w(data);
|
||||
if (crtc_curreg==0x0c) crtc_addrStartHi=data;
|
||||
if (crtc_curreg==0x0d) crtc_addrStartLow=data;
|
||||
}
|
||||
|
@ -107,13 +107,13 @@ void multi16_state::multi16_map(address_map &map)
|
||||
WRITE8_MEMBER( multi16_state::multi16_6845_address_w )
|
||||
{
|
||||
m_crtc_index = data;
|
||||
m_crtc->address_w(space, offset, data);
|
||||
m_crtc->address_w(data);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( multi16_state::multi16_6845_data_w )
|
||||
{
|
||||
m_crtc_vreg[m_crtc_index] = data;
|
||||
m_crtc->register_w(space, offset, data);
|
||||
m_crtc->register_w(data);
|
||||
}
|
||||
|
||||
void multi16_state::multi16_io(address_map &map)
|
||||
|
@ -340,11 +340,11 @@ WRITE16_MEMBER(ngen_state::peripheral_w)
|
||||
break;
|
||||
case 0x144:
|
||||
if(ACCESSING_BITS_0_7)
|
||||
m_crtc->address_w(space,0,data & 0xff);
|
||||
m_crtc->address_w(data & 0xff);
|
||||
break;
|
||||
case 0x145:
|
||||
if(ACCESSING_BITS_0_7)
|
||||
m_crtc->register_w(space,0,data & 0xff);
|
||||
m_crtc->register_w(data & 0xff);
|
||||
break;
|
||||
case 0x146:
|
||||
case 0x147:
|
||||
@ -411,11 +411,11 @@ READ16_MEMBER(ngen_state::peripheral_r)
|
||||
break;
|
||||
case 0x144:
|
||||
if(ACCESSING_BITS_0_7)
|
||||
ret = m_crtc->status_r(space,0);
|
||||
ret = m_crtc->status_r();
|
||||
break;
|
||||
case 0x145:
|
||||
if(ACCESSING_BITS_0_7)
|
||||
ret = m_crtc->register_r(space,0);
|
||||
ret = m_crtc->register_r();
|
||||
break;
|
||||
case 0x146:
|
||||
case 0x147: // keyboard UART
|
||||
@ -814,7 +814,7 @@ READ16_MEMBER( ngen_state::b38_crtc_r )
|
||||
{
|
||||
case 0:
|
||||
if(ACCESSING_BITS_0_7)
|
||||
ret = m_crtc->register_r(space,0);
|
||||
ret = m_crtc->register_r();
|
||||
break;
|
||||
case 1:
|
||||
if(ACCESSING_BITS_0_7)
|
||||
@ -830,11 +830,11 @@ WRITE16_MEMBER( ngen_state::b38_crtc_w )
|
||||
{
|
||||
case 0:
|
||||
if(ACCESSING_BITS_0_7)
|
||||
m_crtc->address_w(space,0,data & 0xff);
|
||||
m_crtc->address_w(data & 0xff);
|
||||
break;
|
||||
case 1:
|
||||
if(ACCESSING_BITS_0_7)
|
||||
m_crtc->register_w(space,0,data & 0xff);
|
||||
m_crtc->register_w(data & 0xff);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
@ -188,23 +188,23 @@ WRITE8_MEMBER( paso1600_state::paso1600_pcg_w )
|
||||
WRITE8_MEMBER( paso1600_state::paso1600_6845_address_w )
|
||||
{
|
||||
m_crtc_index = data;
|
||||
m_crtc->address_w(space, offset, data);
|
||||
m_crtc->address_w(data);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( paso1600_state::paso1600_6845_data_w )
|
||||
{
|
||||
m_crtc_vreg[m_crtc_index] = data;
|
||||
m_crtc->register_w(space, offset, data);
|
||||
m_crtc->register_w(data);
|
||||
}
|
||||
|
||||
READ8_MEMBER( paso1600_state::paso1600_6845_data_r )
|
||||
{
|
||||
return m_crtc->register_r(space, offset);
|
||||
return m_crtc->register_r();
|
||||
}
|
||||
|
||||
READ8_MEMBER( paso1600_state::paso1600_6845_status_r )
|
||||
{
|
||||
return m_crtc->status_r(space, offset);
|
||||
return m_crtc->status_r();
|
||||
}
|
||||
|
||||
READ8_MEMBER( paso1600_state::key_r )
|
||||
|
@ -535,7 +535,7 @@ WRITE8_MEMBER( pasopia7_state::pasopia7_6845_w )
|
||||
if(offset == 0)
|
||||
{
|
||||
m_addr_latch = data;
|
||||
m_crtc->address_w(space, offset, data);
|
||||
m_crtc->address_w(data);
|
||||
}
|
||||
else
|
||||
{
|
||||
@ -547,7 +547,7 @@ WRITE8_MEMBER( pasopia7_state::pasopia7_6845_w )
|
||||
else if(m_addr_latch == 0x0f)
|
||||
m_cursor_addr = (m_cursor_addr & 0x3f00) | (data & 0xff);
|
||||
|
||||
m_crtc->register_w(space, offset, data);
|
||||
m_crtc->register_w(data);
|
||||
|
||||
/* double pump the pixel clock if we are in 640 x 200 mode */
|
||||
if(m_screen_type == 1) // raster
|
||||
|
@ -459,7 +459,7 @@ WRITE8_MEMBER(peplus_state::crtc_display_w)
|
||||
m_bg_tilemap->mark_tile_dirty(m_vid_address);
|
||||
|
||||
/* An access here triggers a device read !*/
|
||||
m_crtc->register_r(space, 0);
|
||||
m_crtc->register_r();
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(peplus_state::duart_w)
|
||||
|
@ -607,7 +607,7 @@ READ8_MEMBER( pet_state::read )
|
||||
}
|
||||
if (m_crtc && BIT(offset, 7) && BIT(offset, 0))
|
||||
{
|
||||
data &= m_crtc->register_r(space, 0);
|
||||
data &= m_crtc->register_r();
|
||||
}
|
||||
}
|
||||
else if (norom)
|
||||
@ -666,11 +666,11 @@ WRITE8_MEMBER( pet_state::write )
|
||||
{
|
||||
if (BIT(offset, 0))
|
||||
{
|
||||
m_crtc->register_w(space, 0, data);
|
||||
m_crtc->register_w(data);
|
||||
}
|
||||
else
|
||||
{
|
||||
m_crtc->address_w(space, 0, data);
|
||||
m_crtc->address_w(data);
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -825,7 +825,7 @@ READ8_MEMBER( cbm8296_state::read )
|
||||
}
|
||||
if (BIT(offset, 7) && BIT(offset, 0))
|
||||
{
|
||||
data &= m_crtc->register_r(space, 0);
|
||||
data &= m_crtc->register_r();
|
||||
}
|
||||
}
|
||||
|
||||
@ -882,11 +882,11 @@ WRITE8_MEMBER( cbm8296_state::write )
|
||||
{
|
||||
if (BIT(offset, 0))
|
||||
{
|
||||
m_crtc->register_w(space, 0, data);
|
||||
m_crtc->register_w(data);
|
||||
}
|
||||
else
|
||||
{
|
||||
m_crtc->address_w(space, 0, data);
|
||||
m_crtc->address_w(data);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
@ -310,12 +310,12 @@ WRITE8_MEMBER(smc777_state::mc6845_w)
|
||||
if(offset == 0)
|
||||
{
|
||||
m_crtc_addr = data;
|
||||
m_crtc->address_w(space, 0,data);
|
||||
m_crtc->address_w(data);
|
||||
}
|
||||
else
|
||||
{
|
||||
m_crtc_vreg[m_crtc_addr] = data;
|
||||
m_crtc->register_w(space, 0,data);
|
||||
m_crtc->register_w(data);
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -410,12 +410,12 @@ WRITE8_MEMBER( spc1500_state::crtc_w)
|
||||
if((offset & 1) == 0)
|
||||
{
|
||||
m_crtc_index = data & 0x1f;
|
||||
m_vdg->address_w(space, 0, data);
|
||||
m_vdg->address_w(data);
|
||||
}
|
||||
else
|
||||
{
|
||||
m_crtc_vreg[m_crtc_index] = data;
|
||||
m_vdg->register_w(space, 0, data);
|
||||
m_vdg->register_w(data);
|
||||
}
|
||||
}
|
||||
|
||||
@ -423,7 +423,7 @@ READ8_MEMBER( spc1500_state::crtc_r)
|
||||
{
|
||||
if (offset & 1)
|
||||
{
|
||||
return m_vdg->register_r(space, 0);
|
||||
return m_vdg->register_r();
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
@ -203,7 +203,7 @@ WRITE8_MEMBER( v6809_state::videoram_w )
|
||||
|
||||
WRITE8_MEMBER( v6809_state::v6809_address_w )
|
||||
{
|
||||
m_crtc->address_w( space, 0, data );
|
||||
m_crtc->address_w(data);
|
||||
|
||||
m_video_index = data & 0x1f;
|
||||
|
||||
@ -215,7 +215,7 @@ WRITE8_MEMBER( v6809_state::v6809_register_w )
|
||||
{
|
||||
uint16_t temp = m_video_address;
|
||||
|
||||
m_crtc->register_w( space, 0, data );
|
||||
m_crtc->register_w(data);
|
||||
|
||||
// Get transparent address
|
||||
if (m_video_index == 18)
|
||||
|
@ -348,9 +348,9 @@ WRITE16_MEMBER(vcombat_state::crtc_w)
|
||||
return;
|
||||
|
||||
if (m_crtc_select == 0)
|
||||
m_crtc->address_w(space, 0, data >> 8);
|
||||
m_crtc->address_w(data >> 8);
|
||||
else
|
||||
m_crtc->register_w(space, 0, data >> 8);
|
||||
m_crtc->register_w(data >> 8);
|
||||
|
||||
m_crtc_select ^= 1;
|
||||
}
|
||||
|
@ -1069,12 +1069,12 @@ WRITE8_MEMBER( x1_state::x1_6845_w )
|
||||
if(offset == 0)
|
||||
{
|
||||
m_crtc_index = data & 31;
|
||||
m_crtc->address_w(space, offset, data);
|
||||
m_crtc->address_w(data);
|
||||
}
|
||||
else
|
||||
{
|
||||
m_crtc_vreg[m_crtc_index] = data;
|
||||
m_crtc->register_w(space, offset, data);
|
||||
m_crtc->register_w(data);
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -360,13 +360,13 @@ WRITE8_MEMBER( z100_state::z100_6845_address_w )
|
||||
{
|
||||
data &= 0x1f;
|
||||
m_crtc_index = data;
|
||||
m_crtc->address_w( space, offset, data );
|
||||
m_crtc->address_w(data);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( z100_state::z100_6845_data_w )
|
||||
{
|
||||
m_crtc_vreg[m_crtc_index] = data;
|
||||
m_crtc->register_w(space, offset, data);
|
||||
m_crtc->register_w(data);
|
||||
}
|
||||
|
||||
// todo: side select?
|
||||
|
@ -1867,9 +1867,9 @@ READ8_MEMBER(amstrad_state::amstrad_cpc_io_r)
|
||||
{
|
||||
case 0x02:
|
||||
// CRTC Type 1 (UM6845R) only!!
|
||||
//data = m_crtc->status_r( space, 0 );
|
||||
//data = m_crtc->status_r();
|
||||
if ( m_system_type == SYSTEM_PLUS || m_system_type == SYSTEM_GX4000 ) // All Plus systems are Type 3 (AMS40489)
|
||||
data = m_crtc->register_r( space, 0 );
|
||||
data = m_crtc->register_r();
|
||||
else
|
||||
data = 0xff; // Type 0 (HD6845S/UM6845) and Type 2 (MC6845) return 0xff
|
||||
#if 0
|
||||
@ -1890,7 +1890,7 @@ READ8_MEMBER(amstrad_state::amstrad_cpc_io_r)
|
||||
break;
|
||||
case 0x03:
|
||||
/* All CRTC type : Read from selected internal 6845 register Read only */
|
||||
data = m_crtc->register_r( space, 0 );
|
||||
data = m_crtc->register_r();
|
||||
break;
|
||||
}
|
||||
}
|
||||
@ -2043,7 +2043,7 @@ WRITE8_MEMBER(amstrad_state::amstrad_cpc_io_w)
|
||||
switch ((offset & 0x0300) >> 8) // r1r0
|
||||
{
|
||||
case 0x00: /* Select internal 6845 register Write Only */
|
||||
m_crtc->address_w( space, 0, data );
|
||||
m_crtc->address_w(data);
|
||||
if ( m_system_type == SYSTEM_PLUS || m_system_type == SYSTEM_GX4000 )
|
||||
amstrad_plus_seqcheck(data);
|
||||
|
||||
@ -2058,7 +2058,7 @@ WRITE8_MEMBER(amstrad_state::amstrad_cpc_io_w)
|
||||
timer_set(attotime::from_usec(0), TIMER_VIDEO_UPDATE, 1);
|
||||
else
|
||||
timer_set(attotime::from_usec(0), TIMER_VIDEO_UPDATE, 0);
|
||||
m_crtc->register_w( space, 0, data );
|
||||
m_crtc->register_w(data);
|
||||
|
||||
/* printer port bit 8 */
|
||||
if (m_printer_bit8_selected && m_system_type == SYSTEM_PLUS)
|
||||
@ -2196,7 +2196,6 @@ The exception is the case where none of b7-b0 are reset (i.e. port &FBFF), which
|
||||
/* load CPCEMU style snapshots */
|
||||
void amstrad_state::amstrad_handle_snapshot(unsigned char *pSnapshot)
|
||||
{
|
||||
address_space &space = m_maincpu->space(AS_PROGRAM);
|
||||
int RegData;
|
||||
int i;
|
||||
|
||||
@ -2284,11 +2283,11 @@ void amstrad_state::amstrad_handle_snapshot(unsigned char *pSnapshot)
|
||||
/* init CRTC */
|
||||
for (i=0; i<18; i++)
|
||||
{
|
||||
m_crtc->address_w( space, 0, i );
|
||||
m_crtc->register_w( space, 0, pSnapshot[0x043+i] & 0xff );
|
||||
m_crtc->address_w(i);
|
||||
m_crtc->register_w(pSnapshot[0x043+i] & 0xff);
|
||||
}
|
||||
|
||||
m_crtc->address_w( space, 0, i );
|
||||
m_crtc->address_w(i);
|
||||
|
||||
/* upper rom selection */
|
||||
m_gate_array.upper_bank = pSnapshot[0x055];
|
||||
|
@ -235,9 +235,9 @@ void d64plus_state::device_start()
|
||||
{
|
||||
dragon_state::device_start();
|
||||
|
||||
address_space& space = m_maincpu->space(AS_PROGRAM);
|
||||
space.install_readwrite_handler(0xffe0, 0xffe0, READ8_DEVICE_DELEGATE(m_crtc, mc6845_device, status_r), WRITE8_DEVICE_DELEGATE(m_crtc, mc6845_device, address_w));
|
||||
space.install_readwrite_handler(0xffe1, 0xffe1, READ8_DEVICE_DELEGATE(m_crtc, mc6845_device, register_r), WRITE8_DEVICE_DELEGATE(m_crtc, mc6845_device, register_w));
|
||||
address_space &space = m_maincpu->space(AS_PROGRAM);
|
||||
space.install_readwrite_handler(0xffe0, 0xffe0, read8smo_delegate(FUNC(mc6845_device::status_r), &*m_crtc), write8smo_delegate(FUNC(mc6845_device::address_w), &*m_crtc));
|
||||
space.install_readwrite_handler(0xffe1, 0xffe1, read8smo_delegate(FUNC(mc6845_device::register_r), &*m_crtc), write8smo_delegate(FUNC(mc6845_device::register_w), &*m_crtc));
|
||||
space.install_readwrite_handler(0xffe2, 0xffe2, READ8_DELEGATE(d64plus_state, d64plus_6845_disp_r), WRITE8_DELEGATE(d64plus_state, d64plus_bank_w));
|
||||
|
||||
// allocate memory
|
||||
|
@ -76,7 +76,7 @@ MC6845_ON_UPDATE_ADDR_CHANGED( aussiebyte_state::crtc_update_addr )
|
||||
|
||||
WRITE8_MEMBER( aussiebyte_state::address_w )
|
||||
{
|
||||
m_crtc->address_w( space, 0, data );
|
||||
m_crtc->address_w(data);
|
||||
|
||||
m_video_index = data & 0x1f;
|
||||
|
||||
@ -100,7 +100,7 @@ WRITE8_MEMBER( aussiebyte_state::address_w )
|
||||
|
||||
WRITE8_MEMBER( aussiebyte_state::register_w )
|
||||
{
|
||||
m_crtc->register_w( space, 0, data );
|
||||
m_crtc->register_w(data);
|
||||
uint16_t temp = m_alpha_address;
|
||||
|
||||
// Get transparent address
|
||||
|
@ -21,18 +21,18 @@ WRITE8_MEMBER( decodmd_type2_device::bank_w )
|
||||
|
||||
WRITE8_MEMBER( decodmd_type2_device::crtc_address_w )
|
||||
{
|
||||
m_mc6845->address_w(space,offset,data);
|
||||
m_mc6845->address_w(data);
|
||||
m_crtc_index = data;
|
||||
}
|
||||
|
||||
READ8_MEMBER( decodmd_type2_device::crtc_status_r )
|
||||
{
|
||||
return m_mc6845->register_r(space,offset);
|
||||
return m_mc6845->register_r();
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( decodmd_type2_device::crtc_register_w )
|
||||
{
|
||||
m_mc6845->register_w(space,offset,data);
|
||||
m_mc6845->register_w(data);
|
||||
m_crtc_reg[m_crtc_index] = data;
|
||||
}
|
||||
|
||||
|
@ -74,7 +74,7 @@ WRITE16_MEMBER( decodmd_type3_device::crtc_address_w )
|
||||
{
|
||||
if(ACCESSING_BITS_8_15)
|
||||
{
|
||||
m_mc6845->address_w(space,offset,data >> 8);
|
||||
m_mc6845->address_w(data >> 8);
|
||||
m_crtc_index = data >> 8;
|
||||
}
|
||||
}
|
||||
@ -82,7 +82,7 @@ WRITE16_MEMBER( decodmd_type3_device::crtc_address_w )
|
||||
READ16_MEMBER( decodmd_type3_device::crtc_status_r )
|
||||
{
|
||||
if(ACCESSING_BITS_8_15)
|
||||
return m_mc6845->register_r(space,offset);
|
||||
return m_mc6845->register_r();
|
||||
else
|
||||
return 0xff;
|
||||
}
|
||||
@ -93,7 +93,7 @@ WRITE16_MEMBER( decodmd_type3_device::crtc_register_w )
|
||||
{
|
||||
if(m_crtc_index == 9) // hack!!
|
||||
data -= 0x100;
|
||||
m_mc6845->register_w(space,offset,data >> 8);
|
||||
m_mc6845->register_w(data >> 8);
|
||||
m_crtc_reg[m_crtc_index] = data >> 8;
|
||||
}
|
||||
}
|
||||
|
@ -257,13 +257,13 @@ READ8_MEMBER( kaypro_state::kaypro484_status_r )
|
||||
{
|
||||
/* Need bit 7 high or computer hangs */
|
||||
|
||||
return 0x80 | m_crtc->register_r(space, 0);
|
||||
return 0x80 | m_crtc->register_r();
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( kaypro_state::kaypro484_index_w )
|
||||
{
|
||||
m_mc6845_ind = data & 0x1f;
|
||||
m_crtc->address_w( space, 0, data );
|
||||
m_crtc->address_w(data);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( kaypro_state::kaypro484_register_w )
|
||||
@ -275,7 +275,7 @@ WRITE8_MEMBER( kaypro_state::kaypro484_register_w )
|
||||
else
|
||||
m_mc6845_reg[m_mc6845_ind] = data;
|
||||
|
||||
m_crtc->register_w( space, 0, data );
|
||||
m_crtc->register_w(data);
|
||||
|
||||
if ((m_mc6845_ind == 1) || (m_mc6845_ind == 6) || (m_mc6845_ind == 9))
|
||||
mc6845_screen_configure(); /* adjust screen size */
|
||||
|
@ -256,7 +256,7 @@ WRITE8_MEMBER ( mbee_state::m6545_index_w )
|
||||
{
|
||||
data &= 0x1f;
|
||||
m_sy6545_ind = data;
|
||||
m_crtc->address_w( space, 0, data );
|
||||
m_crtc->address_w(data);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER ( mbee_state::m6545_data_w )
|
||||
@ -272,7 +272,7 @@ WRITE8_MEMBER ( mbee_state::m6545_data_w )
|
||||
break;
|
||||
}
|
||||
m_sy6545_reg[m_sy6545_ind] = data & sy6545_mask[m_sy6545_ind]; /* save data in register */
|
||||
m_crtc->register_w( space, 0, data );
|
||||
m_crtc->register_w(data);
|
||||
if ((m_sy6545_ind > 8) && (m_sy6545_ind < 12)) sy6545_cursor_configure(); /* adjust cursor shape - remove when mame fixed */
|
||||
}
|
||||
|
||||
|
@ -137,7 +137,7 @@ READ8_MEMBER( pc1512_state::vdu_r )
|
||||
switch (offset)
|
||||
{
|
||||
case 1: case 3: case 5: case 7:
|
||||
data = m_vdu->register_r(space, 0);
|
||||
data = m_vdu->register_r();
|
||||
break;
|
||||
|
||||
case 0xa: // VDU Status
|
||||
@ -190,11 +190,11 @@ WRITE8_MEMBER( pc1512_state::vdu_w )
|
||||
switch (offset)
|
||||
{
|
||||
case 0: case 2: case 4: case 6:
|
||||
m_vdu->address_w(space, 0, data);
|
||||
m_vdu->address_w(data);
|
||||
break;
|
||||
|
||||
case 1: case 3: case 5: case 7:
|
||||
m_vdu->register_w(space, 0, data);
|
||||
m_vdu->register_w(data);
|
||||
break;
|
||||
|
||||
case 8: // VDU Mode Control
|
||||
|
@ -875,10 +875,10 @@ WRITE8_MEMBER( pcvideo_t1000_device::write )
|
||||
switch( offset )
|
||||
{
|
||||
case 0: case 2: case 4: case 6:
|
||||
m_mc6845->address_w( space, offset, data );
|
||||
m_mc6845->address_w(data);
|
||||
break;
|
||||
case 1: case 3: case 5: case 7:
|
||||
m_mc6845->register_w( space, offset, data );
|
||||
m_mc6845->register_w(data);
|
||||
break;
|
||||
case 8:
|
||||
mode_control_w(data);
|
||||
@ -913,10 +913,10 @@ WRITE8_MEMBER( pcvideo_pcjr_device::write )
|
||||
switch( offset )
|
||||
{
|
||||
case 0: case 4:
|
||||
m_mc6845->address_w( space, offset, data );
|
||||
m_mc6845->address_w(data);
|
||||
break;
|
||||
case 1: case 5:
|
||||
m_mc6845->register_w( space, offset, data );
|
||||
m_mc6845->register_w(data);
|
||||
break;
|
||||
case 10:
|
||||
if ( m_address_data_ff & 0x01 )
|
||||
@ -958,7 +958,7 @@ READ8_MEMBER( pc_t1t_device::read )
|
||||
break;
|
||||
|
||||
case 1: case 3: case 5: case 7:
|
||||
data = m_mc6845->register_r( space, offset );
|
||||
data = m_mc6845->register_r();
|
||||
break;
|
||||
|
||||
case 8:
|
||||
|
@ -61,12 +61,12 @@ WRITE8_MEMBER(speedatk_state::m6845_w)
|
||||
if(offset == 0)
|
||||
{
|
||||
m_crtc_index = data;
|
||||
m_crtc->address_w(space,0,data);
|
||||
m_crtc->address_w(data);
|
||||
}
|
||||
else
|
||||
{
|
||||
m_crtc_vreg[m_crtc_index] = data;
|
||||
m_crtc->register_w(space,0,data);
|
||||
m_crtc->register_w(data);
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -449,12 +449,12 @@ WRITE8_MEMBER( super80_state::super80v_10_w )
|
||||
{
|
||||
data &= 0x1f;
|
||||
m_mc6845_ind = data;
|
||||
m_crtc->address_w( space, 0, data );
|
||||
m_crtc->address_w(data);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( super80_state::super80v_11_w )
|
||||
{
|
||||
m_mc6845_reg[m_mc6845_ind] = data & mc6845_mask[m_mc6845_ind]; /* save data in register */
|
||||
m_crtc->register_w( space, 0, data );
|
||||
m_crtc->register_w(data);
|
||||
if ((m_mc6845_ind > 8) && (m_mc6845_ind < 12)) mc6845_cursor_configure(); /* adjust cursor shape - remove when mame fixed */
|
||||
}
|
||||
|
Loading…
Reference in New Issue
Block a user