124 lines
5.0 KiB
Plaintext
124 lines
5.0 KiB
Plaintext
# -------------------------------------------------------------------------- #
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#
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# Copyright (C) 1991-2013 Altera Corporation
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# Your use of Altera Corporation's design tools, logic functions
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# and other software and tools, and its AMPP partner logic
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# functions, and any output files from any of the foregoing
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# (including device programming or simulation files), and any
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# associated documentation or information are expressly subject
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# to the terms and conditions of the Altera Program License
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# Subscription Agreement, Altera MegaCore Function License
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# Agreement, or other applicable license agreement, including,
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# without limitation, that your use is for the sole purpose of
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# programming logic devices manufactured by Altera and sold by
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# Altera or its authorized distributors. Please refer to the
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# applicable agreement for further details.
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#
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# -------------------------------------------------------------------------- #
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#
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# Quartus II 64-Bit
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# Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition
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# Date created = 22:40:48 September 08, 2020
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#
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# -------------------------------------------------------------------------- #
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#
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# Notes:
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#
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# 1) The default values for assignments are stored in the file:
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# divmmc_assignment_defaults.qdf
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# If this file doesn't exist, see file:
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# assignment_defaults.qdf
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#
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# 2) Altera recommends that you do not modify this file. This
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# file is updated automatically by the Quartus II software
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# and any changes you make may be lost or overwritten.
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#
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# -------------------------------------------------------------------------- #
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set_global_assignment -name FAMILY MAX7000S
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set_global_assignment -name DEVICE "EPM7128STC100-7"
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set_global_assignment -name TOP_LEVEL_ENTITY divmmc
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set_global_assignment -name ORIGINAL_QUARTUS_VERSION "13.0 SP1"
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set_global_assignment -name PROJECT_CREATION_TIME_DATE "22:40:48 SEPTEMBER 08, 2020"
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set_global_assignment -name LAST_QUARTUS_VERSION "13.0 SP1"
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set_global_assignment -name VHDL_FILE divmmc.vhd
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set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
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set_global_assignment -name DEVICE_FILTER_PACKAGE "ANY QFP"
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set_global_assignment -name DEVICE_FILTER_PIN_COUNT 100
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set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR "-1"
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set_global_assignment -name POWER_EXT_SUPPLY_VOLTAGE_TO_REGULATOR 3.3V
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set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "3.3-V LVTTL"
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set_global_assignment -name MAX7000_DEVICE_IO_STANDARD "3.3-V LVTTL"
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set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 7
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set_global_assignment -name USE_CONFIGURATION_DEVICE ON
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set_global_assignment -name OPTIMIZE_HOLD_TIMING OFF
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set_global_assignment -name OPTIMIZE_MULTI_CORNER_TIMING OFF
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set_global_assignment -name FITTER_EFFORT "STANDARD FIT"
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set_location_assignment PIN_9 -to A[0]
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set_location_assignment PIN_12 -to A[1]
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set_location_assignment PIN_13 -to A[10]
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set_location_assignment PIN_19 -to A[11]
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set_location_assignment PIN_80 -to A[12]
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set_location_assignment PIN_79 -to A[13]
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set_location_assignment PIN_77 -to A[14]
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set_location_assignment PIN_76 -to A[15]
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set_location_assignment PIN_14 -to A[2]
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set_location_assignment PIN_17 -to A[3]
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set_location_assignment PIN_20 -to A[4]
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set_location_assignment PIN_22 -to A[5]
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set_location_assignment PIN_24 -to A[6]
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set_location_assignment PIN_25 -to A[7]
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set_location_assignment PIN_23 -to A[8]
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set_location_assignment PIN_21 -to A[9]
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set_location_assignment PIN_32 -to bankout[0]
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set_location_assignment PIN_31 -to bankout[1]
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set_location_assignment PIN_36 -to bankout[2]
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set_location_assignment PIN_30 -to bankout[3]
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set_location_assignment PIN_35 -to bankout[4]
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set_location_assignment PIN_29 -to bankout[5]
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set_location_assignment PIN_47 -to card[0]
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set_location_assignment PIN_46 -to card[1]
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set_location_assignment PIN_87 -to clock
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set_location_assignment PIN_7 -to d[0]
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set_location_assignment PIN_5 -to d[1]
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set_location_assignment PIN_1 -to d[2]
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set_location_assignment PIN_99 -to d[3]
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set_location_assignment PIN_100 -to d[4]
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set_location_assignment PIN_2 -to d[5]
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set_location_assignment PIN_6 -to d[6]
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set_location_assignment PIN_8 -to d[7]
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set_location_assignment PIN_72 -to eprom
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set_location_assignment PIN_81 -to iorq
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set_location_assignment PIN_92 -to m1
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set_location_assignment PIN_70 -to mapcondout
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set_location_assignment PIN_10 -to mreq
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set_location_assignment PIN_71 -to poweron
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set_location_assignment PIN_98 -to ramoe
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set_location_assignment PIN_28 -to ramwr
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set_location_assignment PIN_83 -to rd
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set_location_assignment PIN_85 -to reset
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set_location_assignment PIN_75 -to romcs
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set_location_assignment PIN_16 -to romoe
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set_location_assignment PIN_27 -to romwr
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set_location_assignment PIN_48 -to spi_clock
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set_location_assignment PIN_50 -to spi_datain
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set_location_assignment PIN_49 -to spi_dataout
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set_location_assignment PIN_84 -to wr
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set_location_assignment PIN_93 -to IORQGE
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set_global_assignment -name SEARCH_PATH "h:\\zx\\cpld_project\\divmmc\\divmmc_cpld_v0\\output_files" |