First working version.

EasyEDA/README.md

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+Orion PRO COM and AY board
+==========================
+How to use：
+
+At editor, Click the document icon on the topbar, via "Document" > "Open" > "EasyEDA Source", and select json file, then open it at the editor.

Firmware/OrionCOM-AY/OrionCOM-AY.qpf

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+# -------------------------------------------------------------------------- #
+#
+# Copyright (C) 1991-2013 Altera Corporation
+# Your use of Altera Corporation's design tools, logic functions 
+# and other software and tools, and its AMPP partner logic 
+# functions, and any output files from any of the foregoing 
+# (including device programming or simulation files), and any 
+# associated documentation or information are expressly subject 
+# to the terms and conditions of the Altera Program License 
+# Subscription Agreement, Altera MegaCore Function License 
+# Agreement, or other applicable license agreement, including, 
+# without limitation, that your use is for the sole purpose of 
+# programming logic devices manufactured by Altera and sold by 
+# Altera or its authorized distributors.  Please refer to the 
+# applicable agreement for further details.
+#
+# -------------------------------------------------------------------------- #
+#
+# Quartus II 32-bit
+# Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition
+# Date created = 14:21:14  November 28, 2020
+#
+# -------------------------------------------------------------------------- #
+
+QUARTUS_VERSION = "13.0"
+DATE = "14:21:14  November 28, 2020"
+
+# Revisions
+
+PROJECT_REVISION = "OrionCOM-AY"

Firmware/OrionCOM-AY/OrionCOM-AY.qsf

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+# -------------------------------------------------------------------------- #
+#
+# Copyright (C) 1991-2013 Altera Corporation
+# Your use of Altera Corporation's design tools, logic functions 
+# and other software and tools, and its AMPP partner logic 
+# functions, and any output files from any of the foregoing 
+# (including device programming or simulation files), and any 
+# associated documentation or information are expressly subject 
+# to the terms and conditions of the Altera Program License 
+# Subscription Agreement, Altera MegaCore Function License 
+# Agreement, or other applicable license agreement, including, 
+# without limitation, that your use is for the sole purpose of 
+# programming logic devices manufactured by Altera and sold by 
+# Altera or its authorized distributors.  Please refer to the 
+# applicable agreement for further details.
+#
+# -------------------------------------------------------------------------- #
+#
+# Quartus II 32-bit
+# Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition
+# Date created = 14:21:14  November 28, 2020
+#
+# -------------------------------------------------------------------------- #
+#
+# Notes:
+#
+# 1) The default values for assignments are stored in the file:
+#		OrionCOM-AY_assignment_defaults.qdf
+#    If this file doesn't exist, see file:
+#		assignment_defaults.qdf
+#
+# 2) Altera recommends that you do not modify this file. This
+#    file is updated automatically by the Quartus II software
+#    and any changes you make may be lost or overwritten.
+#
+# -------------------------------------------------------------------------- #
+
+
+set_global_assignment -name FAMILY MAX7000S
+set_global_assignment -name DEVICE "EPM7064STC44-7"
+set_global_assignment -name TOP_LEVEL_ENTITY OrionCOM_AY
+set_global_assignment -name ORIGINAL_QUARTUS_VERSION "13.0 SP1"
+set_global_assignment -name PROJECT_CREATION_TIME_DATE "14:21:14  NOVEMBER 28, 2020"
+set_global_assignment -name LAST_QUARTUS_VERSION "13.0 SP1"
+set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
+set_global_assignment -name DEVICE_FILTER_PACKAGE TQFP
+set_global_assignment -name DEVICE_FILTER_PIN_COUNT 44
+set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 7
+set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR "-1"
+set_global_assignment -name EDA_SIMULATION_TOOL "ModelSim-Altera (Verilog)"
+set_global_assignment -name EDA_OUTPUT_DATA_FORMAT "VERILOG HDL" -section_id eda_simulation
+set_global_assignment -name SYSTEMVERILOG_FILE OrionCOM_AY.sv
+set_global_assignment -name OPTIMIZE_HOLD_TIMING OFF
+set_global_assignment -name OPTIMIZE_MULTI_CORNER_TIMING OFF
+set_global_assignment -name FITTER_EFFORT "STANDARD FIT"
+set_global_assignment -name MAX7000_DEVICE_IO_STANDARD TTL
+set_location_assignment PIN_33 -to debug
+set_location_assignment PIN_2 -to a[0]
+set_location_assignment PIN_3 -to a[1]
+set_location_assignment PIN_5 -to a[2]
+set_location_assignment PIN_1 -to TDI
+set_location_assignment PIN_32 -to TDO
+set_location_assignment PIN_26 -to TCK
+set_location_assignment PIN_7 -to TMS
+set_location_assignment PIN_6 -to a[3]
+set_location_assignment PIN_8 -to a[4]
+set_location_assignment PIN_10 -to a[5]
+set_location_assignment PIN_11 -to a[6]
+set_location_assignment PIN_12 -to a[7]
+set_location_assignment PIN_13 -to irq4
+set_location_assignment PIN_14 -to irq3
+set_location_assignment PIN_15 -to a[8]
+set_location_assignment PIN_18 -to a[9]
+set_location_assignment PIN_42 -to bc1
+set_location_assignment PIN_43 -to bdir
+set_location_assignment PIN_37 -to clk
+set_location_assignment PIN_27 -to clk1
+set_location_assignment PIN_44 -to clk2
+set_location_assignment PIN_25 -to cs_vi_n
+set_location_assignment PIN_35 -to cs_vv1_n
+set_location_assignment PIN_30 -to cs_vv2_n
+set_location_assignment PIN_21 -to iorq_n
+set_location_assignment PIN_23 -to m1_n
+set_location_assignment PIN_19 -to rd_n
+set_location_assignment PIN_38 -to rdy1
+set_location_assignment PIN_31 -to rdy2
+set_location_assignment PIN_39 -to reset_n
+set_location_assignment PIN_34 -to reset
+set_location_assignment PIN_28 -to w1
+set_location_assignment PIN_22 -to wait_n
+set_location_assignment PIN_20 -to wr_n

Firmware/OrionCOM-AY/OrionCOM_AY.sv

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+//
+// Дешифратор портов и сигналов для платы OrionPro COM-AY
+//
+module OrionCOM_AY (
+	
+	// Сигналы шины Orion PRO
+	input wire clk,			// 10MHz Orion Clock
+	input wire reset_n,		// RES0
+	input wire iorq_n,		// -IORQ
+	input wire m1_n,			// -M1
+	input wire wr_n,			// -WR
+	input wire rd_n,			// -RD
+	input wire wait_n,		// -WAIT
+	input wire [9:0] a,		// A0-A7,A14,A15
+	
+	// Сигналы готовности от ВВ51
+	input wire rdy1,			// от порта COM1
+	input wire rdy2,			// от порта COM2
+	
+	// Выходные сигналы
+	output wire cs_vi_n,		// Выборка ВИ53
+	output wire cs_vv1_n,	// Выборка ВВ51 COM1
+	output wire cs_vv2_n,	// Выборка ВВ51 COM2
+	output wire bdir,			// Направление данных AY
+	output wire bc1,			// Выбор команды AY
+	output wire w1,			// Задержанный WR для ВИ53
+	output wire clk1,  		// Тактирование ВИ53, ВВ51
+	output wire clk2,  		// Тактирование AY
+	output wire reset,		// Инвертированный сброс для ВВ51
+	output wire irq3,			// Запрос прерывания 3 в шину Orion PRO
+	output wire irq4,			// Запрос прерывания 4 в шину Orion PRO
+	output wire debug
+);
+
+	wire sel3x;
+	wire cs_ay_opro;
+	wire cs_ay_lb;
+	wire cs_ay_ff;
+	wire cs_ay_bf;
+	wire cs_ay_3f;
+	wire cs_ay_3e;
+	wire cs_ay_0;
+	wire cs_ay_1;
+	
+	assign reset = !reset_n;
+	assign irq3 = !rdy1;
+	assign irq4 = !rdy2;
+	assign w1 = wait_n | wr_n;
+	
+	// Сигналы выборки портов IO
+	assign sel3x = (a[7:4] == 4'b0011) && !iorq_n;
+	
+	assign cs_vv1_n = !(sel3x & !a[3] & !a[2]);
+	assign cs_vv2_n = !(sel3x & !a[3] & a[2]);
+	assign cs_vi_n  = !(sel3x & a[3] & !a[2]);
+	
+	// Сигналы выборки AY
+	assign cs_ay_opro  = sel3x & a[2] & a[3];
+	
+	assign cs_ay_3f = cs_ay_opro & a[0];
+	assign cs_ay_3e = cs_ay_opro & !a[0];
+	
+	assign cs_ay_lb =  (a[7:0] == 8'hFD) ? (m1_n & !iorq_n) : 1'b0;
+	assign cs_ay_bf = a[9] & !a[8] & cs_ay_lb;
+	assign cs_ay_ff = a[9] & a[8] & cs_ay_lb;
+	
+	assign cs_ay_0 = cs_ay_bf || cs_ay_3e;
+	assign cs_ay_1 = cs_ay_ff || cs_ay_3f;
+	
+	
+	// Сигналы управления AY
+	assign bc1 = cs_ay_1 & (!rd_n | !wr_n);
+   assign bdir = (cs_ay_0 || cs_ay_1) & !wr_n;
+	// Тактирование AY
+	AyClkDiv ayClkDiv( .clk(clk), .reset_n(reset_n), .clk_out(clk2) );
+	
+	// Тактирование для ВИ53, ВВ51
+	ViClkDiv viClkDiv( .clk(clk), .reset_n(reset_n), .clk_out(clk1) );
+	
+	
+	// -- DEBUG
+	assign debug = clk2;			
+		
+endmodule
+
+
+module ViClkDiv(
+	input clk,
+	input reset_n,
+	output clk_out
+);
+
+	reg [1:0] div1;
+	
+	assign clk_out = div1[1];
+	
+	always @ (posedge clk, negedge reset_n)
+		if (!reset_n) div1 <= 2'b00;
+		else div1 <= div1 + 1'b1;
+
+endmodule
+
+
+/* Делитель частоты для AY
+	Коэффициенты 
+	для базовой частоты 10MHz:
+	k = 3/17,  F= 1.764705 MHz, c = 5h
+	k = 10/57, F= 1.754385 MHz, c = 2d	
+	k = 7/40,  F= 1.750000 MHz, c = 1Ch
+	для базовой частоты 20MHz:
+	k = 3/34,  F= 1.764705 MHz, c = 0Bh;
+	k = 5/57,  F= 1.754385 MHz, c = 4Fh;
+	k = 7/80,  F= 1.750000 MHz, c = 39h;
+	k = 8/91,  F= 1.758241 MHz, c = 71h;
+	k = N/M
+	k = 179/1024 F= 1.748046, c = 3F4h;
+*/
+
+module AyClkDiv(
+	input clk,
+	input reset_n,
+	output clk_out
+);
+
+	localparam N = 9;
+	localparam C = 8'd179;
+	
+	reg [N:0] sum;
+	assign clk_out = sum[N];
+
+	always_ff @ (posedge clk, negedge reset_n)
+		if (!reset_n) sum <= 0;		
+		else sum <= sum + C;
+	
+endmodule
+
+/*
+module AyClkDivV2(
+	input clk,
+	input reset_n,
+	output clk_out
+);
+
+   parameter M = 7;
+	parameter N = 40;
+	
+   localparam X = ((1<<$clog2(N)) - N + M);
+   bit [$clog2(N)-1:0] cnt; // счетчик
+   always @(posedge clk, negedge reset_n)
+      if (!reset_n) cnt <= 0;
+      else {clk_out, cnt} = cnt + (clk_out ? X:M);
+
+endmodule
+*/

Firmware/OrionCOM-AY/db/OrionCOM-AY.asm.qmsg

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+{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "Quartus II" 0 -1 1612531289301 ""}
+{ "Info" "IQEXE_START_BANNER_PRODUCT" "Assembler Quartus II 32-bit " "Running Quartus II 32-bit Assembler" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition " "Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition" {  } {  } 0 0 "%1!s!" 0 0 "Quartus II" 0 -1 1612531289302 ""} { "Info" "IQEXE_START_BANNER_TIME" "Fri Feb  5 16:21:29 2021 " "Processing started: Fri Feb  5 16:21:29 2021" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "Quartus II" 0 -1 1612531289302 ""}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "Assembler" 0 -1 1612531289302 ""}
+{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_asm --read_settings_files=off --write_settings_files=off OrionCOM-AY -c OrionCOM-AY " "Command: quartus_asm --read_settings_files=off --write_settings_files=off OrionCOM-AY -c OrionCOM-AY" {  } {  } 0 0 "Command: %1!s!" 0 0 "Assembler" 0 -1 1612531289303 ""}
+{ "Info" "IASM_ASM_GENERATING_PROGRAMMING_FILES" "" "Assembler is generating device programming files" {  } {  } 0 115030 "Assembler is generating device programming files" 0 0 "Assembler" 0 -1 1612531289485 ""}
+{ "Info" "IQEXE_ERROR_COUNT" "Assembler 0 s 0 s Quartus II 32-bit " "Quartus II 32-bit Assembler was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "299 " "Peak virtual memory: 299 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Quartus II" 0 -1 1612531289713 ""} { "Info" "IQEXE_END_BANNER_TIME" "Fri Feb  5 16:21:29 2021 " "Processing ended: Fri Feb  5 16:21:29 2021" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "Quartus II" 0 -1 1612531289713 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:00 " "Elapsed time: 00:00:00" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "Quartus II" 0 -1 1612531289713 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:01 " "Total CPU time (on all processors): 00:00:01" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Quartus II" 0 -1 1612531289713 ""}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Assembler" 0 -1 1612531289713 ""}