init repo

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RomanRom2 committed 2025-02-22 18:50:46 +03:00
commit ae91df09e9
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<?php
$pcad_pcb = "";
// top
$pcad_pcb .= " (layerDef \"Top\"\r\n";
$pcad_pcb .= " (layerNum 1)\r\n";
$pcad_pcb .= " (layerType Signal)\r\n";
$pcad_pcb .= " (attr \"PadToPadClearance\" \"8mil\" (textStyleRef \"(Default)\") (constraintUnits mil) )\r\n";
$pcad_pcb .= " (attr \"PadToLineClearance\" \"8mil\" (textStyleRef \"(Default)\") (constraintUnits mil) )\r\n";
$pcad_pcb .= " (attr \"LineToLineClearance\" \"8mil\" (textStyleRef \"(Default)\") (constraintUnits mil) )\r\n";
$pcad_pcb .= " (attr \"ViaToPadClearance\" \"8mil\" (textStyleRef \"(Default)\") (constraintUnits mil) )\r\n";
$pcad_pcb .= " (attr \"ViaToLineClearance\" \"8mil\" (textStyleRef \"(Default)\") (constraintUnits mil) )\r\n";
$pcad_pcb .= " (attr \"ViaToViaClearance\" \"8mil\" (textStyleRef \"(Default)\") (constraintUnits mil) )\r\n";
$pcad_pcb .= " (fieldSetRef \"(Default)\")\r\n";
$pcad_pcb .= " )\r\n";
$pcad_pcb .= " (layerDef \"Top Assy\"\r\n";
$pcad_pcb .= " (layerNum 10)\r\n";
$pcad_pcb .= " (layerType NonSignal)\r\n";
$pcad_pcb .= " (fieldSetRef \"(Default)\")\r\n";
$pcad_pcb .= " )\r\n";
$pcad_pcb .= " (layerDef \"Top Silk\"\r\n";
$pcad_pcb .= " (layerNum 6)\r\n";
$pcad_pcb .= " (layerType NonSignal)\r\n";
$pcad_pcb .= " (fieldSetRef \"(Default)\")\r\n";
$pcad_pcb .= " )\r\n";
$pcad_pcb .= " (layerDef \"Top Mask\"\r\n";
$pcad_pcb .= " (layerNum 4)\r\n";
$pcad_pcb .= " (layerType NonSignal)\r\n";
$pcad_pcb .= " (fieldSetRef \"(Default)\")\r\n";
$pcad_pcb .= " )\r\n";
$pcad_pcb .= " (layerDef \"Top Paste\"\r\n";
$pcad_pcb .= " (layerNum 8)\r\n";
$pcad_pcb .= " (layerType NonSignal)\r\n";
$pcad_pcb .= " (fieldSetRef \"(Default)\")\r\n";
$pcad_pcb .= " )\r\n";
// bottom
$pcad_pcb .= " (layerDef \"Bottom\"\r\n";
$pcad_pcb .= " (layerNum 2)\r\n";
$pcad_pcb .= " (layerType Signal)\r\n";
$pcad_pcb .= " (attr \"PadToPadClearance\" \"8mil\" (textStyleRef \"(Default)\") (constraintUnits mil) )\r\n";
$pcad_pcb .= " (attr \"PadToLineClearance\" \"8mil\" (textStyleRef \"(Default)\") (constraintUnits mil) )\r\n";
$pcad_pcb .= " (attr \"LineToLineClearance\" \"8mil\" (textStyleRef \"(Default)\") (constraintUnits mil) )\r\n";
$pcad_pcb .= " (attr \"ViaToPadClearance\" \"8mil\" (textStyleRef \"(Default)\") (constraintUnits mil) )\r\n";
$pcad_pcb .= " (attr \"ViaToLineClearance\" \"8mil\" (textStyleRef \"(Default)\") (constraintUnits mil) )\r\n";
$pcad_pcb .= " (attr \"ViaToViaClearance\" \"8mil\" (textStyleRef \"(Default)\") (constraintUnits mil) )\r\n";
$pcad_pcb .= " (fieldSetRef \"(Default)\")\r\n";
$pcad_pcb .= " )\r\n";
$pcad_pcb .= " (layerDef \"Bot Assy\"\r\n";
$pcad_pcb .= " (layerNum 11)\r\n";
$pcad_pcb .= " (layerType NonSignal)\r\n";
$pcad_pcb .= " (fieldSetRef \"(Default)\")\r\n";
$pcad_pcb .= " )\r\n";
$pcad_pcb .= " (layerDef \"Bot Silk\"\r\n";
$pcad_pcb .= " (layerNum 7)\r\n";
$pcad_pcb .= " (layerType NonSignal)\r\n";
$pcad_pcb .= " (fieldSetRef \"(Default)\")\r\n";
$pcad_pcb .= " )\r\n";
$pcad_pcb .= " (layerDef \"Bot Mask\"\r\n";
$pcad_pcb .= " (layerNum 5)\r\n";
$pcad_pcb .= " (layerType NonSignal)\r\n";
$pcad_pcb .= " (fieldSetRef \"(Default)\")\r\n";
$pcad_pcb .= " )\r\n";
$pcad_pcb .= " (layerDef \"Bot Paste\"\r\n";
$pcad_pcb .= " (layerNum 9)\r\n";
$pcad_pcb .= " (layerType NonSignal)\r\n";
$pcad_pcb .= " (fieldSetRef \"(Default)\")\r\n";
$pcad_pcb .= " )\r\n";
// board
$pcad_pcb .= " (layerDef \"Board\"\r\n";
$pcad_pcb .= " (layerNum 3)\r\n";
$pcad_pcb .= " (layerType NonSignal)\r\n";
$pcad_pcb .= " (fieldSetRef \"(Default)\")\r\n";
$pcad_pcb .= " )\r\n";
file_put_contents($out_file, $pcad_pcb, FILE_APPEND | LOCK_EX);