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https://github.com/holub/mame
synced 2025-10-05 08:41:31 +03:00
maps: Finish devices/cpu (nw)
This commit is contained in:
Olivier Galibert
parent
6716ab2efb
commit
5fa87ba20e
@ -35,25 +35,29 @@ DEFINE_DEVICE_TYPE(AMI_S2152, amis2152_cpu_device, "amis2152", "AMI S2152")
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// internal memory maps
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ADDRESS_MAP_START(amis2000_base_device::program_1k)
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AM_RANGE(0x0000, 0x03ff) AM_ROM
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ADDRESS_MAP_END
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void amis2000_base_device::program_1k(address_map &map)
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{
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map(0x0000, 0x03ff).rom();
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}
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ADDRESS_MAP_START(amis2000_base_device::program_1_5k)
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AM_RANGE(0x0000, 0x03ff) AM_ROM
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AM_RANGE(0x0400, 0x05ff) AM_NOP // 0x00
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AM_RANGE(0x0600, 0x07ff) AM_ROM
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ADDRESS_MAP_END
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void amis2000_base_device::program_1_5k(address_map &map)
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{
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map(0x0000, 0x03ff).rom();
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map(0x0400, 0x05ff).noprw(); // 0x00
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map(0x0600, 0x07ff).rom();
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}
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ADDRESS_MAP_START(amis2000_base_device::data_64x4)
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AM_RANGE(0x00, 0x3f) AM_RAM
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ADDRESS_MAP_END
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void amis2000_base_device::data_64x4(address_map &map)
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{
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map(0x00, 0x3f).ram();
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}
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ADDRESS_MAP_START(amis2000_base_device::data_80x4)
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AM_RANGE(0x00, 0x3f) AM_RAM
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AM_RANGE(0x40, 0x4f) AM_RAM
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ADDRESS_MAP_END
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void amis2000_base_device::data_80x4(address_map &map)
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{
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map(0x00, 0x3f).ram();
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map(0x40, 0x4f).ram();
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}
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// device definitions
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@ -40,12 +40,13 @@ WRITE32_MEMBER(arcompact_device::arcompact_auxreg025_INTVECTORBASE_w) { m_INTVEC
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ADDRESS_MAP_START(arcompact_device::arcompact_auxreg_map)
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AM_RANGE(0x000000002, 0x000000002) AM_READWRITE(arcompact_auxreg002_LPSTART_r, arcompact_auxreg002_LPSTART_w)
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AM_RANGE(0x000000003, 0x000000003) AM_READWRITE(arcompact_auxreg003_LPEND_r, arcompact_auxreg003_LPEND_w)
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AM_RANGE(0x000000009, 0x000000009) AM_READ(arcompact_auxreg00a_STATUS32_r) // r/o
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AM_RANGE(0x000000025, 0x000000025) AM_READWRITE(arcompact_auxreg025_INTVECTORBASE_r, arcompact_auxreg025_INTVECTORBASE_w)
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ADDRESS_MAP_END
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void arcompact_device::arcompact_auxreg_map(address_map &map)
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{
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map(0x000000002, 0x000000002).rw(this, FUNC(arcompact_device::arcompact_auxreg002_LPSTART_r), FUNC(arcompact_device::arcompact_auxreg002_LPSTART_w));
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map(0x000000003, 0x000000003).rw(this, FUNC(arcompact_device::arcompact_auxreg003_LPEND_r), FUNC(arcompact_device::arcompact_auxreg003_LPEND_w));
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map(0x000000009, 0x000000009).r(this, FUNC(arcompact_device::arcompact_auxreg00a_STATUS32_r)); // r/o
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map(0x000000025, 0x000000025).rw(this, FUNC(arcompact_device::arcompact_auxreg025_INTVECTORBASE_r), FUNC(arcompact_device::arcompact_auxreg025_INTVECTORBASE_w));
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}
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#define AUX_SPACE_ADDRESS_WIDTH 32 // IO space is 32 bits of dwords
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@ -17,27 +17,28 @@
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DEFINE_DEVICE_TYPE(LPC2103, lpc210x_device, "lpc2103", "NXP LPC2103")
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ADDRESS_MAP_START(lpc210x_device::lpc2103_map)
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AM_RANGE(0x00000000, 0x00007fff) AM_READWRITE(flash_r, flash_w) // 32kb internal FLASH rom
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void lpc210x_device::lpc2103_map(address_map &map)
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{
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map(0x00000000, 0x00007fff).rw(this, FUNC(lpc210x_device::flash_r), FUNC(lpc210x_device::flash_w)); // 32kb internal FLASH rom
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AM_RANGE(0x3FFFC000, 0x3FFFC01f) AM_READWRITE( fio_r, fio_w ) // GPIO
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map(0x3FFFC000, 0x3FFFC01f).rw(this, FUNC(lpc210x_device::fio_r), FUNC(lpc210x_device::fio_w)); // GPIO
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AM_RANGE(0x40000000, 0x40001fff) AM_RAM // 8kb internal SROM (writes should actually latch - see docs)
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map(0x40000000, 0x40001fff).ram(); // 8kb internal SROM (writes should actually latch - see docs)
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AM_RANGE(0xE0004000, 0xE000407f) AM_READWRITE( timer0_r, timer0_w)
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map(0xE0004000, 0xE000407f).rw(this, FUNC(lpc210x_device::timer0_r), FUNC(lpc210x_device::timer0_w));
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AM_RANGE(0xE0008000, 0xE000807f) AM_READWRITE( timer1_r, timer1_w)
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map(0xE0008000, 0xE000807f).rw(this, FUNC(lpc210x_device::timer1_r), FUNC(lpc210x_device::timer1_w));
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AM_RANGE(0xE002C000, 0xE002C007) AM_READWRITE( pin_r, pin_w )
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map(0xE002C000, 0xE002C007).rw(this, FUNC(lpc210x_device::pin_r), FUNC(lpc210x_device::pin_w));
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AM_RANGE(0xE01FC000, 0xE01FC007) AM_READWRITE( mam_r, mam_w )
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AM_RANGE(0xE01FC080, 0xE01FC08f) AM_READWRITE( pll_r, pll_w ) // phase locked loop
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AM_RANGE(0xE01FC100, 0xE01FC103) AM_READWRITE( apbdiv_r, apbdiv_w )
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AM_RANGE(0xE01FC1a0, 0xE01FC1a3) AM_READWRITE( scs_r, scs_w )
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map(0xE01FC000, 0xE01FC007).rw(this, FUNC(lpc210x_device::mam_r), FUNC(lpc210x_device::mam_w));
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map(0xE01FC080, 0xE01FC08f).rw(this, FUNC(lpc210x_device::pll_r), FUNC(lpc210x_device::pll_w)); // phase locked loop
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map(0xE01FC100, 0xE01FC103).rw(this, FUNC(lpc210x_device::apbdiv_r), FUNC(lpc210x_device::apbdiv_w));
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map(0xE01FC1a0, 0xE01FC1a3).rw(this, FUNC(lpc210x_device::scs_r), FUNC(lpc210x_device::scs_w));
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AM_RANGE(0xFFFFF000, 0xFFFFF2ff) AM_READWRITE( vic_r, vic_w ) // interrupt controller
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ADDRESS_MAP_END
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map(0xFFFFF000, 0xFFFFF2ff).rw(this, FUNC(lpc210x_device::vic_r), FUNC(lpc210x_device::vic_w)); // interrupt controller
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}
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lpc210x_device::lpc210x_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
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@ -573,21 +573,25 @@ DEFINE_DEVICE_TYPE(ATMEGA2560, atmega2560_device, "atmega2560", "Atmel ATmega256
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// INTERNAL ADDRESS MAP
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//**************************************************************************
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ADDRESS_MAP_START(atmega88_device::atmega88_internal_map)
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AM_RANGE(0x0000, 0x00ff) AM_READWRITE( regs_r, regs_w )
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ADDRESS_MAP_END
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void atmega88_device::atmega88_internal_map(address_map &map)
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{
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map(0x0000, 0x00ff).rw(this, FUNC(atmega88_device::regs_r), FUNC(atmega88_device::regs_w));
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}
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ADDRESS_MAP_START(atmega644_device::atmega644_internal_map)
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AM_RANGE(0x0000, 0x00ff) AM_READWRITE( regs_r, regs_w )
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ADDRESS_MAP_END
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void atmega644_device::atmega644_internal_map(address_map &map)
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{
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map(0x0000, 0x00ff).rw(this, FUNC(atmega644_device::regs_r), FUNC(atmega644_device::regs_w));
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}
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ADDRESS_MAP_START(atmega1280_device::atmega1280_internal_map)
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AM_RANGE(0x0000, 0x01ff) AM_READWRITE( regs_r, regs_w )
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ADDRESS_MAP_END
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void atmega1280_device::atmega1280_internal_map(address_map &map)
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{
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map(0x0000, 0x01ff).rw(this, FUNC(atmega1280_device::regs_r), FUNC(atmega1280_device::regs_w));
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}
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ADDRESS_MAP_START(atmega2560_device::atmega2560_internal_map)
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AM_RANGE(0x0000, 0x01ff) AM_READWRITE( regs_r, regs_w )
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ADDRESS_MAP_END
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void atmega2560_device::atmega2560_internal_map(address_map &map)
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{
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map(0x0000, 0x01ff).rw(this, FUNC(atmega2560_device::regs_r), FUNC(atmega2560_device::regs_w));
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}
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//-------------------------------------------------
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// atmega88_device - constructor
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@ -134,32 +134,38 @@ DEFINE_DEVICE_TYPE(COP446C, cop446c_cpu_device, "cop446c", "National Semiconduct
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ADDRESS MAPS
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***************************************************************************/
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ADDRESS_MAP_START(cop400_cpu_device::program_512b)
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AM_RANGE(0x000, 0x1ff) AM_ROM
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ADDRESS_MAP_END
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void cop400_cpu_device::program_512b(address_map &map)
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{
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map(0x000, 0x1ff).rom();
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}
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ADDRESS_MAP_START(cop400_cpu_device::program_1kb)
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AM_RANGE(0x000, 0x3ff) AM_ROM
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ADDRESS_MAP_END
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void cop400_cpu_device::program_1kb(address_map &map)
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{
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map(0x000, 0x3ff).rom();
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}
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ADDRESS_MAP_START(cop400_cpu_device::program_2kb)
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AM_RANGE(0x000, 0x7ff) AM_ROM
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ADDRESS_MAP_END
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void cop400_cpu_device::program_2kb(address_map &map)
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{
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map(0x000, 0x7ff).rom();
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}
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ADDRESS_MAP_START(cop400_cpu_device::data_32b)
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AM_RANGE(0x00, 0x07) AM_MIRROR(0x08) AM_RAM
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AM_RANGE(0x10, 0x17) AM_MIRROR(0x08) AM_RAM
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AM_RANGE(0x20, 0x27) AM_MIRROR(0x08) AM_RAM
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AM_RANGE(0x30, 0x37) AM_MIRROR(0x08) AM_RAM
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ADDRESS_MAP_END
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void cop400_cpu_device::data_32b(address_map &map)
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{
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map(0x00, 0x07).mirror(0x08).ram();
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map(0x10, 0x17).mirror(0x08).ram();
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map(0x20, 0x27).mirror(0x08).ram();
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map(0x30, 0x37).mirror(0x08).ram();
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}
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ADDRESS_MAP_START(cop400_cpu_device::data_64b)
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AM_RANGE(0x00, 0x3f) AM_RAM
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ADDRESS_MAP_END
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void cop400_cpu_device::data_64b(address_map &map)
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{
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map(0x00, 0x3f).ram();
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}
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ADDRESS_MAP_START(cop400_cpu_device::data_128b)
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AM_RANGE(0x00, 0x7f) AM_RAM
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ADDRESS_MAP_END
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void cop400_cpu_device::data_128b(address_map &map)
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{
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map(0x00, 0x7f).ram();
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}
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cop400_cpu_device::cop400_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, uint8_t program_addr_bits, uint8_t data_addr_bits, uint8_t featuremask, uint8_t g_mask, uint8_t d_mask, uint8_t in_mask, bool has_counter, bool has_inil, address_map_constructor internal_map_program, address_map_constructor internal_map_data)
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@ -109,15 +109,17 @@ enum
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/****************************************************************************
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* Internal Memory Maps
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****************************************************************************/
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ADDRESS_MAP_START(dsp56k_device::dsp56156_program_map)
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AM_RANGE(0x0000,0x07ff) AM_RAM AM_SHARE("dsk56k_program_ram") /* 1-5 */
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void dsp56k_device::dsp56156_program_map(address_map &map)
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{
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map(0x0000, 0x07ff).ram().share("dsk56k_program_ram"); /* 1-5 */
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// AM_RANGE(0x2f00,0x2fff) AM_ROM /* 1-5 PROM reserved memory. Is this the right spot for it? */
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ADDRESS_MAP_END
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}
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ADDRESS_MAP_START(dsp56k_device::dsp56156_x_data_map)
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AM_RANGE(0x0000,0x07ff) AM_RAM /* 1-5 */
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AM_RANGE(0xffc0,0xffff) AM_READWRITE(peripheral_register_r, peripheral_register_w) /* 1-5 On-chip peripheral registers memory mapped in data space */
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ADDRESS_MAP_END
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void dsp56k_device::dsp56156_x_data_map(address_map &map)
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{
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map(0x0000, 0x07ff).ram(); /* 1-5 */
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map(0xffc0, 0xffff).rw(this, FUNC(dsp56k_device::peripheral_register_r), FUNC(dsp56k_device::peripheral_register_w)); /* 1-5 On-chip peripheral registers memory mapped in data space */
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}
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dsp56k_device::dsp56k_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
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@ -32,17 +32,19 @@ DEFINE_DEVICE_TYPE(E0C6S46, e0c6s46_device, "e0c6s46", "Seiko Epson E0C6S46")
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// internal memory maps
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ADDRESS_MAP_START(e0c6s46_device::e0c6s46_program)
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AM_RANGE(0x0000, 0x17ff) AM_ROM
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ADDRESS_MAP_END
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void e0c6s46_device::e0c6s46_program(address_map &map)
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{
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map(0x0000, 0x17ff).rom();
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}
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ADDRESS_MAP_START(e0c6s46_device::e0c6s46_data)
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AM_RANGE(0x0000, 0x027f) AM_RAM
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AM_RANGE(0x0e00, 0x0e4f) AM_RAM AM_SHARE("vram1")
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AM_RANGE(0x0e80, 0x0ecf) AM_RAM AM_SHARE("vram2")
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AM_RANGE(0x0f00, 0x0f7f) AM_READWRITE(io_r, io_w)
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ADDRESS_MAP_END
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void e0c6s46_device::e0c6s46_data(address_map &map)
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{
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map(0x0000, 0x027f).ram();
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map(0x0e00, 0x0e4f).ram().share("vram1");
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map(0x0e80, 0x0ecf).ram().share("vram2");
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map(0x0f00, 0x0f7f).rw(this, FUNC(e0c6s46_device::io_r), FUNC(e0c6s46_device::io_w));
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}
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// device definitions
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@ -162,35 +162,41 @@
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// 4Kb IRAM (On-Chip Memory)
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ADDRESS_MAP_START(hyperstone_device::e116_4k_iram_map)
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AM_RANGE(0xc0000000, 0xc0000fff) AM_RAM AM_MIRROR(0x1ffff000)
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ADDRESS_MAP_END
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void hyperstone_device::e116_4k_iram_map(address_map &map)
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{
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map(0xc0000000, 0xc0000fff).ram().mirror(0x1ffff000);
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}
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ADDRESS_MAP_START(hyperstone_device::e132_4k_iram_map)
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AM_RANGE(0xc0000000, 0xc0000fff) AM_RAM AM_MIRROR(0x1ffff000)
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ADDRESS_MAP_END
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void hyperstone_device::e132_4k_iram_map(address_map &map)
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{
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map(0xc0000000, 0xc0000fff).ram().mirror(0x1ffff000);
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}
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// 8Kb IRAM (On-Chip Memory)
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ADDRESS_MAP_START(hyperstone_device::e116_8k_iram_map)
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AM_RANGE(0xc0000000, 0xc0001fff) AM_RAM AM_MIRROR(0x1fffe000)
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ADDRESS_MAP_END
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void hyperstone_device::e116_8k_iram_map(address_map &map)
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{
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map(0xc0000000, 0xc0001fff).ram().mirror(0x1fffe000);
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}
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ADDRESS_MAP_START(hyperstone_device::e132_8k_iram_map)
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AM_RANGE(0xc0000000, 0xc0001fff) AM_RAM AM_MIRROR(0x1fffe000)
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ADDRESS_MAP_END
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void hyperstone_device::e132_8k_iram_map(address_map &map)
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{
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map(0xc0000000, 0xc0001fff).ram().mirror(0x1fffe000);
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}
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// 16Kb IRAM (On-Chip Memory)
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ADDRESS_MAP_START(hyperstone_device::e116_16k_iram_map)
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AM_RANGE(0xc0000000, 0xc0003fff) AM_RAM AM_MIRROR(0x1fffc000)
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ADDRESS_MAP_END
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void hyperstone_device::e116_16k_iram_map(address_map &map)
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{
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map(0xc0000000, 0xc0003fff).ram().mirror(0x1fffc000);
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}
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ADDRESS_MAP_START(hyperstone_device::e132_16k_iram_map)
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AM_RANGE(0xc0000000, 0xc0003fff) AM_RAM AM_MIRROR(0x1fffc000)
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ADDRESS_MAP_END
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void hyperstone_device::e132_16k_iram_map(address_map &map)
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{
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map(0xc0000000, 0xc0003fff).ram().mirror(0x1fffc000);
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}
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//-------------------------------------------------
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@ -135,20 +135,21 @@ device_memory_interface::space_config_vector g65816_device::memory_space_config(
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}
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ADDRESS_MAP_START(_5a22_device::_5a22_map)
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AM_RANGE(0x4202, 0x4202) AM_MIRROR(0xbf0000) AM_WRITE(wrmpya_w)
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AM_RANGE(0x4203, 0x4203) AM_MIRROR(0xbf0000) AM_WRITE(wrmpyb_w)
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AM_RANGE(0x4204, 0x4204) AM_MIRROR(0xbf0000) AM_WRITE(wrdivl_w)
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AM_RANGE(0x4205, 0x4205) AM_MIRROR(0xbf0000) AM_WRITE(wrdivh_w)
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AM_RANGE(0x4206, 0x4206) AM_MIRROR(0xbf0000) AM_WRITE(wrdvdd_w)
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void _5a22_device::_5a22_map(address_map &map)
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{
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map(0x4202, 0x4202).mirror(0xbf0000).w(this, FUNC(_5a22_device::wrmpya_w));
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map(0x4203, 0x4203).mirror(0xbf0000).w(this, FUNC(_5a22_device::wrmpyb_w));
|
||||
map(0x4204, 0x4204).mirror(0xbf0000).w(this, FUNC(_5a22_device::wrdivl_w));
|
||||
map(0x4205, 0x4205).mirror(0xbf0000).w(this, FUNC(_5a22_device::wrdivh_w));
|
||||
map(0x4206, 0x4206).mirror(0xbf0000).w(this, FUNC(_5a22_device::wrdvdd_w));
|
||||
|
||||
AM_RANGE(0x420d, 0x420d) AM_MIRROR(0xbf0000) AM_WRITE(memsel_w)
|
||||
map(0x420d, 0x420d).mirror(0xbf0000).w(this, FUNC(_5a22_device::memsel_w));
|
||||
|
||||
AM_RANGE(0x4214, 0x4214) AM_MIRROR(0xbf0000) AM_READ(rddivl_r)
|
||||
AM_RANGE(0x4215, 0x4215) AM_MIRROR(0xbf0000) AM_READ(rddivh_r)
|
||||
AM_RANGE(0x4216, 0x4216) AM_MIRROR(0xbf0000) AM_READ(rdmpyl_r)
|
||||
AM_RANGE(0x4217, 0x4217) AM_MIRROR(0xbf0000) AM_READ(rdmpyh_r)
|
||||
ADDRESS_MAP_END
|
||||
map(0x4214, 0x4214).mirror(0xbf0000).r(this, FUNC(_5a22_device::rddivl_r));
|
||||
map(0x4215, 0x4215).mirror(0xbf0000).r(this, FUNC(_5a22_device::rddivh_r));
|
||||
map(0x4216, 0x4216).mirror(0xbf0000).r(this, FUNC(_5a22_device::rdmpyl_r));
|
||||
map(0x4217, 0x4217).mirror(0xbf0000).r(this, FUNC(_5a22_device::rdmpyh_r));
|
||||
}
|
||||
|
||||
|
||||
_5a22_device::_5a22_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
|
||||
|
||||
@ -34,107 +34,108 @@ h83002_device::h83002_device(const machine_config &mconfig, const char *tag, dev
|
||||
syscr = 0;
|
||||
}
|
||||
|
||||
ADDRESS_MAP_START(h83002_device::map)
|
||||
AM_RANGE(0xfffd10, 0xffff0f) AM_RAM
|
||||
void h83002_device::map(address_map &map)
|
||||
{
|
||||
map(0xfffd10, 0xffff0f).ram();
|
||||
|
||||
// DMA: only full address mode supported
|
||||
AM_RANGE(0xffff20, 0xffff21) AM_DEVREADWRITE( "dma:0", h8_dma_channel_device, marah_r, marah_w )
|
||||
AM_RANGE(0xffff22, 0xffff23) AM_DEVREADWRITE( "dma:0", h8_dma_channel_device, maral_r, maral_w )
|
||||
AM_RANGE(0xffff24, 0xffff25) AM_DEVREADWRITE( "dma:0", h8_dma_channel_device, etcra_r, etcra_w )
|
||||
AM_RANGE(0xffff26, 0xffff27) AM_DEVREADWRITE8("dma:0", h8_dma_channel_device, dtcra_r, dtcra_w, 0x00ff )
|
||||
AM_RANGE(0xffff28, 0xffff29) AM_DEVREADWRITE( "dma:0", h8_dma_channel_device, marbh_r, marbh_w )
|
||||
AM_RANGE(0xffff2a, 0xffff2b) AM_DEVREADWRITE( "dma:0", h8_dma_channel_device, marbl_r, marbl_w )
|
||||
AM_RANGE(0xffff2c, 0xffff2d) AM_DEVREADWRITE( "dma:0", h8_dma_channel_device, etcrb_r, etcrb_w )
|
||||
AM_RANGE(0xffff2e, 0xffff2f) AM_DEVREADWRITE8("dma:0", h8_dma_channel_device, dtcrb_r, dtcrb_w, 0x00ff )
|
||||
AM_RANGE(0xffff30, 0xffff31) AM_DEVREADWRITE( "dma:1", h8_dma_channel_device, marah_r, marah_w )
|
||||
AM_RANGE(0xffff32, 0xffff33) AM_DEVREADWRITE( "dma:1", h8_dma_channel_device, maral_r, maral_w )
|
||||
AM_RANGE(0xffff34, 0xffff35) AM_DEVREADWRITE( "dma:1", h8_dma_channel_device, etcra_r, etcra_w )
|
||||
AM_RANGE(0xffff36, 0xffff37) AM_DEVREADWRITE8("dma:1", h8_dma_channel_device, dtcra_r, dtcra_w, 0x00ff )
|
||||
AM_RANGE(0xffff38, 0xffff39) AM_DEVREADWRITE( "dma:1", h8_dma_channel_device, marbh_r, marbh_w )
|
||||
AM_RANGE(0xffff3a, 0xffff3b) AM_DEVREADWRITE( "dma:1", h8_dma_channel_device, marbl_r, marbl_w )
|
||||
AM_RANGE(0xffff3c, 0xffff3d) AM_DEVREADWRITE( "dma:1", h8_dma_channel_device, etcrb_r, etcrb_w )
|
||||
AM_RANGE(0xffff3e, 0xffff3f) AM_DEVREADWRITE8("dma:1", h8_dma_channel_device, dtcrb_r, dtcrb_w, 0x00ff )
|
||||
map(0xffff20, 0xffff21).rw("dma:0", FUNC(h8_dma_channel_device::marah_r), FUNC(h8_dma_channel_device::marah_w));
|
||||
map(0xffff22, 0xffff23).rw("dma:0", FUNC(h8_dma_channel_device::maral_r), FUNC(h8_dma_channel_device::maral_w));
|
||||
map(0xffff24, 0xffff25).rw("dma:0", FUNC(h8_dma_channel_device::etcra_r), FUNC(h8_dma_channel_device::etcra_w));
|
||||
map(0xffff27, 0xffff27).rw("dma:0", FUNC(h8_dma_channel_device::dtcra_r), FUNC(h8_dma_channel_device::dtcra_w));
|
||||
map(0xffff28, 0xffff29).rw("dma:0", FUNC(h8_dma_channel_device::marbh_r), FUNC(h8_dma_channel_device::marbh_w));
|
||||
map(0xffff2a, 0xffff2b).rw("dma:0", FUNC(h8_dma_channel_device::marbl_r), FUNC(h8_dma_channel_device::marbl_w));
|
||||
map(0xffff2c, 0xffff2d).rw("dma:0", FUNC(h8_dma_channel_device::etcrb_r), FUNC(h8_dma_channel_device::etcrb_w));
|
||||
map(0xffff2f, 0xffff2f).rw("dma:0", FUNC(h8_dma_channel_device::dtcrb_r), FUNC(h8_dma_channel_device::dtcrb_w));
|
||||
map(0xffff30, 0xffff31).rw("dma:1", FUNC(h8_dma_channel_device::marah_r), FUNC(h8_dma_channel_device::marah_w));
|
||||
map(0xffff32, 0xffff33).rw("dma:1", FUNC(h8_dma_channel_device::maral_r), FUNC(h8_dma_channel_device::maral_w));
|
||||
map(0xffff34, 0xffff35).rw("dma:1", FUNC(h8_dma_channel_device::etcra_r), FUNC(h8_dma_channel_device::etcra_w));
|
||||
map(0xffff37, 0xffff37).rw("dma:1", FUNC(h8_dma_channel_device::dtcra_r), FUNC(h8_dma_channel_device::dtcra_w));
|
||||
map(0xffff38, 0xffff39).rw("dma:1", FUNC(h8_dma_channel_device::marbh_r), FUNC(h8_dma_channel_device::marbh_w));
|
||||
map(0xffff3a, 0xffff3b).rw("dma:1", FUNC(h8_dma_channel_device::marbl_r), FUNC(h8_dma_channel_device::marbl_w));
|
||||
map(0xffff3c, 0xffff3d).rw("dma:1", FUNC(h8_dma_channel_device::etcrb_r), FUNC(h8_dma_channel_device::etcrb_w));
|
||||
map(0xffff3f, 0xffff3f).rw("dma:1", FUNC(h8_dma_channel_device::dtcrb_r), FUNC(h8_dma_channel_device::dtcrb_w));
|
||||
|
||||
AM_RANGE(0xffff60, 0xffff61) AM_DEVREADWRITE8("timer16", h8_timer16_device, tstr_r, tstr_w, 0xff00)
|
||||
AM_RANGE(0xffff60, 0xffff61) AM_DEVREADWRITE8("timer16", h8_timer16_device, tsyr_r, tsyr_w, 0x00ff)
|
||||
AM_RANGE(0xffff62, 0xffff63) AM_DEVREADWRITE8("timer16", h8_timer16_device, tmdr_r, tmdr_w, 0xff00)
|
||||
AM_RANGE(0xffff62, 0xffff63) AM_DEVREADWRITE8("timer16", h8_timer16_device, tfcr_r, tfcr_w, 0x00ff)
|
||||
AM_RANGE(0xffff64, 0xffff65) AM_DEVREADWRITE8("timer16:0", h8_timer16_channel_device, tcr_r, tcr_w, 0xff00)
|
||||
AM_RANGE(0xffff64, 0xffff65) AM_DEVREADWRITE8("timer16:0", h8_timer16_channel_device, tior_r, tior_w, 0x00ff)
|
||||
AM_RANGE(0xffff66, 0xffff67) AM_DEVREADWRITE8("timer16:0", h8_timer16_channel_device, tier_r, tier_w, 0xff00)
|
||||
AM_RANGE(0xffff66, 0xffff67) AM_DEVREADWRITE8("timer16:0", h8_timer16_channel_device, tsr_r, tsr_w, 0x00ff)
|
||||
AM_RANGE(0xffff68, 0xffff69) AM_DEVREADWRITE( "timer16:0", h8_timer16_channel_device, tcnt_r, tcnt_w )
|
||||
AM_RANGE(0xffff6a, 0xffff6d) AM_DEVREADWRITE( "timer16:0", h8_timer16_channel_device, tgr_r, tgr_w )
|
||||
AM_RANGE(0xffff6e, 0xffff6f) AM_DEVREADWRITE8("timer16:1", h8_timer16_channel_device, tcr_r, tcr_w, 0xff00)
|
||||
AM_RANGE(0xffff6e, 0xffff6f) AM_DEVREADWRITE8("timer16:1", h8_timer16_channel_device, tior_r, tior_w, 0x00ff)
|
||||
AM_RANGE(0xffff70, 0xffff71) AM_DEVREADWRITE8("timer16:1", h8_timer16_channel_device, tier_r, tier_w, 0xff00)
|
||||
AM_RANGE(0xffff70, 0xffff71) AM_DEVREADWRITE8("timer16:1", h8_timer16_channel_device, tsr_r, tsr_w, 0x00ff)
|
||||
AM_RANGE(0xffff72, 0xffff73) AM_DEVREADWRITE( "timer16:1", h8_timer16_channel_device, tcnt_r, tcnt_w )
|
||||
AM_RANGE(0xffff74, 0xffff77) AM_DEVREADWRITE( "timer16:1", h8_timer16_channel_device, tgr_r, tgr_w )
|
||||
AM_RANGE(0xffff78, 0xffff79) AM_DEVREADWRITE8("timer16:2", h8_timer16_channel_device, tcr_r, tcr_w, 0xff00)
|
||||
AM_RANGE(0xffff78, 0xffff79) AM_DEVREADWRITE8("timer16:2", h8_timer16_channel_device, tior_r, tior_w, 0x00ff)
|
||||
AM_RANGE(0xffff7a, 0xffff7b) AM_DEVREADWRITE8("timer16:2", h8_timer16_channel_device, tier_r, tier_w, 0xff00)
|
||||
AM_RANGE(0xffff7a, 0xffff7b) AM_DEVREADWRITE8("timer16:2", h8_timer16_channel_device, tsr_r, tsr_w, 0x00ff)
|
||||
AM_RANGE(0xffff7c, 0xffff7d) AM_DEVREADWRITE( "timer16:2", h8_timer16_channel_device, tcnt_r, tcnt_w )
|
||||
AM_RANGE(0xffff7e, 0xffff81) AM_DEVREADWRITE( "timer16:2", h8_timer16_channel_device, tgr_r, tgr_w )
|
||||
AM_RANGE(0xffff82, 0xffff83) AM_DEVREADWRITE8("timer16:3", h8_timer16_channel_device, tcr_r, tcr_w, 0xff00)
|
||||
AM_RANGE(0xffff82, 0xffff83) AM_DEVREADWRITE8("timer16:3", h8_timer16_channel_device, tior_r, tior_w, 0x00ff)
|
||||
AM_RANGE(0xffff84, 0xffff85) AM_DEVREADWRITE8("timer16:3", h8_timer16_channel_device, tier_r, tier_w, 0xff00)
|
||||
AM_RANGE(0xffff84, 0xffff85) AM_DEVREADWRITE8("timer16:3", h8_timer16_channel_device, tsr_r, tsr_w, 0x00ff)
|
||||
AM_RANGE(0xffff86, 0xffff87) AM_DEVREADWRITE( "timer16:3", h8_timer16_channel_device, tcnt_r, tcnt_w )
|
||||
AM_RANGE(0xffff88, 0xffff8b) AM_DEVREADWRITE( "timer16:3", h8_timer16_channel_device, tgr_r, tgr_w )
|
||||
AM_RANGE(0xffff8c, 0xffff8f) AM_DEVREADWRITE( "timer16:3", h8_timer16_channel_device, tbr_r, tbr_w )
|
||||
AM_RANGE(0xffff90, 0xffff91) AM_DEVREADWRITE8("timer16", h8_timer16_device, toer_r, toer_w, 0xff00)
|
||||
AM_RANGE(0xffff90, 0xffff91) AM_DEVREADWRITE8("timer16", h8_timer16_device, tocr_r, tocr_w, 0x00ff)
|
||||
AM_RANGE(0xffff92, 0xffff93) AM_DEVREADWRITE8("timer16:4", h8_timer16_channel_device, tcr_r, tcr_w, 0xff00)
|
||||
AM_RANGE(0xffff92, 0xffff93) AM_DEVREADWRITE8("timer16:4", h8_timer16_channel_device, tior_r, tior_w, 0x00ff)
|
||||
AM_RANGE(0xffff94, 0xffff95) AM_DEVREADWRITE8("timer16:4", h8_timer16_channel_device, tier_r, tier_w, 0xff00)
|
||||
AM_RANGE(0xffff94, 0xffff95) AM_DEVREADWRITE8("timer16:4", h8_timer16_channel_device, tsr_r, tsr_w, 0x00ff)
|
||||
AM_RANGE(0xffff96, 0xffff97) AM_DEVREADWRITE( "timer16:4", h8_timer16_channel_device, tcnt_r, tcnt_w )
|
||||
AM_RANGE(0xffff98, 0xffff9b) AM_DEVREADWRITE( "timer16:4", h8_timer16_channel_device, tgr_r, tgr_w )
|
||||
AM_RANGE(0xffff9c, 0xffff9f) AM_DEVREADWRITE( "timer16:4", h8_timer16_channel_device, tbr_r, tbr_w )
|
||||
map(0xffff60, 0xffff60).rw("timer16", FUNC(h8_timer16_device::tstr_r), FUNC(h8_timer16_device::tstr_w));
|
||||
map(0xffff61, 0xffff61).rw("timer16", FUNC(h8_timer16_device::tsyr_r), FUNC(h8_timer16_device::tsyr_w));
|
||||
map(0xffff62, 0xffff62).rw("timer16", FUNC(h8_timer16_device::tmdr_r), FUNC(h8_timer16_device::tmdr_w));
|
||||
map(0xffff63, 0xffff63).rw("timer16", FUNC(h8_timer16_device::tfcr_r), FUNC(h8_timer16_device::tfcr_w));
|
||||
map(0xffff64, 0xffff64).rw("timer16:0", FUNC(h8_timer16_channel_device::tcr_r), FUNC(h8_timer16_channel_device::tcr_w));
|
||||
map(0xffff65, 0xffff65).rw("timer16:0", FUNC(h8_timer16_channel_device::tior_r), FUNC(h8_timer16_channel_device::tior_w));
|
||||
map(0xffff66, 0xffff66).rw("timer16:0", FUNC(h8_timer16_channel_device::tier_r), FUNC(h8_timer16_channel_device::tier_w));
|
||||
map(0xffff67, 0xffff67).rw("timer16:0", FUNC(h8_timer16_channel_device::tsr_r), FUNC(h8_timer16_channel_device::tsr_w));
|
||||
map(0xffff68, 0xffff69).rw("timer16:0", FUNC(h8_timer16_channel_device::tcnt_r), FUNC(h8_timer16_channel_device::tcnt_w));
|
||||
map(0xffff6a, 0xffff6d).rw("timer16:0", FUNC(h8_timer16_channel_device::tgr_r), FUNC(h8_timer16_channel_device::tgr_w));
|
||||
map(0xffff6e, 0xffff6e).rw("timer16:1", FUNC(h8_timer16_channel_device::tcr_r), FUNC(h8_timer16_channel_device::tcr_w));
|
||||
map(0xffff6f, 0xffff6f).rw("timer16:1", FUNC(h8_timer16_channel_device::tior_r), FUNC(h8_timer16_channel_device::tior_w));
|
||||
map(0xffff70, 0xffff70).rw("timer16:1", FUNC(h8_timer16_channel_device::tier_r), FUNC(h8_timer16_channel_device::tier_w));
|
||||
map(0xffff71, 0xffff71).rw("timer16:1", FUNC(h8_timer16_channel_device::tsr_r), FUNC(h8_timer16_channel_device::tsr_w));
|
||||
map(0xffff72, 0xffff73).rw("timer16:1", FUNC(h8_timer16_channel_device::tcnt_r), FUNC(h8_timer16_channel_device::tcnt_w));
|
||||
map(0xffff74, 0xffff77).rw("timer16:1", FUNC(h8_timer16_channel_device::tgr_r), FUNC(h8_timer16_channel_device::tgr_w));
|
||||
map(0xffff78, 0xffff78).rw("timer16:2", FUNC(h8_timer16_channel_device::tcr_r), FUNC(h8_timer16_channel_device::tcr_w));
|
||||
map(0xffff79, 0xffff79).rw("timer16:2", FUNC(h8_timer16_channel_device::tior_r), FUNC(h8_timer16_channel_device::tior_w));
|
||||
map(0xffff7a, 0xffff7a).rw("timer16:2", FUNC(h8_timer16_channel_device::tier_r), FUNC(h8_timer16_channel_device::tier_w));
|
||||
map(0xffff7b, 0xffff7b).rw("timer16:2", FUNC(h8_timer16_channel_device::tsr_r), FUNC(h8_timer16_channel_device::tsr_w));
|
||||
map(0xffff7c, 0xffff7d).rw("timer16:2", FUNC(h8_timer16_channel_device::tcnt_r), FUNC(h8_timer16_channel_device::tcnt_w));
|
||||
map(0xffff7e, 0xffff81).rw("timer16:2", FUNC(h8_timer16_channel_device::tgr_r), FUNC(h8_timer16_channel_device::tgr_w));
|
||||
map(0xffff82, 0xffff82).rw("timer16:3", FUNC(h8_timer16_channel_device::tcr_r), FUNC(h8_timer16_channel_device::tcr_w));
|
||||
map(0xffff83, 0xffff83).rw("timer16:3", FUNC(h8_timer16_channel_device::tior_r), FUNC(h8_timer16_channel_device::tior_w));
|
||||
map(0xffff84, 0xffff84).rw("timer16:3", FUNC(h8_timer16_channel_device::tier_r), FUNC(h8_timer16_channel_device::tier_w));
|
||||
map(0xffff85, 0xffff85).rw("timer16:3", FUNC(h8_timer16_channel_device::tsr_r), FUNC(h8_timer16_channel_device::tsr_w));
|
||||
map(0xffff86, 0xffff87).rw("timer16:3", FUNC(h8_timer16_channel_device::tcnt_r), FUNC(h8_timer16_channel_device::tcnt_w));
|
||||
map(0xffff88, 0xffff8b).rw("timer16:3", FUNC(h8_timer16_channel_device::tgr_r), FUNC(h8_timer16_channel_device::tgr_w));
|
||||
map(0xffff8c, 0xffff8f).rw("timer16:3", FUNC(h8_timer16_channel_device::tbr_r), FUNC(h8_timer16_channel_device::tbr_w));
|
||||
map(0xffff90, 0xffff90).rw("timer16", FUNC(h8_timer16_device::toer_r), FUNC(h8_timer16_device::toer_w));
|
||||
map(0xffff91, 0xffff91).rw("timer16", FUNC(h8_timer16_device::tocr_r), FUNC(h8_timer16_device::tocr_w));
|
||||
map(0xffff92, 0xffff92).rw("timer16:4", FUNC(h8_timer16_channel_device::tcr_r), FUNC(h8_timer16_channel_device::tcr_w));
|
||||
map(0xffff93, 0xffff93).rw("timer16:4", FUNC(h8_timer16_channel_device::tior_r), FUNC(h8_timer16_channel_device::tior_w));
|
||||
map(0xffff94, 0xffff94).rw("timer16:4", FUNC(h8_timer16_channel_device::tier_r), FUNC(h8_timer16_channel_device::tier_w));
|
||||
map(0xffff95, 0xffff95).rw("timer16:4", FUNC(h8_timer16_channel_device::tsr_r), FUNC(h8_timer16_channel_device::tsr_w));
|
||||
map(0xffff96, 0xffff97).rw("timer16:4", FUNC(h8_timer16_channel_device::tcnt_r), FUNC(h8_timer16_channel_device::tcnt_w));
|
||||
map(0xffff98, 0xffff9b).rw("timer16:4", FUNC(h8_timer16_channel_device::tgr_r), FUNC(h8_timer16_channel_device::tgr_w));
|
||||
map(0xffff9c, 0xffff9f).rw("timer16:4", FUNC(h8_timer16_channel_device::tbr_r), FUNC(h8_timer16_channel_device::tbr_w));
|
||||
|
||||
AM_RANGE(0xffffa8, 0xffffa9) AM_DEVREADWRITE( "watchdog", h8_watchdog_device, wd_r, wd_w )
|
||||
AM_RANGE(0xffffaa, 0xffffab) AM_DEVREADWRITE( "watchdog", h8_watchdog_device, rst_r, rst_w )
|
||||
AM_RANGE(0xffffac, 0xffffad) AM_READWRITE8( rtmcsr_r,rtmcsr_w,0x00ff)
|
||||
map(0xffffa8, 0xffffa9).rw("watchdog", FUNC(h8_watchdog_device::wd_r), FUNC(h8_watchdog_device::wd_w));
|
||||
map(0xffffaa, 0xffffab).rw("watchdog", FUNC(h8_watchdog_device::rst_r), FUNC(h8_watchdog_device::rst_w));
|
||||
map(0xffffad, 0xffffad).rw(this, FUNC(h83002_device::rtmcsr_r), FUNC(h83002_device::rtmcsr_w));
|
||||
|
||||
AM_RANGE(0xffffb0, 0xffffb1) AM_DEVREADWRITE8("sci0", h8_sci_device, smr_r, smr_w, 0xff00)
|
||||
AM_RANGE(0xffffb0, 0xffffb1) AM_DEVREADWRITE8("sci0", h8_sci_device, brr_r, brr_w, 0x00ff)
|
||||
AM_RANGE(0xffffb2, 0xffffb3) AM_DEVREADWRITE8("sci0", h8_sci_device, scr_r, scr_w, 0xff00)
|
||||
AM_RANGE(0xffffb2, 0xffffb3) AM_DEVREADWRITE8("sci0", h8_sci_device, tdr_r, tdr_w, 0x00ff)
|
||||
AM_RANGE(0xffffb4, 0xffffb5) AM_DEVREADWRITE8("sci0", h8_sci_device, ssr_r, ssr_w, 0xff00)
|
||||
AM_RANGE(0xffffb4, 0xffffb5) AM_DEVREAD8( "sci0", h8_sci_device, rdr_r, 0x00ff)
|
||||
AM_RANGE(0xffffb8, 0xffffb9) AM_DEVREADWRITE8("sci1", h8_sci_device, smr_r, smr_w, 0xff00)
|
||||
AM_RANGE(0xffffb8, 0xffffb9) AM_DEVREADWRITE8("sci1", h8_sci_device, brr_r, brr_w, 0x00ff)
|
||||
AM_RANGE(0xffffba, 0xffffbb) AM_DEVREADWRITE8("sci1", h8_sci_device, scr_r, scr_w, 0xff00)
|
||||
AM_RANGE(0xffffba, 0xffffbb) AM_DEVREADWRITE8("sci1", h8_sci_device, tdr_r, tdr_w, 0x00ff)
|
||||
AM_RANGE(0xffffbc, 0xffffbd) AM_DEVREADWRITE8("sci1", h8_sci_device, ssr_r, ssr_w, 0xff00)
|
||||
AM_RANGE(0xffffbc, 0xffffbd) AM_DEVREAD8( "sci1", h8_sci_device, rdr_r, 0x00ff)
|
||||
AM_RANGE(0xffffc4, 0xffffc5) AM_DEVWRITE8( "port4", h8_port_device, ddr_w, 0x00ff)
|
||||
AM_RANGE(0xffffc6, 0xffffc7) AM_DEVREADWRITE8("port4", h8_port_device, port_r, dr_w, 0x00ff)
|
||||
AM_RANGE(0xffffc8, 0xffffc9) AM_DEVWRITE8( "port6", h8_port_device, ddr_w, 0x00ff)
|
||||
AM_RANGE(0xffffca, 0xffffcb) AM_DEVREADWRITE8("port6", h8_port_device, port_r, dr_w, 0x00ff)
|
||||
AM_RANGE(0xffffcc, 0xffffcd) AM_DEVWRITE8( "port8", h8_port_device, ddr_w, 0x00ff)
|
||||
AM_RANGE(0xffffce, 0xffffcf) AM_DEVREAD8( "port7", h8_port_device, port_r, 0xff00)
|
||||
AM_RANGE(0xffffce, 0xffffcf) AM_DEVREADWRITE8("port8", h8_port_device, port_r, dr_w, 0x00ff)
|
||||
AM_RANGE(0xffffd0, 0xffffd1) AM_DEVWRITE8( "port9", h8_port_device, ddr_w, 0xff00)
|
||||
AM_RANGE(0xffffd0, 0xffffd1) AM_DEVWRITE8( "porta", h8_port_device, ddr_w, 0x00ff)
|
||||
AM_RANGE(0xffffd2, 0xffffd3) AM_DEVREADWRITE8("port9", h8_port_device, port_r, dr_w, 0xff00)
|
||||
AM_RANGE(0xffffd2, 0xffffd3) AM_DEVREADWRITE8("porta", h8_port_device, port_r, dr_w, 0x00ff)
|
||||
AM_RANGE(0xffffd4, 0xffffd5) AM_DEVWRITE8( "portb", h8_port_device, ddr_w, 0xff00)
|
||||
AM_RANGE(0xffffd6, 0xffffd7) AM_DEVREADWRITE8("portb", h8_port_device, port_r, dr_w, 0xff00)
|
||||
AM_RANGE(0xffffda, 0xffffdb) AM_DEVREADWRITE8("port4", h8_port_device, pcr_r, pcr_w, 0xff00)
|
||||
map(0xffffb0, 0xffffb0).rw("sci0", FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
|
||||
map(0xffffb1, 0xffffb1).rw("sci0", FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
|
||||
map(0xffffb2, 0xffffb2).rw("sci0", FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
|
||||
map(0xffffb3, 0xffffb3).rw("sci0", FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
|
||||
map(0xffffb4, 0xffffb4).rw("sci0", FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
|
||||
map(0xffffb5, 0xffffb5).r("sci0", FUNC(h8_sci_device::rdr_r));
|
||||
map(0xffffb8, 0xffffb8).rw("sci1", FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
|
||||
map(0xffffb9, 0xffffb9).rw("sci1", FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
|
||||
map(0xffffba, 0xffffba).rw("sci1", FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
|
||||
map(0xffffbb, 0xffffbb).rw("sci1", FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
|
||||
map(0xffffbc, 0xffffbc).rw("sci1", FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
|
||||
map(0xffffbd, 0xffffbd).r("sci1", FUNC(h8_sci_device::rdr_r));
|
||||
map(0xffffc5, 0xffffc5).w("port4", FUNC(h8_port_device::ddr_w));
|
||||
map(0xffffc7, 0xffffc7).rw("port4", FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffffc9, 0xffffc9).w("port6", FUNC(h8_port_device::ddr_w));
|
||||
map(0xffffcb, 0xffffcb).rw("port6", FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffffcd, 0xffffcd).w("port8", FUNC(h8_port_device::ddr_w));
|
||||
map(0xffffce, 0xffffce).r("port7", FUNC(h8_port_device::port_r));
|
||||
map(0xffffcf, 0xffffcf).rw("port8", FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffffd0, 0xffffd0).w("port9", FUNC(h8_port_device::ddr_w));
|
||||
map(0xffffd1, 0xffffd1).w("porta", FUNC(h8_port_device::ddr_w));
|
||||
map(0xffffd2, 0xffffd2).rw("port9", FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffffd3, 0xffffd3).rw("porta", FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffffd4, 0xffffd4).w("portb", FUNC(h8_port_device::ddr_w));
|
||||
map(0xffffd6, 0xffffd6).rw("portb", FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffffda, 0xffffda).rw("port4", FUNC(h8_port_device::pcr_r), FUNC(h8_port_device::pcr_w));
|
||||
|
||||
AM_RANGE(0xffffe0, 0xffffe7) AM_DEVREAD8( "adc", h8_adc_device, addr8_r, 0xffff)
|
||||
AM_RANGE(0xffffe8, 0xffffe9) AM_DEVREADWRITE8("adc", h8_adc_device, adcsr_r, adcsr_w, 0xff00)
|
||||
AM_RANGE(0xffffe8, 0xffffe9) AM_DEVREADWRITE8("adc", h8_adc_device, adcr_r, adcr_w, 0x00ff)
|
||||
map(0xffffe0, 0xffffe7).r("adc", FUNC(h8_adc_device::addr8_r));
|
||||
map(0xffffe8, 0xffffe8).rw("adc", FUNC(h8_adc_device::adcsr_r), FUNC(h8_adc_device::adcsr_w));
|
||||
map(0xffffe9, 0xffffe9).rw("adc", FUNC(h8_adc_device::adcr_r), FUNC(h8_adc_device::adcr_w));
|
||||
|
||||
AM_RANGE(0xfffff2, 0xfffff3) AM_READWRITE8( syscr_r, syscr_w, 0xff00)
|
||||
AM_RANGE(0xfffff4, 0xfffff5) AM_DEVREADWRITE8("intc", h8h_intc_device, iscr_r, iscr_w, 0xff00)
|
||||
AM_RANGE(0xfffff4, 0xfffff5) AM_DEVREADWRITE8("intc", h8h_intc_device, ier_r, ier_w, 0x00ff)
|
||||
AM_RANGE(0xfffff6, 0xfffff7) AM_DEVREADWRITE8("intc", h8h_intc_device, isr_r, isr_w, 0xff00)
|
||||
AM_RANGE(0xfffff8, 0xfffff9) AM_DEVREADWRITE8("intc", h8h_intc_device, icr_r, icr_w, 0xffff)
|
||||
ADDRESS_MAP_END
|
||||
map(0xfffff2, 0xfffff2).rw(this, FUNC(h83002_device::syscr_r), FUNC(h83002_device::syscr_w));
|
||||
map(0xfffff4, 0xfffff4).rw("intc", FUNC(h8h_intc_device::iscr_r), FUNC(h8h_intc_device::iscr_w));
|
||||
map(0xfffff5, 0xfffff5).rw("intc", FUNC(h8h_intc_device::ier_r), FUNC(h8h_intc_device::ier_w));
|
||||
map(0xfffff6, 0xfffff6).rw("intc", FUNC(h8h_intc_device::isr_r), FUNC(h8h_intc_device::isr_w));
|
||||
map(0xfffff8, 0xfffff9).rw("intc", FUNC(h8h_intc_device::icr_r), FUNC(h8h_intc_device::icr_w));
|
||||
}
|
||||
|
||||
MACHINE_CONFIG_START(h83002_device::device_add_mconfig)
|
||||
MCFG_H8H_INTC_ADD("intc")
|
||||
|
||||
@ -46,94 +46,95 @@ h83007_device::h83007_device(const machine_config &mconfig, const char *tag, dev
|
||||
{
|
||||
}
|
||||
|
||||
ADDRESS_MAP_START(h83006_device::map)
|
||||
AM_RANGE(0xfee002, 0xfee003) AM_DEVWRITE8( "port4", h8_port_device, ddr_w, 0x00ff)
|
||||
AM_RANGE(0xfee004, 0xfee005) AM_DEVWRITE8( "port6", h8_port_device, ddr_w, 0x00ff)
|
||||
AM_RANGE(0xfee006, 0xfee007) AM_DEVWRITE8( "port8", h8_port_device, ddr_w, 0x00ff)
|
||||
AM_RANGE(0xfee008, 0xfee009) AM_DEVWRITE8( "port9", h8_port_device, ddr_w, 0xff00)
|
||||
AM_RANGE(0xfee008, 0xfee009) AM_DEVWRITE8( "porta", h8_port_device, ddr_w, 0x00ff)
|
||||
AM_RANGE(0xfee00a, 0xfee00b) AM_DEVWRITE8( "portb", h8_port_device, ddr_w, 0xff00)
|
||||
void h83006_device::map(address_map &map)
|
||||
{
|
||||
map(0xfee003, 0xfee003).w("port4", FUNC(h8_port_device::ddr_w));
|
||||
map(0xfee005, 0xfee005).w("port6", FUNC(h8_port_device::ddr_w));
|
||||
map(0xfee007, 0xfee007).w("port8", FUNC(h8_port_device::ddr_w));
|
||||
map(0xfee008, 0xfee008).w("port9", FUNC(h8_port_device::ddr_w));
|
||||
map(0xfee009, 0xfee009).w("porta", FUNC(h8_port_device::ddr_w));
|
||||
map(0xfee00a, 0xfee00a).w("portb", FUNC(h8_port_device::ddr_w));
|
||||
|
||||
AM_RANGE(0xfee012, 0xfee013) AM_READWRITE8( syscr_r, syscr_w, 0xff00)
|
||||
AM_RANGE(0xfee014, 0xfee015) AM_DEVREADWRITE8("intc", h8h_intc_device, iscr_r, iscr_w, 0xff00)
|
||||
AM_RANGE(0xfee014, 0xfee015) AM_DEVREADWRITE8("intc", h8h_intc_device, ier_r, ier_w, 0x00ff)
|
||||
AM_RANGE(0xfee016, 0xfee017) AM_DEVREADWRITE8("intc", h8h_intc_device, isr_r, isr_w, 0xff00)
|
||||
AM_RANGE(0xfee018, 0xfee019) AM_DEVREADWRITE8("intc", h8h_intc_device, icr_r, icr_w, 0xffff)
|
||||
map(0xfee012, 0xfee012).rw(this, FUNC(h83006_device::syscr_r), FUNC(h83006_device::syscr_w));
|
||||
map(0xfee014, 0xfee014).rw("intc", FUNC(h8h_intc_device::iscr_r), FUNC(h8h_intc_device::iscr_w));
|
||||
map(0xfee015, 0xfee015).rw("intc", FUNC(h8h_intc_device::ier_r), FUNC(h8h_intc_device::ier_w));
|
||||
map(0xfee016, 0xfee016).rw("intc", FUNC(h8h_intc_device::isr_r), FUNC(h8h_intc_device::isr_w));
|
||||
map(0xfee018, 0xfee019).rw("intc", FUNC(h8h_intc_device::icr_r), FUNC(h8h_intc_device::icr_w));
|
||||
|
||||
AM_RANGE(0xfee03e, 0xfee03f) AM_DEVREADWRITE8("port4", h8_port_device, pcr_r, pcr_w, 0xff00)
|
||||
map(0xfee03e, 0xfee03e).rw("port4", FUNC(h8_port_device::pcr_r), FUNC(h8_port_device::pcr_w));
|
||||
|
||||
AM_RANGE(ram_start, 0xffff1f) AM_RAM
|
||||
map(ram_start, 0xffff1f).ram();
|
||||
|
||||
AM_RANGE(0xffff60, 0xffff61) AM_DEVREADWRITE8("timer16", h8_timer16_device, tstr_r, tstr_w, 0xff00)
|
||||
AM_RANGE(0xffff60, 0xffff61) AM_DEVREADWRITE8("timer16", h8_timer16_device, tsyr_r, tsyr_w, 0x00ff)
|
||||
AM_RANGE(0xffff62, 0xffff63) AM_DEVREADWRITE8("timer16", h8_timer16_device, tmdr_r, tmdr_w, 0xff00)
|
||||
AM_RANGE(0xffff62, 0xffff63) AM_DEVWRITE8( "timer16", h8_timer16_device, tolr_w, 0x00ff)
|
||||
AM_RANGE(0xffff64, 0xffff65) AM_DEVREADWRITE8("timer16", h8_timer16_device, tisr_r, tisr_w, 0xffff)
|
||||
AM_RANGE(0xffff66, 0xffff67) AM_DEVREADWRITE8("timer16", h8_timer16_device, tisrc_r, tisrc_w, 0xff00)
|
||||
AM_RANGE(0xffff68, 0xffff69) AM_DEVREADWRITE8("timer16:0", h8_timer16_channel_device, tcr_r, tcr_w, 0xff00)
|
||||
AM_RANGE(0xffff68, 0xffff69) AM_DEVREADWRITE8("timer16:0", h8_timer16_channel_device, tior_r, tior_w, 0x00ff)
|
||||
AM_RANGE(0xffff6a, 0xffff6b) AM_DEVREADWRITE( "timer16:0", h8_timer16_channel_device, tcnt_r, tcnt_w )
|
||||
AM_RANGE(0xffff6c, 0xffff6f) AM_DEVREADWRITE( "timer16:0", h8_timer16_channel_device, tgr_r, tgr_w )
|
||||
AM_RANGE(0xffff70, 0xffff71) AM_DEVREADWRITE8("timer16:1", h8_timer16_channel_device, tcr_r, tcr_w, 0xff00)
|
||||
AM_RANGE(0xffff70, 0xffff71) AM_DEVREADWRITE8("timer16:1", h8_timer16_channel_device, tior_r, tior_w, 0x00ff)
|
||||
AM_RANGE(0xffff72, 0xffff73) AM_DEVREADWRITE( "timer16:1", h8_timer16_channel_device, tcnt_r, tcnt_w )
|
||||
AM_RANGE(0xffff74, 0xffff77) AM_DEVREADWRITE( "timer16:1", h8_timer16_channel_device, tgr_r, tgr_w )
|
||||
AM_RANGE(0xffff78, 0xffff79) AM_DEVREADWRITE8("timer16:2", h8_timer16_channel_device, tcr_r, tcr_w, 0xff00)
|
||||
AM_RANGE(0xffff78, 0xffff79) AM_DEVREADWRITE8("timer16:2", h8_timer16_channel_device, tior_r, tior_w, 0x00ff)
|
||||
AM_RANGE(0xffff7a, 0xffff7b) AM_DEVREADWRITE( "timer16:2", h8_timer16_channel_device, tcnt_r, tcnt_w )
|
||||
AM_RANGE(0xffff7c, 0xffff7f) AM_DEVREADWRITE( "timer16:2", h8_timer16_channel_device, tgr_r, tgr_w )
|
||||
AM_RANGE(0xffff80, 0xffff81) AM_DEVREADWRITE8("timer8_0", h8_timer8_channel_device, tcr_r, tcr_w, 0xff00)
|
||||
AM_RANGE(0xffff80, 0xffff81) AM_DEVREADWRITE8("timer8_1", h8_timer8_channel_device, tcr_r, tcr_w, 0x00ff)
|
||||
AM_RANGE(0xffff82, 0xffff83) AM_DEVREADWRITE8("timer8_0", h8_timer8_channel_device, tcsr_r, tcsr_w, 0xff00)
|
||||
AM_RANGE(0xffff82, 0xffff83) AM_DEVREADWRITE8("timer8_1", h8_timer8_channel_device, tcsr_r, tcsr_w, 0x00ff)
|
||||
AM_RANGE(0xffff84, 0xffff87) AM_DEVREADWRITE8("timer8_0", h8_timer8_channel_device, tcor_r, tcor_w, 0xff00)
|
||||
AM_RANGE(0xffff84, 0xffff87) AM_DEVREADWRITE8("timer8_1", h8_timer8_channel_device, tcor_r, tcor_w, 0x00ff)
|
||||
AM_RANGE(0xffff88, 0xffff89) AM_DEVREADWRITE8("timer8_0", h8_timer8_channel_device, tcnt_r, tcnt_w, 0xff00)
|
||||
AM_RANGE(0xffff88, 0xffff89) AM_DEVREADWRITE8("timer8_1", h8_timer8_channel_device, tcnt_r, tcnt_w, 0x00ff)
|
||||
AM_RANGE(0xffff8c, 0xffff8d) AM_DEVREADWRITE( "watchdog", h8_watchdog_device, wd_r, wd_w )
|
||||
AM_RANGE(0xffff8e, 0xffff8f) AM_DEVREADWRITE( "watchdog", h8_watchdog_device, rst_r, rst_w )
|
||||
AM_RANGE(0xffff90, 0xffff91) AM_DEVREADWRITE8("timer8_2", h8_timer8_channel_device, tcr_r, tcr_w, 0xff00)
|
||||
AM_RANGE(0xffff90, 0xffff91) AM_DEVREADWRITE8("timer8_3", h8_timer8_channel_device, tcr_r, tcr_w, 0x00ff)
|
||||
AM_RANGE(0xffff92, 0xffff93) AM_DEVREADWRITE8("timer8_2", h8_timer8_channel_device, tcsr_r, tcsr_w, 0xff00)
|
||||
AM_RANGE(0xffff92, 0xffff93) AM_DEVREADWRITE8("timer8_3", h8_timer8_channel_device, tcsr_r, tcsr_w, 0x00ff)
|
||||
AM_RANGE(0xffff94, 0xffff97) AM_DEVREADWRITE8("timer8_2", h8_timer8_channel_device, tcor_r, tcor_w, 0xff00)
|
||||
AM_RANGE(0xffff94, 0xffff97) AM_DEVREADWRITE8("timer8_3", h8_timer8_channel_device, tcor_r, tcor_w, 0x00ff)
|
||||
AM_RANGE(0xffff98, 0xffff99) AM_DEVREADWRITE8("timer8_2", h8_timer8_channel_device, tcnt_r, tcnt_w, 0xff00)
|
||||
AM_RANGE(0xffff98, 0xffff99) AM_DEVREADWRITE8("timer8_3", h8_timer8_channel_device, tcnt_r, tcnt_w, 0x00ff)
|
||||
map(0xffff60, 0xffff60).rw("timer16", FUNC(h8_timer16_device::tstr_r), FUNC(h8_timer16_device::tstr_w));
|
||||
map(0xffff61, 0xffff61).rw("timer16", FUNC(h8_timer16_device::tsyr_r), FUNC(h8_timer16_device::tsyr_w));
|
||||
map(0xffff62, 0xffff62).rw("timer16", FUNC(h8_timer16_device::tmdr_r), FUNC(h8_timer16_device::tmdr_w));
|
||||
map(0xffff63, 0xffff63).w("timer16", FUNC(h8_timer16_device::tolr_w));
|
||||
map(0xffff64, 0xffff65).rw("timer16", FUNC(h8_timer16_device::tisr_r), FUNC(h8_timer16_device::tisr_w));
|
||||
map(0xffff66, 0xffff66).rw("timer16", FUNC(h8_timer16_device::tisrc_r), FUNC(h8_timer16_device::tisrc_w));
|
||||
map(0xffff68, 0xffff68).rw("timer16:0", FUNC(h8_timer16_channel_device::tcr_r), FUNC(h8_timer16_channel_device::tcr_w));
|
||||
map(0xffff69, 0xffff69).rw("timer16:0", FUNC(h8_timer16_channel_device::tior_r), FUNC(h8_timer16_channel_device::tior_w));
|
||||
map(0xffff6a, 0xffff6b).rw("timer16:0", FUNC(h8_timer16_channel_device::tcnt_r), FUNC(h8_timer16_channel_device::tcnt_w));
|
||||
map(0xffff6c, 0xffff6f).rw("timer16:0", FUNC(h8_timer16_channel_device::tgr_r), FUNC(h8_timer16_channel_device::tgr_w));
|
||||
map(0xffff70, 0xffff70).rw("timer16:1", FUNC(h8_timer16_channel_device::tcr_r), FUNC(h8_timer16_channel_device::tcr_w));
|
||||
map(0xffff71, 0xffff71).rw("timer16:1", FUNC(h8_timer16_channel_device::tior_r), FUNC(h8_timer16_channel_device::tior_w));
|
||||
map(0xffff72, 0xffff73).rw("timer16:1", FUNC(h8_timer16_channel_device::tcnt_r), FUNC(h8_timer16_channel_device::tcnt_w));
|
||||
map(0xffff74, 0xffff77).rw("timer16:1", FUNC(h8_timer16_channel_device::tgr_r), FUNC(h8_timer16_channel_device::tgr_w));
|
||||
map(0xffff78, 0xffff78).rw("timer16:2", FUNC(h8_timer16_channel_device::tcr_r), FUNC(h8_timer16_channel_device::tcr_w));
|
||||
map(0xffff79, 0xffff79).rw("timer16:2", FUNC(h8_timer16_channel_device::tior_r), FUNC(h8_timer16_channel_device::tior_w));
|
||||
map(0xffff7a, 0xffff7b).rw("timer16:2", FUNC(h8_timer16_channel_device::tcnt_r), FUNC(h8_timer16_channel_device::tcnt_w));
|
||||
map(0xffff7c, 0xffff7f).rw("timer16:2", FUNC(h8_timer16_channel_device::tgr_r), FUNC(h8_timer16_channel_device::tgr_w));
|
||||
map(0xffff80, 0xffff80).rw("timer8_0", FUNC(h8_timer8_channel_device::tcr_r), FUNC(h8_timer8_channel_device::tcr_w));
|
||||
map(0xffff81, 0xffff81).rw("timer8_1", FUNC(h8_timer8_channel_device::tcr_r), FUNC(h8_timer8_channel_device::tcr_w));
|
||||
map(0xffff82, 0xffff82).rw("timer8_0", FUNC(h8_timer8_channel_device::tcsr_r), FUNC(h8_timer8_channel_device::tcsr_w));
|
||||
map(0xffff83, 0xffff83).rw("timer8_1", FUNC(h8_timer8_channel_device::tcsr_r), FUNC(h8_timer8_channel_device::tcsr_w));
|
||||
map(0xffff84, 0xffff87).rw("timer8_0", FUNC(h8_timer8_channel_device::tcor_r), FUNC(h8_timer8_channel_device::tcor_w)).umask16(0xff00);
|
||||
map(0xffff84, 0xffff87).rw("timer8_1", FUNC(h8_timer8_channel_device::tcor_r), FUNC(h8_timer8_channel_device::tcor_w)).umask16(0x00ff);
|
||||
map(0xffff88, 0xffff88).rw("timer8_0", FUNC(h8_timer8_channel_device::tcnt_r), FUNC(h8_timer8_channel_device::tcnt_w));
|
||||
map(0xffff89, 0xffff89).rw("timer8_1", FUNC(h8_timer8_channel_device::tcnt_r), FUNC(h8_timer8_channel_device::tcnt_w));
|
||||
map(0xffff8c, 0xffff8d).rw("watchdog", FUNC(h8_watchdog_device::wd_r), FUNC(h8_watchdog_device::wd_w));
|
||||
map(0xffff8e, 0xffff8f).rw("watchdog", FUNC(h8_watchdog_device::rst_r), FUNC(h8_watchdog_device::rst_w));
|
||||
map(0xffff90, 0xffff90).rw("timer8_2", FUNC(h8_timer8_channel_device::tcr_r), FUNC(h8_timer8_channel_device::tcr_w));
|
||||
map(0xffff91, 0xffff91).rw("timer8_3", FUNC(h8_timer8_channel_device::tcr_r), FUNC(h8_timer8_channel_device::tcr_w));
|
||||
map(0xffff92, 0xffff92).rw("timer8_2", FUNC(h8_timer8_channel_device::tcsr_r), FUNC(h8_timer8_channel_device::tcsr_w));
|
||||
map(0xffff93, 0xffff93).rw("timer8_3", FUNC(h8_timer8_channel_device::tcsr_r), FUNC(h8_timer8_channel_device::tcsr_w));
|
||||
map(0xffff94, 0xffff97).rw("timer8_2", FUNC(h8_timer8_channel_device::tcor_r), FUNC(h8_timer8_channel_device::tcor_w)).umask16(0xff00);
|
||||
map(0xffff94, 0xffff97).rw("timer8_3", FUNC(h8_timer8_channel_device::tcor_r), FUNC(h8_timer8_channel_device::tcor_w)).umask16(0x00ff);
|
||||
map(0xffff98, 0xffff98).rw("timer8_2", FUNC(h8_timer8_channel_device::tcnt_r), FUNC(h8_timer8_channel_device::tcnt_w));
|
||||
map(0xffff99, 0xffff99).rw("timer8_3", FUNC(h8_timer8_channel_device::tcnt_r), FUNC(h8_timer8_channel_device::tcnt_w));
|
||||
|
||||
AM_RANGE(0xffffb0, 0xffffb1) AM_DEVREADWRITE8("sci0", h8_sci_device, smr_r, smr_w, 0xff00)
|
||||
AM_RANGE(0xffffb0, 0xffffb1) AM_DEVREADWRITE8("sci0", h8_sci_device, brr_r, brr_w, 0x00ff)
|
||||
AM_RANGE(0xffffb2, 0xffffb3) AM_DEVREADWRITE8("sci0", h8_sci_device, scr_r, scr_w, 0xff00)
|
||||
AM_RANGE(0xffffb2, 0xffffb3) AM_DEVREADWRITE8("sci0", h8_sci_device, tdr_r, tdr_w, 0x00ff)
|
||||
AM_RANGE(0xffffb4, 0xffffb5) AM_DEVREADWRITE8("sci0", h8_sci_device, ssr_r, ssr_w, 0xff00)
|
||||
AM_RANGE(0xffffb4, 0xffffb5) AM_DEVREAD8( "sci0", h8_sci_device, rdr_r, 0x00ff)
|
||||
AM_RANGE(0xffffb6, 0xffffb7) AM_DEVREADWRITE8("sci0", h8_sci_device, scmr_r, scmr_w, 0xff00)
|
||||
AM_RANGE(0xffffb8, 0xffffb9) AM_DEVREADWRITE8("sci1", h8_sci_device, smr_r, smr_w, 0xff00)
|
||||
AM_RANGE(0xffffb8, 0xffffb9) AM_DEVREADWRITE8("sci1", h8_sci_device, brr_r, brr_w, 0x00ff)
|
||||
AM_RANGE(0xffffba, 0xffffbb) AM_DEVREADWRITE8("sci1", h8_sci_device, scr_r, scr_w, 0xff00)
|
||||
AM_RANGE(0xffffba, 0xffffbb) AM_DEVREADWRITE8("sci1", h8_sci_device, tdr_r, tdr_w, 0x00ff)
|
||||
AM_RANGE(0xffffbc, 0xffffbd) AM_DEVREADWRITE8("sci1", h8_sci_device, ssr_r, ssr_w, 0xff00)
|
||||
AM_RANGE(0xffffbc, 0xffffbd) AM_DEVREAD8( "sci1", h8_sci_device, rdr_r, 0x00ff)
|
||||
AM_RANGE(0xffffbe, 0xffffbf) AM_DEVREADWRITE8("sci1", h8_sci_device, scmr_r, scmr_w, 0xff00)
|
||||
AM_RANGE(0xffffc0, 0xffffc1) AM_DEVREADWRITE8("sci2", h8_sci_device, smr_r, smr_w, 0xff00)
|
||||
AM_RANGE(0xffffc0, 0xffffc1) AM_DEVREADWRITE8("sci2", h8_sci_device, brr_r, brr_w, 0x00ff)
|
||||
AM_RANGE(0xffffc2, 0xffffc3) AM_DEVREADWRITE8("sci2", h8_sci_device, scr_r, scr_w, 0xff00)
|
||||
AM_RANGE(0xffffc2, 0xffffc3) AM_DEVREADWRITE8("sci2", h8_sci_device, tdr_r, tdr_w, 0x00ff)
|
||||
AM_RANGE(0xffffc4, 0xffffc5) AM_DEVREADWRITE8("sci2", h8_sci_device, ssr_r, ssr_w, 0xff00)
|
||||
AM_RANGE(0xffffc4, 0xffffc5) AM_DEVREAD8( "sci2", h8_sci_device, rdr_r, 0x00ff)
|
||||
AM_RANGE(0xffffc6, 0xffffc7) AM_DEVREADWRITE8("sci2", h8_sci_device, scmr_r, scmr_w, 0xff00)
|
||||
AM_RANGE(0xffffd2, 0xffffd3) AM_DEVREADWRITE8("port4", h8_port_device, port_r, dr_w, 0x00ff)
|
||||
AM_RANGE(0xffffd4, 0xffffd5) AM_DEVREADWRITE8("port6", h8_port_device, port_r, dr_w, 0x00ff)
|
||||
AM_RANGE(0xffffd6, 0xffffd7) AM_DEVREADWRITE8("port7", h8_port_device, port_r, dr_w, 0xff00)
|
||||
AM_RANGE(0xffffd6, 0xffffd7) AM_DEVREADWRITE8("port8", h8_port_device, port_r, dr_w, 0x00ff)
|
||||
AM_RANGE(0xffffd8, 0xffffd9) AM_DEVREADWRITE8("port9", h8_port_device, port_r, dr_w, 0xff00)
|
||||
AM_RANGE(0xffffd8, 0xffffd9) AM_DEVREADWRITE8("porta", h8_port_device, port_r, dr_w, 0x00ff)
|
||||
AM_RANGE(0xffffda, 0xffffdb) AM_DEVREADWRITE8("portb", h8_port_device, port_r, dr_w, 0xff00)
|
||||
map(0xffffb0, 0xffffb0).rw("sci0", FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
|
||||
map(0xffffb1, 0xffffb1).rw("sci0", FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
|
||||
map(0xffffb2, 0xffffb2).rw("sci0", FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
|
||||
map(0xffffb3, 0xffffb3).rw("sci0", FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
|
||||
map(0xffffb4, 0xffffb4).rw("sci0", FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
|
||||
map(0xffffb5, 0xffffb5).r("sci0", FUNC(h8_sci_device::rdr_r));
|
||||
map(0xffffb6, 0xffffb6).rw("sci0", FUNC(h8_sci_device::scmr_r), FUNC(h8_sci_device::scmr_w));
|
||||
map(0xffffb8, 0xffffb8).rw("sci1", FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
|
||||
map(0xffffb9, 0xffffb9).rw("sci1", FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
|
||||
map(0xffffba, 0xffffba).rw("sci1", FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
|
||||
map(0xffffbb, 0xffffbb).rw("sci1", FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
|
||||
map(0xffffbc, 0xffffbc).rw("sci1", FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
|
||||
map(0xffffbd, 0xffffbd).r("sci1", FUNC(h8_sci_device::rdr_r));
|
||||
map(0xffffbe, 0xffffbe).rw("sci1", FUNC(h8_sci_device::scmr_r), FUNC(h8_sci_device::scmr_w));
|
||||
map(0xffffc0, 0xffffc0).rw("sci2", FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
|
||||
map(0xffffc1, 0xffffc1).rw("sci2", FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
|
||||
map(0xffffc2, 0xffffc2).rw("sci2", FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
|
||||
map(0xffffc3, 0xffffc3).rw("sci2", FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
|
||||
map(0xffffc4, 0xffffc4).rw("sci2", FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
|
||||
map(0xffffc5, 0xffffc5).r("sci2", FUNC(h8_sci_device::rdr_r));
|
||||
map(0xffffc6, 0xffffc6).rw("sci2", FUNC(h8_sci_device::scmr_r), FUNC(h8_sci_device::scmr_w));
|
||||
map(0xffffd3, 0xffffd3).rw("port4", FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffffd5, 0xffffd5).rw("port6", FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffffd6, 0xffffd6).rw("port7", FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffffd7, 0xffffd7).rw("port8", FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffffd8, 0xffffd8).rw("port9", FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffffd9, 0xffffd9).rw("porta", FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffffda, 0xffffda).rw("portb", FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
|
||||
|
||||
AM_RANGE(0xffffe0, 0xffffe7) AM_DEVREAD8( "adc", h8_adc_device, addr8_r, 0xffff)
|
||||
AM_RANGE(0xffffe8, 0xffffe9) AM_DEVREADWRITE8("adc", h8_adc_device, adcsr_r, adcsr_w, 0xff00)
|
||||
AM_RANGE(0xffffe8, 0xffffe9) AM_DEVREADWRITE8("adc", h8_adc_device, adcr_r, adcr_w, 0x00ff)
|
||||
ADDRESS_MAP_END
|
||||
map(0xffffe0, 0xffffe7).r("adc", FUNC(h8_adc_device::addr8_r));
|
||||
map(0xffffe8, 0xffffe8).rw("adc", FUNC(h8_adc_device::adcsr_r), FUNC(h8_adc_device::adcsr_w));
|
||||
map(0xffffe9, 0xffffe9).rw("adc", FUNC(h8_adc_device::adcr_r), FUNC(h8_adc_device::adcr_w));
|
||||
}
|
||||
|
||||
MACHINE_CONFIG_START(h83006_device::device_add_mconfig)
|
||||
MCFG_H8H_INTC_ADD("intc")
|
||||
|
||||
@ -31,87 +31,88 @@ h83008_device::h83008_device(const machine_config &mconfig, const char *tag, dev
|
||||
{
|
||||
}
|
||||
|
||||
ADDRESS_MAP_START(h83008_device::map)
|
||||
AM_RANGE(0xfee002, 0xfee003) AM_DEVWRITE8( "port4", h8_port_device, ddr_w, 0x00ff)
|
||||
AM_RANGE(0xfee004, 0xfee005) AM_DEVWRITE8( "port6", h8_port_device, ddr_w, 0x00ff)
|
||||
AM_RANGE(0xfee006, 0xfee007) AM_DEVWRITE8( "port8", h8_port_device, ddr_w, 0x00ff)
|
||||
AM_RANGE(0xfee008, 0xfee009) AM_DEVWRITE8( "port9", h8_port_device, ddr_w, 0xff00)
|
||||
AM_RANGE(0xfee008, 0xfee009) AM_DEVWRITE8( "porta", h8_port_device, ddr_w, 0x00ff)
|
||||
AM_RANGE(0xfee00a, 0xfee00b) AM_DEVWRITE8( "portb", h8_port_device, ddr_w, 0xff00)
|
||||
void h83008_device::map(address_map &map)
|
||||
{
|
||||
map(0xfee003, 0xfee003).w("port4", FUNC(h8_port_device::ddr_w));
|
||||
map(0xfee005, 0xfee005).w("port6", FUNC(h8_port_device::ddr_w));
|
||||
map(0xfee007, 0xfee007).w("port8", FUNC(h8_port_device::ddr_w));
|
||||
map(0xfee008, 0xfee008).w("port9", FUNC(h8_port_device::ddr_w));
|
||||
map(0xfee009, 0xfee009).w("porta", FUNC(h8_port_device::ddr_w));
|
||||
map(0xfee00a, 0xfee00a).w("portb", FUNC(h8_port_device::ddr_w));
|
||||
|
||||
AM_RANGE(0xfee012, 0xfee013) AM_READWRITE8( syscr_r, syscr_w, 0xff00)
|
||||
AM_RANGE(0xfee014, 0xfee015) AM_DEVREADWRITE8("intc", h8h_intc_device, iscr_r, iscr_w, 0xff00)
|
||||
AM_RANGE(0xfee014, 0xfee015) AM_DEVREADWRITE8("intc", h8h_intc_device, ier_r, ier_w, 0x00ff)
|
||||
AM_RANGE(0xfee016, 0xfee017) AM_DEVREADWRITE8("intc", h8h_intc_device, isr_r, isr_w, 0xff00)
|
||||
AM_RANGE(0xfee018, 0xfee019) AM_DEVREADWRITE8("intc", h8h_intc_device, icr_r, icr_w, 0xffff)
|
||||
map(0xfee012, 0xfee012).rw(this, FUNC(h83008_device::syscr_r), FUNC(h83008_device::syscr_w));
|
||||
map(0xfee014, 0xfee014).rw("intc", FUNC(h8h_intc_device::iscr_r), FUNC(h8h_intc_device::iscr_w));
|
||||
map(0xfee015, 0xfee015).rw("intc", FUNC(h8h_intc_device::ier_r), FUNC(h8h_intc_device::ier_w));
|
||||
map(0xfee016, 0xfee016).rw("intc", FUNC(h8h_intc_device::isr_r), FUNC(h8h_intc_device::isr_w));
|
||||
map(0xfee018, 0xfee019).rw("intc", FUNC(h8h_intc_device::icr_r), FUNC(h8h_intc_device::icr_w));
|
||||
|
||||
AM_RANGE(0xfee03e, 0xfee03f) AM_DEVREADWRITE8("port4", h8_port_device, pcr_r, pcr_w, 0xff00)
|
||||
map(0xfee03e, 0xfee03e).rw("port4", FUNC(h8_port_device::pcr_r), FUNC(h8_port_device::pcr_w));
|
||||
|
||||
AM_RANGE(0xffef20, 0xffff1f) AM_RAM
|
||||
map(0xffef20, 0xffff1f).ram();
|
||||
|
||||
AM_RANGE(0xffff60, 0xffff61) AM_DEVREADWRITE8("timer16", h8_timer16_device, tstr_r, tstr_w, 0xff00)
|
||||
AM_RANGE(0xffff60, 0xffff61) AM_DEVREADWRITE8("timer16", h8_timer16_device, tsyr_r, tsyr_w, 0x00ff)
|
||||
AM_RANGE(0xffff62, 0xffff63) AM_DEVREADWRITE8("timer16", h8_timer16_device, tmdr_r, tmdr_w, 0xff00)
|
||||
AM_RANGE(0xffff62, 0xffff63) AM_DEVWRITE8( "timer16", h8_timer16_device, tolr_w, 0x00ff)
|
||||
AM_RANGE(0xffff64, 0xffff65) AM_DEVREADWRITE8("timer16", h8_timer16_device, tisr_r, tisr_w, 0xffff)
|
||||
AM_RANGE(0xffff66, 0xffff67) AM_DEVREADWRITE8("timer16", h8_timer16_device, tisrc_r, tisrc_w, 0xff00)
|
||||
AM_RANGE(0xffff68, 0xffff69) AM_DEVREADWRITE8("timer16:0", h8_timer16_channel_device, tcr_r, tcr_w, 0xff00)
|
||||
AM_RANGE(0xffff68, 0xffff69) AM_DEVREADWRITE8("timer16:0", h8_timer16_channel_device, tior_r, tior_w, 0x00ff)
|
||||
AM_RANGE(0xffff6a, 0xffff6b) AM_DEVREADWRITE( "timer16:0", h8_timer16_channel_device, tcnt_r, tcnt_w )
|
||||
AM_RANGE(0xffff6c, 0xffff6f) AM_DEVREADWRITE( "timer16:0", h8_timer16_channel_device, tgr_r, tgr_w )
|
||||
AM_RANGE(0xffff70, 0xffff71) AM_DEVREADWRITE8("timer16:1", h8_timer16_channel_device, tcr_r, tcr_w, 0xff00)
|
||||
AM_RANGE(0xffff70, 0xffff71) AM_DEVREADWRITE8("timer16:1", h8_timer16_channel_device, tior_r, tior_w, 0x00ff)
|
||||
AM_RANGE(0xffff72, 0xffff73) AM_DEVREADWRITE( "timer16:1", h8_timer16_channel_device, tcnt_r, tcnt_w )
|
||||
AM_RANGE(0xffff74, 0xffff77) AM_DEVREADWRITE( "timer16:1", h8_timer16_channel_device, tgr_r, tgr_w )
|
||||
AM_RANGE(0xffff78, 0xffff79) AM_DEVREADWRITE8("timer16:2", h8_timer16_channel_device, tcr_r, tcr_w, 0xff00)
|
||||
AM_RANGE(0xffff78, 0xffff79) AM_DEVREADWRITE8("timer16:2", h8_timer16_channel_device, tior_r, tior_w, 0x00ff)
|
||||
AM_RANGE(0xffff7a, 0xffff7b) AM_DEVREADWRITE( "timer16:2", h8_timer16_channel_device, tcnt_r, tcnt_w )
|
||||
AM_RANGE(0xffff7c, 0xffff7f) AM_DEVREADWRITE( "timer16:2", h8_timer16_channel_device, tgr_r, tgr_w )
|
||||
AM_RANGE(0xffff80, 0xffff81) AM_DEVREADWRITE8("timer8_0", h8_timer8_channel_device, tcr_r, tcr_w, 0xff00)
|
||||
AM_RANGE(0xffff80, 0xffff81) AM_DEVREADWRITE8("timer8_1", h8_timer8_channel_device, tcr_r, tcr_w, 0x00ff)
|
||||
AM_RANGE(0xffff82, 0xffff83) AM_DEVREADWRITE8("timer8_0", h8_timer8_channel_device, tcsr_r, tcsr_w, 0xff00)
|
||||
AM_RANGE(0xffff82, 0xffff83) AM_DEVREADWRITE8("timer8_1", h8_timer8_channel_device, tcsr_r, tcsr_w, 0x00ff)
|
||||
AM_RANGE(0xffff84, 0xffff87) AM_DEVREADWRITE8("timer8_0", h8_timer8_channel_device, tcor_r, tcor_w, 0xff00)
|
||||
AM_RANGE(0xffff84, 0xffff87) AM_DEVREADWRITE8("timer8_1", h8_timer8_channel_device, tcor_r, tcor_w, 0x00ff)
|
||||
AM_RANGE(0xffff88, 0xffff89) AM_DEVREADWRITE8("timer8_0", h8_timer8_channel_device, tcnt_r, tcnt_w, 0xff00)
|
||||
AM_RANGE(0xffff88, 0xffff89) AM_DEVREADWRITE8("timer8_1", h8_timer8_channel_device, tcnt_r, tcnt_w, 0x00ff)
|
||||
AM_RANGE(0xffff8c, 0xffff8d) AM_DEVREADWRITE( "watchdog", h8_watchdog_device, wd_r, wd_w )
|
||||
AM_RANGE(0xffff8e, 0xffff8f) AM_DEVREADWRITE( "watchdog", h8_watchdog_device, rst_r, rst_w )
|
||||
AM_RANGE(0xffff90, 0xffff91) AM_DEVREADWRITE8("timer8_2", h8_timer8_channel_device, tcr_r, tcr_w, 0xff00)
|
||||
AM_RANGE(0xffff90, 0xffff91) AM_DEVREADWRITE8("timer8_3", h8_timer8_channel_device, tcr_r, tcr_w, 0x00ff)
|
||||
AM_RANGE(0xffff92, 0xffff93) AM_DEVREADWRITE8("timer8_2", h8_timer8_channel_device, tcsr_r, tcsr_w, 0xff00)
|
||||
AM_RANGE(0xffff92, 0xffff93) AM_DEVREADWRITE8("timer8_3", h8_timer8_channel_device, tcsr_r, tcsr_w, 0x00ff)
|
||||
AM_RANGE(0xffff94, 0xffff97) AM_DEVREADWRITE8("timer8_2", h8_timer8_channel_device, tcor_r, tcor_w, 0xff00)
|
||||
AM_RANGE(0xffff94, 0xffff97) AM_DEVREADWRITE8("timer8_3", h8_timer8_channel_device, tcor_r, tcor_w, 0x00ff)
|
||||
AM_RANGE(0xffff98, 0xffff99) AM_DEVREADWRITE8("timer8_2", h8_timer8_channel_device, tcnt_r, tcnt_w, 0xff00)
|
||||
AM_RANGE(0xffff98, 0xffff99) AM_DEVREADWRITE8("timer8_3", h8_timer8_channel_device, tcnt_r, tcnt_w, 0x00ff)
|
||||
map(0xffff60, 0xffff60).rw("timer16", FUNC(h8_timer16_device::tstr_r), FUNC(h8_timer16_device::tstr_w));
|
||||
map(0xffff61, 0xffff61).rw("timer16", FUNC(h8_timer16_device::tsyr_r), FUNC(h8_timer16_device::tsyr_w));
|
||||
map(0xffff62, 0xffff62).rw("timer16", FUNC(h8_timer16_device::tmdr_r), FUNC(h8_timer16_device::tmdr_w));
|
||||
map(0xffff63, 0xffff63).w("timer16", FUNC(h8_timer16_device::tolr_w));
|
||||
map(0xffff64, 0xffff65).rw("timer16", FUNC(h8_timer16_device::tisr_r), FUNC(h8_timer16_device::tisr_w));
|
||||
map(0xffff66, 0xffff66).rw("timer16", FUNC(h8_timer16_device::tisrc_r), FUNC(h8_timer16_device::tisrc_w));
|
||||
map(0xffff68, 0xffff68).rw("timer16:0", FUNC(h8_timer16_channel_device::tcr_r), FUNC(h8_timer16_channel_device::tcr_w));
|
||||
map(0xffff69, 0xffff69).rw("timer16:0", FUNC(h8_timer16_channel_device::tior_r), FUNC(h8_timer16_channel_device::tior_w));
|
||||
map(0xffff6a, 0xffff6b).rw("timer16:0", FUNC(h8_timer16_channel_device::tcnt_r), FUNC(h8_timer16_channel_device::tcnt_w));
|
||||
map(0xffff6c, 0xffff6f).rw("timer16:0", FUNC(h8_timer16_channel_device::tgr_r), FUNC(h8_timer16_channel_device::tgr_w));
|
||||
map(0xffff70, 0xffff70).rw("timer16:1", FUNC(h8_timer16_channel_device::tcr_r), FUNC(h8_timer16_channel_device::tcr_w));
|
||||
map(0xffff71, 0xffff71).rw("timer16:1", FUNC(h8_timer16_channel_device::tior_r), FUNC(h8_timer16_channel_device::tior_w));
|
||||
map(0xffff72, 0xffff73).rw("timer16:1", FUNC(h8_timer16_channel_device::tcnt_r), FUNC(h8_timer16_channel_device::tcnt_w));
|
||||
map(0xffff74, 0xffff77).rw("timer16:1", FUNC(h8_timer16_channel_device::tgr_r), FUNC(h8_timer16_channel_device::tgr_w));
|
||||
map(0xffff78, 0xffff78).rw("timer16:2", FUNC(h8_timer16_channel_device::tcr_r), FUNC(h8_timer16_channel_device::tcr_w));
|
||||
map(0xffff79, 0xffff79).rw("timer16:2", FUNC(h8_timer16_channel_device::tior_r), FUNC(h8_timer16_channel_device::tior_w));
|
||||
map(0xffff7a, 0xffff7b).rw("timer16:2", FUNC(h8_timer16_channel_device::tcnt_r), FUNC(h8_timer16_channel_device::tcnt_w));
|
||||
map(0xffff7c, 0xffff7f).rw("timer16:2", FUNC(h8_timer16_channel_device::tgr_r), FUNC(h8_timer16_channel_device::tgr_w));
|
||||
map(0xffff80, 0xffff80).rw("timer8_0", FUNC(h8_timer8_channel_device::tcr_r), FUNC(h8_timer8_channel_device::tcr_w));
|
||||
map(0xffff81, 0xffff81).rw("timer8_1", FUNC(h8_timer8_channel_device::tcr_r), FUNC(h8_timer8_channel_device::tcr_w));
|
||||
map(0xffff82, 0xffff82).rw("timer8_0", FUNC(h8_timer8_channel_device::tcsr_r), FUNC(h8_timer8_channel_device::tcsr_w));
|
||||
map(0xffff83, 0xffff83).rw("timer8_1", FUNC(h8_timer8_channel_device::tcsr_r), FUNC(h8_timer8_channel_device::tcsr_w));
|
||||
map(0xffff84, 0xffff87).rw("timer8_0", FUNC(h8_timer8_channel_device::tcor_r), FUNC(h8_timer8_channel_device::tcor_w)).umask16(0xff00);
|
||||
map(0xffff84, 0xffff87).rw("timer8_1", FUNC(h8_timer8_channel_device::tcor_r), FUNC(h8_timer8_channel_device::tcor_w)).umask16(0x00ff);
|
||||
map(0xffff88, 0xffff88).rw("timer8_0", FUNC(h8_timer8_channel_device::tcnt_r), FUNC(h8_timer8_channel_device::tcnt_w));
|
||||
map(0xffff89, 0xffff89).rw("timer8_1", FUNC(h8_timer8_channel_device::tcnt_r), FUNC(h8_timer8_channel_device::tcnt_w));
|
||||
map(0xffff8c, 0xffff8d).rw("watchdog", FUNC(h8_watchdog_device::wd_r), FUNC(h8_watchdog_device::wd_w));
|
||||
map(0xffff8e, 0xffff8f).rw("watchdog", FUNC(h8_watchdog_device::rst_r), FUNC(h8_watchdog_device::rst_w));
|
||||
map(0xffff90, 0xffff90).rw("timer8_2", FUNC(h8_timer8_channel_device::tcr_r), FUNC(h8_timer8_channel_device::tcr_w));
|
||||
map(0xffff91, 0xffff91).rw("timer8_3", FUNC(h8_timer8_channel_device::tcr_r), FUNC(h8_timer8_channel_device::tcr_w));
|
||||
map(0xffff92, 0xffff92).rw("timer8_2", FUNC(h8_timer8_channel_device::tcsr_r), FUNC(h8_timer8_channel_device::tcsr_w));
|
||||
map(0xffff93, 0xffff93).rw("timer8_3", FUNC(h8_timer8_channel_device::tcsr_r), FUNC(h8_timer8_channel_device::tcsr_w));
|
||||
map(0xffff94, 0xffff97).rw("timer8_2", FUNC(h8_timer8_channel_device::tcor_r), FUNC(h8_timer8_channel_device::tcor_w)).umask16(0xff00);
|
||||
map(0xffff94, 0xffff97).rw("timer8_3", FUNC(h8_timer8_channel_device::tcor_r), FUNC(h8_timer8_channel_device::tcor_w)).umask16(0x00ff);
|
||||
map(0xffff98, 0xffff98).rw("timer8_2", FUNC(h8_timer8_channel_device::tcnt_r), FUNC(h8_timer8_channel_device::tcnt_w));
|
||||
map(0xffff99, 0xffff99).rw("timer8_3", FUNC(h8_timer8_channel_device::tcnt_r), FUNC(h8_timer8_channel_device::tcnt_w));
|
||||
|
||||
AM_RANGE(0xffffb0, 0xffffb1) AM_DEVREADWRITE8("sci0", h8_sci_device, smr_r, smr_w, 0xff00)
|
||||
AM_RANGE(0xffffb0, 0xffffb1) AM_DEVREADWRITE8("sci0", h8_sci_device, brr_r, brr_w, 0x00ff)
|
||||
AM_RANGE(0xffffb2, 0xffffb3) AM_DEVREADWRITE8("sci0", h8_sci_device, scr_r, scr_w, 0xff00)
|
||||
AM_RANGE(0xffffb2, 0xffffb3) AM_DEVREADWRITE8("sci0", h8_sci_device, tdr_r, tdr_w, 0x00ff)
|
||||
AM_RANGE(0xffffb4, 0xffffb5) AM_DEVREADWRITE8("sci0", h8_sci_device, ssr_r, ssr_w, 0xff00)
|
||||
AM_RANGE(0xffffb4, 0xffffb5) AM_DEVREAD8( "sci0", h8_sci_device, rdr_r, 0x00ff)
|
||||
AM_RANGE(0xffffb6, 0xffffb7) AM_DEVREADWRITE8("sci0", h8_sci_device, scmr_r, scmr_w, 0xff00)
|
||||
AM_RANGE(0xffffb8, 0xffffb9) AM_DEVREADWRITE8("sci1", h8_sci_device, smr_r, smr_w, 0xff00)
|
||||
AM_RANGE(0xffffb8, 0xffffb9) AM_DEVREADWRITE8("sci1", h8_sci_device, brr_r, brr_w, 0x00ff)
|
||||
AM_RANGE(0xffffba, 0xffffbb) AM_DEVREADWRITE8("sci1", h8_sci_device, scr_r, scr_w, 0xff00)
|
||||
AM_RANGE(0xffffba, 0xffffbb) AM_DEVREADWRITE8("sci1", h8_sci_device, tdr_r, tdr_w, 0x00ff)
|
||||
AM_RANGE(0xffffbc, 0xffffbd) AM_DEVREADWRITE8("sci1", h8_sci_device, ssr_r, ssr_w, 0xff00)
|
||||
AM_RANGE(0xffffbc, 0xffffbd) AM_DEVREAD8( "sci1", h8_sci_device, rdr_r, 0x00ff)
|
||||
AM_RANGE(0xffffbe, 0xffffbf) AM_DEVREADWRITE8("sci1", h8_sci_device, scmr_r, scmr_w, 0xff00)
|
||||
AM_RANGE(0xffffd2, 0xffffd3) AM_DEVREADWRITE8("port4", h8_port_device, port_r, dr_w, 0x00ff)
|
||||
AM_RANGE(0xffffd4, 0xffffd5) AM_DEVREADWRITE8("port6", h8_port_device, port_r, dr_w, 0x00ff)
|
||||
AM_RANGE(0xffffd6, 0xffffd7) AM_DEVREADWRITE8("port7", h8_port_device, port_r, dr_w, 0xff00)
|
||||
AM_RANGE(0xffffd6, 0xffffd7) AM_DEVREADWRITE8("port8", h8_port_device, port_r, dr_w, 0x00ff)
|
||||
AM_RANGE(0xffffd8, 0xffffd9) AM_DEVREADWRITE8("port9", h8_port_device, port_r, dr_w, 0xff00)
|
||||
AM_RANGE(0xffffd8, 0xffffd9) AM_DEVREADWRITE8("porta", h8_port_device, port_r, dr_w, 0x00ff)
|
||||
AM_RANGE(0xffffda, 0xffffdb) AM_DEVREADWRITE8("portb", h8_port_device, port_r, dr_w, 0xff00)
|
||||
map(0xffffb0, 0xffffb0).rw("sci0", FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
|
||||
map(0xffffb1, 0xffffb1).rw("sci0", FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
|
||||
map(0xffffb2, 0xffffb2).rw("sci0", FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
|
||||
map(0xffffb3, 0xffffb3).rw("sci0", FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
|
||||
map(0xffffb4, 0xffffb4).rw("sci0", FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
|
||||
map(0xffffb5, 0xffffb5).r("sci0", FUNC(h8_sci_device::rdr_r));
|
||||
map(0xffffb6, 0xffffb6).rw("sci0", FUNC(h8_sci_device::scmr_r), FUNC(h8_sci_device::scmr_w));
|
||||
map(0xffffb8, 0xffffb8).rw("sci1", FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
|
||||
map(0xffffb9, 0xffffb9).rw("sci1", FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
|
||||
map(0xffffba, 0xffffba).rw("sci1", FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
|
||||
map(0xffffbb, 0xffffbb).rw("sci1", FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
|
||||
map(0xffffbc, 0xffffbc).rw("sci1", FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
|
||||
map(0xffffbd, 0xffffbd).r("sci1", FUNC(h8_sci_device::rdr_r));
|
||||
map(0xffffbe, 0xffffbe).rw("sci1", FUNC(h8_sci_device::scmr_r), FUNC(h8_sci_device::scmr_w));
|
||||
map(0xffffd3, 0xffffd3).rw("port4", FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffffd5, 0xffffd5).rw("port6", FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffffd6, 0xffffd6).rw("port7", FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffffd7, 0xffffd7).rw("port8", FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffffd8, 0xffffd8).rw("port9", FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffffd9, 0xffffd9).rw("porta", FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffffda, 0xffffda).rw("portb", FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
|
||||
|
||||
AM_RANGE(0xffffe0, 0xffffe7) AM_DEVREAD8( "adc", h8_adc_device, addr8_r, 0xffff)
|
||||
AM_RANGE(0xffffe8, 0xffffe9) AM_DEVREADWRITE8("adc", h8_adc_device, adcsr_r, adcsr_w, 0xff00)
|
||||
AM_RANGE(0xffffe8, 0xffffe9) AM_DEVREADWRITE8("adc", h8_adc_device, adcr_r, adcr_w, 0x00ff)
|
||||
ADDRESS_MAP_END
|
||||
map(0xffffe0, 0xffffe7).r("adc", FUNC(h8_adc_device::addr8_r));
|
||||
map(0xffffe8, 0xffffe8).rw("adc", FUNC(h8_adc_device::adcsr_r), FUNC(h8_adc_device::adcsr_w));
|
||||
map(0xffffe9, 0xffffe9).rw("adc", FUNC(h8_adc_device::adcr_r), FUNC(h8_adc_device::adcr_w));
|
||||
}
|
||||
|
||||
MACHINE_CONFIG_START(h83008_device::device_add_mconfig)
|
||||
MCFG_H8H_INTC_ADD("intc")
|
||||
|
||||
@ -57,99 +57,100 @@ h83047_device::h83047_device(const machine_config &mconfig, const char *tag, dev
|
||||
{
|
||||
}
|
||||
|
||||
ADDRESS_MAP_START(h83048_device::map)
|
||||
AM_RANGE(ram_start, 0xffff0f) AM_RAM
|
||||
void h83048_device::map(address_map &map)
|
||||
{
|
||||
map(ram_start, 0xffff0f).ram();
|
||||
|
||||
AM_RANGE(0xffff60, 0xffff61) AM_DEVREADWRITE8("timer16", h8_timer16_device, tstr_r, tstr_w, 0xff00)
|
||||
AM_RANGE(0xffff60, 0xffff61) AM_DEVREADWRITE8("timer16", h8_timer16_device, tsyr_r, tsyr_w, 0x00ff)
|
||||
AM_RANGE(0xffff62, 0xffff63) AM_DEVREADWRITE8("timer16", h8_timer16_device, tmdr_r, tmdr_w, 0xff00)
|
||||
AM_RANGE(0xffff62, 0xffff63) AM_DEVREADWRITE8("timer16", h8_timer16_device, tfcr_r, tfcr_w, 0x00ff)
|
||||
AM_RANGE(0xffff64, 0xffff65) AM_DEVREADWRITE8("timer16:0", h8_timer16_channel_device, tcr_r, tcr_w, 0xff00)
|
||||
AM_RANGE(0xffff64, 0xffff65) AM_DEVREADWRITE8("timer16:0", h8_timer16_channel_device, tior_r, tior_w, 0x00ff)
|
||||
AM_RANGE(0xffff66, 0xffff67) AM_DEVREADWRITE8("timer16:0", h8_timer16_channel_device, tier_r, tier_w, 0xff00)
|
||||
AM_RANGE(0xffff66, 0xffff67) AM_DEVREADWRITE8("timer16:0", h8_timer16_channel_device, tsr_r, tsr_w, 0x00ff)
|
||||
AM_RANGE(0xffff68, 0xffff69) AM_DEVREADWRITE( "timer16:0", h8_timer16_channel_device, tcnt_r, tcnt_w )
|
||||
AM_RANGE(0xffff6a, 0xffff6d) AM_DEVREADWRITE( "timer16:0", h8_timer16_channel_device, tgr_r, tgr_w )
|
||||
AM_RANGE(0xffff6e, 0xffff6f) AM_DEVREADWRITE8("timer16:1", h8_timer16_channel_device, tcr_r, tcr_w, 0xff00)
|
||||
AM_RANGE(0xffff6e, 0xffff6f) AM_DEVREADWRITE8("timer16:1", h8_timer16_channel_device, tior_r, tior_w, 0x00ff)
|
||||
AM_RANGE(0xffff70, 0xffff71) AM_DEVREADWRITE8("timer16:1", h8_timer16_channel_device, tier_r, tier_w, 0xff00)
|
||||
AM_RANGE(0xffff70, 0xffff71) AM_DEVREADWRITE8("timer16:1", h8_timer16_channel_device, tsr_r, tsr_w, 0x00ff)
|
||||
AM_RANGE(0xffff72, 0xffff73) AM_DEVREADWRITE( "timer16:1", h8_timer16_channel_device, tcnt_r, tcnt_w )
|
||||
AM_RANGE(0xffff74, 0xffff77) AM_DEVREADWRITE( "timer16:1", h8_timer16_channel_device, tgr_r, tgr_w )
|
||||
AM_RANGE(0xffff78, 0xffff79) AM_DEVREADWRITE8("timer16:2", h8_timer16_channel_device, tcr_r, tcr_w, 0xff00)
|
||||
AM_RANGE(0xffff78, 0xffff79) AM_DEVREADWRITE8("timer16:2", h8_timer16_channel_device, tior_r, tior_w, 0x00ff)
|
||||
AM_RANGE(0xffff7a, 0xffff7b) AM_DEVREADWRITE8("timer16:2", h8_timer16_channel_device, tier_r, tier_w, 0xff00)
|
||||
AM_RANGE(0xffff7a, 0xffff7b) AM_DEVREADWRITE8("timer16:2", h8_timer16_channel_device, tsr_r, tsr_w, 0x00ff)
|
||||
AM_RANGE(0xffff7c, 0xffff7d) AM_DEVREADWRITE( "timer16:2", h8_timer16_channel_device, tcnt_r, tcnt_w )
|
||||
AM_RANGE(0xffff7e, 0xffff81) AM_DEVREADWRITE( "timer16:2", h8_timer16_channel_device, tgr_r, tgr_w )
|
||||
AM_RANGE(0xffff82, 0xffff83) AM_DEVREADWRITE8("timer16:3", h8_timer16_channel_device, tcr_r, tcr_w, 0xff00)
|
||||
AM_RANGE(0xffff82, 0xffff83) AM_DEVREADWRITE8("timer16:3", h8_timer16_channel_device, tior_r, tior_w, 0x00ff)
|
||||
AM_RANGE(0xffff84, 0xffff85) AM_DEVREADWRITE8("timer16:3", h8_timer16_channel_device, tier_r, tier_w, 0xff00)
|
||||
AM_RANGE(0xffff84, 0xffff85) AM_DEVREADWRITE8("timer16:3", h8_timer16_channel_device, tsr_r, tsr_w, 0x00ff)
|
||||
AM_RANGE(0xffff86, 0xffff87) AM_DEVREADWRITE( "timer16:3", h8_timer16_channel_device, tcnt_r, tcnt_w )
|
||||
AM_RANGE(0xffff88, 0xffff8b) AM_DEVREADWRITE( "timer16:3", h8_timer16_channel_device, tgr_r, tgr_w )
|
||||
AM_RANGE(0xffff8c, 0xffff8f) AM_DEVREADWRITE( "timer16:3", h8_timer16_channel_device, tbr_r, tbr_w )
|
||||
AM_RANGE(0xffff90, 0xffff91) AM_DEVREADWRITE8("timer16", h8_timer16_device, toer_r, toer_w, 0xff00)
|
||||
AM_RANGE(0xffff90, 0xffff91) AM_DEVREADWRITE8("timer16", h8_timer16_device, tocr_r, tocr_w, 0x00ff)
|
||||
AM_RANGE(0xffff92, 0xffff93) AM_DEVREADWRITE8("timer16:4", h8_timer16_channel_device, tcr_r, tcr_w, 0xff00)
|
||||
AM_RANGE(0xffff92, 0xffff93) AM_DEVREADWRITE8("timer16:4", h8_timer16_channel_device, tior_r, tior_w, 0x00ff)
|
||||
AM_RANGE(0xffff94, 0xffff95) AM_DEVREADWRITE8("timer16:4", h8_timer16_channel_device, tier_r, tier_w, 0xff00)
|
||||
AM_RANGE(0xffff94, 0xffff95) AM_DEVREADWRITE8("timer16:4", h8_timer16_channel_device, tsr_r, tsr_w, 0x00ff)
|
||||
AM_RANGE(0xffff96, 0xffff97) AM_DEVREADWRITE( "timer16:4", h8_timer16_channel_device, tcnt_r, tcnt_w )
|
||||
AM_RANGE(0xffff98, 0xffff9b) AM_DEVREADWRITE( "timer16:4", h8_timer16_channel_device, tgr_r, tgr_w )
|
||||
AM_RANGE(0xffff9c, 0xffff9f) AM_DEVREADWRITE( "timer16:4", h8_timer16_channel_device, tbr_r, tbr_w )
|
||||
map(0xffff60, 0xffff60).rw("timer16", FUNC(h8_timer16_device::tstr_r), FUNC(h8_timer16_device::tstr_w));
|
||||
map(0xffff61, 0xffff61).rw("timer16", FUNC(h8_timer16_device::tsyr_r), FUNC(h8_timer16_device::tsyr_w));
|
||||
map(0xffff62, 0xffff62).rw("timer16", FUNC(h8_timer16_device::tmdr_r), FUNC(h8_timer16_device::tmdr_w));
|
||||
map(0xffff63, 0xffff63).rw("timer16", FUNC(h8_timer16_device::tfcr_r), FUNC(h8_timer16_device::tfcr_w));
|
||||
map(0xffff64, 0xffff64).rw("timer16:0", FUNC(h8_timer16_channel_device::tcr_r), FUNC(h8_timer16_channel_device::tcr_w));
|
||||
map(0xffff65, 0xffff65).rw("timer16:0", FUNC(h8_timer16_channel_device::tior_r), FUNC(h8_timer16_channel_device::tior_w));
|
||||
map(0xffff66, 0xffff66).rw("timer16:0", FUNC(h8_timer16_channel_device::tier_r), FUNC(h8_timer16_channel_device::tier_w));
|
||||
map(0xffff67, 0xffff67).rw("timer16:0", FUNC(h8_timer16_channel_device::tsr_r), FUNC(h8_timer16_channel_device::tsr_w));
|
||||
map(0xffff68, 0xffff69).rw("timer16:0", FUNC(h8_timer16_channel_device::tcnt_r), FUNC(h8_timer16_channel_device::tcnt_w));
|
||||
map(0xffff6a, 0xffff6d).rw("timer16:0", FUNC(h8_timer16_channel_device::tgr_r), FUNC(h8_timer16_channel_device::tgr_w));
|
||||
map(0xffff6e, 0xffff6e).rw("timer16:1", FUNC(h8_timer16_channel_device::tcr_r), FUNC(h8_timer16_channel_device::tcr_w));
|
||||
map(0xffff6f, 0xffff6f).rw("timer16:1", FUNC(h8_timer16_channel_device::tior_r), FUNC(h8_timer16_channel_device::tior_w));
|
||||
map(0xffff70, 0xffff70).rw("timer16:1", FUNC(h8_timer16_channel_device::tier_r), FUNC(h8_timer16_channel_device::tier_w));
|
||||
map(0xffff71, 0xffff71).rw("timer16:1", FUNC(h8_timer16_channel_device::tsr_r), FUNC(h8_timer16_channel_device::tsr_w));
|
||||
map(0xffff72, 0xffff73).rw("timer16:1", FUNC(h8_timer16_channel_device::tcnt_r), FUNC(h8_timer16_channel_device::tcnt_w));
|
||||
map(0xffff74, 0xffff77).rw("timer16:1", FUNC(h8_timer16_channel_device::tgr_r), FUNC(h8_timer16_channel_device::tgr_w));
|
||||
map(0xffff78, 0xffff78).rw("timer16:2", FUNC(h8_timer16_channel_device::tcr_r), FUNC(h8_timer16_channel_device::tcr_w));
|
||||
map(0xffff79, 0xffff79).rw("timer16:2", FUNC(h8_timer16_channel_device::tior_r), FUNC(h8_timer16_channel_device::tior_w));
|
||||
map(0xffff7a, 0xffff7a).rw("timer16:2", FUNC(h8_timer16_channel_device::tier_r), FUNC(h8_timer16_channel_device::tier_w));
|
||||
map(0xffff7b, 0xffff7b).rw("timer16:2", FUNC(h8_timer16_channel_device::tsr_r), FUNC(h8_timer16_channel_device::tsr_w));
|
||||
map(0xffff7c, 0xffff7d).rw("timer16:2", FUNC(h8_timer16_channel_device::tcnt_r), FUNC(h8_timer16_channel_device::tcnt_w));
|
||||
map(0xffff7e, 0xffff81).rw("timer16:2", FUNC(h8_timer16_channel_device::tgr_r), FUNC(h8_timer16_channel_device::tgr_w));
|
||||
map(0xffff82, 0xffff82).rw("timer16:3", FUNC(h8_timer16_channel_device::tcr_r), FUNC(h8_timer16_channel_device::tcr_w));
|
||||
map(0xffff83, 0xffff83).rw("timer16:3", FUNC(h8_timer16_channel_device::tior_r), FUNC(h8_timer16_channel_device::tior_w));
|
||||
map(0xffff84, 0xffff84).rw("timer16:3", FUNC(h8_timer16_channel_device::tier_r), FUNC(h8_timer16_channel_device::tier_w));
|
||||
map(0xffff85, 0xffff85).rw("timer16:3", FUNC(h8_timer16_channel_device::tsr_r), FUNC(h8_timer16_channel_device::tsr_w));
|
||||
map(0xffff86, 0xffff87).rw("timer16:3", FUNC(h8_timer16_channel_device::tcnt_r), FUNC(h8_timer16_channel_device::tcnt_w));
|
||||
map(0xffff88, 0xffff8b).rw("timer16:3", FUNC(h8_timer16_channel_device::tgr_r), FUNC(h8_timer16_channel_device::tgr_w));
|
||||
map(0xffff8c, 0xffff8f).rw("timer16:3", FUNC(h8_timer16_channel_device::tbr_r), FUNC(h8_timer16_channel_device::tbr_w));
|
||||
map(0xffff90, 0xffff90).rw("timer16", FUNC(h8_timer16_device::toer_r), FUNC(h8_timer16_device::toer_w));
|
||||
map(0xffff91, 0xffff91).rw("timer16", FUNC(h8_timer16_device::tocr_r), FUNC(h8_timer16_device::tocr_w));
|
||||
map(0xffff92, 0xffff92).rw("timer16:4", FUNC(h8_timer16_channel_device::tcr_r), FUNC(h8_timer16_channel_device::tcr_w));
|
||||
map(0xffff93, 0xffff93).rw("timer16:4", FUNC(h8_timer16_channel_device::tior_r), FUNC(h8_timer16_channel_device::tior_w));
|
||||
map(0xffff94, 0xffff94).rw("timer16:4", FUNC(h8_timer16_channel_device::tier_r), FUNC(h8_timer16_channel_device::tier_w));
|
||||
map(0xffff95, 0xffff95).rw("timer16:4", FUNC(h8_timer16_channel_device::tsr_r), FUNC(h8_timer16_channel_device::tsr_w));
|
||||
map(0xffff96, 0xffff97).rw("timer16:4", FUNC(h8_timer16_channel_device::tcnt_r), FUNC(h8_timer16_channel_device::tcnt_w));
|
||||
map(0xffff98, 0xffff9b).rw("timer16:4", FUNC(h8_timer16_channel_device::tgr_r), FUNC(h8_timer16_channel_device::tgr_w));
|
||||
map(0xffff9c, 0xffff9f).rw("timer16:4", FUNC(h8_timer16_channel_device::tbr_r), FUNC(h8_timer16_channel_device::tbr_w));
|
||||
|
||||
AM_RANGE(0xffffa8, 0xffffa9) AM_DEVREADWRITE( "watchdog", h8_watchdog_device, wd_r, wd_w )
|
||||
AM_RANGE(0xffffaa, 0xffffab) AM_DEVREADWRITE( "watchdog", h8_watchdog_device, rst_r, rst_w )
|
||||
map(0xffffa8, 0xffffa9).rw("watchdog", FUNC(h8_watchdog_device::wd_r), FUNC(h8_watchdog_device::wd_w));
|
||||
map(0xffffaa, 0xffffab).rw("watchdog", FUNC(h8_watchdog_device::rst_r), FUNC(h8_watchdog_device::rst_w));
|
||||
|
||||
AM_RANGE(0xffffb0, 0xffffb1) AM_DEVREADWRITE8("sci0", h8_sci_device, smr_r, smr_w, 0xff00)
|
||||
AM_RANGE(0xffffb0, 0xffffb1) AM_DEVREADWRITE8("sci0", h8_sci_device, brr_r, brr_w, 0x00ff)
|
||||
AM_RANGE(0xffffb2, 0xffffb3) AM_DEVREADWRITE8("sci0", h8_sci_device, scr_r, scr_w, 0xff00)
|
||||
AM_RANGE(0xffffb2, 0xffffb3) AM_DEVREADWRITE8("sci0", h8_sci_device, tdr_r, tdr_w, 0x00ff)
|
||||
AM_RANGE(0xffffb4, 0xffffb5) AM_DEVREADWRITE8("sci0", h8_sci_device, ssr_r, ssr_w, 0xff00)
|
||||
AM_RANGE(0xffffb4, 0xffffb5) AM_DEVREAD8( "sci0", h8_sci_device, rdr_r, 0x00ff)
|
||||
AM_RANGE(0xffffb8, 0xffffb9) AM_DEVREADWRITE8("sci1", h8_sci_device, smr_r, smr_w, 0xff00)
|
||||
AM_RANGE(0xffffb8, 0xffffb9) AM_DEVREADWRITE8("sci1", h8_sci_device, brr_r, brr_w, 0x00ff)
|
||||
AM_RANGE(0xffffba, 0xffffbb) AM_DEVREADWRITE8("sci1", h8_sci_device, scr_r, scr_w, 0xff00)
|
||||
AM_RANGE(0xffffba, 0xffffbb) AM_DEVREADWRITE8("sci1", h8_sci_device, tdr_r, tdr_w, 0x00ff)
|
||||
AM_RANGE(0xffffbc, 0xffffbd) AM_DEVREADWRITE8("sci1", h8_sci_device, ssr_r, ssr_w, 0xff00)
|
||||
AM_RANGE(0xffffbc, 0xffffbd) AM_DEVREAD8( "sci1", h8_sci_device, rdr_r, 0x00ff)
|
||||
AM_RANGE(0xffffc0, 0xffffc1) AM_DEVWRITE8( "port1", h8_port_device, ddr_w, 0xff00)
|
||||
AM_RANGE(0xffffc0, 0xffffc1) AM_DEVWRITE8( "port2", h8_port_device, ddr_w, 0x00ff)
|
||||
AM_RANGE(0xffffc2, 0xffffc3) AM_DEVREADWRITE8("port1", h8_port_device, port_r, dr_w, 0xff00)
|
||||
AM_RANGE(0xffffc2, 0xffffc3) AM_DEVREADWRITE8("port2", h8_port_device, port_r, dr_w, 0x00ff)
|
||||
AM_RANGE(0xffffc4, 0xffffc5) AM_DEVWRITE8( "port3", h8_port_device, ddr_w, 0xff00)
|
||||
AM_RANGE(0xffffc4, 0xffffc5) AM_DEVWRITE8( "port4", h8_port_device, ddr_w, 0x00ff)
|
||||
AM_RANGE(0xffffc6, 0xffffc7) AM_DEVREADWRITE8("port3", h8_port_device, port_r, dr_w, 0xff00)
|
||||
AM_RANGE(0xffffc6, 0xffffc7) AM_DEVREADWRITE8("port4", h8_port_device, port_r, dr_w, 0x00ff)
|
||||
AM_RANGE(0xffffc8, 0xffffc9) AM_DEVWRITE8( "port5", h8_port_device, ddr_w, 0xff00)
|
||||
AM_RANGE(0xffffc8, 0xffffc9) AM_DEVWRITE8( "port6", h8_port_device, ddr_w, 0x00ff)
|
||||
AM_RANGE(0xffffca, 0xffffcb) AM_DEVREADWRITE8("port5", h8_port_device, port_r, dr_w, 0xff00)
|
||||
AM_RANGE(0xffffca, 0xffffcb) AM_DEVREADWRITE8("port6", h8_port_device, port_r, dr_w, 0x00ff)
|
||||
AM_RANGE(0xffffcc, 0xffffcd) AM_DEVWRITE8( "port8", h8_port_device, ddr_w, 0x00ff)
|
||||
AM_RANGE(0xffffce, 0xffffcf) AM_DEVREADWRITE8("port7", h8_port_device, port_r, dr_w, 0xff00)
|
||||
AM_RANGE(0xffffce, 0xffffcf) AM_DEVREADWRITE8("port8", h8_port_device, port_r, dr_w, 0x00ff)
|
||||
AM_RANGE(0xffffd0, 0xffffd1) AM_DEVWRITE8( "port9", h8_port_device, ddr_w, 0xff00)
|
||||
AM_RANGE(0xffffd0, 0xffffd1) AM_DEVWRITE8( "porta", h8_port_device, ddr_w, 0x00ff)
|
||||
AM_RANGE(0xffffd2, 0xffffd3) AM_DEVREADWRITE8("port9", h8_port_device, port_r, dr_w, 0xff00)
|
||||
AM_RANGE(0xffffd2, 0xffffd3) AM_DEVREADWRITE8("porta", h8_port_device, port_r, dr_w, 0x00ff)
|
||||
AM_RANGE(0xffffd4, 0xffffd5) AM_DEVWRITE8( "portb", h8_port_device, ddr_w, 0xff00)
|
||||
AM_RANGE(0xffffd6, 0xffffd7) AM_DEVREADWRITE8("portb", h8_port_device, port_r, dr_w, 0xff00)
|
||||
AM_RANGE(0xffffd8, 0xffffd9) AM_DEVREADWRITE8("port2", h8_port_device, pcr_r, pcr_w, 0xff00)
|
||||
AM_RANGE(0xffffda, 0xffffdb) AM_DEVREADWRITE8("port4", h8_port_device, pcr_r, pcr_w, 0xff00)
|
||||
AM_RANGE(0xffffda, 0xffffdb) AM_DEVREADWRITE8("port5", h8_port_device, pcr_r, pcr_w, 0x00ff)
|
||||
map(0xffffb0, 0xffffb0).rw("sci0", FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
|
||||
map(0xffffb1, 0xffffb1).rw("sci0", FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
|
||||
map(0xffffb2, 0xffffb2).rw("sci0", FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
|
||||
map(0xffffb3, 0xffffb3).rw("sci0", FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
|
||||
map(0xffffb4, 0xffffb4).rw("sci0", FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
|
||||
map(0xffffb5, 0xffffb5).r("sci0", FUNC(h8_sci_device::rdr_r));
|
||||
map(0xffffb8, 0xffffb8).rw("sci1", FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
|
||||
map(0xffffb9, 0xffffb9).rw("sci1", FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
|
||||
map(0xffffba, 0xffffba).rw("sci1", FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
|
||||
map(0xffffbb, 0xffffbb).rw("sci1", FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
|
||||
map(0xffffbc, 0xffffbc).rw("sci1", FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
|
||||
map(0xffffbd, 0xffffbd).r("sci1", FUNC(h8_sci_device::rdr_r));
|
||||
map(0xffffc0, 0xffffc0).w("port1", FUNC(h8_port_device::ddr_w));
|
||||
map(0xffffc1, 0xffffc1).w("port2", FUNC(h8_port_device::ddr_w));
|
||||
map(0xffffc2, 0xffffc2).rw("port1", FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffffc3, 0xffffc3).rw("port2", FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffffc4, 0xffffc4).w("port3", FUNC(h8_port_device::ddr_w));
|
||||
map(0xffffc5, 0xffffc5).w("port4", FUNC(h8_port_device::ddr_w));
|
||||
map(0xffffc6, 0xffffc6).rw("port3", FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffffc7, 0xffffc7).rw("port4", FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffffc8, 0xffffc8).w("port5", FUNC(h8_port_device::ddr_w));
|
||||
map(0xffffc9, 0xffffc9).w("port6", FUNC(h8_port_device::ddr_w));
|
||||
map(0xffffca, 0xffffca).rw("port5", FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffffcb, 0xffffcb).rw("port6", FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffffcd, 0xffffcd).w("port8", FUNC(h8_port_device::ddr_w));
|
||||
map(0xffffce, 0xffffce).rw("port7", FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffffcf, 0xffffcf).rw("port8", FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffffd0, 0xffffd0).w("port9", FUNC(h8_port_device::ddr_w));
|
||||
map(0xffffd1, 0xffffd1).w("porta", FUNC(h8_port_device::ddr_w));
|
||||
map(0xffffd2, 0xffffd2).rw("port9", FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffffd3, 0xffffd3).rw("porta", FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffffd4, 0xffffd4).w("portb", FUNC(h8_port_device::ddr_w));
|
||||
map(0xffffd6, 0xffffd6).rw("portb", FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffffd8, 0xffffd8).rw("port2", FUNC(h8_port_device::pcr_r), FUNC(h8_port_device::pcr_w));
|
||||
map(0xffffda, 0xffffda).rw("port4", FUNC(h8_port_device::pcr_r), FUNC(h8_port_device::pcr_w));
|
||||
map(0xffffdb, 0xffffdb).rw("port5", FUNC(h8_port_device::pcr_r), FUNC(h8_port_device::pcr_w));
|
||||
|
||||
AM_RANGE(0xffffe0, 0xffffe7) AM_DEVREAD8( "adc", h8_adc_device, addr8_r, 0xffff)
|
||||
AM_RANGE(0xffffe8, 0xffffe9) AM_DEVREADWRITE8("adc", h8_adc_device, adcsr_r, adcsr_w, 0xff00)
|
||||
AM_RANGE(0xffffe8, 0xffffe9) AM_DEVREADWRITE8("adc", h8_adc_device, adcr_r, adcr_w, 0x00ff)
|
||||
map(0xffffe0, 0xffffe7).r("adc", FUNC(h8_adc_device::addr8_r));
|
||||
map(0xffffe8, 0xffffe8).rw("adc", FUNC(h8_adc_device::adcsr_r), FUNC(h8_adc_device::adcsr_w));
|
||||
map(0xffffe9, 0xffffe9).rw("adc", FUNC(h8_adc_device::adcr_r), FUNC(h8_adc_device::adcr_w));
|
||||
|
||||
AM_RANGE(0xfffff2, 0xfffff3) AM_READWRITE8( syscr_r, syscr_w, 0xff00)
|
||||
map(0xfffff2, 0xfffff2).rw(this, FUNC(h83048_device::syscr_r), FUNC(h83048_device::syscr_w));
|
||||
|
||||
AM_RANGE(0xfffff4, 0xfffff5) AM_DEVREADWRITE8("intc", h8h_intc_device, iscr_r, iscr_w, 0xff00)
|
||||
AM_RANGE(0xfffff4, 0xfffff5) AM_DEVREADWRITE8("intc", h8h_intc_device, ier_r, ier_w, 0x00ff)
|
||||
AM_RANGE(0xfffff6, 0xfffff7) AM_DEVREADWRITE8("intc", h8h_intc_device, isr_r, isr_w, 0xff00)
|
||||
AM_RANGE(0xfffff8, 0xfffff9) AM_DEVREADWRITE8("intc", h8h_intc_device, icr_r, icr_w, 0xffff)
|
||||
ADDRESS_MAP_END
|
||||
map(0xfffff4, 0xfffff4).rw("intc", FUNC(h8h_intc_device::iscr_r), FUNC(h8h_intc_device::iscr_w));
|
||||
map(0xfffff5, 0xfffff5).rw("intc", FUNC(h8h_intc_device::ier_r), FUNC(h8h_intc_device::ier_w));
|
||||
map(0xfffff6, 0xfffff6).rw("intc", FUNC(h8h_intc_device::isr_r), FUNC(h8h_intc_device::isr_w));
|
||||
map(0xfffff8, 0xfffff9).rw("intc", FUNC(h8h_intc_device::icr_r), FUNC(h8h_intc_device::icr_w));
|
||||
}
|
||||
|
||||
MACHINE_CONFIG_START(h83048_device::device_add_mconfig)
|
||||
MCFG_H8H_INTC_ADD("intc")
|
||||
|
||||
@ -48,71 +48,72 @@ h83336_device::h83336_device(const machine_config &mconfig, const char *tag, dev
|
||||
{
|
||||
}
|
||||
|
||||
ADDRESS_MAP_START(h83337_device::map)
|
||||
AM_RANGE(ram_start, 0xff7f) AM_RAM
|
||||
void h83337_device::map(address_map &map)
|
||||
{
|
||||
map(ram_start, 0xff7f).ram();
|
||||
|
||||
AM_RANGE(0xff88, 0xff89) AM_DEVREADWRITE8("sci1", h8_sci_device, smr_r, smr_w, 0xff00)
|
||||
AM_RANGE(0xff88, 0xff89) AM_DEVREADWRITE8("sci1", h8_sci_device, brr_r, brr_w, 0x00ff)
|
||||
AM_RANGE(0xff8a, 0xff8b) AM_DEVREADWRITE8("sci1", h8_sci_device, scr_r, scr_w, 0xff00)
|
||||
AM_RANGE(0xff8a, 0xff8b) AM_DEVREADWRITE8("sci1", h8_sci_device, tdr_r, tdr_w, 0x00ff)
|
||||
AM_RANGE(0xff8c, 0xff8d) AM_DEVREADWRITE8("sci1", h8_sci_device, ssr_r, ssr_w, 0xff00)
|
||||
AM_RANGE(0xff8c, 0xff8d) AM_DEVREAD8( "sci1", h8_sci_device, rdr_r, 0x00ff)
|
||||
AM_RANGE(0xff90, 0xff91) AM_DEVREADWRITE8("timer16:0", h8_timer16_channel_device, tier_r, tier_w, 0xff00)
|
||||
AM_RANGE(0xff90, 0xff91) AM_DEVREADWRITE8("timer16:0", h8_timer16_channel_device, tsr_r, tsr_w, 0x00ff)
|
||||
AM_RANGE(0xff92, 0xff93) AM_DEVREADWRITE( "timer16:0", h8_timer16_channel_device, tcnt_r, tcnt_w )
|
||||
map(0xff88, 0xff88).rw("sci1", FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
|
||||
map(0xff89, 0xff89).rw("sci1", FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
|
||||
map(0xff8a, 0xff8a).rw("sci1", FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
|
||||
map(0xff8b, 0xff8b).rw("sci1", FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
|
||||
map(0xff8c, 0xff8c).rw("sci1", FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
|
||||
map(0xff8d, 0xff8d).r("sci1", FUNC(h8_sci_device::rdr_r));
|
||||
map(0xff90, 0xff90).rw("timer16:0", FUNC(h8_timer16_channel_device::tier_r), FUNC(h8_timer16_channel_device::tier_w));
|
||||
map(0xff91, 0xff91).rw("timer16:0", FUNC(h8_timer16_channel_device::tsr_r), FUNC(h8_timer16_channel_device::tsr_w));
|
||||
map(0xff92, 0xff93).rw("timer16:0", FUNC(h8_timer16_channel_device::tcnt_r), FUNC(h8_timer16_channel_device::tcnt_w));
|
||||
// AM_RANGE(0xff94, 0xff95) AM_DEVREADWRITE( "timer16:0", h8_timer16_channel_device, ocr_r, ocr_w )
|
||||
AM_RANGE(0xff96, 0xff97) AM_DEVREADWRITE8("timer16:0", h8_timer16_channel_device, tcr_r, tcr_w, 0xff00)
|
||||
map(0xff96, 0xff96).rw("timer16:0", FUNC(h8_timer16_channel_device::tcr_r), FUNC(h8_timer16_channel_device::tcr_w));
|
||||
// AM_RANGE(0xff96, 0xff97) AM_DEVREADWRITE8("timer16:0", h8_timer16_channel_device, tocr_r, tocr_w, 0x00ff)
|
||||
AM_RANGE(0xff98, 0xff9f) AM_DEVREAD( "timer16:0", h8_timer16_channel_device, tgr_r )
|
||||
map(0xff98, 0xff9f).r("timer16:0", FUNC(h8_timer16_channel_device::tgr_r));
|
||||
|
||||
AM_RANGE(0xffa8, 0xffa9) AM_DEVREADWRITE( "watchdog", h8_watchdog_device, wd_r, wd_w )
|
||||
AM_RANGE(0xffac, 0xffad) AM_DEVREADWRITE8("port1", h8_port_device, pcr_r, pcr_w, 0xff00)
|
||||
AM_RANGE(0xffac, 0xffad) AM_DEVREADWRITE8("port2", h8_port_device, pcr_r, pcr_w, 0x00ff)
|
||||
AM_RANGE(0xffae, 0xffaf) AM_DEVREADWRITE8("port3", h8_port_device, pcr_r, pcr_w, 0xff00)
|
||||
AM_RANGE(0xffb0, 0xffb1) AM_DEVWRITE8( "port1", h8_port_device, ddr_w, 0xff00)
|
||||
AM_RANGE(0xffb0, 0xffb1) AM_DEVWRITE8( "port2", h8_port_device, ddr_w, 0x00ff)
|
||||
AM_RANGE(0xffb2, 0xffb3) AM_DEVREADWRITE8("port1", h8_port_device, port_r, dr_w, 0xff00)
|
||||
AM_RANGE(0xffb2, 0xffb3) AM_DEVREADWRITE8("port2", h8_port_device, port_r, dr_w, 0x00ff)
|
||||
AM_RANGE(0xffb4, 0xffb5) AM_DEVWRITE8( "port3", h8_port_device, ddr_w, 0xff00)
|
||||
AM_RANGE(0xffb4, 0xffb5) AM_DEVWRITE8( "port4", h8_port_device, ddr_w, 0x00ff)
|
||||
AM_RANGE(0xffb6, 0xffb7) AM_DEVREADWRITE8("port3", h8_port_device, port_r, dr_w, 0xff00)
|
||||
AM_RANGE(0xffb6, 0xffb7) AM_DEVREADWRITE8("port4", h8_port_device, port_r, dr_w, 0x00ff)
|
||||
AM_RANGE(0xffb8, 0xffb9) AM_DEVWRITE8( "port5", h8_port_device, ddr_w, 0xff00)
|
||||
AM_RANGE(0xffb8, 0xffb9) AM_DEVWRITE8( "port6", h8_port_device, ddr_w, 0x00ff)
|
||||
AM_RANGE(0xffba, 0xffbb) AM_DEVREADWRITE8("port5", h8_port_device, port_r, dr_w, 0xff00)
|
||||
AM_RANGE(0xffba, 0xffbb) AM_DEVREADWRITE8("port6", h8_port_device, port_r, dr_w, 0x00ff)
|
||||
AM_RANGE(0xffbc, 0xffbd) AM_DEVWRITE8( "port8", h8_port_device, ddr_w, 0x00ff)
|
||||
AM_RANGE(0xffbe, 0xffbf) AM_DEVREADWRITE8("port7", h8_port_device, port_r, dr_w, 0xff00)
|
||||
AM_RANGE(0xffbe, 0xffbf) AM_DEVREADWRITE8("port8", h8_port_device, port_r, dr_w, 0x00ff)
|
||||
AM_RANGE(0xffc0, 0xffc1) AM_DEVWRITE8( "port9", h8_port_device, ddr_w, 0xff00)
|
||||
AM_RANGE(0xffc0, 0xffc1) AM_DEVREADWRITE8("port9", h8_port_device, port_r, dr_w, 0x00ff)
|
||||
AM_RANGE(0xffc2, 0xffc3) AM_READWRITE8( wscr_r, wscr_w, 0xff00)
|
||||
AM_RANGE(0xffc2, 0xffc3) AM_READWRITE8( stcr_r, stcr_w, 0x00ff)
|
||||
AM_RANGE(0xffc4, 0xffc5) AM_READWRITE8( syscr_r, syscr_w, 0xff00)
|
||||
AM_RANGE(0xffc4, 0xffc5) AM_READWRITE8( mdcr_r, mdcr_w, 0x00ff)
|
||||
AM_RANGE(0xffc6, 0xffc7) AM_DEVREADWRITE8("intc", h8_intc_device, iscr_r, iscr_w, 0xff00)
|
||||
AM_RANGE(0xffc6, 0xffc7) AM_DEVREADWRITE8("intc", h8_intc_device, ier_r, ier_w, 0x00ff)
|
||||
AM_RANGE(0xffc8, 0xffc9) AM_DEVREADWRITE8("timer8_0", h8_timer8_channel_device, tcr_r, tcr_w, 0xff00)
|
||||
AM_RANGE(0xffc8, 0xffc9) AM_DEVREADWRITE8("timer8_0", h8_timer8_channel_device, tcsr_r, tcsr_w, 0x00ff)
|
||||
AM_RANGE(0xffca, 0xffcb) AM_DEVREADWRITE8("timer8_0", h8_timer8_channel_device, tcor_r, tcor_w, 0xffff)
|
||||
AM_RANGE(0xffcc, 0xffcd) AM_DEVREADWRITE8("timer8_0", h8_timer8_channel_device, tcnt_r, tcnt_w, 0xff00)
|
||||
AM_RANGE(0xffd0, 0xffd1) AM_DEVREADWRITE8("timer8_1", h8_timer8_channel_device, tcr_r, tcr_w, 0xff00)
|
||||
AM_RANGE(0xffd0, 0xffd1) AM_DEVREADWRITE8("timer8_1", h8_timer8_channel_device, tcsr_r, tcsr_w, 0x00ff)
|
||||
AM_RANGE(0xffd2, 0xffd3) AM_DEVREADWRITE8("timer8_1", h8_timer8_channel_device, tcor_r, tcor_w, 0xffff)
|
||||
AM_RANGE(0xffd4, 0xffd5) AM_DEVREADWRITE8("timer8_1", h8_timer8_channel_device, tcnt_r, tcnt_w, 0xff00)
|
||||
AM_RANGE(0xffd8, 0xffd9) AM_DEVREADWRITE8("sci0", h8_sci_device, smr_r, smr_w, 0xff00)
|
||||
AM_RANGE(0xffd8, 0xffd9) AM_DEVREADWRITE8("sci0", h8_sci_device, brr_r, brr_w, 0x00ff)
|
||||
AM_RANGE(0xffda, 0xffdb) AM_DEVREADWRITE8("sci0", h8_sci_device, scr_r, scr_w, 0xff00)
|
||||
AM_RANGE(0xffda, 0xffdb) AM_DEVREADWRITE8("sci0", h8_sci_device, tdr_r, tdr_w, 0x00ff)
|
||||
AM_RANGE(0xffdc, 0xffdd) AM_DEVREADWRITE8("sci0", h8_sci_device, ssr_r, ssr_w, 0xff00)
|
||||
AM_RANGE(0xffdc, 0xffdd) AM_DEVREAD8( "sci0", h8_sci_device, rdr_r, 0x00ff)
|
||||
map(0xffa8, 0xffa9).rw("watchdog", FUNC(h8_watchdog_device::wd_r), FUNC(h8_watchdog_device::wd_w));
|
||||
map(0xffac, 0xffac).rw("port1", FUNC(h8_port_device::pcr_r), FUNC(h8_port_device::pcr_w));
|
||||
map(0xffad, 0xffad).rw("port2", FUNC(h8_port_device::pcr_r), FUNC(h8_port_device::pcr_w));
|
||||
map(0xffae, 0xffae).rw("port3", FUNC(h8_port_device::pcr_r), FUNC(h8_port_device::pcr_w));
|
||||
map(0xffb0, 0xffb0).w("port1", FUNC(h8_port_device::ddr_w));
|
||||
map(0xffb1, 0xffb1).w("port2", FUNC(h8_port_device::ddr_w));
|
||||
map(0xffb2, 0xffb2).rw("port1", FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffb3, 0xffb3).rw("port2", FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffb4, 0xffb4).w("port3", FUNC(h8_port_device::ddr_w));
|
||||
map(0xffb5, 0xffb5).w("port4", FUNC(h8_port_device::ddr_w));
|
||||
map(0xffb6, 0xffb6).rw("port3", FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffb7, 0xffb7).rw("port4", FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffb8, 0xffb8).w("port5", FUNC(h8_port_device::ddr_w));
|
||||
map(0xffb9, 0xffb9).w("port6", FUNC(h8_port_device::ddr_w));
|
||||
map(0xffba, 0xffba).rw("port5", FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffbb, 0xffbb).rw("port6", FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffbd, 0xffbd).w("port8", FUNC(h8_port_device::ddr_w));
|
||||
map(0xffbe, 0xffbe).rw("port7", FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffbf, 0xffbf).rw("port8", FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffc0, 0xffc0).w("port9", FUNC(h8_port_device::ddr_w));
|
||||
map(0xffc1, 0xffc1).rw("port9", FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffc2, 0xffc2).rw(this, FUNC(h83337_device::wscr_r), FUNC(h83337_device::wscr_w));
|
||||
map(0xffc3, 0xffc3).rw(this, FUNC(h83337_device::stcr_r), FUNC(h83337_device::stcr_w));
|
||||
map(0xffc4, 0xffc4).rw(this, FUNC(h83337_device::syscr_r), FUNC(h83337_device::syscr_w));
|
||||
map(0xffc5, 0xffc5).rw(this, FUNC(h83337_device::mdcr_r), FUNC(h83337_device::mdcr_w));
|
||||
map(0xffc6, 0xffc6).rw("intc", FUNC(h8_intc_device::iscr_r), FUNC(h8_intc_device::iscr_w));
|
||||
map(0xffc7, 0xffc7).rw("intc", FUNC(h8_intc_device::ier_r), FUNC(h8_intc_device::ier_w));
|
||||
map(0xffc8, 0xffc8).rw("timer8_0", FUNC(h8_timer8_channel_device::tcr_r), FUNC(h8_timer8_channel_device::tcr_w));
|
||||
map(0xffc9, 0xffc9).rw("timer8_0", FUNC(h8_timer8_channel_device::tcsr_r), FUNC(h8_timer8_channel_device::tcsr_w));
|
||||
map(0xffca, 0xffcb).rw("timer8_0", FUNC(h8_timer8_channel_device::tcor_r), FUNC(h8_timer8_channel_device::tcor_w));
|
||||
map(0xffcc, 0xffcc).rw("timer8_0", FUNC(h8_timer8_channel_device::tcnt_r), FUNC(h8_timer8_channel_device::tcnt_w));
|
||||
map(0xffd0, 0xffd0).rw("timer8_1", FUNC(h8_timer8_channel_device::tcr_r), FUNC(h8_timer8_channel_device::tcr_w));
|
||||
map(0xffd1, 0xffd1).rw("timer8_1", FUNC(h8_timer8_channel_device::tcsr_r), FUNC(h8_timer8_channel_device::tcsr_w));
|
||||
map(0xffd2, 0xffd3).rw("timer8_1", FUNC(h8_timer8_channel_device::tcor_r), FUNC(h8_timer8_channel_device::tcor_w));
|
||||
map(0xffd4, 0xffd4).rw("timer8_1", FUNC(h8_timer8_channel_device::tcnt_r), FUNC(h8_timer8_channel_device::tcnt_w));
|
||||
map(0xffd8, 0xffd8).rw("sci0", FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
|
||||
map(0xffd9, 0xffd9).rw("sci0", FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
|
||||
map(0xffda, 0xffda).rw("sci0", FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
|
||||
map(0xffdb, 0xffdb).rw("sci0", FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
|
||||
map(0xffdc, 0xffdc).rw("sci0", FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
|
||||
map(0xffdd, 0xffdd).r("sci0", FUNC(h8_sci_device::rdr_r));
|
||||
|
||||
AM_RANGE(0xffe0, 0xffe7) AM_DEVREAD8( "adc", h8_adc_device, addr8_r, 0xffff)
|
||||
AM_RANGE(0xffe8, 0xffe9) AM_DEVREADWRITE8("adc", h8_adc_device, adcsr_r, adcsr_w, 0xff00)
|
||||
AM_RANGE(0xffe8, 0xffe9) AM_DEVREADWRITE8("adc", h8_adc_device, adcr_r, adcr_w, 0x00ff)
|
||||
map(0xffe0, 0xffe7).r("adc", FUNC(h8_adc_device::addr8_r));
|
||||
map(0xffe8, 0xffe8).rw("adc", FUNC(h8_adc_device::adcsr_r), FUNC(h8_adc_device::adcsr_w));
|
||||
map(0xffe9, 0xffe9).rw("adc", FUNC(h8_adc_device::adcr_r), FUNC(h8_adc_device::adcr_w));
|
||||
|
||||
AM_RANGE(0xfff2, 0xfff3) AM_DEVREADWRITE8("port6", h8_port_device, pcr_r, pcr_w, 0xff00)
|
||||
ADDRESS_MAP_END
|
||||
map(0xfff2, 0xfff2).rw("port6", FUNC(h8_port_device::pcr_r), FUNC(h8_port_device::pcr_w));
|
||||
}
|
||||
|
||||
MACHINE_CONFIG_START(h83337_device::device_add_mconfig)
|
||||
MCFG_H8_INTC_ADD("intc")
|
||||
|
||||
@ -61,119 +61,120 @@ h8s2246_device::h8s2246_device(const machine_config &mconfig, const char *tag, d
|
||||
{
|
||||
}
|
||||
|
||||
ADDRESS_MAP_START(h8s2245_device::map)
|
||||
AM_RANGE(ram_start, 0xfffbff) AM_RAM
|
||||
void h8s2245_device::map(address_map &map)
|
||||
{
|
||||
map(ram_start, 0xfffbff).ram();
|
||||
|
||||
AM_RANGE(0xfffeb0, 0xfffeb1) AM_DEVWRITE8( "port1", h8_port_device, ddr_w, 0xff00)
|
||||
AM_RANGE(0xfffeb0, 0xfffeb1) AM_DEVWRITE8( "port2", h8_port_device, ddr_w, 0x00ff)
|
||||
AM_RANGE(0xfffeb2, 0xfffeb3) AM_DEVWRITE8( "port3", h8_port_device, ddr_w, 0xff00)
|
||||
AM_RANGE(0xfffeb4, 0xfffeb5) AM_DEVWRITE8( "port5", h8_port_device, ddr_w, 0xff00)
|
||||
AM_RANGE(0xfffeb8, 0xfffeb9) AM_DEVWRITE8( "porta", h8_port_device, ddr_w, 0x00ff)
|
||||
AM_RANGE(0xfffeba, 0xfffebb) AM_DEVWRITE8( "portb", h8_port_device, ddr_w, 0xff00)
|
||||
AM_RANGE(0xfffeba, 0xfffebb) AM_DEVWRITE8( "portc", h8_port_device, ddr_w, 0x00ff)
|
||||
AM_RANGE(0xfffebc, 0xfffebd) AM_DEVWRITE8( "portd", h8_port_device, ddr_w, 0xff00)
|
||||
AM_RANGE(0xfffebc, 0xfffebd) AM_DEVWRITE8( "porte", h8_port_device, ddr_w, 0x00ff)
|
||||
AM_RANGE(0xfffebe, 0xfffebf) AM_DEVWRITE8( "portf", h8_port_device, ddr_w, 0xff00)
|
||||
AM_RANGE(0xfffebe, 0xfffebf) AM_DEVWRITE8( "portg", h8_port_device, ddr_w, 0x00ff)
|
||||
AM_RANGE(0xfffec0, 0xfffec1) AM_DEVREADWRITE8("intc", h8s_intc_device, icr_r, icr_w, 0xffff)
|
||||
AM_RANGE(0xfffec2, 0xfffec3) AM_DEVREADWRITE8("intc", h8s_intc_device, icrc_r, icrc_w, 0xff00)
|
||||
AM_RANGE(0xffff2c, 0xffff2d) AM_DEVREADWRITE8("intc", h8s_intc_device, iscrh_r, iscrh_w, 0xff00)
|
||||
AM_RANGE(0xffff2c, 0xffff2d) AM_DEVREADWRITE8("intc", h8s_intc_device, iscrl_r, iscrl_w, 0x00ff)
|
||||
AM_RANGE(0xffff2e, 0xffff2f) AM_DEVREADWRITE8("intc", h8s_intc_device, ier_r, ier_w, 0xff00)
|
||||
AM_RANGE(0xffff2e, 0xffff2f) AM_DEVREADWRITE8("intc", h8s_intc_device, isr_r, isr_w, 0x00ff)
|
||||
AM_RANGE(0xffff30, 0xffff35) AM_DEVREADWRITE8("dtc", h8_dtc_device, dtcer_r, dtcer_w, 0xffff)
|
||||
AM_RANGE(0xffff36, 0xffff37) AM_DEVREADWRITE8("dtc", h8_dtc_device, dtvecr_r, dtvecr_w, 0x00ff)
|
||||
AM_RANGE(0xffff38, 0xffff39) AM_READWRITE8( syscr_r, syscr_w, 0x00ff)
|
||||
AM_RANGE(0xffff3c, 0xffff3d) AM_READWRITE( mstpcr_r, mstpcr_w )
|
||||
map(0xfffeb0, 0xfffeb0).w("port1", FUNC(h8_port_device::ddr_w));
|
||||
map(0xfffeb1, 0xfffeb1).w("port2", FUNC(h8_port_device::ddr_w));
|
||||
map(0xfffeb2, 0xfffeb2).w("port3", FUNC(h8_port_device::ddr_w));
|
||||
map(0xfffeb4, 0xfffeb4).w("port5", FUNC(h8_port_device::ddr_w));
|
||||
map(0xfffeb9, 0xfffeb9).w("porta", FUNC(h8_port_device::ddr_w));
|
||||
map(0xfffeba, 0xfffeba).w("portb", FUNC(h8_port_device::ddr_w));
|
||||
map(0xfffebb, 0xfffebb).w("portc", FUNC(h8_port_device::ddr_w));
|
||||
map(0xfffebc, 0xfffebc).w("portd", FUNC(h8_port_device::ddr_w));
|
||||
map(0xfffebd, 0xfffebd).w("porte", FUNC(h8_port_device::ddr_w));
|
||||
map(0xfffebe, 0xfffebe).w("portf", FUNC(h8_port_device::ddr_w));
|
||||
map(0xfffebf, 0xfffebf).w("portg", FUNC(h8_port_device::ddr_w));
|
||||
map(0xfffec0, 0xfffec1).rw("intc", FUNC(h8s_intc_device::icr_r), FUNC(h8s_intc_device::icr_w));
|
||||
map(0xfffec2, 0xfffec2).rw("intc", FUNC(h8s_intc_device::icrc_r), FUNC(h8s_intc_device::icrc_w));
|
||||
map(0xffff2c, 0xffff2c).rw("intc", FUNC(h8s_intc_device::iscrh_r), FUNC(h8s_intc_device::iscrh_w));
|
||||
map(0xffff2d, 0xffff2d).rw("intc", FUNC(h8s_intc_device::iscrl_r), FUNC(h8s_intc_device::iscrl_w));
|
||||
map(0xffff2e, 0xffff2e).rw("intc", FUNC(h8s_intc_device::ier_r), FUNC(h8s_intc_device::ier_w));
|
||||
map(0xffff2f, 0xffff2f).rw("intc", FUNC(h8s_intc_device::isr_r), FUNC(h8s_intc_device::isr_w));
|
||||
map(0xffff30, 0xffff35).rw("dtc", FUNC(h8_dtc_device::dtcer_r), FUNC(h8_dtc_device::dtcer_w));
|
||||
map(0xffff37, 0xffff37).rw("dtc", FUNC(h8_dtc_device::dtvecr_r), FUNC(h8_dtc_device::dtvecr_w));
|
||||
map(0xffff39, 0xffff39).rw(this, FUNC(h8s2245_device::syscr_r), FUNC(h8s2245_device::syscr_w));
|
||||
map(0xffff3c, 0xffff3d).rw(this, FUNC(h8s2245_device::mstpcr_r), FUNC(h8s2245_device::mstpcr_w));
|
||||
|
||||
AM_RANGE(0xffff50, 0xffff51) AM_DEVREAD8( "port1", h8_port_device, port_r, 0xff00)
|
||||
AM_RANGE(0xffff50, 0xffff51) AM_DEVREAD8( "port2", h8_port_device, port_r, 0x00ff)
|
||||
AM_RANGE(0xffff52, 0xffff53) AM_DEVREAD8( "port3", h8_port_device, port_r, 0xff00)
|
||||
AM_RANGE(0xffff52, 0xffff53) AM_DEVREAD8( "port4", h8_port_device, port_r, 0x00ff)
|
||||
AM_RANGE(0xffff54, 0xffff55) AM_DEVREAD8( "port5", h8_port_device, port_r, 0xff00)
|
||||
AM_RANGE(0xffff58, 0xffff59) AM_DEVREAD8( "porta", h8_port_device, port_r, 0x00ff)
|
||||
AM_RANGE(0xffff5a, 0xffff5b) AM_DEVREAD8( "portb", h8_port_device, port_r, 0xff00)
|
||||
AM_RANGE(0xffff5a, 0xffff5b) AM_DEVREAD8( "portc", h8_port_device, port_r, 0x00ff)
|
||||
AM_RANGE(0xffff5c, 0xffff5d) AM_DEVREAD8( "portd", h8_port_device, port_r, 0xff00)
|
||||
AM_RANGE(0xffff5c, 0xffff5d) AM_DEVREAD8( "porte", h8_port_device, port_r, 0x00ff)
|
||||
AM_RANGE(0xffff5e, 0xffff5f) AM_DEVREAD8( "portf", h8_port_device, port_r, 0xff00)
|
||||
AM_RANGE(0xffff5e, 0xffff5f) AM_DEVREAD8( "portg", h8_port_device, port_r, 0x00ff)
|
||||
AM_RANGE(0xffff60, 0xffff61) AM_DEVREADWRITE8("port1", h8_port_device, dr_r, dr_w, 0xff00)
|
||||
AM_RANGE(0xffff60, 0xffff61) AM_DEVREADWRITE8("port2", h8_port_device, dr_r, dr_w, 0x00ff)
|
||||
AM_RANGE(0xffff62, 0xffff63) AM_DEVREADWRITE8("port3", h8_port_device, dr_r, dr_w, 0xff00)
|
||||
AM_RANGE(0xffff64, 0xffff65) AM_DEVREADWRITE8("port5", h8_port_device, dr_r, dr_w, 0xff00)
|
||||
AM_RANGE(0xffff68, 0xffff69) AM_DEVREADWRITE8("porta", h8_port_device, dr_r, dr_w, 0x00ff)
|
||||
AM_RANGE(0xffff6a, 0xffff6b) AM_DEVREADWRITE8("portb", h8_port_device, dr_r, dr_w, 0xff00)
|
||||
AM_RANGE(0xffff6a, 0xffff6b) AM_DEVREADWRITE8("portc", h8_port_device, dr_r, dr_w, 0x00ff)
|
||||
AM_RANGE(0xffff6c, 0xffff6d) AM_DEVREADWRITE8("portd", h8_port_device, dr_r, dr_w, 0xff00)
|
||||
AM_RANGE(0xffff6c, 0xffff6d) AM_DEVREADWRITE8("porte", h8_port_device, dr_r, dr_w, 0x00ff)
|
||||
AM_RANGE(0xffff6e, 0xffff6f) AM_DEVREADWRITE8("portf", h8_port_device, dr_r, dr_w, 0xff00)
|
||||
AM_RANGE(0xffff6e, 0xffff6f) AM_DEVREADWRITE8("portg", h8_port_device, dr_r, dr_w, 0x00ff)
|
||||
AM_RANGE(0xffff70, 0xffff71) AM_DEVREADWRITE8("porta", h8_port_device, pcr_r, pcr_w, 0xff00)
|
||||
AM_RANGE(0xffff70, 0xffff71) AM_DEVREADWRITE8("portb", h8_port_device, pcr_r, pcr_w, 0x00ff)
|
||||
AM_RANGE(0xffff72, 0xffff73) AM_DEVREADWRITE8("portc", h8_port_device, pcr_r, pcr_w, 0xff00)
|
||||
AM_RANGE(0xffff72, 0xffff73) AM_DEVREADWRITE8("portd", h8_port_device, pcr_r, pcr_w, 0x00ff)
|
||||
AM_RANGE(0xffff74, 0xffff75) AM_DEVREADWRITE8("porte", h8_port_device, pcr_r, pcr_w, 0xff00)
|
||||
AM_RANGE(0xffff76, 0xffff77) AM_DEVREADWRITE8("port3", h8_port_device, odr_r, odr_w, 0xff00)
|
||||
AM_RANGE(0xffff76, 0xffff77) AM_DEVREADWRITE8("porta", h8_port_device, odr_r, odr_w, 0x00ff)
|
||||
AM_RANGE(0xffff78, 0xffff79) AM_DEVREADWRITE8("sci0", h8_sci_device, smr_r, smr_w, 0xff00)
|
||||
AM_RANGE(0xffff78, 0xffff79) AM_DEVREADWRITE8("sci0", h8_sci_device, brr_r, brr_w, 0x00ff)
|
||||
AM_RANGE(0xffff7a, 0xffff7b) AM_DEVREADWRITE8("sci0", h8_sci_device, scr_r, scr_w, 0xff00)
|
||||
AM_RANGE(0xffff7a, 0xffff7b) AM_DEVREADWRITE8("sci0", h8_sci_device, tdr_r, tdr_w, 0x00ff)
|
||||
AM_RANGE(0xffff7c, 0xffff7d) AM_DEVREADWRITE8("sci0", h8_sci_device, ssr_r, ssr_w, 0xff00)
|
||||
AM_RANGE(0xffff7c, 0xffff7d) AM_DEVREAD8( "sci0", h8_sci_device, rdr_r, 0x00ff)
|
||||
AM_RANGE(0xffff7e, 0xffff7f) AM_DEVREADWRITE8("sci0", h8_sci_device, scmr_r, scmr_w, 0xff00)
|
||||
AM_RANGE(0xffff80, 0xffff81) AM_DEVREADWRITE8("sci1", h8_sci_device, smr_r, smr_w, 0xff00)
|
||||
AM_RANGE(0xffff80, 0xffff81) AM_DEVREADWRITE8("sci1", h8_sci_device, brr_r, brr_w, 0x00ff)
|
||||
AM_RANGE(0xffff82, 0xffff83) AM_DEVREADWRITE8("sci1", h8_sci_device, scr_r, scr_w, 0xff00)
|
||||
AM_RANGE(0xffff82, 0xffff83) AM_DEVREADWRITE8("sci1", h8_sci_device, tdr_r, tdr_w, 0x00ff)
|
||||
AM_RANGE(0xffff84, 0xffff85) AM_DEVREADWRITE8("sci1", h8_sci_device, ssr_r, ssr_w, 0xff00)
|
||||
AM_RANGE(0xffff84, 0xffff85) AM_DEVREAD8( "sci1", h8_sci_device, rdr_r, 0x00ff)
|
||||
AM_RANGE(0xffff86, 0xffff87) AM_DEVREADWRITE8("sci1", h8_sci_device, scmr_r, scmr_w, 0xff00)
|
||||
AM_RANGE(0xffff88, 0xffff89) AM_DEVREADWRITE8("sci2", h8_sci_device, smr_r, smr_w, 0xff00)
|
||||
AM_RANGE(0xffff88, 0xffff89) AM_DEVREADWRITE8("sci2", h8_sci_device, brr_r, brr_w, 0x00ff)
|
||||
AM_RANGE(0xffff8a, 0xffff8b) AM_DEVREADWRITE8("sci2", h8_sci_device, scr_r, scr_w, 0xff00)
|
||||
AM_RANGE(0xffff8a, 0xffff8b) AM_DEVREADWRITE8("sci2", h8_sci_device, tdr_r, tdr_w, 0x00ff)
|
||||
AM_RANGE(0xffff8c, 0xffff8d) AM_DEVREADWRITE8("sci2", h8_sci_device, ssr_r, ssr_w, 0xff00)
|
||||
AM_RANGE(0xffff8c, 0xffff8d) AM_DEVREAD8( "sci2", h8_sci_device, rdr_r, 0x00ff)
|
||||
AM_RANGE(0xffff8e, 0xffff8f) AM_DEVREADWRITE8("sci2", h8_sci_device, scmr_r, scmr_w, 0xff00)
|
||||
AM_RANGE(0xffff90, 0xffff97) AM_DEVREAD8( "adc", h8_adc_device, addr8_r, 0xffff)
|
||||
AM_RANGE(0xffff98, 0xffff99) AM_DEVREADWRITE8("adc", h8_adc_device, adcsr_r, adcsr_w, 0xff00)
|
||||
AM_RANGE(0xffff98, 0xffff99) AM_DEVREADWRITE8("adc", h8_adc_device, adcr_r, adcr_w, 0x00ff)
|
||||
AM_RANGE(0xffffb0, 0xffffb1) AM_DEVREADWRITE8("timer8_0", h8_timer8_channel_device, tcr_r, tcr_w, 0xff00)
|
||||
AM_RANGE(0xffffb0, 0xffffb1) AM_DEVREADWRITE8("timer8_1", h8_timer8_channel_device, tcr_r, tcr_w, 0x00ff)
|
||||
AM_RANGE(0xffffb2, 0xffffb3) AM_DEVREADWRITE8("timer8_0", h8_timer8_channel_device, tcsr_r, tcsr_w, 0xff00)
|
||||
AM_RANGE(0xffffb2, 0xffffb3) AM_DEVREADWRITE8("timer8_1", h8_timer8_channel_device, tcsr_r, tcsr_w, 0x00ff)
|
||||
AM_RANGE(0xffffb4, 0xffffb7) AM_DEVREADWRITE8("timer8_0", h8_timer8_channel_device, tcor_r, tcor_w, 0xff00)
|
||||
AM_RANGE(0xffffb4, 0xffffb7) AM_DEVREADWRITE8("timer8_1", h8_timer8_channel_device, tcor_r, tcor_w, 0x00ff)
|
||||
AM_RANGE(0xffffb8, 0xffffb9) AM_DEVREADWRITE8("timer8_0", h8_timer8_channel_device, tcnt_r, tcnt_w, 0xff00)
|
||||
AM_RANGE(0xffffb8, 0xffffb9) AM_DEVREADWRITE8("timer8_1", h8_timer8_channel_device, tcnt_r, tcnt_w, 0x00ff)
|
||||
AM_RANGE(0xffffbc, 0xffffbd) AM_DEVREADWRITE( "watchdog", h8_watchdog_device, wd_r, wd_w )
|
||||
AM_RANGE(0xffffbe, 0xffffbf) AM_DEVREADWRITE( "watchdog", h8_watchdog_device, rst_r, rst_w )
|
||||
AM_RANGE(0xffffc0, 0xffffc1) AM_DEVREADWRITE8("timer16", h8_timer16_device, tstr_r, tstr_w, 0xff00)
|
||||
AM_RANGE(0xffffc0, 0xffffc1) AM_DEVREADWRITE8("timer16", h8_timer16_device, tsyr_r, tsyr_w, 0x00ff)
|
||||
AM_RANGE(0xffffd0, 0xffffd1) AM_DEVREADWRITE8("timer16:0", h8_timer16_channel_device, tcr_r, tcr_w, 0xff00)
|
||||
AM_RANGE(0xffffd0, 0xffffd1) AM_DEVREADWRITE8("timer16:0", h8_timer16_channel_device, tmdr_r, tmdr_w, 0x00ff)
|
||||
AM_RANGE(0xffffd2, 0xffffd3) AM_DEVREADWRITE8("timer16:0", h8_timer16_channel_device, tior_r, tior_w, 0xffff)
|
||||
AM_RANGE(0xffffd4, 0xffffd5) AM_DEVREADWRITE8("timer16:0", h8_timer16_channel_device, tier_r, tier_w, 0xff00)
|
||||
AM_RANGE(0xffffd4, 0xffffd5) AM_DEVREADWRITE8("timer16:0", h8_timer16_channel_device, tsr_r, tsr_w, 0x00ff)
|
||||
AM_RANGE(0xffffd6, 0xffffd7) AM_DEVREADWRITE( "timer16:0", h8_timer16_channel_device, tcnt_r, tcnt_w )
|
||||
AM_RANGE(0xffffd8, 0xffffdf) AM_DEVREADWRITE( "timer16:0", h8_timer16_channel_device, tgr_r, tgr_w )
|
||||
AM_RANGE(0xffffe0, 0xffffe1) AM_DEVREADWRITE8("timer16:1", h8_timer16_channel_device, tcr_r, tcr_w, 0xff00)
|
||||
AM_RANGE(0xffffe0, 0xffffe1) AM_DEVREADWRITE8("timer16:1", h8_timer16_channel_device, tmdr_r, tmdr_w, 0x00ff)
|
||||
AM_RANGE(0xffffe2, 0xffffe3) AM_DEVREADWRITE8("timer16:1", h8_timer16_channel_device, tior_r, tior_w, 0xff00)
|
||||
AM_RANGE(0xffffe4, 0xffffe5) AM_DEVREADWRITE8("timer16:1", h8_timer16_channel_device, tier_r, tier_w, 0xff00)
|
||||
AM_RANGE(0xffffe4, 0xffffe5) AM_DEVREADWRITE8("timer16:1", h8_timer16_channel_device, tsr_r, tsr_w, 0x00ff)
|
||||
AM_RANGE(0xffffe6, 0xffffe7) AM_DEVREADWRITE( "timer16:1", h8_timer16_channel_device, tcnt_r, tcnt_w )
|
||||
AM_RANGE(0xffffe8, 0xffffeb) AM_DEVREADWRITE( "timer16:1", h8_timer16_channel_device, tgr_r, tgr_w )
|
||||
AM_RANGE(0xfffff0, 0xfffff1) AM_DEVREADWRITE8("timer16:2", h8_timer16_channel_device, tcr_r, tcr_w, 0xff00)
|
||||
AM_RANGE(0xfffff0, 0xfffff1) AM_DEVREADWRITE8("timer16:2", h8_timer16_channel_device, tmdr_r, tmdr_w, 0x00ff)
|
||||
AM_RANGE(0xfffff2, 0xfffff3) AM_DEVREADWRITE8("timer16:2", h8_timer16_channel_device, tior_r, tior_w, 0xff00)
|
||||
AM_RANGE(0xfffff4, 0xfffff5) AM_DEVREADWRITE8("timer16:2", h8_timer16_channel_device, tier_r, tier_w, 0xff00)
|
||||
AM_RANGE(0xfffff4, 0xfffff5) AM_DEVREADWRITE8("timer16:2", h8_timer16_channel_device, tsr_r, tsr_w, 0x00ff)
|
||||
AM_RANGE(0xfffff6, 0xfffff7) AM_DEVREADWRITE( "timer16:2", h8_timer16_channel_device, tcnt_r, tcnt_w )
|
||||
AM_RANGE(0xfffff8, 0xfffffb) AM_DEVREADWRITE( "timer16:2", h8_timer16_channel_device, tgr_r, tgr_w )
|
||||
ADDRESS_MAP_END
|
||||
map(0xffff50, 0xffff50).r("port1", FUNC(h8_port_device::port_r));
|
||||
map(0xffff51, 0xffff51).r("port2", FUNC(h8_port_device::port_r));
|
||||
map(0xffff52, 0xffff52).r("port3", FUNC(h8_port_device::port_r));
|
||||
map(0xffff53, 0xffff53).r("port4", FUNC(h8_port_device::port_r));
|
||||
map(0xffff54, 0xffff54).r("port5", FUNC(h8_port_device::port_r));
|
||||
map(0xffff59, 0xffff59).r("porta", FUNC(h8_port_device::port_r));
|
||||
map(0xffff5a, 0xffff5a).r("portb", FUNC(h8_port_device::port_r));
|
||||
map(0xffff5b, 0xffff5b).r("portc", FUNC(h8_port_device::port_r));
|
||||
map(0xffff5c, 0xffff5c).r("portd", FUNC(h8_port_device::port_r));
|
||||
map(0xffff5d, 0xffff5d).r("porte", FUNC(h8_port_device::port_r));
|
||||
map(0xffff5e, 0xffff5e).r("portf", FUNC(h8_port_device::port_r));
|
||||
map(0xffff5f, 0xffff5f).r("portg", FUNC(h8_port_device::port_r));
|
||||
map(0xffff60, 0xffff60).rw("port1", FUNC(h8_port_device::dr_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffff61, 0xffff61).rw("port2", FUNC(h8_port_device::dr_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffff62, 0xffff62).rw("port3", FUNC(h8_port_device::dr_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffff64, 0xffff64).rw("port5", FUNC(h8_port_device::dr_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffff69, 0xffff69).rw("porta", FUNC(h8_port_device::dr_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffff6a, 0xffff6a).rw("portb", FUNC(h8_port_device::dr_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffff6b, 0xffff6b).rw("portc", FUNC(h8_port_device::dr_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffff6c, 0xffff6c).rw("portd", FUNC(h8_port_device::dr_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffff6d, 0xffff6d).rw("porte", FUNC(h8_port_device::dr_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffff6e, 0xffff6e).rw("portf", FUNC(h8_port_device::dr_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffff6f, 0xffff6f).rw("portg", FUNC(h8_port_device::dr_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffff70, 0xffff70).rw("porta", FUNC(h8_port_device::pcr_r), FUNC(h8_port_device::pcr_w));
|
||||
map(0xffff71, 0xffff71).rw("portb", FUNC(h8_port_device::pcr_r), FUNC(h8_port_device::pcr_w));
|
||||
map(0xffff72, 0xffff72).rw("portc", FUNC(h8_port_device::pcr_r), FUNC(h8_port_device::pcr_w));
|
||||
map(0xffff73, 0xffff73).rw("portd", FUNC(h8_port_device::pcr_r), FUNC(h8_port_device::pcr_w));
|
||||
map(0xffff74, 0xffff74).rw("porte", FUNC(h8_port_device::pcr_r), FUNC(h8_port_device::pcr_w));
|
||||
map(0xffff76, 0xffff76).rw("port3", FUNC(h8_port_device::odr_r), FUNC(h8_port_device::odr_w));
|
||||
map(0xffff77, 0xffff77).rw("porta", FUNC(h8_port_device::odr_r), FUNC(h8_port_device::odr_w));
|
||||
map(0xffff78, 0xffff78).rw("sci0", FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
|
||||
map(0xffff79, 0xffff79).rw("sci0", FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
|
||||
map(0xffff7a, 0xffff7a).rw("sci0", FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
|
||||
map(0xffff7b, 0xffff7b).rw("sci0", FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
|
||||
map(0xffff7c, 0xffff7c).rw("sci0", FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
|
||||
map(0xffff7d, 0xffff7d).r("sci0", FUNC(h8_sci_device::rdr_r));
|
||||
map(0xffff7e, 0xffff7e).rw("sci0", FUNC(h8_sci_device::scmr_r), FUNC(h8_sci_device::scmr_w));
|
||||
map(0xffff80, 0xffff80).rw("sci1", FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
|
||||
map(0xffff81, 0xffff81).rw("sci1", FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
|
||||
map(0xffff82, 0xffff82).rw("sci1", FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
|
||||
map(0xffff83, 0xffff83).rw("sci1", FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
|
||||
map(0xffff84, 0xffff84).rw("sci1", FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
|
||||
map(0xffff85, 0xffff85).r("sci1", FUNC(h8_sci_device::rdr_r));
|
||||
map(0xffff86, 0xffff86).rw("sci1", FUNC(h8_sci_device::scmr_r), FUNC(h8_sci_device::scmr_w));
|
||||
map(0xffff88, 0xffff88).rw("sci2", FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
|
||||
map(0xffff89, 0xffff89).rw("sci2", FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
|
||||
map(0xffff8a, 0xffff8a).rw("sci2", FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
|
||||
map(0xffff8b, 0xffff8b).rw("sci2", FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
|
||||
map(0xffff8c, 0xffff8c).rw("sci2", FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
|
||||
map(0xffff8d, 0xffff8d).r("sci2", FUNC(h8_sci_device::rdr_r));
|
||||
map(0xffff8e, 0xffff8e).rw("sci2", FUNC(h8_sci_device::scmr_r), FUNC(h8_sci_device::scmr_w));
|
||||
map(0xffff90, 0xffff97).r("adc", FUNC(h8_adc_device::addr8_r));
|
||||
map(0xffff98, 0xffff98).rw("adc", FUNC(h8_adc_device::adcsr_r), FUNC(h8_adc_device::adcsr_w));
|
||||
map(0xffff99, 0xffff99).rw("adc", FUNC(h8_adc_device::adcr_r), FUNC(h8_adc_device::adcr_w));
|
||||
map(0xffffb0, 0xffffb0).rw("timer8_0", FUNC(h8_timer8_channel_device::tcr_r), FUNC(h8_timer8_channel_device::tcr_w));
|
||||
map(0xffffb1, 0xffffb1).rw("timer8_1", FUNC(h8_timer8_channel_device::tcr_r), FUNC(h8_timer8_channel_device::tcr_w));
|
||||
map(0xffffb2, 0xffffb2).rw("timer8_0", FUNC(h8_timer8_channel_device::tcsr_r), FUNC(h8_timer8_channel_device::tcsr_w));
|
||||
map(0xffffb3, 0xffffb3).rw("timer8_1", FUNC(h8_timer8_channel_device::tcsr_r), FUNC(h8_timer8_channel_device::tcsr_w));
|
||||
map(0xffffb4, 0xffffb7).rw("timer8_0", FUNC(h8_timer8_channel_device::tcor_r), FUNC(h8_timer8_channel_device::tcor_w)).umask16(0xff00);
|
||||
map(0xffffb4, 0xffffb7).rw("timer8_1", FUNC(h8_timer8_channel_device::tcor_r), FUNC(h8_timer8_channel_device::tcor_w)).umask16(0x00ff);
|
||||
map(0xffffb8, 0xffffb8).rw("timer8_0", FUNC(h8_timer8_channel_device::tcnt_r), FUNC(h8_timer8_channel_device::tcnt_w));
|
||||
map(0xffffb9, 0xffffb9).rw("timer8_1", FUNC(h8_timer8_channel_device::tcnt_r), FUNC(h8_timer8_channel_device::tcnt_w));
|
||||
map(0xffffbc, 0xffffbd).rw("watchdog", FUNC(h8_watchdog_device::wd_r), FUNC(h8_watchdog_device::wd_w));
|
||||
map(0xffffbe, 0xffffbf).rw("watchdog", FUNC(h8_watchdog_device::rst_r), FUNC(h8_watchdog_device::rst_w));
|
||||
map(0xffffc0, 0xffffc0).rw("timer16", FUNC(h8_timer16_device::tstr_r), FUNC(h8_timer16_device::tstr_w));
|
||||
map(0xffffc1, 0xffffc1).rw("timer16", FUNC(h8_timer16_device::tsyr_r), FUNC(h8_timer16_device::tsyr_w));
|
||||
map(0xffffd0, 0xffffd0).rw("timer16:0", FUNC(h8_timer16_channel_device::tcr_r), FUNC(h8_timer16_channel_device::tcr_w));
|
||||
map(0xffffd1, 0xffffd1).rw("timer16:0", FUNC(h8_timer16_channel_device::tmdr_r), FUNC(h8_timer16_channel_device::tmdr_w));
|
||||
map(0xffffd2, 0xffffd3).rw("timer16:0", FUNC(h8_timer16_channel_device::tior_r), FUNC(h8_timer16_channel_device::tior_w));
|
||||
map(0xffffd4, 0xffffd4).rw("timer16:0", FUNC(h8_timer16_channel_device::tier_r), FUNC(h8_timer16_channel_device::tier_w));
|
||||
map(0xffffd5, 0xffffd5).rw("timer16:0", FUNC(h8_timer16_channel_device::tsr_r), FUNC(h8_timer16_channel_device::tsr_w));
|
||||
map(0xffffd6, 0xffffd7).rw("timer16:0", FUNC(h8_timer16_channel_device::tcnt_r), FUNC(h8_timer16_channel_device::tcnt_w));
|
||||
map(0xffffd8, 0xffffdf).rw("timer16:0", FUNC(h8_timer16_channel_device::tgr_r), FUNC(h8_timer16_channel_device::tgr_w));
|
||||
map(0xffffe0, 0xffffe0).rw("timer16:1", FUNC(h8_timer16_channel_device::tcr_r), FUNC(h8_timer16_channel_device::tcr_w));
|
||||
map(0xffffe1, 0xffffe1).rw("timer16:1", FUNC(h8_timer16_channel_device::tmdr_r), FUNC(h8_timer16_channel_device::tmdr_w));
|
||||
map(0xffffe2, 0xffffe2).rw("timer16:1", FUNC(h8_timer16_channel_device::tior_r), FUNC(h8_timer16_channel_device::tior_w));
|
||||
map(0xffffe4, 0xffffe4).rw("timer16:1", FUNC(h8_timer16_channel_device::tier_r), FUNC(h8_timer16_channel_device::tier_w));
|
||||
map(0xffffe5, 0xffffe5).rw("timer16:1", FUNC(h8_timer16_channel_device::tsr_r), FUNC(h8_timer16_channel_device::tsr_w));
|
||||
map(0xffffe6, 0xffffe7).rw("timer16:1", FUNC(h8_timer16_channel_device::tcnt_r), FUNC(h8_timer16_channel_device::tcnt_w));
|
||||
map(0xffffe8, 0xffffeb).rw("timer16:1", FUNC(h8_timer16_channel_device::tgr_r), FUNC(h8_timer16_channel_device::tgr_w));
|
||||
map(0xfffff0, 0xfffff0).rw("timer16:2", FUNC(h8_timer16_channel_device::tcr_r), FUNC(h8_timer16_channel_device::tcr_w));
|
||||
map(0xfffff1, 0xfffff1).rw("timer16:2", FUNC(h8_timer16_channel_device::tmdr_r), FUNC(h8_timer16_channel_device::tmdr_w));
|
||||
map(0xfffff2, 0xfffff2).rw("timer16:2", FUNC(h8_timer16_channel_device::tior_r), FUNC(h8_timer16_channel_device::tior_w));
|
||||
map(0xfffff4, 0xfffff4).rw("timer16:2", FUNC(h8_timer16_channel_device::tier_r), FUNC(h8_timer16_channel_device::tier_w));
|
||||
map(0xfffff5, 0xfffff5).rw("timer16:2", FUNC(h8_timer16_channel_device::tsr_r), FUNC(h8_timer16_channel_device::tsr_w));
|
||||
map(0xfffff6, 0xfffff7).rw("timer16:2", FUNC(h8_timer16_channel_device::tcnt_r), FUNC(h8_timer16_channel_device::tcnt_w));
|
||||
map(0xfffff8, 0xfffffb).rw("timer16:2", FUNC(h8_timer16_channel_device::tgr_r), FUNC(h8_timer16_channel_device::tgr_w));
|
||||
}
|
||||
|
||||
MACHINE_CONFIG_START(h8s2245_device::device_add_mconfig)
|
||||
MCFG_H8S_INTC_ADD("intc")
|
||||
|
||||
@ -98,168 +98,169 @@ h8s2329_device::h8s2329_device(const machine_config &mconfig, const char *tag, d
|
||||
{
|
||||
}
|
||||
|
||||
ADDRESS_MAP_START(h8s2320_device::map)
|
||||
AM_RANGE(ram_start, 0xfffbff) AM_RAM
|
||||
void h8s2320_device::map(address_map &map)
|
||||
{
|
||||
map(ram_start, 0xfffbff).ram();
|
||||
|
||||
AM_RANGE(0xfffe80, 0xfffe81) AM_DEVREADWRITE8("timer16:3", h8_timer16_channel_device, tcr_r, tcr_w, 0xff00)
|
||||
AM_RANGE(0xfffe80, 0xfffe81) AM_DEVREADWRITE8("timer16:3", h8_timer16_channel_device, tmdr_r, tmdr_w, 0x00ff)
|
||||
AM_RANGE(0xfffe82, 0xfffe83) AM_DEVREADWRITE8("timer16:3", h8_timer16_channel_device, tior_r, tior_w, 0xffff)
|
||||
AM_RANGE(0xfffe84, 0xfffe85) AM_DEVREADWRITE8("timer16:3", h8_timer16_channel_device, tier_r, tier_w, 0xff00)
|
||||
AM_RANGE(0xfffe84, 0xfffe85) AM_DEVREADWRITE8("timer16:3", h8_timer16_channel_device, tsr_r, tsr_w, 0x00ff)
|
||||
AM_RANGE(0xfffe86, 0xfffe87) AM_DEVREADWRITE( "timer16:3", h8_timer16_channel_device, tcnt_r, tcnt_w )
|
||||
AM_RANGE(0xfffe88, 0xfffe8f) AM_DEVREADWRITE( "timer16:3", h8_timer16_channel_device, tgr_r, tgr_w )
|
||||
AM_RANGE(0xfffe90, 0xfffe91) AM_DEVREADWRITE8("timer16:4", h8_timer16_channel_device, tcr_r, tcr_w, 0xff00)
|
||||
AM_RANGE(0xfffe90, 0xfffe91) AM_DEVREADWRITE8("timer16:4", h8_timer16_channel_device, tmdr_r, tmdr_w, 0x00ff)
|
||||
AM_RANGE(0xfffe92, 0xfffe93) AM_DEVREADWRITE8("timer16:4", h8_timer16_channel_device, tior_r, tior_w, 0xff00)
|
||||
AM_RANGE(0xfffe94, 0xfffe95) AM_DEVREADWRITE8("timer16:4", h8_timer16_channel_device, tier_r, tier_w, 0xff00)
|
||||
AM_RANGE(0xfffe94, 0xfffe95) AM_DEVREADWRITE8("timer16:4", h8_timer16_channel_device, tsr_r, tsr_w, 0x00ff)
|
||||
AM_RANGE(0xfffe96, 0xfffe97) AM_DEVREADWRITE( "timer16:4", h8_timer16_channel_device, tcnt_r, tcnt_w )
|
||||
AM_RANGE(0xfffe98, 0xfffe9b) AM_DEVREADWRITE( "timer16:4", h8_timer16_channel_device, tgr_r, tgr_w )
|
||||
AM_RANGE(0xfffea0, 0xfffea1) AM_DEVREADWRITE8("timer16:5", h8_timer16_channel_device, tcr_r, tcr_w, 0xff00)
|
||||
AM_RANGE(0xfffea0, 0xfffea1) AM_DEVREADWRITE8("timer16:5", h8_timer16_channel_device, tmdr_r, tmdr_w, 0x00ff)
|
||||
AM_RANGE(0xfffea2, 0xfffea3) AM_DEVREADWRITE8("timer16:5", h8_timer16_channel_device, tior_r, tior_w, 0xff00)
|
||||
AM_RANGE(0xfffea4, 0xfffea5) AM_DEVREADWRITE8("timer16:5", h8_timer16_channel_device, tier_r, tier_w, 0xff00)
|
||||
AM_RANGE(0xfffea4, 0xfffea5) AM_DEVREADWRITE8("timer16:5", h8_timer16_channel_device, tsr_r, tsr_w, 0x00ff)
|
||||
AM_RANGE(0xfffea6, 0xfffea7) AM_DEVREADWRITE( "timer16:5", h8_timer16_channel_device, tcnt_r, tcnt_w )
|
||||
AM_RANGE(0xfffea8, 0xfffeab) AM_DEVREADWRITE( "timer16:5", h8_timer16_channel_device, tgr_r, tgr_w )
|
||||
AM_RANGE(0xfffeb0, 0xfffeb1) AM_DEVWRITE8( "port1", h8_port_device, ddr_w, 0xff00)
|
||||
AM_RANGE(0xfffeb0, 0xfffeb1) AM_DEVWRITE8( "port2", h8_port_device, ddr_w, 0x00ff)
|
||||
AM_RANGE(0xfffeb2, 0xfffeb3) AM_DEVWRITE8( "port3", h8_port_device, ddr_w, 0xff00)
|
||||
AM_RANGE(0xfffeb4, 0xfffeb5) AM_DEVWRITE8( "port5", h8_port_device, ddr_w, 0xff00)
|
||||
AM_RANGE(0xfffeb4, 0xfffeb5) AM_DEVWRITE8( "port6", h8_port_device, ddr_w, 0x00ff)
|
||||
AM_RANGE(0xfffeb8, 0xfffeb9) AM_DEVWRITE8( "porta", h8_port_device, ddr_w, 0x00ff)
|
||||
AM_RANGE(0xfffeba, 0xfffebb) AM_DEVWRITE8( "portb", h8_port_device, ddr_w, 0xff00)
|
||||
AM_RANGE(0xfffeba, 0xfffebb) AM_DEVWRITE8( "portc", h8_port_device, ddr_w, 0x00ff)
|
||||
AM_RANGE(0xfffebc, 0xfffebd) AM_DEVWRITE8( "portd", h8_port_device, ddr_w, 0xff00)
|
||||
AM_RANGE(0xfffebc, 0xfffebd) AM_DEVWRITE8( "porte", h8_port_device, ddr_w, 0x00ff)
|
||||
AM_RANGE(0xfffebe, 0xfffebf) AM_DEVWRITE8( "portf", h8_port_device, ddr_w, 0xff00)
|
||||
AM_RANGE(0xfffebe, 0xfffebf) AM_DEVWRITE8( "portg", h8_port_device, ddr_w, 0x00ff)
|
||||
AM_RANGE(0xfffec0, 0xfffec1) AM_DEVREADWRITE8("intc", h8s_intc_device, icr_r, icr_w, 0xffff)
|
||||
AM_RANGE(0xfffec2, 0xfffec3) AM_DEVREADWRITE8("intc", h8s_intc_device, icrc_r, icrc_w, 0xff00)
|
||||
AM_RANGE(0xfffec4, 0xfffecd) AM_DEVREADWRITE8("intc", h8s_intc_device, ipr_r, ipr_w, 0xffff)
|
||||
AM_RANGE(0xfffece, 0xfffecf) AM_DEVREADWRITE8("intc", h8s_intc_device, iprk_r, iprk_w, 0xff00)
|
||||
map(0xfffe80, 0xfffe80).rw("timer16:3", FUNC(h8_timer16_channel_device::tcr_r), FUNC(h8_timer16_channel_device::tcr_w));
|
||||
map(0xfffe81, 0xfffe81).rw("timer16:3", FUNC(h8_timer16_channel_device::tmdr_r), FUNC(h8_timer16_channel_device::tmdr_w));
|
||||
map(0xfffe82, 0xfffe83).rw("timer16:3", FUNC(h8_timer16_channel_device::tior_r), FUNC(h8_timer16_channel_device::tior_w));
|
||||
map(0xfffe84, 0xfffe84).rw("timer16:3", FUNC(h8_timer16_channel_device::tier_r), FUNC(h8_timer16_channel_device::tier_w));
|
||||
map(0xfffe85, 0xfffe85).rw("timer16:3", FUNC(h8_timer16_channel_device::tsr_r), FUNC(h8_timer16_channel_device::tsr_w));
|
||||
map(0xfffe86, 0xfffe87).rw("timer16:3", FUNC(h8_timer16_channel_device::tcnt_r), FUNC(h8_timer16_channel_device::tcnt_w));
|
||||
map(0xfffe88, 0xfffe8f).rw("timer16:3", FUNC(h8_timer16_channel_device::tgr_r), FUNC(h8_timer16_channel_device::tgr_w));
|
||||
map(0xfffe90, 0xfffe90).rw("timer16:4", FUNC(h8_timer16_channel_device::tcr_r), FUNC(h8_timer16_channel_device::tcr_w));
|
||||
map(0xfffe91, 0xfffe91).rw("timer16:4", FUNC(h8_timer16_channel_device::tmdr_r), FUNC(h8_timer16_channel_device::tmdr_w));
|
||||
map(0xfffe92, 0xfffe92).rw("timer16:4", FUNC(h8_timer16_channel_device::tior_r), FUNC(h8_timer16_channel_device::tior_w));
|
||||
map(0xfffe94, 0xfffe94).rw("timer16:4", FUNC(h8_timer16_channel_device::tier_r), FUNC(h8_timer16_channel_device::tier_w));
|
||||
map(0xfffe95, 0xfffe95).rw("timer16:4", FUNC(h8_timer16_channel_device::tsr_r), FUNC(h8_timer16_channel_device::tsr_w));
|
||||
map(0xfffe96, 0xfffe97).rw("timer16:4", FUNC(h8_timer16_channel_device::tcnt_r), FUNC(h8_timer16_channel_device::tcnt_w));
|
||||
map(0xfffe98, 0xfffe9b).rw("timer16:4", FUNC(h8_timer16_channel_device::tgr_r), FUNC(h8_timer16_channel_device::tgr_w));
|
||||
map(0xfffea0, 0xfffea0).rw("timer16:5", FUNC(h8_timer16_channel_device::tcr_r), FUNC(h8_timer16_channel_device::tcr_w));
|
||||
map(0xfffea1, 0xfffea1).rw("timer16:5", FUNC(h8_timer16_channel_device::tmdr_r), FUNC(h8_timer16_channel_device::tmdr_w));
|
||||
map(0xfffea2, 0xfffea2).rw("timer16:5", FUNC(h8_timer16_channel_device::tior_r), FUNC(h8_timer16_channel_device::tior_w));
|
||||
map(0xfffea4, 0xfffea4).rw("timer16:5", FUNC(h8_timer16_channel_device::tier_r), FUNC(h8_timer16_channel_device::tier_w));
|
||||
map(0xfffea5, 0xfffea5).rw("timer16:5", FUNC(h8_timer16_channel_device::tsr_r), FUNC(h8_timer16_channel_device::tsr_w));
|
||||
map(0xfffea6, 0xfffea7).rw("timer16:5", FUNC(h8_timer16_channel_device::tcnt_r), FUNC(h8_timer16_channel_device::tcnt_w));
|
||||
map(0xfffea8, 0xfffeab).rw("timer16:5", FUNC(h8_timer16_channel_device::tgr_r), FUNC(h8_timer16_channel_device::tgr_w));
|
||||
map(0xfffeb0, 0xfffeb0).w("port1", FUNC(h8_port_device::ddr_w));
|
||||
map(0xfffeb1, 0xfffeb1).w("port2", FUNC(h8_port_device::ddr_w));
|
||||
map(0xfffeb2, 0xfffeb2).w("port3", FUNC(h8_port_device::ddr_w));
|
||||
map(0xfffeb4, 0xfffeb4).w("port5", FUNC(h8_port_device::ddr_w));
|
||||
map(0xfffeb5, 0xfffeb5).w("port6", FUNC(h8_port_device::ddr_w));
|
||||
map(0xfffeb9, 0xfffeb9).w("porta", FUNC(h8_port_device::ddr_w));
|
||||
map(0xfffeba, 0xfffeba).w("portb", FUNC(h8_port_device::ddr_w));
|
||||
map(0xfffebb, 0xfffebb).w("portc", FUNC(h8_port_device::ddr_w));
|
||||
map(0xfffebc, 0xfffebc).w("portd", FUNC(h8_port_device::ddr_w));
|
||||
map(0xfffebd, 0xfffebd).w("porte", FUNC(h8_port_device::ddr_w));
|
||||
map(0xfffebe, 0xfffebe).w("portf", FUNC(h8_port_device::ddr_w));
|
||||
map(0xfffebf, 0xfffebf).w("portg", FUNC(h8_port_device::ddr_w));
|
||||
map(0xfffec0, 0xfffec1).rw("intc", FUNC(h8s_intc_device::icr_r), FUNC(h8s_intc_device::icr_w));
|
||||
map(0xfffec2, 0xfffec2).rw("intc", FUNC(h8s_intc_device::icrc_r), FUNC(h8s_intc_device::icrc_w));
|
||||
map(0xfffec4, 0xfffecd).rw("intc", FUNC(h8s_intc_device::ipr_r), FUNC(h8s_intc_device::ipr_w));
|
||||
map(0xfffece, 0xfffece).rw("intc", FUNC(h8s_intc_device::iprk_r), FUNC(h8s_intc_device::iprk_w));
|
||||
|
||||
AM_RANGE(0xfffee0, 0xfffee1) AM_DEVREADWRITE( "dma:0", h8_dma_channel_device, marah_r, marah_w )
|
||||
AM_RANGE(0xfffee2, 0xfffee3) AM_DEVREADWRITE( "dma:0", h8_dma_channel_device, maral_r, maral_w )
|
||||
AM_RANGE(0xfffee4, 0xfffee5) AM_DEVREADWRITE( "dma:0", h8_dma_channel_device, ioara_r, ioara_w )
|
||||
AM_RANGE(0xfffee6, 0xfffee7) AM_DEVREADWRITE( "dma:0", h8_dma_channel_device, etcra_r, etcra_w )
|
||||
AM_RANGE(0xfffee8, 0xfffee9) AM_DEVREADWRITE( "dma:0", h8_dma_channel_device, marbh_r, marbh_w )
|
||||
AM_RANGE(0xfffeea, 0xfffeeb) AM_DEVREADWRITE( "dma:0", h8_dma_channel_device, marbl_r, marbl_w )
|
||||
AM_RANGE(0xfffeec, 0xfffeed) AM_DEVREADWRITE( "dma:0", h8_dma_channel_device, ioarb_r, ioarb_w )
|
||||
AM_RANGE(0xfffeee, 0xfffeef) AM_DEVREADWRITE( "dma:0", h8_dma_channel_device, etcrb_r, etcrb_w )
|
||||
AM_RANGE(0xfffef0, 0xfffef1) AM_DEVREADWRITE( "dma:1", h8_dma_channel_device, marah_r, marah_w )
|
||||
AM_RANGE(0xfffef2, 0xfffef3) AM_DEVREADWRITE( "dma:1", h8_dma_channel_device, maral_r, maral_w )
|
||||
AM_RANGE(0xfffef4, 0xfffef5) AM_DEVREADWRITE( "dma:1", h8_dma_channel_device, ioara_r, ioara_w )
|
||||
AM_RANGE(0xfffef6, 0xfffef7) AM_DEVREADWRITE( "dma:1", h8_dma_channel_device, etcra_r, etcra_w )
|
||||
AM_RANGE(0xfffef8, 0xfffef9) AM_DEVREADWRITE( "dma:1", h8_dma_channel_device, marbh_r, marbh_w )
|
||||
AM_RANGE(0xfffefa, 0xfffefb) AM_DEVREADWRITE( "dma:1", h8_dma_channel_device, marbl_r, marbl_w )
|
||||
AM_RANGE(0xfffefc, 0xfffefd) AM_DEVREADWRITE( "dma:1", h8_dma_channel_device, ioarb_r, ioarb_w )
|
||||
AM_RANGE(0xfffefe, 0xfffeff) AM_DEVREADWRITE( "dma:1", h8_dma_channel_device, etcrb_r, etcrb_w )
|
||||
AM_RANGE(0xffff00, 0xffff01) AM_DEVREADWRITE8("dma", h8_dma_device, dmawer_r, dmawer_w, 0xff00)
|
||||
AM_RANGE(0xffff00, 0xffff01) AM_DEVREADWRITE8("dma", h8_dma_device, dmatcr_r, dmatcr_w, 0x00ff)
|
||||
AM_RANGE(0xffff02, 0xffff03) AM_DEVREADWRITE( "dma:0", h8_dma_channel_device, dmacr_r, dmacr_w )
|
||||
AM_RANGE(0xffff04, 0xffff05) AM_DEVREADWRITE( "dma:1", h8_dma_channel_device, dmacr_r, dmacr_w )
|
||||
AM_RANGE(0xffff06, 0xffff07) AM_DEVREADWRITE( "dma", h8_dma_device, dmabcr_r, dmabcr_w )
|
||||
AM_RANGE(0xffff2c, 0xffff2d) AM_DEVREADWRITE8("intc", h8s_intc_device, iscrh_r, iscrh_w, 0xff00)
|
||||
AM_RANGE(0xffff2c, 0xffff2d) AM_DEVREADWRITE8("intc", h8s_intc_device, iscrl_r, iscrl_w, 0x00ff)
|
||||
AM_RANGE(0xffff2e, 0xffff2f) AM_DEVREADWRITE8("intc", h8s_intc_device, ier_r, ier_w, 0xff00)
|
||||
AM_RANGE(0xffff2e, 0xffff2f) AM_DEVREADWRITE8("intc", h8s_intc_device, isr_r, isr_w, 0x00ff)
|
||||
AM_RANGE(0xffff30, 0xffff35) AM_DEVREADWRITE8("dtc", h8_dtc_device, dtcer_r, dtcer_w, 0xffff)
|
||||
AM_RANGE(0xffff36, 0xffff37) AM_DEVREADWRITE8("dtc", h8_dtc_device, dtvecr_r, dtvecr_w, 0x00ff)
|
||||
AM_RANGE(0xffff38, 0xffff39) AM_READWRITE8( syscr_r, syscr_w, 0x00ff)
|
||||
map(0xfffee0, 0xfffee1).rw("dma:0", FUNC(h8_dma_channel_device::marah_r), FUNC(h8_dma_channel_device::marah_w));
|
||||
map(0xfffee2, 0xfffee3).rw("dma:0", FUNC(h8_dma_channel_device::maral_r), FUNC(h8_dma_channel_device::maral_w));
|
||||
map(0xfffee4, 0xfffee5).rw("dma:0", FUNC(h8_dma_channel_device::ioara_r), FUNC(h8_dma_channel_device::ioara_w));
|
||||
map(0xfffee6, 0xfffee7).rw("dma:0", FUNC(h8_dma_channel_device::etcra_r), FUNC(h8_dma_channel_device::etcra_w));
|
||||
map(0xfffee8, 0xfffee9).rw("dma:0", FUNC(h8_dma_channel_device::marbh_r), FUNC(h8_dma_channel_device::marbh_w));
|
||||
map(0xfffeea, 0xfffeeb).rw("dma:0", FUNC(h8_dma_channel_device::marbl_r), FUNC(h8_dma_channel_device::marbl_w));
|
||||
map(0xfffeec, 0xfffeed).rw("dma:0", FUNC(h8_dma_channel_device::ioarb_r), FUNC(h8_dma_channel_device::ioarb_w));
|
||||
map(0xfffeee, 0xfffeef).rw("dma:0", FUNC(h8_dma_channel_device::etcrb_r), FUNC(h8_dma_channel_device::etcrb_w));
|
||||
map(0xfffef0, 0xfffef1).rw("dma:1", FUNC(h8_dma_channel_device::marah_r), FUNC(h8_dma_channel_device::marah_w));
|
||||
map(0xfffef2, 0xfffef3).rw("dma:1", FUNC(h8_dma_channel_device::maral_r), FUNC(h8_dma_channel_device::maral_w));
|
||||
map(0xfffef4, 0xfffef5).rw("dma:1", FUNC(h8_dma_channel_device::ioara_r), FUNC(h8_dma_channel_device::ioara_w));
|
||||
map(0xfffef6, 0xfffef7).rw("dma:1", FUNC(h8_dma_channel_device::etcra_r), FUNC(h8_dma_channel_device::etcra_w));
|
||||
map(0xfffef8, 0xfffef9).rw("dma:1", FUNC(h8_dma_channel_device::marbh_r), FUNC(h8_dma_channel_device::marbh_w));
|
||||
map(0xfffefa, 0xfffefb).rw("dma:1", FUNC(h8_dma_channel_device::marbl_r), FUNC(h8_dma_channel_device::marbl_w));
|
||||
map(0xfffefc, 0xfffefd).rw("dma:1", FUNC(h8_dma_channel_device::ioarb_r), FUNC(h8_dma_channel_device::ioarb_w));
|
||||
map(0xfffefe, 0xfffeff).rw("dma:1", FUNC(h8_dma_channel_device::etcrb_r), FUNC(h8_dma_channel_device::etcrb_w));
|
||||
map(0xffff00, 0xffff00).rw("dma", FUNC(h8_dma_device::dmawer_r), FUNC(h8_dma_device::dmawer_w));
|
||||
map(0xffff01, 0xffff01).rw("dma", FUNC(h8_dma_device::dmatcr_r), FUNC(h8_dma_device::dmatcr_w));
|
||||
map(0xffff02, 0xffff03).rw("dma:0", FUNC(h8_dma_channel_device::dmacr_r), FUNC(h8_dma_channel_device::dmacr_w));
|
||||
map(0xffff04, 0xffff05).rw("dma:1", FUNC(h8_dma_channel_device::dmacr_r), FUNC(h8_dma_channel_device::dmacr_w));
|
||||
map(0xffff06, 0xffff07).rw("dma", FUNC(h8_dma_device::dmabcr_r), FUNC(h8_dma_device::dmabcr_w));
|
||||
map(0xffff2c, 0xffff2c).rw("intc", FUNC(h8s_intc_device::iscrh_r), FUNC(h8s_intc_device::iscrh_w));
|
||||
map(0xffff2d, 0xffff2d).rw("intc", FUNC(h8s_intc_device::iscrl_r), FUNC(h8s_intc_device::iscrl_w));
|
||||
map(0xffff2e, 0xffff2e).rw("intc", FUNC(h8s_intc_device::ier_r), FUNC(h8s_intc_device::ier_w));
|
||||
map(0xffff2f, 0xffff2f).rw("intc", FUNC(h8s_intc_device::isr_r), FUNC(h8s_intc_device::isr_w));
|
||||
map(0xffff30, 0xffff35).rw("dtc", FUNC(h8_dtc_device::dtcer_r), FUNC(h8_dtc_device::dtcer_w));
|
||||
map(0xffff37, 0xffff37).rw("dtc", FUNC(h8_dtc_device::dtvecr_r), FUNC(h8_dtc_device::dtvecr_w));
|
||||
map(0xffff39, 0xffff39).rw(this, FUNC(h8s2320_device::syscr_r), FUNC(h8s2320_device::syscr_w));
|
||||
|
||||
AM_RANGE(0xffff50, 0xffff51) AM_DEVREAD8( "port1", h8_port_device, port_r, 0xff00)
|
||||
AM_RANGE(0xffff50, 0xffff51) AM_DEVREAD8( "port2", h8_port_device, port_r, 0x00ff)
|
||||
AM_RANGE(0xffff52, 0xffff53) AM_DEVREAD8( "port3", h8_port_device, port_r, 0xff00)
|
||||
AM_RANGE(0xffff52, 0xffff53) AM_DEVREAD8( "port4", h8_port_device, port_r, 0x00ff)
|
||||
AM_RANGE(0xffff54, 0xffff55) AM_DEVREAD8( "port5", h8_port_device, port_r, 0xff00)
|
||||
AM_RANGE(0xffff54, 0xffff55) AM_DEVREAD8( "port6", h8_port_device, port_r, 0x00ff)
|
||||
AM_RANGE(0xffff58, 0xffff59) AM_DEVREAD8( "porta", h8_port_device, port_r, 0x00ff)
|
||||
AM_RANGE(0xffff5a, 0xffff5b) AM_DEVREAD8( "portb", h8_port_device, port_r, 0xff00)
|
||||
AM_RANGE(0xffff5a, 0xffff5b) AM_DEVREAD8( "portc", h8_port_device, port_r, 0x00ff)
|
||||
AM_RANGE(0xffff5c, 0xffff5d) AM_DEVREAD8( "portd", h8_port_device, port_r, 0xff00)
|
||||
AM_RANGE(0xffff5c, 0xffff5d) AM_DEVREAD8( "porte", h8_port_device, port_r, 0x00ff)
|
||||
AM_RANGE(0xffff5e, 0xffff5f) AM_DEVREAD8( "portf", h8_port_device, port_r, 0xff00)
|
||||
AM_RANGE(0xffff5e, 0xffff5f) AM_DEVREAD8( "portg", h8_port_device, port_r, 0x00ff)
|
||||
AM_RANGE(0xffff60, 0xffff61) AM_DEVREADWRITE8("port1", h8_port_device, dr_r, dr_w, 0xff00)
|
||||
AM_RANGE(0xffff60, 0xffff61) AM_DEVREADWRITE8("port2", h8_port_device, dr_r, dr_w, 0x00ff)
|
||||
AM_RANGE(0xffff62, 0xffff63) AM_DEVREADWRITE8("port3", h8_port_device, dr_r, dr_w, 0xff00)
|
||||
AM_RANGE(0xffff64, 0xffff65) AM_DEVREADWRITE8("port5", h8_port_device, dr_r, dr_w, 0xff00)
|
||||
AM_RANGE(0xffff64, 0xffff65) AM_DEVREADWRITE8("port6", h8_port_device, dr_r, dr_w, 0x00ff)
|
||||
AM_RANGE(0xffff68, 0xffff69) AM_DEVREADWRITE8("porta", h8_port_device, dr_r, dr_w, 0x00ff)
|
||||
AM_RANGE(0xffff6a, 0xffff6b) AM_DEVREADWRITE8("portb", h8_port_device, dr_r, dr_w, 0xff00)
|
||||
AM_RANGE(0xffff6a, 0xffff6b) AM_DEVREADWRITE8("portc", h8_port_device, dr_r, dr_w, 0x00ff)
|
||||
AM_RANGE(0xffff6c, 0xffff6d) AM_DEVREADWRITE8("portd", h8_port_device, dr_r, dr_w, 0xff00)
|
||||
AM_RANGE(0xffff6c, 0xffff6d) AM_DEVREADWRITE8("porte", h8_port_device, dr_r, dr_w, 0x00ff)
|
||||
AM_RANGE(0xffff6e, 0xffff6f) AM_DEVREADWRITE8("portf", h8_port_device, dr_r, dr_w, 0xff00)
|
||||
AM_RANGE(0xffff6e, 0xffff6f) AM_DEVREADWRITE8("portg", h8_port_device, dr_r, dr_w, 0x00ff)
|
||||
AM_RANGE(0xffff70, 0xffff71) AM_DEVREADWRITE8("porta", h8_port_device, pcr_r, pcr_w, 0xff00)
|
||||
AM_RANGE(0xffff70, 0xffff71) AM_DEVREADWRITE8("portb", h8_port_device, pcr_r, pcr_w, 0x00ff)
|
||||
AM_RANGE(0xffff72, 0xffff73) AM_DEVREADWRITE8("portc", h8_port_device, pcr_r, pcr_w, 0xff00)
|
||||
AM_RANGE(0xffff72, 0xffff73) AM_DEVREADWRITE8("portd", h8_port_device, pcr_r, pcr_w, 0x00ff)
|
||||
AM_RANGE(0xffff74, 0xffff75) AM_DEVREADWRITE8("porte", h8_port_device, pcr_r, pcr_w, 0xff00)
|
||||
AM_RANGE(0xffff76, 0xffff77) AM_DEVREADWRITE8("port3", h8_port_device, odr_r, odr_w, 0xff00)
|
||||
AM_RANGE(0xffff76, 0xffff77) AM_DEVREADWRITE8("porta", h8_port_device, odr_r, odr_w, 0x00ff)
|
||||
AM_RANGE(0xffff78, 0xffff79) AM_DEVREADWRITE8("sci0", h8_sci_device, smr_r, smr_w, 0xff00)
|
||||
AM_RANGE(0xffff78, 0xffff79) AM_DEVREADWRITE8("sci0", h8_sci_device, brr_r, brr_w, 0x00ff)
|
||||
AM_RANGE(0xffff7a, 0xffff7b) AM_DEVREADWRITE8("sci0", h8_sci_device, scr_r, scr_w, 0xff00)
|
||||
AM_RANGE(0xffff7a, 0xffff7b) AM_DEVREADWRITE8("sci0", h8_sci_device, tdr_r, tdr_w, 0x00ff)
|
||||
AM_RANGE(0xffff7c, 0xffff7d) AM_DEVREADWRITE8("sci0", h8_sci_device, ssr_r, ssr_w, 0xff00)
|
||||
AM_RANGE(0xffff7c, 0xffff7d) AM_DEVREAD8( "sci0", h8_sci_device, rdr_r, 0x00ff)
|
||||
AM_RANGE(0xffff7e, 0xffff7f) AM_DEVREADWRITE8("sci0", h8_sci_device, scmr_r, scmr_w, 0xff00)
|
||||
AM_RANGE(0xffff80, 0xffff81) AM_DEVREADWRITE8("sci1", h8_sci_device, smr_r, smr_w, 0xff00)
|
||||
AM_RANGE(0xffff80, 0xffff81) AM_DEVREADWRITE8("sci1", h8_sci_device, brr_r, brr_w, 0x00ff)
|
||||
AM_RANGE(0xffff82, 0xffff83) AM_DEVREADWRITE8("sci1", h8_sci_device, scr_r, scr_w, 0xff00)
|
||||
AM_RANGE(0xffff82, 0xffff83) AM_DEVREADWRITE8("sci1", h8_sci_device, tdr_r, tdr_w, 0x00ff)
|
||||
AM_RANGE(0xffff84, 0xffff85) AM_DEVREADWRITE8("sci1", h8_sci_device, ssr_r, ssr_w, 0xff00)
|
||||
AM_RANGE(0xffff84, 0xffff85) AM_DEVREAD8( "sci1", h8_sci_device, rdr_r, 0x00ff)
|
||||
AM_RANGE(0xffff86, 0xffff87) AM_DEVREADWRITE8("sci1", h8_sci_device, scmr_r, scmr_w, 0xff00)
|
||||
AM_RANGE(0xffff88, 0xffff89) AM_DEVREADWRITE8("sci2", h8_sci_device, smr_r, smr_w, 0xff00)
|
||||
AM_RANGE(0xffff88, 0xffff89) AM_DEVREADWRITE8("sci2", h8_sci_device, brr_r, brr_w, 0x00ff)
|
||||
AM_RANGE(0xffff8a, 0xffff8b) AM_DEVREADWRITE8("sci2", h8_sci_device, scr_r, scr_w, 0xff00)
|
||||
AM_RANGE(0xffff8a, 0xffff8b) AM_DEVREADWRITE8("sci2", h8_sci_device, tdr_r, tdr_w, 0x00ff)
|
||||
AM_RANGE(0xffff8c, 0xffff8d) AM_DEVREADWRITE8("sci2", h8_sci_device, ssr_r, ssr_w, 0xff00)
|
||||
AM_RANGE(0xffff8c, 0xffff8d) AM_DEVREAD8( "sci2", h8_sci_device, rdr_r, 0x00ff)
|
||||
AM_RANGE(0xffff8e, 0xffff8f) AM_DEVREADWRITE8("sci2", h8_sci_device, scmr_r, scmr_w, 0xff00)
|
||||
AM_RANGE(0xffff90, 0xffff97) AM_DEVREAD8( "adc", h8_adc_device, addr8_r, 0xffff)
|
||||
AM_RANGE(0xffff98, 0xffff99) AM_DEVREADWRITE8("adc", h8_adc_device, adcsr_r, adcsr_w, 0xff00)
|
||||
AM_RANGE(0xffff98, 0xffff99) AM_DEVREADWRITE8("adc", h8_adc_device, adcr_r, adcr_w, 0x00ff)
|
||||
map(0xffff50, 0xffff50).r("port1", FUNC(h8_port_device::port_r));
|
||||
map(0xffff51, 0xffff51).r("port2", FUNC(h8_port_device::port_r));
|
||||
map(0xffff52, 0xffff52).r("port3", FUNC(h8_port_device::port_r));
|
||||
map(0xffff53, 0xffff53).r("port4", FUNC(h8_port_device::port_r));
|
||||
map(0xffff54, 0xffff54).r("port5", FUNC(h8_port_device::port_r));
|
||||
map(0xffff55, 0xffff55).r("port6", FUNC(h8_port_device::port_r));
|
||||
map(0xffff59, 0xffff59).r("porta", FUNC(h8_port_device::port_r));
|
||||
map(0xffff5a, 0xffff5a).r("portb", FUNC(h8_port_device::port_r));
|
||||
map(0xffff5b, 0xffff5b).r("portc", FUNC(h8_port_device::port_r));
|
||||
map(0xffff5c, 0xffff5c).r("portd", FUNC(h8_port_device::port_r));
|
||||
map(0xffff5d, 0xffff5d).r("porte", FUNC(h8_port_device::port_r));
|
||||
map(0xffff5e, 0xffff5e).r("portf", FUNC(h8_port_device::port_r));
|
||||
map(0xffff5f, 0xffff5f).r("portg", FUNC(h8_port_device::port_r));
|
||||
map(0xffff60, 0xffff60).rw("port1", FUNC(h8_port_device::dr_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffff61, 0xffff61).rw("port2", FUNC(h8_port_device::dr_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffff62, 0xffff62).rw("port3", FUNC(h8_port_device::dr_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffff64, 0xffff64).rw("port5", FUNC(h8_port_device::dr_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffff65, 0xffff65).rw("port6", FUNC(h8_port_device::dr_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffff69, 0xffff69).rw("porta", FUNC(h8_port_device::dr_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffff6a, 0xffff6a).rw("portb", FUNC(h8_port_device::dr_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffff6b, 0xffff6b).rw("portc", FUNC(h8_port_device::dr_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffff6c, 0xffff6c).rw("portd", FUNC(h8_port_device::dr_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffff6d, 0xffff6d).rw("porte", FUNC(h8_port_device::dr_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffff6e, 0xffff6e).rw("portf", FUNC(h8_port_device::dr_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffff6f, 0xffff6f).rw("portg", FUNC(h8_port_device::dr_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffff70, 0xffff70).rw("porta", FUNC(h8_port_device::pcr_r), FUNC(h8_port_device::pcr_w));
|
||||
map(0xffff71, 0xffff71).rw("portb", FUNC(h8_port_device::pcr_r), FUNC(h8_port_device::pcr_w));
|
||||
map(0xffff72, 0xffff72).rw("portc", FUNC(h8_port_device::pcr_r), FUNC(h8_port_device::pcr_w));
|
||||
map(0xffff73, 0xffff73).rw("portd", FUNC(h8_port_device::pcr_r), FUNC(h8_port_device::pcr_w));
|
||||
map(0xffff74, 0xffff74).rw("porte", FUNC(h8_port_device::pcr_r), FUNC(h8_port_device::pcr_w));
|
||||
map(0xffff76, 0xffff76).rw("port3", FUNC(h8_port_device::odr_r), FUNC(h8_port_device::odr_w));
|
||||
map(0xffff77, 0xffff77).rw("porta", FUNC(h8_port_device::odr_r), FUNC(h8_port_device::odr_w));
|
||||
map(0xffff78, 0xffff78).rw("sci0", FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
|
||||
map(0xffff79, 0xffff79).rw("sci0", FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
|
||||
map(0xffff7a, 0xffff7a).rw("sci0", FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
|
||||
map(0xffff7b, 0xffff7b).rw("sci0", FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
|
||||
map(0xffff7c, 0xffff7c).rw("sci0", FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
|
||||
map(0xffff7d, 0xffff7d).r("sci0", FUNC(h8_sci_device::rdr_r));
|
||||
map(0xffff7e, 0xffff7e).rw("sci0", FUNC(h8_sci_device::scmr_r), FUNC(h8_sci_device::scmr_w));
|
||||
map(0xffff80, 0xffff80).rw("sci1", FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
|
||||
map(0xffff81, 0xffff81).rw("sci1", FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
|
||||
map(0xffff82, 0xffff82).rw("sci1", FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
|
||||
map(0xffff83, 0xffff83).rw("sci1", FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
|
||||
map(0xffff84, 0xffff84).rw("sci1", FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
|
||||
map(0xffff85, 0xffff85).r("sci1", FUNC(h8_sci_device::rdr_r));
|
||||
map(0xffff86, 0xffff86).rw("sci1", FUNC(h8_sci_device::scmr_r), FUNC(h8_sci_device::scmr_w));
|
||||
map(0xffff88, 0xffff88).rw("sci2", FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
|
||||
map(0xffff89, 0xffff89).rw("sci2", FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
|
||||
map(0xffff8a, 0xffff8a).rw("sci2", FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
|
||||
map(0xffff8b, 0xffff8b).rw("sci2", FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
|
||||
map(0xffff8c, 0xffff8c).rw("sci2", FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
|
||||
map(0xffff8d, 0xffff8d).r("sci2", FUNC(h8_sci_device::rdr_r));
|
||||
map(0xffff8e, 0xffff8e).rw("sci2", FUNC(h8_sci_device::scmr_r), FUNC(h8_sci_device::scmr_w));
|
||||
map(0xffff90, 0xffff97).r("adc", FUNC(h8_adc_device::addr8_r));
|
||||
map(0xffff98, 0xffff98).rw("adc", FUNC(h8_adc_device::adcsr_r), FUNC(h8_adc_device::adcsr_w));
|
||||
map(0xffff99, 0xffff99).rw("adc", FUNC(h8_adc_device::adcr_r), FUNC(h8_adc_device::adcr_w));
|
||||
|
||||
AM_RANGE(0xffffb0, 0xffffb1) AM_DEVREADWRITE8("timer8_0", h8_timer8_channel_device, tcr_r, tcr_w, 0xff00)
|
||||
AM_RANGE(0xffffb0, 0xffffb1) AM_DEVREADWRITE8("timer8_1", h8_timer8_channel_device, tcr_r, tcr_w, 0x00ff)
|
||||
AM_RANGE(0xffffb2, 0xffffb3) AM_DEVREADWRITE8("timer8_0", h8_timer8_channel_device, tcsr_r, tcsr_w, 0xff00)
|
||||
AM_RANGE(0xffffb2, 0xffffb3) AM_DEVREADWRITE8("timer8_1", h8_timer8_channel_device, tcsr_r, tcsr_w, 0x00ff)
|
||||
AM_RANGE(0xffffb4, 0xffffb7) AM_DEVREADWRITE8("timer8_0", h8_timer8_channel_device, tcor_r, tcor_w, 0xff00)
|
||||
AM_RANGE(0xffffb4, 0xffffb7) AM_DEVREADWRITE8("timer8_1", h8_timer8_channel_device, tcor_r, tcor_w, 0x00ff)
|
||||
AM_RANGE(0xffffb8, 0xffffb9) AM_DEVREADWRITE8("timer8_0", h8_timer8_channel_device, tcnt_r, tcnt_w, 0xff00)
|
||||
AM_RANGE(0xffffb8, 0xffffb9) AM_DEVREADWRITE8("timer8_1", h8_timer8_channel_device, tcnt_r, tcnt_w, 0x00ff)
|
||||
AM_RANGE(0xffffbc, 0xffffbd) AM_DEVREADWRITE( "watchdog", h8_watchdog_device, wd_r, wd_w )
|
||||
AM_RANGE(0xffffbe, 0xffffbf) AM_DEVREADWRITE( "watchdog", h8_watchdog_device, rst_r, rst_w )
|
||||
AM_RANGE(0xffffc0, 0xffffc1) AM_DEVREADWRITE8("timer16", h8_timer16_device, tstr_r, tstr_w, 0xff00)
|
||||
AM_RANGE(0xffffc0, 0xffffc1) AM_DEVREADWRITE8("timer16", h8_timer16_device, tsyr_r, tsyr_w, 0x00ff)
|
||||
map(0xffffb0, 0xffffb0).rw("timer8_0", FUNC(h8_timer8_channel_device::tcr_r), FUNC(h8_timer8_channel_device::tcr_w));
|
||||
map(0xffffb1, 0xffffb1).rw("timer8_1", FUNC(h8_timer8_channel_device::tcr_r), FUNC(h8_timer8_channel_device::tcr_w));
|
||||
map(0xffffb2, 0xffffb2).rw("timer8_0", FUNC(h8_timer8_channel_device::tcsr_r), FUNC(h8_timer8_channel_device::tcsr_w));
|
||||
map(0xffffb3, 0xffffb3).rw("timer8_1", FUNC(h8_timer8_channel_device::tcsr_r), FUNC(h8_timer8_channel_device::tcsr_w));
|
||||
map(0xffffb4, 0xffffb7).rw("timer8_0", FUNC(h8_timer8_channel_device::tcor_r), FUNC(h8_timer8_channel_device::tcor_w)).umask16(0xff00);
|
||||
map(0xffffb4, 0xffffb7).rw("timer8_1", FUNC(h8_timer8_channel_device::tcor_r), FUNC(h8_timer8_channel_device::tcor_w)).umask16(0x00ff);
|
||||
map(0xffffb8, 0xffffb8).rw("timer8_0", FUNC(h8_timer8_channel_device::tcnt_r), FUNC(h8_timer8_channel_device::tcnt_w));
|
||||
map(0xffffb9, 0xffffb9).rw("timer8_1", FUNC(h8_timer8_channel_device::tcnt_r), FUNC(h8_timer8_channel_device::tcnt_w));
|
||||
map(0xffffbc, 0xffffbd).rw("watchdog", FUNC(h8_watchdog_device::wd_r), FUNC(h8_watchdog_device::wd_w));
|
||||
map(0xffffbe, 0xffffbf).rw("watchdog", FUNC(h8_watchdog_device::rst_r), FUNC(h8_watchdog_device::rst_w));
|
||||
map(0xffffc0, 0xffffc0).rw("timer16", FUNC(h8_timer16_device::tstr_r), FUNC(h8_timer16_device::tstr_w));
|
||||
map(0xffffc1, 0xffffc1).rw("timer16", FUNC(h8_timer16_device::tsyr_r), FUNC(h8_timer16_device::tsyr_w));
|
||||
|
||||
AM_RANGE(0xffffd0, 0xffffd1) AM_DEVREADWRITE8("timer16:0", h8_timer16_channel_device, tcr_r, tcr_w, 0xff00)
|
||||
AM_RANGE(0xffffd0, 0xffffd1) AM_DEVREADWRITE8("timer16:0", h8_timer16_channel_device, tmdr_r, tmdr_w, 0x00ff)
|
||||
AM_RANGE(0xffffd2, 0xffffd3) AM_DEVREADWRITE8("timer16:0", h8_timer16_channel_device, tior_r, tior_w, 0xffff)
|
||||
AM_RANGE(0xffffd4, 0xffffd5) AM_DEVREADWRITE8("timer16:0", h8_timer16_channel_device, tier_r, tier_w, 0xff00)
|
||||
AM_RANGE(0xffffd4, 0xffffd5) AM_DEVREADWRITE8("timer16:0", h8_timer16_channel_device, tsr_r, tsr_w, 0x00ff)
|
||||
AM_RANGE(0xffffd6, 0xffffd7) AM_DEVREADWRITE( "timer16:0", h8_timer16_channel_device, tcnt_r, tcnt_w )
|
||||
AM_RANGE(0xffffd8, 0xffffdf) AM_DEVREADWRITE( "timer16:0", h8_timer16_channel_device, tgr_r, tgr_w )
|
||||
AM_RANGE(0xffffe0, 0xffffe1) AM_DEVREADWRITE8("timer16:1", h8_timer16_channel_device, tcr_r, tcr_w, 0xff00)
|
||||
AM_RANGE(0xffffe0, 0xffffe1) AM_DEVREADWRITE8("timer16:1", h8_timer16_channel_device, tmdr_r, tmdr_w, 0x00ff)
|
||||
AM_RANGE(0xffffe2, 0xffffe3) AM_DEVREADWRITE8("timer16:1", h8_timer16_channel_device, tior_r, tior_w, 0xff00)
|
||||
AM_RANGE(0xffffe4, 0xffffe5) AM_DEVREADWRITE8("timer16:1", h8_timer16_channel_device, tier_r, tier_w, 0xff00)
|
||||
AM_RANGE(0xffffe4, 0xffffe5) AM_DEVREADWRITE8("timer16:1", h8_timer16_channel_device, tsr_r, tsr_w, 0x00ff)
|
||||
AM_RANGE(0xffffe6, 0xffffe7) AM_DEVREADWRITE( "timer16:1", h8_timer16_channel_device, tcnt_r, tcnt_w )
|
||||
AM_RANGE(0xffffe8, 0xffffeb) AM_DEVREADWRITE( "timer16:1", h8_timer16_channel_device, tgr_r, tgr_w )
|
||||
AM_RANGE(0xfffff0, 0xfffff1) AM_DEVREADWRITE8("timer16:2", h8_timer16_channel_device, tcr_r, tcr_w, 0xff00)
|
||||
AM_RANGE(0xfffff0, 0xfffff1) AM_DEVREADWRITE8("timer16:2", h8_timer16_channel_device, tmdr_r, tmdr_w, 0x00ff)
|
||||
AM_RANGE(0xfffff2, 0xfffff3) AM_DEVREADWRITE8("timer16:2", h8_timer16_channel_device, tior_r, tior_w, 0xff00)
|
||||
AM_RANGE(0xfffff4, 0xfffff5) AM_DEVREADWRITE8("timer16:2", h8_timer16_channel_device, tier_r, tier_w, 0xff00)
|
||||
AM_RANGE(0xfffff4, 0xfffff5) AM_DEVREADWRITE8("timer16:2", h8_timer16_channel_device, tsr_r, tsr_w, 0x00ff)
|
||||
AM_RANGE(0xfffff6, 0xfffff7) AM_DEVREADWRITE( "timer16:2", h8_timer16_channel_device, tcnt_r, tcnt_w )
|
||||
AM_RANGE(0xfffff8, 0xfffffb) AM_DEVREADWRITE( "timer16:2", h8_timer16_channel_device, tgr_r, tgr_w )
|
||||
ADDRESS_MAP_END
|
||||
map(0xffffd0, 0xffffd0).rw("timer16:0", FUNC(h8_timer16_channel_device::tcr_r), FUNC(h8_timer16_channel_device::tcr_w));
|
||||
map(0xffffd1, 0xffffd1).rw("timer16:0", FUNC(h8_timer16_channel_device::tmdr_r), FUNC(h8_timer16_channel_device::tmdr_w));
|
||||
map(0xffffd2, 0xffffd3).rw("timer16:0", FUNC(h8_timer16_channel_device::tior_r), FUNC(h8_timer16_channel_device::tior_w));
|
||||
map(0xffffd4, 0xffffd4).rw("timer16:0", FUNC(h8_timer16_channel_device::tier_r), FUNC(h8_timer16_channel_device::tier_w));
|
||||
map(0xffffd5, 0xffffd5).rw("timer16:0", FUNC(h8_timer16_channel_device::tsr_r), FUNC(h8_timer16_channel_device::tsr_w));
|
||||
map(0xffffd6, 0xffffd7).rw("timer16:0", FUNC(h8_timer16_channel_device::tcnt_r), FUNC(h8_timer16_channel_device::tcnt_w));
|
||||
map(0xffffd8, 0xffffdf).rw("timer16:0", FUNC(h8_timer16_channel_device::tgr_r), FUNC(h8_timer16_channel_device::tgr_w));
|
||||
map(0xffffe0, 0xffffe0).rw("timer16:1", FUNC(h8_timer16_channel_device::tcr_r), FUNC(h8_timer16_channel_device::tcr_w));
|
||||
map(0xffffe1, 0xffffe1).rw("timer16:1", FUNC(h8_timer16_channel_device::tmdr_r), FUNC(h8_timer16_channel_device::tmdr_w));
|
||||
map(0xffffe2, 0xffffe2).rw("timer16:1", FUNC(h8_timer16_channel_device::tior_r), FUNC(h8_timer16_channel_device::tior_w));
|
||||
map(0xffffe4, 0xffffe4).rw("timer16:1", FUNC(h8_timer16_channel_device::tier_r), FUNC(h8_timer16_channel_device::tier_w));
|
||||
map(0xffffe5, 0xffffe5).rw("timer16:1", FUNC(h8_timer16_channel_device::tsr_r), FUNC(h8_timer16_channel_device::tsr_w));
|
||||
map(0xffffe6, 0xffffe7).rw("timer16:1", FUNC(h8_timer16_channel_device::tcnt_r), FUNC(h8_timer16_channel_device::tcnt_w));
|
||||
map(0xffffe8, 0xffffeb).rw("timer16:1", FUNC(h8_timer16_channel_device::tgr_r), FUNC(h8_timer16_channel_device::tgr_w));
|
||||
map(0xfffff0, 0xfffff0).rw("timer16:2", FUNC(h8_timer16_channel_device::tcr_r), FUNC(h8_timer16_channel_device::tcr_w));
|
||||
map(0xfffff1, 0xfffff1).rw("timer16:2", FUNC(h8_timer16_channel_device::tmdr_r), FUNC(h8_timer16_channel_device::tmdr_w));
|
||||
map(0xfffff2, 0xfffff2).rw("timer16:2", FUNC(h8_timer16_channel_device::tior_r), FUNC(h8_timer16_channel_device::tior_w));
|
||||
map(0xfffff4, 0xfffff4).rw("timer16:2", FUNC(h8_timer16_channel_device::tier_r), FUNC(h8_timer16_channel_device::tier_w));
|
||||
map(0xfffff5, 0xfffff5).rw("timer16:2", FUNC(h8_timer16_channel_device::tsr_r), FUNC(h8_timer16_channel_device::tsr_w));
|
||||
map(0xfffff6, 0xfffff7).rw("timer16:2", FUNC(h8_timer16_channel_device::tcnt_r), FUNC(h8_timer16_channel_device::tcnt_w));
|
||||
map(0xfffff8, 0xfffffb).rw("timer16:2", FUNC(h8_timer16_channel_device::tgr_r), FUNC(h8_timer16_channel_device::tgr_w));
|
||||
}
|
||||
|
||||
// TODO: the 2321 doesn't have the dma subdevice
|
||||
|
||||
|
||||
@ -75,138 +75,139 @@ h8s2390_device::h8s2390_device(const machine_config &mconfig, const char *tag, d
|
||||
{
|
||||
}
|
||||
|
||||
ADDRESS_MAP_START(h8s2357_device::map)
|
||||
AM_RANGE(ram_start, 0xfffbff) AM_RAM
|
||||
AM_RANGE(0xfffe80, 0xfffe81) AM_DEVREADWRITE8("timer16:3", h8_timer16_channel_device, tcr_r, tcr_w, 0xff00)
|
||||
AM_RANGE(0xfffe80, 0xfffe81) AM_DEVREADWRITE8("timer16:3", h8_timer16_channel_device, tmdr_r, tmdr_w, 0x00ff)
|
||||
AM_RANGE(0xfffe82, 0xfffe83) AM_DEVREADWRITE8("timer16:3", h8_timer16_channel_device, tior_r, tior_w, 0xffff)
|
||||
AM_RANGE(0xfffe84, 0xfffe85) AM_DEVREADWRITE8("timer16:3", h8_timer16_channel_device, tier_r, tier_w, 0xff00)
|
||||
AM_RANGE(0xfffe84, 0xfffe85) AM_DEVREADWRITE8("timer16:3", h8_timer16_channel_device, tsr_r, tsr_w, 0x00ff)
|
||||
AM_RANGE(0xfffe86, 0xfffe87) AM_DEVREADWRITE( "timer16:3", h8_timer16_channel_device, tcnt_r, tcnt_w )
|
||||
AM_RANGE(0xfffe88, 0xfffe8f) AM_DEVREADWRITE( "timer16:3", h8_timer16_channel_device, tgr_r, tgr_w )
|
||||
AM_RANGE(0xfffe90, 0xfffe91) AM_DEVREADWRITE8("timer16:4", h8_timer16_channel_device, tcr_r, tcr_w, 0xff00)
|
||||
AM_RANGE(0xfffe90, 0xfffe91) AM_DEVREADWRITE8("timer16:4", h8_timer16_channel_device, tmdr_r, tmdr_w, 0x00ff)
|
||||
AM_RANGE(0xfffe92, 0xfffe93) AM_DEVREADWRITE8("timer16:4", h8_timer16_channel_device, tior_r, tior_w, 0xff00)
|
||||
AM_RANGE(0xfffe94, 0xfffe95) AM_DEVREADWRITE8("timer16:4", h8_timer16_channel_device, tier_r, tier_w, 0xff00)
|
||||
AM_RANGE(0xfffe94, 0xfffe95) AM_DEVREADWRITE8("timer16:4", h8_timer16_channel_device, tsr_r, tsr_w, 0x00ff)
|
||||
AM_RANGE(0xfffe96, 0xfffe97) AM_DEVREADWRITE( "timer16:4", h8_timer16_channel_device, tcnt_r, tcnt_w )
|
||||
AM_RANGE(0xfffe98, 0xfffe9b) AM_DEVREADWRITE( "timer16:4", h8_timer16_channel_device, tgr_r, tgr_w )
|
||||
AM_RANGE(0xfffea0, 0xfffea1) AM_DEVREADWRITE8("timer16:5", h8_timer16_channel_device, tcr_r, tcr_w, 0xff00)
|
||||
AM_RANGE(0xfffea0, 0xfffea1) AM_DEVREADWRITE8("timer16:5", h8_timer16_channel_device, tmdr_r, tmdr_w, 0x00ff)
|
||||
AM_RANGE(0xfffea2, 0xfffea3) AM_DEVREADWRITE8("timer16:5", h8_timer16_channel_device, tior_r, tior_w, 0xff00)
|
||||
AM_RANGE(0xfffea4, 0xfffea5) AM_DEVREADWRITE8("timer16:5", h8_timer16_channel_device, tier_r, tier_w, 0xff00)
|
||||
AM_RANGE(0xfffea4, 0xfffea5) AM_DEVREADWRITE8("timer16:5", h8_timer16_channel_device, tsr_r, tsr_w, 0x00ff)
|
||||
AM_RANGE(0xfffea6, 0xfffea7) AM_DEVREADWRITE( "timer16:5", h8_timer16_channel_device, tcnt_r, tcnt_w )
|
||||
AM_RANGE(0xfffea8, 0xfffeab) AM_DEVREADWRITE( "timer16:5", h8_timer16_channel_device, tgr_r, tgr_w )
|
||||
AM_RANGE(0xfffeb0, 0xfffeb1) AM_DEVWRITE8( "port1", h8_port_device, ddr_w, 0xff00)
|
||||
AM_RANGE(0xfffeb0, 0xfffeb1) AM_DEVWRITE8( "port2", h8_port_device, ddr_w, 0x00ff)
|
||||
AM_RANGE(0xfffeb2, 0xfffeb3) AM_DEVWRITE8( "port3", h8_port_device, ddr_w, 0xff00)
|
||||
AM_RANGE(0xfffeb4, 0xfffeb5) AM_DEVWRITE8( "port5", h8_port_device, ddr_w, 0xff00)
|
||||
AM_RANGE(0xfffeb4, 0xfffeb5) AM_DEVWRITE8( "port6", h8_port_device, ddr_w, 0x00ff)
|
||||
AM_RANGE(0xfffeb8, 0xfffeb9) AM_DEVWRITE8( "porta", h8_port_device, ddr_w, 0x00ff)
|
||||
AM_RANGE(0xfffeba, 0xfffebb) AM_DEVWRITE8( "portb", h8_port_device, ddr_w, 0xff00)
|
||||
AM_RANGE(0xfffeba, 0xfffebb) AM_DEVWRITE8( "portc", h8_port_device, ddr_w, 0x00ff)
|
||||
AM_RANGE(0xfffebc, 0xfffebd) AM_DEVWRITE8( "portd", h8_port_device, ddr_w, 0xff00)
|
||||
AM_RANGE(0xfffebc, 0xfffebd) AM_DEVWRITE8( "porte", h8_port_device, ddr_w, 0x00ff)
|
||||
AM_RANGE(0xfffebe, 0xfffebf) AM_DEVWRITE8( "portf", h8_port_device, ddr_w, 0xff00)
|
||||
AM_RANGE(0xfffebe, 0xfffebf) AM_DEVWRITE8( "portg", h8_port_device, ddr_w, 0x00ff)
|
||||
AM_RANGE(0xfffec4, 0xfffecd) AM_DEVREADWRITE8("intc", h8s_intc_device, ipr_r, ipr_w, 0xffff)
|
||||
AM_RANGE(0xfffece, 0xfffecf) AM_DEVREADWRITE8("intc", h8s_intc_device, iprk_r, iprk_w, 0xff00)
|
||||
AM_RANGE(0xffff2c, 0xffff2d) AM_DEVREADWRITE8("intc", h8s_intc_device, iscrh_r, iscrh_w, 0xff00)
|
||||
AM_RANGE(0xffff2c, 0xffff2d) AM_DEVREADWRITE8("intc", h8s_intc_device, iscrl_r, iscrl_w, 0x00ff)
|
||||
AM_RANGE(0xffff2e, 0xffff2f) AM_DEVREADWRITE8("intc", h8s_intc_device, ier_r, ier_w, 0xff00)
|
||||
AM_RANGE(0xffff2e, 0xffff2f) AM_DEVREADWRITE8("intc", h8s_intc_device, isr_r, isr_w, 0x00ff)
|
||||
AM_RANGE(0xffff38, 0xffff39) AM_READWRITE8( syscr_r, syscr_w, 0x00ff)
|
||||
AM_RANGE(0xffff50, 0xffff51) AM_DEVREAD8( "port1", h8_port_device, port_r, 0xff00)
|
||||
AM_RANGE(0xffff50, 0xffff51) AM_DEVREAD8( "port2", h8_port_device, port_r, 0x00ff)
|
||||
AM_RANGE(0xffff52, 0xffff53) AM_DEVREAD8( "port3", h8_port_device, port_r, 0xff00)
|
||||
AM_RANGE(0xffff52, 0xffff53) AM_DEVREAD8( "port4", h8_port_device, port_r, 0x00ff)
|
||||
AM_RANGE(0xffff54, 0xffff55) AM_DEVREAD8( "port5", h8_port_device, port_r, 0xff00)
|
||||
AM_RANGE(0xffff54, 0xffff55) AM_DEVREAD8( "port6", h8_port_device, port_r, 0x00ff)
|
||||
AM_RANGE(0xffff58, 0xffff59) AM_DEVREAD8( "porta", h8_port_device, port_r, 0x00ff)
|
||||
AM_RANGE(0xffff5a, 0xffff5b) AM_DEVREAD8( "portb", h8_port_device, port_r, 0xff00)
|
||||
AM_RANGE(0xffff5a, 0xffff5b) AM_DEVREAD8( "portc", h8_port_device, port_r, 0x00ff)
|
||||
AM_RANGE(0xffff5c, 0xffff5d) AM_DEVREAD8( "portd", h8_port_device, port_r, 0xff00)
|
||||
AM_RANGE(0xffff5c, 0xffff5d) AM_DEVREAD8( "porte", h8_port_device, port_r, 0x00ff)
|
||||
AM_RANGE(0xffff5e, 0xffff5f) AM_DEVREAD8( "portf", h8_port_device, port_r, 0xff00)
|
||||
AM_RANGE(0xffff5e, 0xffff5f) AM_DEVREAD8( "portg", h8_port_device, port_r, 0x00ff)
|
||||
AM_RANGE(0xffff60, 0xffff61) AM_DEVREADWRITE8("port1", h8_port_device, dr_r, dr_w, 0xff00)
|
||||
AM_RANGE(0xffff60, 0xffff61) AM_DEVREADWRITE8("port2", h8_port_device, dr_r, dr_w, 0x00ff)
|
||||
AM_RANGE(0xffff62, 0xffff63) AM_DEVREADWRITE8("port3", h8_port_device, dr_r, dr_w, 0xff00)
|
||||
AM_RANGE(0xffff64, 0xffff65) AM_DEVREADWRITE8("port5", h8_port_device, dr_r, dr_w, 0xff00)
|
||||
AM_RANGE(0xffff64, 0xffff65) AM_DEVREADWRITE8("port6", h8_port_device, dr_r, dr_w, 0x00ff)
|
||||
AM_RANGE(0xffff68, 0xffff69) AM_DEVREADWRITE8("porta", h8_port_device, dr_r, dr_w, 0x00ff)
|
||||
AM_RANGE(0xffff6a, 0xffff6b) AM_DEVREADWRITE8("portb", h8_port_device, dr_r, dr_w, 0xff00)
|
||||
AM_RANGE(0xffff6a, 0xffff6b) AM_DEVREADWRITE8("portc", h8_port_device, dr_r, dr_w, 0x00ff)
|
||||
AM_RANGE(0xffff6c, 0xffff6d) AM_DEVREADWRITE8("portd", h8_port_device, dr_r, dr_w, 0xff00)
|
||||
AM_RANGE(0xffff6c, 0xffff6d) AM_DEVREADWRITE8("porte", h8_port_device, dr_r, dr_w, 0x00ff)
|
||||
AM_RANGE(0xffff6e, 0xffff6f) AM_DEVREADWRITE8("portf", h8_port_device, dr_r, dr_w, 0xff00)
|
||||
AM_RANGE(0xffff6e, 0xffff6f) AM_DEVREADWRITE8("portg", h8_port_device, dr_r, dr_w, 0x00ff)
|
||||
AM_RANGE(0xffff70, 0xffff71) AM_DEVREADWRITE8("porta", h8_port_device, pcr_r, pcr_w, 0xff00)
|
||||
AM_RANGE(0xffff70, 0xffff71) AM_DEVREADWRITE8("portb", h8_port_device, pcr_r, pcr_w, 0x00ff)
|
||||
AM_RANGE(0xffff72, 0xffff73) AM_DEVREADWRITE8("portc", h8_port_device, pcr_r, pcr_w, 0xff00)
|
||||
AM_RANGE(0xffff72, 0xffff73) AM_DEVREADWRITE8("portd", h8_port_device, pcr_r, pcr_w, 0x00ff)
|
||||
AM_RANGE(0xffff74, 0xffff75) AM_DEVREADWRITE8("porte", h8_port_device, pcr_r, pcr_w, 0xff00)
|
||||
AM_RANGE(0xffff76, 0xffff77) AM_DEVREADWRITE8("port3", h8_port_device, odr_r, odr_w, 0xff00)
|
||||
AM_RANGE(0xffff76, 0xffff77) AM_DEVREADWRITE8("porta", h8_port_device, odr_r, odr_w, 0x00ff)
|
||||
AM_RANGE(0xffff78, 0xffff79) AM_DEVREADWRITE8("sci0", h8_sci_device, smr_r, smr_w, 0xff00)
|
||||
AM_RANGE(0xffff78, 0xffff79) AM_DEVREADWRITE8("sci0", h8_sci_device, brr_r, brr_w, 0x00ff)
|
||||
AM_RANGE(0xffff7a, 0xffff7b) AM_DEVREADWRITE8("sci0", h8_sci_device, scr_r, scr_w, 0xff00)
|
||||
AM_RANGE(0xffff7a, 0xffff7b) AM_DEVREADWRITE8("sci0", h8_sci_device, tdr_r, tdr_w, 0x00ff)
|
||||
AM_RANGE(0xffff7c, 0xffff7d) AM_DEVREADWRITE8("sci0", h8_sci_device, ssr_r, ssr_w, 0xff00)
|
||||
AM_RANGE(0xffff7c, 0xffff7d) AM_DEVREAD8( "sci0", h8_sci_device, rdr_r, 0x00ff)
|
||||
AM_RANGE(0xffff7e, 0xffff7f) AM_DEVREADWRITE8("sci0", h8_sci_device, scmr_r, scmr_w, 0xff00)
|
||||
AM_RANGE(0xffff80, 0xffff81) AM_DEVREADWRITE8("sci1", h8_sci_device, smr_r, smr_w, 0xff00)
|
||||
AM_RANGE(0xffff80, 0xffff81) AM_DEVREADWRITE8("sci1", h8_sci_device, brr_r, brr_w, 0x00ff)
|
||||
AM_RANGE(0xffff82, 0xffff83) AM_DEVREADWRITE8("sci1", h8_sci_device, scr_r, scr_w, 0xff00)
|
||||
AM_RANGE(0xffff82, 0xffff83) AM_DEVREADWRITE8("sci1", h8_sci_device, tdr_r, tdr_w, 0x00ff)
|
||||
AM_RANGE(0xffff84, 0xffff85) AM_DEVREADWRITE8("sci1", h8_sci_device, ssr_r, ssr_w, 0xff00)
|
||||
AM_RANGE(0xffff84, 0xffff85) AM_DEVREAD8( "sci1", h8_sci_device, rdr_r, 0x00ff)
|
||||
AM_RANGE(0xffff86, 0xffff87) AM_DEVREADWRITE8("sci1", h8_sci_device, scmr_r, scmr_w, 0xff00)
|
||||
AM_RANGE(0xffff88, 0xffff89) AM_DEVREADWRITE8("sci2", h8_sci_device, smr_r, smr_w, 0xff00)
|
||||
AM_RANGE(0xffff88, 0xffff89) AM_DEVREADWRITE8("sci2", h8_sci_device, brr_r, brr_w, 0x00ff)
|
||||
AM_RANGE(0xffff8a, 0xffff8b) AM_DEVREADWRITE8("sci2", h8_sci_device, scr_r, scr_w, 0xff00)
|
||||
AM_RANGE(0xffff8a, 0xffff8b) AM_DEVREADWRITE8("sci2", h8_sci_device, tdr_r, tdr_w, 0x00ff)
|
||||
AM_RANGE(0xffff8c, 0xffff8d) AM_DEVREADWRITE8("sci2", h8_sci_device, ssr_r, ssr_w, 0xff00)
|
||||
AM_RANGE(0xffff8c, 0xffff8d) AM_DEVREAD8( "sci2", h8_sci_device, rdr_r, 0x00ff)
|
||||
AM_RANGE(0xffff8e, 0xffff8f) AM_DEVREADWRITE8("sci2", h8_sci_device, scmr_r, scmr_w, 0xff00)
|
||||
AM_RANGE(0xffff90, 0xffff97) AM_DEVREAD8( "adc", h8_adc_device, addr8_r, 0xffff)
|
||||
AM_RANGE(0xffff98, 0xffff99) AM_DEVREADWRITE8("adc", h8_adc_device, adcsr_r, adcsr_w, 0xff00)
|
||||
AM_RANGE(0xffff98, 0xffff99) AM_DEVREADWRITE8("adc", h8_adc_device, adcr_r, adcr_w, 0x00ff)
|
||||
AM_RANGE(0xffffb0, 0xffffb1) AM_DEVREADWRITE8("timer8_0", h8_timer8_channel_device, tcr_r, tcr_w, 0xff00)
|
||||
AM_RANGE(0xffffb0, 0xffffb1) AM_DEVREADWRITE8("timer8_1", h8_timer8_channel_device, tcr_r, tcr_w, 0x00ff)
|
||||
AM_RANGE(0xffffb2, 0xffffb3) AM_DEVREADWRITE8("timer8_0", h8_timer8_channel_device, tcsr_r, tcsr_w, 0xff00)
|
||||
AM_RANGE(0xffffb2, 0xffffb3) AM_DEVREADWRITE8("timer8_1", h8_timer8_channel_device, tcsr_r, tcsr_w, 0x00ff)
|
||||
AM_RANGE(0xffffb4, 0xffffb7) AM_DEVREADWRITE8("timer8_0", h8_timer8_channel_device, tcor_r, tcor_w, 0xff00)
|
||||
AM_RANGE(0xffffb4, 0xffffb7) AM_DEVREADWRITE8("timer8_1", h8_timer8_channel_device, tcor_r, tcor_w, 0x00ff)
|
||||
AM_RANGE(0xffffb8, 0xffffb9) AM_DEVREADWRITE8("timer8_0", h8_timer8_channel_device, tcnt_r, tcnt_w, 0xff00)
|
||||
AM_RANGE(0xffffb8, 0xffffb9) AM_DEVREADWRITE8("timer8_1", h8_timer8_channel_device, tcnt_r, tcnt_w, 0x00ff)
|
||||
AM_RANGE(0xffffbc, 0xffffbd) AM_DEVREADWRITE( "watchdog", h8_watchdog_device, wd_r, wd_w )
|
||||
AM_RANGE(0xffffbe, 0xffffbf) AM_DEVREADWRITE( "watchdog", h8_watchdog_device, rst_r, rst_w )
|
||||
AM_RANGE(0xffffc0, 0xffffc1) AM_DEVREADWRITE8("timer16", h8_timer16_device, tstr_r, tstr_w, 0xff00)
|
||||
AM_RANGE(0xffffc0, 0xffffc1) AM_DEVREADWRITE8("timer16", h8_timer16_device, tsyr_r, tsyr_w, 0x00ff)
|
||||
AM_RANGE(0xffffd0, 0xffffd1) AM_DEVREADWRITE8("timer16:0", h8_timer16_channel_device, tcr_r, tcr_w, 0xff00)
|
||||
AM_RANGE(0xffffd0, 0xffffd1) AM_DEVREADWRITE8("timer16:0", h8_timer16_channel_device, tmdr_r, tmdr_w, 0x00ff)
|
||||
AM_RANGE(0xffffd2, 0xffffd3) AM_DEVREADWRITE8("timer16:0", h8_timer16_channel_device, tior_r, tior_w, 0xffff)
|
||||
AM_RANGE(0xffffd4, 0xffffd5) AM_DEVREADWRITE8("timer16:0", h8_timer16_channel_device, tier_r, tier_w, 0xff00)
|
||||
AM_RANGE(0xffffd4, 0xffffd5) AM_DEVREADWRITE8("timer16:0", h8_timer16_channel_device, tsr_r, tsr_w, 0x00ff)
|
||||
AM_RANGE(0xffffd6, 0xffffd7) AM_DEVREADWRITE( "timer16:0", h8_timer16_channel_device, tcnt_r, tcnt_w )
|
||||
AM_RANGE(0xffffd8, 0xffffdf) AM_DEVREADWRITE( "timer16:0", h8_timer16_channel_device, tgr_r, tgr_w )
|
||||
AM_RANGE(0xffffe0, 0xffffe1) AM_DEVREADWRITE8("timer16:1", h8_timer16_channel_device, tcr_r, tcr_w, 0xff00)
|
||||
AM_RANGE(0xffffe0, 0xffffe1) AM_DEVREADWRITE8("timer16:1", h8_timer16_channel_device, tmdr_r, tmdr_w, 0x00ff)
|
||||
AM_RANGE(0xffffe2, 0xffffe3) AM_DEVREADWRITE8("timer16:1", h8_timer16_channel_device, tior_r, tior_w, 0xff00)
|
||||
AM_RANGE(0xffffe4, 0xffffe5) AM_DEVREADWRITE8("timer16:1", h8_timer16_channel_device, tier_r, tier_w, 0xff00)
|
||||
AM_RANGE(0xffffe4, 0xffffe5) AM_DEVREADWRITE8("timer16:1", h8_timer16_channel_device, tsr_r, tsr_w, 0x00ff)
|
||||
AM_RANGE(0xffffe6, 0xffffe7) AM_DEVREADWRITE( "timer16:1", h8_timer16_channel_device, tcnt_r, tcnt_w )
|
||||
AM_RANGE(0xffffe8, 0xffffeb) AM_DEVREADWRITE( "timer16:1", h8_timer16_channel_device, tgr_r, tgr_w )
|
||||
AM_RANGE(0xfffff0, 0xfffff1) AM_DEVREADWRITE8("timer16:2", h8_timer16_channel_device, tcr_r, tcr_w, 0xff00)
|
||||
AM_RANGE(0xfffff0, 0xfffff1) AM_DEVREADWRITE8("timer16:2", h8_timer16_channel_device, tmdr_r, tmdr_w, 0x00ff)
|
||||
AM_RANGE(0xfffff2, 0xfffff3) AM_DEVREADWRITE8("timer16:2", h8_timer16_channel_device, tior_r, tior_w, 0xff00)
|
||||
AM_RANGE(0xfffff4, 0xfffff5) AM_DEVREADWRITE8("timer16:2", h8_timer16_channel_device, tier_r, tier_w, 0xff00)
|
||||
AM_RANGE(0xfffff4, 0xfffff5) AM_DEVREADWRITE8("timer16:2", h8_timer16_channel_device, tsr_r, tsr_w, 0x00ff)
|
||||
AM_RANGE(0xfffff6, 0xfffff7) AM_DEVREADWRITE( "timer16:2", h8_timer16_channel_device, tcnt_r, tcnt_w )
|
||||
AM_RANGE(0xfffff8, 0xfffffb) AM_DEVREADWRITE( "timer16:2", h8_timer16_channel_device, tgr_r, tgr_w )
|
||||
ADDRESS_MAP_END
|
||||
void h8s2357_device::map(address_map &map)
|
||||
{
|
||||
map(ram_start, 0xfffbff).ram();
|
||||
map(0xfffe80, 0xfffe80).rw("timer16:3", FUNC(h8_timer16_channel_device::tcr_r), FUNC(h8_timer16_channel_device::tcr_w));
|
||||
map(0xfffe81, 0xfffe81).rw("timer16:3", FUNC(h8_timer16_channel_device::tmdr_r), FUNC(h8_timer16_channel_device::tmdr_w));
|
||||
map(0xfffe82, 0xfffe83).rw("timer16:3", FUNC(h8_timer16_channel_device::tior_r), FUNC(h8_timer16_channel_device::tior_w));
|
||||
map(0xfffe84, 0xfffe84).rw("timer16:3", FUNC(h8_timer16_channel_device::tier_r), FUNC(h8_timer16_channel_device::tier_w));
|
||||
map(0xfffe85, 0xfffe85).rw("timer16:3", FUNC(h8_timer16_channel_device::tsr_r), FUNC(h8_timer16_channel_device::tsr_w));
|
||||
map(0xfffe86, 0xfffe87).rw("timer16:3", FUNC(h8_timer16_channel_device::tcnt_r), FUNC(h8_timer16_channel_device::tcnt_w));
|
||||
map(0xfffe88, 0xfffe8f).rw("timer16:3", FUNC(h8_timer16_channel_device::tgr_r), FUNC(h8_timer16_channel_device::tgr_w));
|
||||
map(0xfffe90, 0xfffe90).rw("timer16:4", FUNC(h8_timer16_channel_device::tcr_r), FUNC(h8_timer16_channel_device::tcr_w));
|
||||
map(0xfffe91, 0xfffe91).rw("timer16:4", FUNC(h8_timer16_channel_device::tmdr_r), FUNC(h8_timer16_channel_device::tmdr_w));
|
||||
map(0xfffe92, 0xfffe92).rw("timer16:4", FUNC(h8_timer16_channel_device::tior_r), FUNC(h8_timer16_channel_device::tior_w));
|
||||
map(0xfffe94, 0xfffe94).rw("timer16:4", FUNC(h8_timer16_channel_device::tier_r), FUNC(h8_timer16_channel_device::tier_w));
|
||||
map(0xfffe95, 0xfffe95).rw("timer16:4", FUNC(h8_timer16_channel_device::tsr_r), FUNC(h8_timer16_channel_device::tsr_w));
|
||||
map(0xfffe96, 0xfffe97).rw("timer16:4", FUNC(h8_timer16_channel_device::tcnt_r), FUNC(h8_timer16_channel_device::tcnt_w));
|
||||
map(0xfffe98, 0xfffe9b).rw("timer16:4", FUNC(h8_timer16_channel_device::tgr_r), FUNC(h8_timer16_channel_device::tgr_w));
|
||||
map(0xfffea0, 0xfffea0).rw("timer16:5", FUNC(h8_timer16_channel_device::tcr_r), FUNC(h8_timer16_channel_device::tcr_w));
|
||||
map(0xfffea1, 0xfffea1).rw("timer16:5", FUNC(h8_timer16_channel_device::tmdr_r), FUNC(h8_timer16_channel_device::tmdr_w));
|
||||
map(0xfffea2, 0xfffea2).rw("timer16:5", FUNC(h8_timer16_channel_device::tior_r), FUNC(h8_timer16_channel_device::tior_w));
|
||||
map(0xfffea4, 0xfffea4).rw("timer16:5", FUNC(h8_timer16_channel_device::tier_r), FUNC(h8_timer16_channel_device::tier_w));
|
||||
map(0xfffea5, 0xfffea5).rw("timer16:5", FUNC(h8_timer16_channel_device::tsr_r), FUNC(h8_timer16_channel_device::tsr_w));
|
||||
map(0xfffea6, 0xfffea7).rw("timer16:5", FUNC(h8_timer16_channel_device::tcnt_r), FUNC(h8_timer16_channel_device::tcnt_w));
|
||||
map(0xfffea8, 0xfffeab).rw("timer16:5", FUNC(h8_timer16_channel_device::tgr_r), FUNC(h8_timer16_channel_device::tgr_w));
|
||||
map(0xfffeb0, 0xfffeb0).w("port1", FUNC(h8_port_device::ddr_w));
|
||||
map(0xfffeb1, 0xfffeb1).w("port2", FUNC(h8_port_device::ddr_w));
|
||||
map(0xfffeb2, 0xfffeb2).w("port3", FUNC(h8_port_device::ddr_w));
|
||||
map(0xfffeb4, 0xfffeb4).w("port5", FUNC(h8_port_device::ddr_w));
|
||||
map(0xfffeb5, 0xfffeb5).w("port6", FUNC(h8_port_device::ddr_w));
|
||||
map(0xfffeb9, 0xfffeb9).w("porta", FUNC(h8_port_device::ddr_w));
|
||||
map(0xfffeba, 0xfffeba).w("portb", FUNC(h8_port_device::ddr_w));
|
||||
map(0xfffebb, 0xfffebb).w("portc", FUNC(h8_port_device::ddr_w));
|
||||
map(0xfffebc, 0xfffebc).w("portd", FUNC(h8_port_device::ddr_w));
|
||||
map(0xfffebd, 0xfffebd).w("porte", FUNC(h8_port_device::ddr_w));
|
||||
map(0xfffebe, 0xfffebe).w("portf", FUNC(h8_port_device::ddr_w));
|
||||
map(0xfffebf, 0xfffebf).w("portg", FUNC(h8_port_device::ddr_w));
|
||||
map(0xfffec4, 0xfffecd).rw("intc", FUNC(h8s_intc_device::ipr_r), FUNC(h8s_intc_device::ipr_w));
|
||||
map(0xfffece, 0xfffece).rw("intc", FUNC(h8s_intc_device::iprk_r), FUNC(h8s_intc_device::iprk_w));
|
||||
map(0xffff2c, 0xffff2c).rw("intc", FUNC(h8s_intc_device::iscrh_r), FUNC(h8s_intc_device::iscrh_w));
|
||||
map(0xffff2d, 0xffff2d).rw("intc", FUNC(h8s_intc_device::iscrl_r), FUNC(h8s_intc_device::iscrl_w));
|
||||
map(0xffff2e, 0xffff2e).rw("intc", FUNC(h8s_intc_device::ier_r), FUNC(h8s_intc_device::ier_w));
|
||||
map(0xffff2f, 0xffff2f).rw("intc", FUNC(h8s_intc_device::isr_r), FUNC(h8s_intc_device::isr_w));
|
||||
map(0xffff39, 0xffff39).rw(this, FUNC(h8s2357_device::syscr_r), FUNC(h8s2357_device::syscr_w));
|
||||
map(0xffff50, 0xffff50).r("port1", FUNC(h8_port_device::port_r));
|
||||
map(0xffff51, 0xffff51).r("port2", FUNC(h8_port_device::port_r));
|
||||
map(0xffff52, 0xffff52).r("port3", FUNC(h8_port_device::port_r));
|
||||
map(0xffff53, 0xffff53).r("port4", FUNC(h8_port_device::port_r));
|
||||
map(0xffff54, 0xffff54).r("port5", FUNC(h8_port_device::port_r));
|
||||
map(0xffff55, 0xffff55).r("port6", FUNC(h8_port_device::port_r));
|
||||
map(0xffff59, 0xffff59).r("porta", FUNC(h8_port_device::port_r));
|
||||
map(0xffff5a, 0xffff5a).r("portb", FUNC(h8_port_device::port_r));
|
||||
map(0xffff5b, 0xffff5b).r("portc", FUNC(h8_port_device::port_r));
|
||||
map(0xffff5c, 0xffff5c).r("portd", FUNC(h8_port_device::port_r));
|
||||
map(0xffff5d, 0xffff5d).r("porte", FUNC(h8_port_device::port_r));
|
||||
map(0xffff5e, 0xffff5e).r("portf", FUNC(h8_port_device::port_r));
|
||||
map(0xffff5f, 0xffff5f).r("portg", FUNC(h8_port_device::port_r));
|
||||
map(0xffff60, 0xffff60).rw("port1", FUNC(h8_port_device::dr_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffff61, 0xffff61).rw("port2", FUNC(h8_port_device::dr_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffff62, 0xffff62).rw("port3", FUNC(h8_port_device::dr_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffff64, 0xffff64).rw("port5", FUNC(h8_port_device::dr_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffff65, 0xffff65).rw("port6", FUNC(h8_port_device::dr_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffff69, 0xffff69).rw("porta", FUNC(h8_port_device::dr_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffff6a, 0xffff6a).rw("portb", FUNC(h8_port_device::dr_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffff6b, 0xffff6b).rw("portc", FUNC(h8_port_device::dr_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffff6c, 0xffff6c).rw("portd", FUNC(h8_port_device::dr_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffff6d, 0xffff6d).rw("porte", FUNC(h8_port_device::dr_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffff6e, 0xffff6e).rw("portf", FUNC(h8_port_device::dr_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffff6f, 0xffff6f).rw("portg", FUNC(h8_port_device::dr_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffff70, 0xffff70).rw("porta", FUNC(h8_port_device::pcr_r), FUNC(h8_port_device::pcr_w));
|
||||
map(0xffff71, 0xffff71).rw("portb", FUNC(h8_port_device::pcr_r), FUNC(h8_port_device::pcr_w));
|
||||
map(0xffff72, 0xffff72).rw("portc", FUNC(h8_port_device::pcr_r), FUNC(h8_port_device::pcr_w));
|
||||
map(0xffff73, 0xffff73).rw("portd", FUNC(h8_port_device::pcr_r), FUNC(h8_port_device::pcr_w));
|
||||
map(0xffff74, 0xffff74).rw("porte", FUNC(h8_port_device::pcr_r), FUNC(h8_port_device::pcr_w));
|
||||
map(0xffff76, 0xffff76).rw("port3", FUNC(h8_port_device::odr_r), FUNC(h8_port_device::odr_w));
|
||||
map(0xffff77, 0xffff77).rw("porta", FUNC(h8_port_device::odr_r), FUNC(h8_port_device::odr_w));
|
||||
map(0xffff78, 0xffff78).rw("sci0", FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
|
||||
map(0xffff79, 0xffff79).rw("sci0", FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
|
||||
map(0xffff7a, 0xffff7a).rw("sci0", FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
|
||||
map(0xffff7b, 0xffff7b).rw("sci0", FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
|
||||
map(0xffff7c, 0xffff7c).rw("sci0", FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
|
||||
map(0xffff7d, 0xffff7d).r("sci0", FUNC(h8_sci_device::rdr_r));
|
||||
map(0xffff7e, 0xffff7e).rw("sci0", FUNC(h8_sci_device::scmr_r), FUNC(h8_sci_device::scmr_w));
|
||||
map(0xffff80, 0xffff80).rw("sci1", FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
|
||||
map(0xffff81, 0xffff81).rw("sci1", FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
|
||||
map(0xffff82, 0xffff82).rw("sci1", FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
|
||||
map(0xffff83, 0xffff83).rw("sci1", FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
|
||||
map(0xffff84, 0xffff84).rw("sci1", FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
|
||||
map(0xffff85, 0xffff85).r("sci1", FUNC(h8_sci_device::rdr_r));
|
||||
map(0xffff86, 0xffff86).rw("sci1", FUNC(h8_sci_device::scmr_r), FUNC(h8_sci_device::scmr_w));
|
||||
map(0xffff88, 0xffff88).rw("sci2", FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
|
||||
map(0xffff89, 0xffff89).rw("sci2", FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
|
||||
map(0xffff8a, 0xffff8a).rw("sci2", FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
|
||||
map(0xffff8b, 0xffff8b).rw("sci2", FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
|
||||
map(0xffff8c, 0xffff8c).rw("sci2", FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
|
||||
map(0xffff8d, 0xffff8d).r("sci2", FUNC(h8_sci_device::rdr_r));
|
||||
map(0xffff8e, 0xffff8e).rw("sci2", FUNC(h8_sci_device::scmr_r), FUNC(h8_sci_device::scmr_w));
|
||||
map(0xffff90, 0xffff97).r("adc", FUNC(h8_adc_device::addr8_r));
|
||||
map(0xffff98, 0xffff98).rw("adc", FUNC(h8_adc_device::adcsr_r), FUNC(h8_adc_device::adcsr_w));
|
||||
map(0xffff99, 0xffff99).rw("adc", FUNC(h8_adc_device::adcr_r), FUNC(h8_adc_device::adcr_w));
|
||||
map(0xffffb0, 0xffffb0).rw("timer8_0", FUNC(h8_timer8_channel_device::tcr_r), FUNC(h8_timer8_channel_device::tcr_w));
|
||||
map(0xffffb1, 0xffffb1).rw("timer8_1", FUNC(h8_timer8_channel_device::tcr_r), FUNC(h8_timer8_channel_device::tcr_w));
|
||||
map(0xffffb2, 0xffffb2).rw("timer8_0", FUNC(h8_timer8_channel_device::tcsr_r), FUNC(h8_timer8_channel_device::tcsr_w));
|
||||
map(0xffffb3, 0xffffb3).rw("timer8_1", FUNC(h8_timer8_channel_device::tcsr_r), FUNC(h8_timer8_channel_device::tcsr_w));
|
||||
map(0xffffb4, 0xffffb7).rw("timer8_0", FUNC(h8_timer8_channel_device::tcor_r), FUNC(h8_timer8_channel_device::tcor_w)).umask16(0xff00);
|
||||
map(0xffffb4, 0xffffb7).rw("timer8_1", FUNC(h8_timer8_channel_device::tcor_r), FUNC(h8_timer8_channel_device::tcor_w)).umask16(0x00ff);
|
||||
map(0xffffb8, 0xffffb8).rw("timer8_0", FUNC(h8_timer8_channel_device::tcnt_r), FUNC(h8_timer8_channel_device::tcnt_w));
|
||||
map(0xffffb9, 0xffffb9).rw("timer8_1", FUNC(h8_timer8_channel_device::tcnt_r), FUNC(h8_timer8_channel_device::tcnt_w));
|
||||
map(0xffffbc, 0xffffbd).rw("watchdog", FUNC(h8_watchdog_device::wd_r), FUNC(h8_watchdog_device::wd_w));
|
||||
map(0xffffbe, 0xffffbf).rw("watchdog", FUNC(h8_watchdog_device::rst_r), FUNC(h8_watchdog_device::rst_w));
|
||||
map(0xffffc0, 0xffffc0).rw("timer16", FUNC(h8_timer16_device::tstr_r), FUNC(h8_timer16_device::tstr_w));
|
||||
map(0xffffc1, 0xffffc1).rw("timer16", FUNC(h8_timer16_device::tsyr_r), FUNC(h8_timer16_device::tsyr_w));
|
||||
map(0xffffd0, 0xffffd0).rw("timer16:0", FUNC(h8_timer16_channel_device::tcr_r), FUNC(h8_timer16_channel_device::tcr_w));
|
||||
map(0xffffd1, 0xffffd1).rw("timer16:0", FUNC(h8_timer16_channel_device::tmdr_r), FUNC(h8_timer16_channel_device::tmdr_w));
|
||||
map(0xffffd2, 0xffffd3).rw("timer16:0", FUNC(h8_timer16_channel_device::tior_r), FUNC(h8_timer16_channel_device::tior_w));
|
||||
map(0xffffd4, 0xffffd4).rw("timer16:0", FUNC(h8_timer16_channel_device::tier_r), FUNC(h8_timer16_channel_device::tier_w));
|
||||
map(0xffffd5, 0xffffd5).rw("timer16:0", FUNC(h8_timer16_channel_device::tsr_r), FUNC(h8_timer16_channel_device::tsr_w));
|
||||
map(0xffffd6, 0xffffd7).rw("timer16:0", FUNC(h8_timer16_channel_device::tcnt_r), FUNC(h8_timer16_channel_device::tcnt_w));
|
||||
map(0xffffd8, 0xffffdf).rw("timer16:0", FUNC(h8_timer16_channel_device::tgr_r), FUNC(h8_timer16_channel_device::tgr_w));
|
||||
map(0xffffe0, 0xffffe0).rw("timer16:1", FUNC(h8_timer16_channel_device::tcr_r), FUNC(h8_timer16_channel_device::tcr_w));
|
||||
map(0xffffe1, 0xffffe1).rw("timer16:1", FUNC(h8_timer16_channel_device::tmdr_r), FUNC(h8_timer16_channel_device::tmdr_w));
|
||||
map(0xffffe2, 0xffffe2).rw("timer16:1", FUNC(h8_timer16_channel_device::tior_r), FUNC(h8_timer16_channel_device::tior_w));
|
||||
map(0xffffe4, 0xffffe4).rw("timer16:1", FUNC(h8_timer16_channel_device::tier_r), FUNC(h8_timer16_channel_device::tier_w));
|
||||
map(0xffffe5, 0xffffe5).rw("timer16:1", FUNC(h8_timer16_channel_device::tsr_r), FUNC(h8_timer16_channel_device::tsr_w));
|
||||
map(0xffffe6, 0xffffe7).rw("timer16:1", FUNC(h8_timer16_channel_device::tcnt_r), FUNC(h8_timer16_channel_device::tcnt_w));
|
||||
map(0xffffe8, 0xffffeb).rw("timer16:1", FUNC(h8_timer16_channel_device::tgr_r), FUNC(h8_timer16_channel_device::tgr_w));
|
||||
map(0xfffff0, 0xfffff0).rw("timer16:2", FUNC(h8_timer16_channel_device::tcr_r), FUNC(h8_timer16_channel_device::tcr_w));
|
||||
map(0xfffff1, 0xfffff1).rw("timer16:2", FUNC(h8_timer16_channel_device::tmdr_r), FUNC(h8_timer16_channel_device::tmdr_w));
|
||||
map(0xfffff2, 0xfffff2).rw("timer16:2", FUNC(h8_timer16_channel_device::tior_r), FUNC(h8_timer16_channel_device::tior_w));
|
||||
map(0xfffff4, 0xfffff4).rw("timer16:2", FUNC(h8_timer16_channel_device::tier_r), FUNC(h8_timer16_channel_device::tier_w));
|
||||
map(0xfffff5, 0xfffff5).rw("timer16:2", FUNC(h8_timer16_channel_device::tsr_r), FUNC(h8_timer16_channel_device::tsr_w));
|
||||
map(0xfffff6, 0xfffff7).rw("timer16:2", FUNC(h8_timer16_channel_device::tcnt_r), FUNC(h8_timer16_channel_device::tcnt_w));
|
||||
map(0xfffff8, 0xfffffb).rw("timer16:2", FUNC(h8_timer16_channel_device::tgr_r), FUNC(h8_timer16_channel_device::tgr_w));
|
||||
}
|
||||
|
||||
MACHINE_CONFIG_START(h8s2357_device::device_add_mconfig)
|
||||
MCFG_H8S_INTC_ADD("intc")
|
||||
|
||||
@ -52,140 +52,141 @@ h8s2653_device::h8s2653_device(const machine_config &mconfig, const char *tag, d
|
||||
{
|
||||
}
|
||||
|
||||
ADDRESS_MAP_START(h8s2655_device::map)
|
||||
AM_RANGE(0xffec00, 0xfffbff) AM_RAM
|
||||
AM_RANGE(0xfffe80, 0xfffe81) AM_DEVREADWRITE8("timer16:3", h8_timer16_channel_device, tcr_r, tcr_w, 0xff00)
|
||||
AM_RANGE(0xfffe80, 0xfffe81) AM_DEVREADWRITE8("timer16:3", h8_timer16_channel_device, tmdr_r, tmdr_w, 0x00ff)
|
||||
AM_RANGE(0xfffe82, 0xfffe83) AM_DEVREADWRITE8("timer16:3", h8_timer16_channel_device, tior_r, tior_w, 0xffff)
|
||||
AM_RANGE(0xfffe84, 0xfffe85) AM_DEVREADWRITE8("timer16:3", h8_timer16_channel_device, tier_r, tier_w, 0xff00)
|
||||
AM_RANGE(0xfffe84, 0xfffe85) AM_DEVREADWRITE8("timer16:3", h8_timer16_channel_device, tsr_r, tsr_w, 0x00ff)
|
||||
AM_RANGE(0xfffe86, 0xfffe87) AM_DEVREADWRITE( "timer16:3", h8_timer16_channel_device, tcnt_r, tcnt_w )
|
||||
AM_RANGE(0xfffe88, 0xfffe8f) AM_DEVREADWRITE( "timer16:3", h8_timer16_channel_device, tgr_r, tgr_w )
|
||||
AM_RANGE(0xfffe90, 0xfffe91) AM_DEVREADWRITE8("timer16:4", h8_timer16_channel_device, tcr_r, tcr_w, 0xff00)
|
||||
AM_RANGE(0xfffe90, 0xfffe91) AM_DEVREADWRITE8("timer16:4", h8_timer16_channel_device, tmdr_r, tmdr_w, 0x00ff)
|
||||
AM_RANGE(0xfffe92, 0xfffe93) AM_DEVREADWRITE8("timer16:4", h8_timer16_channel_device, tior_r, tior_w, 0xff00)
|
||||
AM_RANGE(0xfffe94, 0xfffe95) AM_DEVREADWRITE8("timer16:4", h8_timer16_channel_device, tier_r, tier_w, 0xff00)
|
||||
AM_RANGE(0xfffe94, 0xfffe95) AM_DEVREADWRITE8("timer16:4", h8_timer16_channel_device, tsr_r, tsr_w, 0x00ff)
|
||||
AM_RANGE(0xfffe96, 0xfffe97) AM_DEVREADWRITE( "timer16:4", h8_timer16_channel_device, tcnt_r, tcnt_w )
|
||||
AM_RANGE(0xfffe98, 0xfffe9b) AM_DEVREADWRITE( "timer16:4", h8_timer16_channel_device, tgr_r, tgr_w )
|
||||
AM_RANGE(0xfffea0, 0xfffea1) AM_DEVREADWRITE8("timer16:5", h8_timer16_channel_device, tcr_r, tcr_w, 0xff00)
|
||||
AM_RANGE(0xfffea0, 0xfffea1) AM_DEVREADWRITE8("timer16:5", h8_timer16_channel_device, tmdr_r, tmdr_w, 0x00ff)
|
||||
AM_RANGE(0xfffea2, 0xfffea3) AM_DEVREADWRITE8("timer16:5", h8_timer16_channel_device, tior_r, tior_w, 0xff00)
|
||||
AM_RANGE(0xfffea4, 0xfffea5) AM_DEVREADWRITE8("timer16:5", h8_timer16_channel_device, tier_r, tier_w, 0xff00)
|
||||
AM_RANGE(0xfffea4, 0xfffea5) AM_DEVREADWRITE8("timer16:5", h8_timer16_channel_device, tsr_r, tsr_w, 0x00ff)
|
||||
AM_RANGE(0xfffea6, 0xfffea7) AM_DEVREADWRITE( "timer16:5", h8_timer16_channel_device, tcnt_r, tcnt_w )
|
||||
AM_RANGE(0xfffea8, 0xfffeab) AM_DEVREADWRITE( "timer16:5", h8_timer16_channel_device, tgr_r, tgr_w )
|
||||
AM_RANGE(0xfffeb0, 0xfffeb1) AM_DEVWRITE8( "port1", h8_port_device, ddr_w, 0xff00)
|
||||
AM_RANGE(0xfffeb0, 0xfffeb1) AM_DEVWRITE8( "port2", h8_port_device, ddr_w, 0x00ff)
|
||||
AM_RANGE(0xfffeb2, 0xfffeb3) AM_DEVWRITE8( "port3", h8_port_device, ddr_w, 0xff00)
|
||||
AM_RANGE(0xfffeb4, 0xfffeb5) AM_DEVWRITE8( "port5", h8_port_device, ddr_w, 0xff00)
|
||||
AM_RANGE(0xfffeb4, 0xfffeb5) AM_DEVWRITE8( "port6", h8_port_device, ddr_w, 0x00ff)
|
||||
AM_RANGE(0xfffeb8, 0xfffeb9) AM_DEVWRITE8( "porta", h8_port_device, ddr_w, 0x00ff)
|
||||
AM_RANGE(0xfffeba, 0xfffebb) AM_DEVWRITE8( "portb", h8_port_device, ddr_w, 0xff00)
|
||||
AM_RANGE(0xfffeba, 0xfffebb) AM_DEVWRITE8( "portc", h8_port_device, ddr_w, 0x00ff)
|
||||
AM_RANGE(0xfffebc, 0xfffebd) AM_DEVWRITE8( "portd", h8_port_device, ddr_w, 0xff00)
|
||||
AM_RANGE(0xfffebc, 0xfffebd) AM_DEVWRITE8( "porte", h8_port_device, ddr_w, 0x00ff)
|
||||
AM_RANGE(0xfffebe, 0xfffebf) AM_DEVWRITE8( "portf", h8_port_device, ddr_w, 0xff00)
|
||||
AM_RANGE(0xfffebe, 0xfffebf) AM_DEVWRITE8( "portg", h8_port_device, ddr_w, 0x00ff)
|
||||
AM_RANGE(0xfffec0, 0xfffec1) AM_DEVREADWRITE8("intc", h8s_intc_device, icr_r, icr_w, 0xffff)
|
||||
AM_RANGE(0xfffec2, 0xfffec3) AM_DEVREADWRITE8("intc", h8s_intc_device, icrc_r, icrc_w, 0xff00)
|
||||
AM_RANGE(0xfffec4, 0xfffecd) AM_DEVREADWRITE8("intc", h8s_intc_device, ipr_r, ipr_w, 0xffff)
|
||||
AM_RANGE(0xfffece, 0xfffecf) AM_DEVREADWRITE8("intc", h8s_intc_device, iprk_r, iprk_w, 0xff00)
|
||||
AM_RANGE(0xffff2c, 0xffff2d) AM_DEVREADWRITE8("intc", h8s_intc_device, iscrh_r, iscrh_w, 0xff00)
|
||||
AM_RANGE(0xffff2c, 0xffff2d) AM_DEVREADWRITE8("intc", h8s_intc_device, iscrl_r, iscrl_w, 0x00ff)
|
||||
AM_RANGE(0xffff2e, 0xffff2f) AM_DEVREADWRITE8("intc", h8s_intc_device, ier_r, ier_w, 0xff00)
|
||||
AM_RANGE(0xffff2e, 0xffff2f) AM_DEVREADWRITE8("intc", h8s_intc_device, isr_r, isr_w, 0x00ff)
|
||||
AM_RANGE(0xffff38, 0xffff39) AM_READWRITE8( syscr_r, syscr_w, 0x00ff)
|
||||
AM_RANGE(0xffff50, 0xffff51) AM_DEVREAD8( "port1", h8_port_device, port_r, 0xff00)
|
||||
AM_RANGE(0xffff50, 0xffff51) AM_DEVREAD8( "port2", h8_port_device, port_r, 0x00ff)
|
||||
AM_RANGE(0xffff52, 0xffff53) AM_DEVREAD8( "port3", h8_port_device, port_r, 0xff00)
|
||||
AM_RANGE(0xffff52, 0xffff53) AM_DEVREAD8( "port4", h8_port_device, port_r, 0x00ff)
|
||||
AM_RANGE(0xffff54, 0xffff55) AM_DEVREAD8( "port5", h8_port_device, port_r, 0xff00)
|
||||
AM_RANGE(0xffff54, 0xffff55) AM_DEVREAD8( "port6", h8_port_device, port_r, 0x00ff)
|
||||
AM_RANGE(0xffff58, 0xffff59) AM_DEVREAD8( "porta", h8_port_device, port_r, 0x00ff)
|
||||
AM_RANGE(0xffff5a, 0xffff5b) AM_DEVREAD8( "portb", h8_port_device, port_r, 0xff00)
|
||||
AM_RANGE(0xffff5a, 0xffff5b) AM_DEVREAD8( "portc", h8_port_device, port_r, 0x00ff)
|
||||
AM_RANGE(0xffff5c, 0xffff5d) AM_DEVREAD8( "portd", h8_port_device, port_r, 0xff00)
|
||||
AM_RANGE(0xffff5c, 0xffff5d) AM_DEVREAD8( "porte", h8_port_device, port_r, 0x00ff)
|
||||
AM_RANGE(0xffff5e, 0xffff5f) AM_DEVREAD8( "portf", h8_port_device, port_r, 0xff00)
|
||||
AM_RANGE(0xffff5e, 0xffff5f) AM_DEVREAD8( "portg", h8_port_device, port_r, 0x00ff)
|
||||
AM_RANGE(0xffff60, 0xffff61) AM_DEVREADWRITE8("port1", h8_port_device, dr_r, dr_w, 0xff00)
|
||||
AM_RANGE(0xffff60, 0xffff61) AM_DEVREADWRITE8("port2", h8_port_device, dr_r, dr_w, 0x00ff)
|
||||
AM_RANGE(0xffff62, 0xffff63) AM_DEVREADWRITE8("port3", h8_port_device, dr_r, dr_w, 0xff00)
|
||||
AM_RANGE(0xffff64, 0xffff65) AM_DEVREADWRITE8("port5", h8_port_device, dr_r, dr_w, 0xff00)
|
||||
AM_RANGE(0xffff64, 0xffff65) AM_DEVREADWRITE8("port6", h8_port_device, dr_r, dr_w, 0x00ff)
|
||||
AM_RANGE(0xffff68, 0xffff69) AM_DEVREADWRITE8("porta", h8_port_device, dr_r, dr_w, 0x00ff)
|
||||
AM_RANGE(0xffff6a, 0xffff6b) AM_DEVREADWRITE8("portb", h8_port_device, dr_r, dr_w, 0xff00)
|
||||
AM_RANGE(0xffff6a, 0xffff6b) AM_DEVREADWRITE8("portc", h8_port_device, dr_r, dr_w, 0x00ff)
|
||||
AM_RANGE(0xffff6c, 0xffff6d) AM_DEVREADWRITE8("portd", h8_port_device, dr_r, dr_w, 0xff00)
|
||||
AM_RANGE(0xffff6c, 0xffff6d) AM_DEVREADWRITE8("porte", h8_port_device, dr_r, dr_w, 0x00ff)
|
||||
AM_RANGE(0xffff6e, 0xffff6f) AM_DEVREADWRITE8("portf", h8_port_device, dr_r, dr_w, 0xff00)
|
||||
AM_RANGE(0xffff6e, 0xffff6f) AM_DEVREADWRITE8("portg", h8_port_device, dr_r, dr_w, 0x00ff)
|
||||
AM_RANGE(0xffff70, 0xffff71) AM_DEVREADWRITE8("porta", h8_port_device, pcr_r, pcr_w, 0xff00)
|
||||
AM_RANGE(0xffff70, 0xffff71) AM_DEVREADWRITE8("portb", h8_port_device, pcr_r, pcr_w, 0x00ff)
|
||||
AM_RANGE(0xffff72, 0xffff73) AM_DEVREADWRITE8("portc", h8_port_device, pcr_r, pcr_w, 0xff00)
|
||||
AM_RANGE(0xffff72, 0xffff73) AM_DEVREADWRITE8("portd", h8_port_device, pcr_r, pcr_w, 0x00ff)
|
||||
AM_RANGE(0xffff74, 0xffff75) AM_DEVREADWRITE8("porte", h8_port_device, pcr_r, pcr_w, 0xff00)
|
||||
AM_RANGE(0xffff76, 0xffff77) AM_DEVREADWRITE8("port3", h8_port_device, odr_r, odr_w, 0xff00)
|
||||
AM_RANGE(0xffff76, 0xffff77) AM_DEVREADWRITE8("porta", h8_port_device, odr_r, odr_w, 0x00ff)
|
||||
AM_RANGE(0xffff78, 0xffff79) AM_DEVREADWRITE8("sci0", h8_sci_device, smr_r, smr_w, 0xff00)
|
||||
AM_RANGE(0xffff78, 0xffff79) AM_DEVREADWRITE8("sci0", h8_sci_device, brr_r, brr_w, 0x00ff)
|
||||
AM_RANGE(0xffff7a, 0xffff7b) AM_DEVREADWRITE8("sci0", h8_sci_device, scr_r, scr_w, 0xff00)
|
||||
AM_RANGE(0xffff7a, 0xffff7b) AM_DEVREADWRITE8("sci0", h8_sci_device, tdr_r, tdr_w, 0x00ff)
|
||||
AM_RANGE(0xffff7c, 0xffff7d) AM_DEVREADWRITE8("sci0", h8_sci_device, ssr_r, ssr_w, 0xff00)
|
||||
AM_RANGE(0xffff7c, 0xffff7d) AM_DEVREAD8( "sci0", h8_sci_device, rdr_r, 0x00ff)
|
||||
AM_RANGE(0xffff7e, 0xffff7f) AM_DEVREADWRITE8("sci0", h8_sci_device, scmr_r, scmr_w, 0xff00)
|
||||
AM_RANGE(0xffff80, 0xffff81) AM_DEVREADWRITE8("sci1", h8_sci_device, smr_r, smr_w, 0xff00)
|
||||
AM_RANGE(0xffff80, 0xffff81) AM_DEVREADWRITE8("sci1", h8_sci_device, brr_r, brr_w, 0x00ff)
|
||||
AM_RANGE(0xffff82, 0xffff83) AM_DEVREADWRITE8("sci1", h8_sci_device, scr_r, scr_w, 0xff00)
|
||||
AM_RANGE(0xffff82, 0xffff83) AM_DEVREADWRITE8("sci1", h8_sci_device, tdr_r, tdr_w, 0x00ff)
|
||||
AM_RANGE(0xffff84, 0xffff85) AM_DEVREADWRITE8("sci1", h8_sci_device, ssr_r, ssr_w, 0xff00)
|
||||
AM_RANGE(0xffff84, 0xffff85) AM_DEVREAD8( "sci1", h8_sci_device, rdr_r, 0x00ff)
|
||||
AM_RANGE(0xffff86, 0xffff87) AM_DEVREADWRITE8("sci1", h8_sci_device, scmr_r, scmr_w, 0xff00)
|
||||
AM_RANGE(0xffff88, 0xffff89) AM_DEVREADWRITE8("sci2", h8_sci_device, smr_r, smr_w, 0xff00)
|
||||
AM_RANGE(0xffff88, 0xffff89) AM_DEVREADWRITE8("sci2", h8_sci_device, brr_r, brr_w, 0x00ff)
|
||||
AM_RANGE(0xffff8a, 0xffff8b) AM_DEVREADWRITE8("sci2", h8_sci_device, scr_r, scr_w, 0xff00)
|
||||
AM_RANGE(0xffff8a, 0xffff8b) AM_DEVREADWRITE8("sci2", h8_sci_device, tdr_r, tdr_w, 0x00ff)
|
||||
AM_RANGE(0xffff8c, 0xffff8d) AM_DEVREADWRITE8("sci2", h8_sci_device, ssr_r, ssr_w, 0xff00)
|
||||
AM_RANGE(0xffff8c, 0xffff8d) AM_DEVREAD8( "sci2", h8_sci_device, rdr_r, 0x00ff)
|
||||
AM_RANGE(0xffff8e, 0xffff8f) AM_DEVREADWRITE8("sci2", h8_sci_device, scmr_r, scmr_w, 0xff00)
|
||||
AM_RANGE(0xffff90, 0xffff9f) AM_DEVREAD( "adc", h8_adc_device, addr16_r )
|
||||
AM_RANGE(0xffffa0, 0xffffa1) AM_DEVREADWRITE8("adc", h8_adc_device, adcsr_r, adcsr_w, 0xff00)
|
||||
AM_RANGE(0xffffa0, 0xffffa1) AM_DEVREADWRITE8("adc", h8_adc_device, adcr_r, adcr_w, 0x00ff)
|
||||
AM_RANGE(0xffffb0, 0xffffb1) AM_DEVREADWRITE8("timer8_0", h8_timer8_channel_device, tcr_r, tcr_w, 0xff00)
|
||||
AM_RANGE(0xffffb0, 0xffffb1) AM_DEVREADWRITE8("timer8_1", h8_timer8_channel_device, tcr_r, tcr_w, 0x00ff)
|
||||
AM_RANGE(0xffffb2, 0xffffb3) AM_DEVREADWRITE8("timer8_0", h8_timer8_channel_device, tcsr_r, tcsr_w, 0xff00)
|
||||
AM_RANGE(0xffffb2, 0xffffb3) AM_DEVREADWRITE8("timer8_1", h8_timer8_channel_device, tcsr_r, tcsr_w, 0x00ff)
|
||||
AM_RANGE(0xffffb4, 0xffffb7) AM_DEVREADWRITE8("timer8_0", h8_timer8_channel_device, tcor_r, tcor_w, 0xff00)
|
||||
AM_RANGE(0xffffb4, 0xffffb7) AM_DEVREADWRITE8("timer8_1", h8_timer8_channel_device, tcor_r, tcor_w, 0x00ff)
|
||||
AM_RANGE(0xffffb8, 0xffffb9) AM_DEVREADWRITE8("timer8_0", h8_timer8_channel_device, tcnt_r, tcnt_w, 0xff00)
|
||||
AM_RANGE(0xffffb8, 0xffffb9) AM_DEVREADWRITE8("timer8_1", h8_timer8_channel_device, tcnt_r, tcnt_w, 0x00ff)
|
||||
AM_RANGE(0xffffbc, 0xffffbd) AM_DEVREADWRITE( "watchdog", h8_watchdog_device, wd_r, wd_w )
|
||||
AM_RANGE(0xffffbe, 0xffffbf) AM_DEVREADWRITE( "watchdog", h8_watchdog_device, rst_r, rst_w )
|
||||
AM_RANGE(0xffffc0, 0xffffc1) AM_DEVREADWRITE8("timer16", h8_timer16_device, tstr_r, tstr_w, 0xff00)
|
||||
AM_RANGE(0xffffc0, 0xffffc1) AM_DEVREADWRITE8("timer16", h8_timer16_device, tsyr_r, tsyr_w, 0x00ff)
|
||||
AM_RANGE(0xffffd0, 0xffffd1) AM_DEVREADWRITE8("timer16:0", h8_timer16_channel_device, tcr_r, tcr_w, 0xff00)
|
||||
AM_RANGE(0xffffd0, 0xffffd1) AM_DEVREADWRITE8("timer16:0", h8_timer16_channel_device, tmdr_r, tmdr_w, 0x00ff)
|
||||
AM_RANGE(0xffffd2, 0xffffd3) AM_DEVREADWRITE8("timer16:0", h8_timer16_channel_device, tior_r, tior_w, 0xffff)
|
||||
AM_RANGE(0xffffd4, 0xffffd5) AM_DEVREADWRITE8("timer16:0", h8_timer16_channel_device, tier_r, tier_w, 0xff00)
|
||||
AM_RANGE(0xffffd4, 0xffffd5) AM_DEVREADWRITE8("timer16:0", h8_timer16_channel_device, tsr_r, tsr_w, 0x00ff)
|
||||
AM_RANGE(0xffffd6, 0xffffd7) AM_DEVREADWRITE( "timer16:0", h8_timer16_channel_device, tcnt_r, tcnt_w )
|
||||
AM_RANGE(0xffffd8, 0xffffdf) AM_DEVREADWRITE( "timer16:0", h8_timer16_channel_device, tgr_r, tgr_w )
|
||||
AM_RANGE(0xffffe0, 0xffffe1) AM_DEVREADWRITE8("timer16:1", h8_timer16_channel_device, tcr_r, tcr_w, 0xff00)
|
||||
AM_RANGE(0xffffe0, 0xffffe1) AM_DEVREADWRITE8("timer16:1", h8_timer16_channel_device, tmdr_r, tmdr_w, 0x00ff)
|
||||
AM_RANGE(0xffffe2, 0xffffe3) AM_DEVREADWRITE8("timer16:1", h8_timer16_channel_device, tior_r, tior_w, 0xff00)
|
||||
AM_RANGE(0xffffe4, 0xffffe5) AM_DEVREADWRITE8("timer16:1", h8_timer16_channel_device, tier_r, tier_w, 0xff00)
|
||||
AM_RANGE(0xffffe4, 0xffffe5) AM_DEVREADWRITE8("timer16:1", h8_timer16_channel_device, tsr_r, tsr_w, 0x00ff)
|
||||
AM_RANGE(0xffffe6, 0xffffe7) AM_DEVREADWRITE( "timer16:1", h8_timer16_channel_device, tcnt_r, tcnt_w )
|
||||
AM_RANGE(0xffffe8, 0xffffeb) AM_DEVREADWRITE( "timer16:1", h8_timer16_channel_device, tgr_r, tgr_w )
|
||||
AM_RANGE(0xfffff0, 0xfffff1) AM_DEVREADWRITE8("timer16:2", h8_timer16_channel_device, tcr_r, tcr_w, 0xff00)
|
||||
AM_RANGE(0xfffff0, 0xfffff1) AM_DEVREADWRITE8("timer16:2", h8_timer16_channel_device, tmdr_r, tmdr_w, 0x00ff)
|
||||
AM_RANGE(0xfffff2, 0xfffff3) AM_DEVREADWRITE8("timer16:2", h8_timer16_channel_device, tior_r, tior_w, 0xff00)
|
||||
AM_RANGE(0xfffff4, 0xfffff5) AM_DEVREADWRITE8("timer16:2", h8_timer16_channel_device, tier_r, tier_w, 0xff00)
|
||||
AM_RANGE(0xfffff4, 0xfffff5) AM_DEVREADWRITE8("timer16:2", h8_timer16_channel_device, tsr_r, tsr_w, 0x00ff)
|
||||
AM_RANGE(0xfffff6, 0xfffff7) AM_DEVREADWRITE( "timer16:2", h8_timer16_channel_device, tcnt_r, tcnt_w )
|
||||
AM_RANGE(0xfffff8, 0xfffffb) AM_DEVREADWRITE( "timer16:2", h8_timer16_channel_device, tgr_r, tgr_w )
|
||||
ADDRESS_MAP_END
|
||||
void h8s2655_device::map(address_map &map)
|
||||
{
|
||||
map(0xffec00, 0xfffbff).ram();
|
||||
map(0xfffe80, 0xfffe80).rw("timer16:3", FUNC(h8_timer16_channel_device::tcr_r), FUNC(h8_timer16_channel_device::tcr_w));
|
||||
map(0xfffe81, 0xfffe81).rw("timer16:3", FUNC(h8_timer16_channel_device::tmdr_r), FUNC(h8_timer16_channel_device::tmdr_w));
|
||||
map(0xfffe82, 0xfffe83).rw("timer16:3", FUNC(h8_timer16_channel_device::tior_r), FUNC(h8_timer16_channel_device::tior_w));
|
||||
map(0xfffe84, 0xfffe84).rw("timer16:3", FUNC(h8_timer16_channel_device::tier_r), FUNC(h8_timer16_channel_device::tier_w));
|
||||
map(0xfffe85, 0xfffe85).rw("timer16:3", FUNC(h8_timer16_channel_device::tsr_r), FUNC(h8_timer16_channel_device::tsr_w));
|
||||
map(0xfffe86, 0xfffe87).rw("timer16:3", FUNC(h8_timer16_channel_device::tcnt_r), FUNC(h8_timer16_channel_device::tcnt_w));
|
||||
map(0xfffe88, 0xfffe8f).rw("timer16:3", FUNC(h8_timer16_channel_device::tgr_r), FUNC(h8_timer16_channel_device::tgr_w));
|
||||
map(0xfffe90, 0xfffe90).rw("timer16:4", FUNC(h8_timer16_channel_device::tcr_r), FUNC(h8_timer16_channel_device::tcr_w));
|
||||
map(0xfffe91, 0xfffe91).rw("timer16:4", FUNC(h8_timer16_channel_device::tmdr_r), FUNC(h8_timer16_channel_device::tmdr_w));
|
||||
map(0xfffe92, 0xfffe92).rw("timer16:4", FUNC(h8_timer16_channel_device::tior_r), FUNC(h8_timer16_channel_device::tior_w));
|
||||
map(0xfffe94, 0xfffe94).rw("timer16:4", FUNC(h8_timer16_channel_device::tier_r), FUNC(h8_timer16_channel_device::tier_w));
|
||||
map(0xfffe95, 0xfffe95).rw("timer16:4", FUNC(h8_timer16_channel_device::tsr_r), FUNC(h8_timer16_channel_device::tsr_w));
|
||||
map(0xfffe96, 0xfffe97).rw("timer16:4", FUNC(h8_timer16_channel_device::tcnt_r), FUNC(h8_timer16_channel_device::tcnt_w));
|
||||
map(0xfffe98, 0xfffe9b).rw("timer16:4", FUNC(h8_timer16_channel_device::tgr_r), FUNC(h8_timer16_channel_device::tgr_w));
|
||||
map(0xfffea0, 0xfffea0).rw("timer16:5", FUNC(h8_timer16_channel_device::tcr_r), FUNC(h8_timer16_channel_device::tcr_w));
|
||||
map(0xfffea1, 0xfffea1).rw("timer16:5", FUNC(h8_timer16_channel_device::tmdr_r), FUNC(h8_timer16_channel_device::tmdr_w));
|
||||
map(0xfffea2, 0xfffea2).rw("timer16:5", FUNC(h8_timer16_channel_device::tior_r), FUNC(h8_timer16_channel_device::tior_w));
|
||||
map(0xfffea4, 0xfffea4).rw("timer16:5", FUNC(h8_timer16_channel_device::tier_r), FUNC(h8_timer16_channel_device::tier_w));
|
||||
map(0xfffea5, 0xfffea5).rw("timer16:5", FUNC(h8_timer16_channel_device::tsr_r), FUNC(h8_timer16_channel_device::tsr_w));
|
||||
map(0xfffea6, 0xfffea7).rw("timer16:5", FUNC(h8_timer16_channel_device::tcnt_r), FUNC(h8_timer16_channel_device::tcnt_w));
|
||||
map(0xfffea8, 0xfffeab).rw("timer16:5", FUNC(h8_timer16_channel_device::tgr_r), FUNC(h8_timer16_channel_device::tgr_w));
|
||||
map(0xfffeb0, 0xfffeb0).w("port1", FUNC(h8_port_device::ddr_w));
|
||||
map(0xfffeb1, 0xfffeb1).w("port2", FUNC(h8_port_device::ddr_w));
|
||||
map(0xfffeb2, 0xfffeb2).w("port3", FUNC(h8_port_device::ddr_w));
|
||||
map(0xfffeb4, 0xfffeb4).w("port5", FUNC(h8_port_device::ddr_w));
|
||||
map(0xfffeb5, 0xfffeb5).w("port6", FUNC(h8_port_device::ddr_w));
|
||||
map(0xfffeb9, 0xfffeb9).w("porta", FUNC(h8_port_device::ddr_w));
|
||||
map(0xfffeba, 0xfffeba).w("portb", FUNC(h8_port_device::ddr_w));
|
||||
map(0xfffebb, 0xfffebb).w("portc", FUNC(h8_port_device::ddr_w));
|
||||
map(0xfffebc, 0xfffebc).w("portd", FUNC(h8_port_device::ddr_w));
|
||||
map(0xfffebd, 0xfffebd).w("porte", FUNC(h8_port_device::ddr_w));
|
||||
map(0xfffebe, 0xfffebe).w("portf", FUNC(h8_port_device::ddr_w));
|
||||
map(0xfffebf, 0xfffebf).w("portg", FUNC(h8_port_device::ddr_w));
|
||||
map(0xfffec0, 0xfffec1).rw("intc", FUNC(h8s_intc_device::icr_r), FUNC(h8s_intc_device::icr_w));
|
||||
map(0xfffec2, 0xfffec2).rw("intc", FUNC(h8s_intc_device::icrc_r), FUNC(h8s_intc_device::icrc_w));
|
||||
map(0xfffec4, 0xfffecd).rw("intc", FUNC(h8s_intc_device::ipr_r), FUNC(h8s_intc_device::ipr_w));
|
||||
map(0xfffece, 0xfffece).rw("intc", FUNC(h8s_intc_device::iprk_r), FUNC(h8s_intc_device::iprk_w));
|
||||
map(0xffff2c, 0xffff2c).rw("intc", FUNC(h8s_intc_device::iscrh_r), FUNC(h8s_intc_device::iscrh_w));
|
||||
map(0xffff2d, 0xffff2d).rw("intc", FUNC(h8s_intc_device::iscrl_r), FUNC(h8s_intc_device::iscrl_w));
|
||||
map(0xffff2e, 0xffff2e).rw("intc", FUNC(h8s_intc_device::ier_r), FUNC(h8s_intc_device::ier_w));
|
||||
map(0xffff2f, 0xffff2f).rw("intc", FUNC(h8s_intc_device::isr_r), FUNC(h8s_intc_device::isr_w));
|
||||
map(0xffff39, 0xffff39).rw(this, FUNC(h8s2655_device::syscr_r), FUNC(h8s2655_device::syscr_w));
|
||||
map(0xffff50, 0xffff50).r("port1", FUNC(h8_port_device::port_r));
|
||||
map(0xffff51, 0xffff51).r("port2", FUNC(h8_port_device::port_r));
|
||||
map(0xffff52, 0xffff52).r("port3", FUNC(h8_port_device::port_r));
|
||||
map(0xffff53, 0xffff53).r("port4", FUNC(h8_port_device::port_r));
|
||||
map(0xffff54, 0xffff54).r("port5", FUNC(h8_port_device::port_r));
|
||||
map(0xffff55, 0xffff55).r("port6", FUNC(h8_port_device::port_r));
|
||||
map(0xffff59, 0xffff59).r("porta", FUNC(h8_port_device::port_r));
|
||||
map(0xffff5a, 0xffff5a).r("portb", FUNC(h8_port_device::port_r));
|
||||
map(0xffff5b, 0xffff5b).r("portc", FUNC(h8_port_device::port_r));
|
||||
map(0xffff5c, 0xffff5c).r("portd", FUNC(h8_port_device::port_r));
|
||||
map(0xffff5d, 0xffff5d).r("porte", FUNC(h8_port_device::port_r));
|
||||
map(0xffff5e, 0xffff5e).r("portf", FUNC(h8_port_device::port_r));
|
||||
map(0xffff5f, 0xffff5f).r("portg", FUNC(h8_port_device::port_r));
|
||||
map(0xffff60, 0xffff60).rw("port1", FUNC(h8_port_device::dr_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffff61, 0xffff61).rw("port2", FUNC(h8_port_device::dr_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffff62, 0xffff62).rw("port3", FUNC(h8_port_device::dr_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffff64, 0xffff64).rw("port5", FUNC(h8_port_device::dr_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffff65, 0xffff65).rw("port6", FUNC(h8_port_device::dr_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffff69, 0xffff69).rw("porta", FUNC(h8_port_device::dr_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffff6a, 0xffff6a).rw("portb", FUNC(h8_port_device::dr_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffff6b, 0xffff6b).rw("portc", FUNC(h8_port_device::dr_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffff6c, 0xffff6c).rw("portd", FUNC(h8_port_device::dr_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffff6d, 0xffff6d).rw("porte", FUNC(h8_port_device::dr_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffff6e, 0xffff6e).rw("portf", FUNC(h8_port_device::dr_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffff6f, 0xffff6f).rw("portg", FUNC(h8_port_device::dr_r), FUNC(h8_port_device::dr_w));
|
||||
map(0xffff70, 0xffff70).rw("porta", FUNC(h8_port_device::pcr_r), FUNC(h8_port_device::pcr_w));
|
||||
map(0xffff71, 0xffff71).rw("portb", FUNC(h8_port_device::pcr_r), FUNC(h8_port_device::pcr_w));
|
||||
map(0xffff72, 0xffff72).rw("portc", FUNC(h8_port_device::pcr_r), FUNC(h8_port_device::pcr_w));
|
||||
map(0xffff73, 0xffff73).rw("portd", FUNC(h8_port_device::pcr_r), FUNC(h8_port_device::pcr_w));
|
||||
map(0xffff74, 0xffff74).rw("porte", FUNC(h8_port_device::pcr_r), FUNC(h8_port_device::pcr_w));
|
||||
map(0xffff76, 0xffff76).rw("port3", FUNC(h8_port_device::odr_r), FUNC(h8_port_device::odr_w));
|
||||
map(0xffff77, 0xffff77).rw("porta", FUNC(h8_port_device::odr_r), FUNC(h8_port_device::odr_w));
|
||||
map(0xffff78, 0xffff78).rw("sci0", FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
|
||||
map(0xffff79, 0xffff79).rw("sci0", FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
|
||||
map(0xffff7a, 0xffff7a).rw("sci0", FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
|
||||
map(0xffff7b, 0xffff7b).rw("sci0", FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
|
||||
map(0xffff7c, 0xffff7c).rw("sci0", FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
|
||||
map(0xffff7d, 0xffff7d).r("sci0", FUNC(h8_sci_device::rdr_r));
|
||||
map(0xffff7e, 0xffff7e).rw("sci0", FUNC(h8_sci_device::scmr_r), FUNC(h8_sci_device::scmr_w));
|
||||
map(0xffff80, 0xffff80).rw("sci1", FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
|
||||
map(0xffff81, 0xffff81).rw("sci1", FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
|
||||
map(0xffff82, 0xffff82).rw("sci1", FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
|
||||
map(0xffff83, 0xffff83).rw("sci1", FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
|
||||
map(0xffff84, 0xffff84).rw("sci1", FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
|
||||
map(0xffff85, 0xffff85).r("sci1", FUNC(h8_sci_device::rdr_r));
|
||||
map(0xffff86, 0xffff86).rw("sci1", FUNC(h8_sci_device::scmr_r), FUNC(h8_sci_device::scmr_w));
|
||||
map(0xffff88, 0xffff88).rw("sci2", FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
|
||||
map(0xffff89, 0xffff89).rw("sci2", FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
|
||||
map(0xffff8a, 0xffff8a).rw("sci2", FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
|
||||
map(0xffff8b, 0xffff8b).rw("sci2", FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
|
||||
map(0xffff8c, 0xffff8c).rw("sci2", FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
|
||||
map(0xffff8d, 0xffff8d).r("sci2", FUNC(h8_sci_device::rdr_r));
|
||||
map(0xffff8e, 0xffff8e).rw("sci2", FUNC(h8_sci_device::scmr_r), FUNC(h8_sci_device::scmr_w));
|
||||
map(0xffff90, 0xffff9f).r("adc", FUNC(h8_adc_device::addr16_r));
|
||||
map(0xffffa0, 0xffffa0).rw("adc", FUNC(h8_adc_device::adcsr_r), FUNC(h8_adc_device::adcsr_w));
|
||||
map(0xffffa1, 0xffffa1).rw("adc", FUNC(h8_adc_device::adcr_r), FUNC(h8_adc_device::adcr_w));
|
||||
map(0xffffb0, 0xffffb0).rw("timer8_0", FUNC(h8_timer8_channel_device::tcr_r), FUNC(h8_timer8_channel_device::tcr_w));
|
||||
map(0xffffb1, 0xffffb1).rw("timer8_1", FUNC(h8_timer8_channel_device::tcr_r), FUNC(h8_timer8_channel_device::tcr_w));
|
||||
map(0xffffb2, 0xffffb2).rw("timer8_0", FUNC(h8_timer8_channel_device::tcsr_r), FUNC(h8_timer8_channel_device::tcsr_w));
|
||||
map(0xffffb3, 0xffffb3).rw("timer8_1", FUNC(h8_timer8_channel_device::tcsr_r), FUNC(h8_timer8_channel_device::tcsr_w));
|
||||
map(0xffffb4, 0xffffb7).rw("timer8_0", FUNC(h8_timer8_channel_device::tcor_r), FUNC(h8_timer8_channel_device::tcor_w)).umask16(0xff00);
|
||||
map(0xffffb4, 0xffffb7).rw("timer8_1", FUNC(h8_timer8_channel_device::tcor_r), FUNC(h8_timer8_channel_device::tcor_w)).umask16(0x00ff);
|
||||
map(0xffffb8, 0xffffb8).rw("timer8_0", FUNC(h8_timer8_channel_device::tcnt_r), FUNC(h8_timer8_channel_device::tcnt_w));
|
||||
map(0xffffb9, 0xffffb9).rw("timer8_1", FUNC(h8_timer8_channel_device::tcnt_r), FUNC(h8_timer8_channel_device::tcnt_w));
|
||||
map(0xffffbc, 0xffffbd).rw("watchdog", FUNC(h8_watchdog_device::wd_r), FUNC(h8_watchdog_device::wd_w));
|
||||
map(0xffffbe, 0xffffbf).rw("watchdog", FUNC(h8_watchdog_device::rst_r), FUNC(h8_watchdog_device::rst_w));
|
||||
map(0xffffc0, 0xffffc0).rw("timer16", FUNC(h8_timer16_device::tstr_r), FUNC(h8_timer16_device::tstr_w));
|
||||
map(0xffffc1, 0xffffc1).rw("timer16", FUNC(h8_timer16_device::tsyr_r), FUNC(h8_timer16_device::tsyr_w));
|
||||
map(0xffffd0, 0xffffd0).rw("timer16:0", FUNC(h8_timer16_channel_device::tcr_r), FUNC(h8_timer16_channel_device::tcr_w));
|
||||
map(0xffffd1, 0xffffd1).rw("timer16:0", FUNC(h8_timer16_channel_device::tmdr_r), FUNC(h8_timer16_channel_device::tmdr_w));
|
||||
map(0xffffd2, 0xffffd3).rw("timer16:0", FUNC(h8_timer16_channel_device::tior_r), FUNC(h8_timer16_channel_device::tior_w));
|
||||
map(0xffffd4, 0xffffd4).rw("timer16:0", FUNC(h8_timer16_channel_device::tier_r), FUNC(h8_timer16_channel_device::tier_w));
|
||||
map(0xffffd5, 0xffffd5).rw("timer16:0", FUNC(h8_timer16_channel_device::tsr_r), FUNC(h8_timer16_channel_device::tsr_w));
|
||||
map(0xffffd6, 0xffffd7).rw("timer16:0", FUNC(h8_timer16_channel_device::tcnt_r), FUNC(h8_timer16_channel_device::tcnt_w));
|
||||
map(0xffffd8, 0xffffdf).rw("timer16:0", FUNC(h8_timer16_channel_device::tgr_r), FUNC(h8_timer16_channel_device::tgr_w));
|
||||
map(0xffffe0, 0xffffe0).rw("timer16:1", FUNC(h8_timer16_channel_device::tcr_r), FUNC(h8_timer16_channel_device::tcr_w));
|
||||
map(0xffffe1, 0xffffe1).rw("timer16:1", FUNC(h8_timer16_channel_device::tmdr_r), FUNC(h8_timer16_channel_device::tmdr_w));
|
||||
map(0xffffe2, 0xffffe2).rw("timer16:1", FUNC(h8_timer16_channel_device::tior_r), FUNC(h8_timer16_channel_device::tior_w));
|
||||
map(0xffffe4, 0xffffe4).rw("timer16:1", FUNC(h8_timer16_channel_device::tier_r), FUNC(h8_timer16_channel_device::tier_w));
|
||||
map(0xffffe5, 0xffffe5).rw("timer16:1", FUNC(h8_timer16_channel_device::tsr_r), FUNC(h8_timer16_channel_device::tsr_w));
|
||||
map(0xffffe6, 0xffffe7).rw("timer16:1", FUNC(h8_timer16_channel_device::tcnt_r), FUNC(h8_timer16_channel_device::tcnt_w));
|
||||
map(0xffffe8, 0xffffeb).rw("timer16:1", FUNC(h8_timer16_channel_device::tgr_r), FUNC(h8_timer16_channel_device::tgr_w));
|
||||
map(0xfffff0, 0xfffff0).rw("timer16:2", FUNC(h8_timer16_channel_device::tcr_r), FUNC(h8_timer16_channel_device::tcr_w));
|
||||
map(0xfffff1, 0xfffff1).rw("timer16:2", FUNC(h8_timer16_channel_device::tmdr_r), FUNC(h8_timer16_channel_device::tmdr_w));
|
||||
map(0xfffff2, 0xfffff2).rw("timer16:2", FUNC(h8_timer16_channel_device::tior_r), FUNC(h8_timer16_channel_device::tior_w));
|
||||
map(0xfffff4, 0xfffff4).rw("timer16:2", FUNC(h8_timer16_channel_device::tier_r), FUNC(h8_timer16_channel_device::tier_w));
|
||||
map(0xfffff5, 0xfffff5).rw("timer16:2", FUNC(h8_timer16_channel_device::tsr_r), FUNC(h8_timer16_channel_device::tsr_w));
|
||||
map(0xfffff6, 0xfffff7).rw("timer16:2", FUNC(h8_timer16_channel_device::tcnt_r), FUNC(h8_timer16_channel_device::tcnt_w));
|
||||
map(0xfffff8, 0xfffffb).rw("timer16:2", FUNC(h8_timer16_channel_device::tgr_r), FUNC(h8_timer16_channel_device::tgr_w));
|
||||
}
|
||||
|
||||
MACHINE_CONFIG_START(h8s2655_device::device_add_mconfig)
|
||||
MCFG_H8S_INTC_ADD("intc")
|
||||
|
||||
@ -56,27 +56,31 @@ DEFINE_DEVICE_TYPE(HD44828, hd44828_device, "hd44828", "Hitachi HD44828") // CMO
|
||||
|
||||
|
||||
// internal memory maps
|
||||
ADDRESS_MAP_START(hmcs40_cpu_device::program_1k)
|
||||
AM_RANGE(0x0000, 0x03ff) AM_ROM
|
||||
AM_RANGE(0x0780, 0x07bf) AM_ROM // patterns on page 30
|
||||
ADDRESS_MAP_END
|
||||
void hmcs40_cpu_device::program_1k(address_map &map)
|
||||
{
|
||||
map(0x0000, 0x03ff).rom();
|
||||
map(0x0780, 0x07bf).rom(); // patterns on page 30
|
||||
}
|
||||
|
||||
ADDRESS_MAP_START(hmcs40_cpu_device::program_2k)
|
||||
AM_RANGE(0x0000, 0x07ff) AM_ROM
|
||||
AM_RANGE(0x0f40, 0x0fbf) AM_ROM // patterns on page 61,62
|
||||
ADDRESS_MAP_END
|
||||
void hmcs40_cpu_device::program_2k(address_map &map)
|
||||
{
|
||||
map(0x0000, 0x07ff).rom();
|
||||
map(0x0f40, 0x0fbf).rom(); // patterns on page 61,62
|
||||
}
|
||||
|
||||
|
||||
ADDRESS_MAP_START(hmcs40_cpu_device::data_80x4)
|
||||
AM_RANGE(0x00, 0x3f) AM_RAM
|
||||
AM_RANGE(0x40, 0x4f) AM_RAM AM_MIRROR(0x30)
|
||||
ADDRESS_MAP_END
|
||||
void hmcs40_cpu_device::data_80x4(address_map &map)
|
||||
{
|
||||
map(0x00, 0x3f).ram();
|
||||
map(0x40, 0x4f).ram().mirror(0x30);
|
||||
}
|
||||
|
||||
ADDRESS_MAP_START(hmcs40_cpu_device::data_160x4)
|
||||
AM_RANGE(0x00, 0x7f) AM_RAM
|
||||
AM_RANGE(0x80, 0x8f) AM_RAM AM_MIRROR(0x30)
|
||||
AM_RANGE(0xc0, 0xcf) AM_RAM AM_MIRROR(0x30)
|
||||
ADDRESS_MAP_END
|
||||
void hmcs40_cpu_device::data_160x4(address_map &map)
|
||||
{
|
||||
map(0x00, 0x7f).ram();
|
||||
map(0x80, 0x8f).ram().mirror(0x30);
|
||||
map(0xc0, 0xcf).ram().mirror(0x30);
|
||||
}
|
||||
|
||||
|
||||
// device definitions
|
||||
|
||||
@ -156,11 +156,12 @@ const uint16_t lc8670_cpu_device::s_irq_vectors[] =
|
||||
// Internal memory map
|
||||
//**************************************************************************
|
||||
|
||||
ADDRESS_MAP_START(lc8670_cpu_device::lc8670_internal_map)
|
||||
AM_RANGE(0x000, 0x0ff) AM_READWRITE(mram_r, mram_w)
|
||||
AM_RANGE(0x100, 0x17f) AM_READWRITE(regs_r, regs_w)
|
||||
AM_RANGE(0x180, 0x1ff) AM_READWRITE(xram_r, xram_w)
|
||||
ADDRESS_MAP_END
|
||||
void lc8670_cpu_device::lc8670_internal_map(address_map &map)
|
||||
{
|
||||
map(0x000, 0x0ff).rw(this, FUNC(lc8670_cpu_device::mram_r), FUNC(lc8670_cpu_device::mram_w));
|
||||
map(0x100, 0x17f).rw(this, FUNC(lc8670_cpu_device::regs_r), FUNC(lc8670_cpu_device::regs_w));
|
||||
map(0x180, 0x1ff).rw(this, FUNC(lc8670_cpu_device::xram_r), FUNC(lc8670_cpu_device::xram_w));
|
||||
}
|
||||
|
||||
|
||||
//**************************************************************************
|
||||
|
||||
@ -72,31 +72,35 @@ DEFINE_DEVICE_TYPE(M37720S1, m37720s1_device, "m37720s1", "Mitsubishi M37720S1")
|
||||
|
||||
// M37702M2: 512 bytes internal RAM, 16K internal mask ROM
|
||||
// (M37702E2: same with EPROM instead of mask ROM)
|
||||
ADDRESS_MAP_START(m37702m2_device::map)
|
||||
AM_RANGE(0x000000, 0x00007f) AM_READWRITE8(m37710_internal_r, m37710_internal_w, 0xffff)
|
||||
AM_RANGE(0x000080, 0x00027f) AM_RAM
|
||||
AM_RANGE(0x00c000, 0x00ffff) AM_ROM AM_REGION(M37710_INTERNAL_ROM_REGION, 0)
|
||||
ADDRESS_MAP_END
|
||||
void m37702m2_device::map(address_map &map)
|
||||
{
|
||||
map(0x000000, 0x00007f).rw(this, FUNC(m37702m2_device::m37710_internal_r), FUNC(m37702m2_device::m37710_internal_w));
|
||||
map(0x000080, 0x00027f).ram();
|
||||
map(0x00c000, 0x00ffff).rom().region(M37710_INTERNAL_ROM_REGION, 0);
|
||||
}
|
||||
|
||||
|
||||
// M37702S1: 512 bytes internal RAM, no internal ROM
|
||||
ADDRESS_MAP_START(m37702s1_device::map)
|
||||
AM_RANGE(0x000000, 0x00007f) AM_READWRITE8(m37710_internal_r, m37710_internal_w, 0xffff)
|
||||
AM_RANGE(0x000080, 0x00027f) AM_RAM
|
||||
ADDRESS_MAP_END
|
||||
void m37702s1_device::map(address_map &map)
|
||||
{
|
||||
map(0x000000, 0x00007f).rw(this, FUNC(m37702s1_device::m37710_internal_r), FUNC(m37702s1_device::m37710_internal_w));
|
||||
map(0x000080, 0x00027f).ram();
|
||||
}
|
||||
|
||||
|
||||
// M37710S4: 2048 bytes internal RAM, no internal ROM
|
||||
ADDRESS_MAP_START(m37710s4_device::map)
|
||||
AM_RANGE(0x000000, 0x00007f) AM_READWRITE8(m37710_internal_r, m37710_internal_w, 0xffff)
|
||||
AM_RANGE(0x000080, 0x00087f) AM_RAM
|
||||
ADDRESS_MAP_END
|
||||
void m37710s4_device::map(address_map &map)
|
||||
{
|
||||
map(0x000000, 0x00007f).rw(this, FUNC(m37710s4_device::m37710_internal_r), FUNC(m37710s4_device::m37710_internal_w));
|
||||
map(0x000080, 0x00087f).ram();
|
||||
}
|
||||
|
||||
// M37720S1: 512 bytes internal RAM, no internal ROM, built-in DMA
|
||||
ADDRESS_MAP_START(m37720s1_device::map)
|
||||
AM_RANGE(0x000000, 0x00007f) AM_READWRITE8(m37710_internal_r, m37710_internal_w, 0xffff)
|
||||
AM_RANGE(0x000080, 0x00027f) AM_RAM
|
||||
ADDRESS_MAP_END
|
||||
void m37720s1_device::map(address_map &map)
|
||||
{
|
||||
map(0x000000, 0x00007f).rw(this, FUNC(m37720s1_device::m37710_internal_r), FUNC(m37720s1_device::m37710_internal_w));
|
||||
map(0x000080, 0x00027f).ram();
|
||||
}
|
||||
|
||||
// many other combinations of RAM and ROM size exist
|
||||
|
||||
|
||||
@ -496,13 +496,14 @@ WRITE8_MEMBER(m3745x_device::adc_w)
|
||||
}
|
||||
|
||||
/* M37450 - baseline for this familiy */
|
||||
ADDRESS_MAP_START(m37450_device::m37450_map)
|
||||
AM_RANGE(0x0000, 0x00bf) AM_RAM
|
||||
AM_RANGE(0x00d6, 0x00dd) AM_READWRITE(ports_r, ports_w)
|
||||
AM_RANGE(0x00e2, 0x00e3) AM_READWRITE(adc_r, adc_w)
|
||||
AM_RANGE(0x00fc, 0x00ff) AM_READWRITE(intregs_r, intregs_w)
|
||||
AM_RANGE(0x0100, 0x01ff) AM_RAM
|
||||
ADDRESS_MAP_END
|
||||
void m37450_device::m37450_map(address_map &map)
|
||||
{
|
||||
map(0x0000, 0x00bf).ram();
|
||||
map(0x00d6, 0x00dd).rw(this, FUNC(m37450_device::ports_r), FUNC(m37450_device::ports_w));
|
||||
map(0x00e2, 0x00e3).rw(this, FUNC(m37450_device::adc_r), FUNC(m37450_device::adc_w));
|
||||
map(0x00fc, 0x00ff).rw(this, FUNC(m37450_device::intregs_r), FUNC(m37450_device::intregs_w));
|
||||
map(0x0100, 0x01ff).ram();
|
||||
}
|
||||
|
||||
m37450_device::m37450_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
|
||||
m37450_device(mconfig, M37450, tag, owner, clock)
|
||||
|
||||
@ -482,12 +482,13 @@ WRITE8_MEMBER(m5074x_device::tmrirq_w)
|
||||
}
|
||||
|
||||
/* M50740 - baseline for this familiy */
|
||||
ADDRESS_MAP_START(m50740_device::m50740_map)
|
||||
AM_RANGE(0x0000, 0x005f) AM_RAM
|
||||
AM_RANGE(0x00e0, 0x00e9) AM_READWRITE(ports_r, ports_w)
|
||||
AM_RANGE(0x00f9, 0x00ff) AM_READWRITE(tmrirq_r, tmrirq_w)
|
||||
AM_RANGE(0x1400, 0x1fff) AM_ROM AM_REGION(M5074X_INTERNAL_ROM_REGION, 0)
|
||||
ADDRESS_MAP_END
|
||||
void m50740_device::m50740_map(address_map &map)
|
||||
{
|
||||
map(0x0000, 0x005f).ram();
|
||||
map(0x00e0, 0x00e9).rw(this, FUNC(m50740_device::ports_r), FUNC(m50740_device::ports_w));
|
||||
map(0x00f9, 0x00ff).rw(this, FUNC(m50740_device::tmrirq_r), FUNC(m50740_device::tmrirq_w));
|
||||
map(0x1400, 0x1fff).rom().region(M5074X_INTERNAL_ROM_REGION, 0);
|
||||
}
|
||||
|
||||
m50740_device::m50740_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
|
||||
m50740_device(mconfig, M50740, tag, owner, clock)
|
||||
@ -500,12 +501,13 @@ m50740_device::m50740_device(const machine_config &mconfig, device_type type, co
|
||||
}
|
||||
|
||||
/* M50741 - 50740 with a larger internal ROM */
|
||||
ADDRESS_MAP_START(m50741_device::m50741_map)
|
||||
AM_RANGE(0x0000, 0x005f) AM_RAM
|
||||
AM_RANGE(0x00e0, 0x00e9) AM_READWRITE(ports_r, ports_w)
|
||||
AM_RANGE(0x00f9, 0x00ff) AM_READWRITE(tmrirq_r, tmrirq_w)
|
||||
AM_RANGE(0x1000, 0x1fff) AM_ROM AM_REGION("internal", 0)
|
||||
ADDRESS_MAP_END
|
||||
void m50741_device::m50741_map(address_map &map)
|
||||
{
|
||||
map(0x0000, 0x005f).ram();
|
||||
map(0x00e0, 0x00e9).rw(this, FUNC(m50741_device::ports_r), FUNC(m50741_device::ports_w));
|
||||
map(0x00f9, 0x00ff).rw(this, FUNC(m50741_device::tmrirq_r), FUNC(m50741_device::tmrirq_w));
|
||||
map(0x1000, 0x1fff).rom().region("internal", 0);
|
||||
}
|
||||
|
||||
m50741_device::m50741_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
|
||||
m50741_device(mconfig, M50740, tag, owner, clock)
|
||||
|
||||
@ -40,13 +40,14 @@ WRITE8_MEMBER(n2a03_device::psg1_4017_w)
|
||||
// input port 0x4017 ^ ( APU_IRQCTRL )
|
||||
// is there a fall through where every write is seen by other hw, or do these addresses really not touch the APU?? APU_IRQCTRL can definitely be written by can it be read back?
|
||||
|
||||
ADDRESS_MAP_START(n2a03_device::n2a03_map)
|
||||
AM_RANGE(0x4000, 0x4013) AM_DEVREADWRITE("nesapu", nesapu_device, read, write)
|
||||
AM_RANGE(0x4014, 0x4014) AM_READ(psg1_4014_r) // AM_WRITE(sprite_dma_0_w)
|
||||
AM_RANGE(0x4015, 0x4015) AM_READWRITE(psg1_4015_r, psg1_4015_w) /* PSG status / first control register */
|
||||
//AM_RANGE(0x4016, 0x4016) AM_READWRITE(vsnes_in0_r, vsnes_in0_w)
|
||||
AM_RANGE(0x4017, 0x4017) /*AM_READ(vsnes_in1_r)*/ AM_WRITE(psg1_4017_w)
|
||||
ADDRESS_MAP_END
|
||||
void n2a03_device::n2a03_map(address_map &map)
|
||||
{
|
||||
map(0x4000, 0x4013).rw("nesapu", FUNC(nesapu_device::read), FUNC(nesapu_device::write));
|
||||
map(0x4014, 0x4014).r(this, FUNC(n2a03_device::psg1_4014_r)); // AM_WRITE(sprite_dma_0_w)
|
||||
map(0x4015, 0x4015).rw(this, FUNC(n2a03_device::psg1_4015_r), FUNC(n2a03_device::psg1_4015_w)); /* PSG status / first control register */
|
||||
//map(0x4016, 0x4016).rw(FUNC(n2a03_device::vsnes_in0_r), FUNC(n2a03_device::vsnes_in0_w));
|
||||
map(0x4017, 0x4017) /*.r(this, FUNC(n2a03_device::vsnes_in1_r))*/ .w(this, FUNC(n2a03_device::psg1_4017_w));
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
@ -254,11 +254,12 @@ const m6800_cpu_device::op_func m6801_cpu_device::hd63701_insn[0x100] = {
|
||||
};
|
||||
|
||||
|
||||
ADDRESS_MAP_START(m6801_cpu_device::m6803_mem)
|
||||
AM_RANGE(0x0000, 0x001f) AM_READWRITE(m6801_io_r, m6801_io_w)
|
||||
AM_RANGE(0x0020, 0x007f) AM_NOP /* unused */
|
||||
AM_RANGE(0x0080, 0x00ff) AM_RAM /* 6803 internal RAM */
|
||||
ADDRESS_MAP_END
|
||||
void m6801_cpu_device::m6803_mem(address_map &map)
|
||||
{
|
||||
map(0x0000, 0x001f).rw(this, FUNC(m6801_cpu_device::m6801_io_r), FUNC(m6801_cpu_device::m6801_io_w));
|
||||
map(0x0020, 0x007f).noprw(); /* unused */
|
||||
map(0x0080, 0x00ff).ram(); /* 6803 internal RAM */
|
||||
}
|
||||
|
||||
|
||||
DEFINE_DEVICE_TYPE(M6801, m6801_cpu_device, "m6801", "Motorola M6801")
|
||||
|
||||
@ -647,28 +647,29 @@ void m68705_device::add_eprom_state()
|
||||
* M68705Px family
|
||||
****************************************************************************/
|
||||
|
||||
ADDRESS_MAP_START(m68705p_device::p_map)
|
||||
ADDRESS_MAP_GLOBAL_MASK(0x07ff)
|
||||
ADDRESS_MAP_UNMAP_HIGH
|
||||
void m68705p_device::p_map(address_map &map)
|
||||
{
|
||||
map.global_mask(0x07ff);
|
||||
map.unmap_value_high();
|
||||
|
||||
AM_RANGE(0x0000, 0x0000) AM_READWRITE(port_r<0>, port_latch_w<0>)
|
||||
AM_RANGE(0x0001, 0x0001) AM_READWRITE(port_r<1>, port_latch_w<1>)
|
||||
AM_RANGE(0x0002, 0x0002) AM_READWRITE(port_r<2>, port_latch_w<2>)
|
||||
map(0x0000, 0x0000).rw(this, FUNC(m68705p_device::port_r<0>), FUNC(m68705p_device::port_latch_w<0>));
|
||||
map(0x0001, 0x0001).rw(this, FUNC(m68705p_device::port_r<1>), FUNC(m68705p_device::port_latch_w<1>));
|
||||
map(0x0002, 0x0002).rw(this, FUNC(m68705p_device::port_r<2>), FUNC(m68705p_device::port_latch_w<2>));
|
||||
// 0x0003 not used (no port D)
|
||||
AM_RANGE(0x0004, 0x0004) AM_WRITE(port_ddr_w<0>)
|
||||
AM_RANGE(0x0005, 0x0005) AM_WRITE(port_ddr_w<1>)
|
||||
AM_RANGE(0x0006, 0x0006) AM_WRITE(port_ddr_w<2>)
|
||||
map(0x0004, 0x0004).w(this, FUNC(m68705p_device::port_ddr_w<0>));
|
||||
map(0x0005, 0x0005).w(this, FUNC(m68705p_device::port_ddr_w<1>));
|
||||
map(0x0006, 0x0006).w(this, FUNC(m68705p_device::port_ddr_w<2>));
|
||||
// 0x0007 not used (no port D)
|
||||
AM_RANGE(0x0008, 0x0008) AM_READWRITE(tdr_r, tdr_w)
|
||||
AM_RANGE(0x0009, 0x0009) AM_READWRITE(tcr_r, tcr_w)
|
||||
map(0x0008, 0x0008).rw(this, FUNC(m68705p_device::tdr_r), FUNC(m68705p_device::tdr_w));
|
||||
map(0x0009, 0x0009).rw(this, FUNC(m68705p_device::tcr_r), FUNC(m68705p_device::tcr_w));
|
||||
// 0x000a not used
|
||||
AM_RANGE(0x000b, 0x000b) AM_READWRITE(pcr_r, pcr_w)
|
||||
map(0x000b, 0x000b).rw(this, FUNC(m68705p_device::pcr_r), FUNC(m68705p_device::pcr_w));
|
||||
// 0x000c-0x000f not used
|
||||
AM_RANGE(0x0010, 0x007f) AM_RAM
|
||||
AM_RANGE(0x0080, 0x0784) AM_READWRITE(eprom_r<0x0080>, eprom_w<0x0080>) // User EPROM
|
||||
AM_RANGE(0x0785, 0x07f7) AM_ROM AM_REGION("bootstrap", 0)
|
||||
AM_RANGE(0x07f8, 0x07ff) AM_READWRITE(eprom_r<0x07f8>, eprom_w<0x07f8>) // Interrupt vectors
|
||||
ADDRESS_MAP_END
|
||||
map(0x0010, 0x007f).ram();
|
||||
map(0x0080, 0x0784).rw(this, FUNC(m68705p_device::eprom_r<0x0080>), FUNC(m68705p_device::eprom_w<0x0080>)); // User EPROM
|
||||
map(0x0785, 0x07f7).rom().region("bootstrap", 0);
|
||||
map(0x07f8, 0x07ff).rw(this, FUNC(m68705p_device::eprom_r<0x07f8>), FUNC(m68705p_device::eprom_w<0x07f8>)); // Interrupt vectors
|
||||
}
|
||||
|
||||
m68705p_device::m68705p_device(
|
||||
machine_config const &mconfig,
|
||||
@ -708,29 +709,30 @@ std::unique_ptr<util::disasm_interface> m68705p_device::create_disassembler()
|
||||
* M68705Ux family
|
||||
****************************************************************************/
|
||||
|
||||
ADDRESS_MAP_START(m68705u_device::u_map)
|
||||
ADDRESS_MAP_GLOBAL_MASK(0x0fff)
|
||||
ADDRESS_MAP_UNMAP_HIGH
|
||||
void m68705u_device::u_map(address_map &map)
|
||||
{
|
||||
map.global_mask(0x0fff);
|
||||
map.unmap_value_high();
|
||||
|
||||
AM_RANGE(0x0000, 0x0000) AM_READWRITE(port_r<0>, port_latch_w<0>)
|
||||
AM_RANGE(0x0001, 0x0001) AM_READWRITE(port_r<1>, port_latch_w<1>)
|
||||
AM_RANGE(0x0002, 0x0002) AM_READWRITE(port_r<2>, port_latch_w<2>)
|
||||
AM_RANGE(0x0003, 0x0003) AM_READWRITE(port_r<3>, port_latch_w<3>)
|
||||
AM_RANGE(0x0004, 0x0004) AM_WRITE(port_ddr_w<0>)
|
||||
AM_RANGE(0x0005, 0x0005) AM_WRITE(port_ddr_w<1>)
|
||||
AM_RANGE(0x0006, 0x0006) AM_WRITE(port_ddr_w<2>)
|
||||
map(0x0000, 0x0000).rw(this, FUNC(m68705u_device::port_r<0>), FUNC(m68705u_device::port_latch_w<0>));
|
||||
map(0x0001, 0x0001).rw(this, FUNC(m68705u_device::port_r<1>), FUNC(m68705u_device::port_latch_w<1>));
|
||||
map(0x0002, 0x0002).rw(this, FUNC(m68705u_device::port_r<2>), FUNC(m68705u_device::port_latch_w<2>));
|
||||
map(0x0003, 0x0003).rw(this, FUNC(m68705u_device::port_r<3>), FUNC(m68705u_device::port_latch_w<3>));
|
||||
map(0x0004, 0x0004).w(this, FUNC(m68705u_device::port_ddr_w<0>));
|
||||
map(0x0005, 0x0005).w(this, FUNC(m68705u_device::port_ddr_w<1>));
|
||||
map(0x0006, 0x0006).w(this, FUNC(m68705u_device::port_ddr_w<2>));
|
||||
// 0x0007 not used (port D is input only)
|
||||
AM_RANGE(0x0008, 0x0008) AM_READWRITE(tdr_r, tdr_w)
|
||||
AM_RANGE(0x0009, 0x0009) AM_READWRITE(tcr_r, tcr_w)
|
||||
AM_RANGE(0x000a, 0x000a) AM_READWRITE(misc_r, misc_w)
|
||||
AM_RANGE(0x000b, 0x000b) AM_READWRITE(pcr_r, pcr_w)
|
||||
map(0x0008, 0x0008).rw(this, FUNC(m68705u_device::tdr_r), FUNC(m68705u_device::tdr_w));
|
||||
map(0x0009, 0x0009).rw(this, FUNC(m68705u_device::tcr_r), FUNC(m68705u_device::tcr_w));
|
||||
map(0x000a, 0x000a).rw(this, FUNC(m68705u_device::misc_r), FUNC(m68705u_device::misc_w));
|
||||
map(0x000b, 0x000b).rw(this, FUNC(m68705u_device::pcr_r), FUNC(m68705u_device::pcr_w));
|
||||
// 0x000c-0x000f not used
|
||||
AM_RANGE(0x0010, 0x007f) AM_RAM
|
||||
AM_RANGE(0x0080, 0x0f38) AM_READWRITE(eprom_r<0x0080>, eprom_w<0x0080>) // User EPROM
|
||||
map(0x0010, 0x007f).ram();
|
||||
map(0x0080, 0x0f38).rw(this, FUNC(m68705u_device::eprom_r<0x0080>), FUNC(m68705u_device::eprom_w<0x0080>)); // User EPROM
|
||||
// 0x0f39-0x0f7f not used
|
||||
AM_RANGE(0x0f80, 0x0ff7) AM_ROM AM_REGION("bootstrap", 0)
|
||||
AM_RANGE(0x0ff8, 0x0fff) AM_READWRITE(eprom_r<0x0ff8>, eprom_w<0x0ff8>) // Interrupt vectors
|
||||
ADDRESS_MAP_END
|
||||
map(0x0f80, 0x0ff7).rom().region("bootstrap", 0);
|
||||
map(0x0ff8, 0x0fff).rw(this, FUNC(m68705u_device::eprom_r<0x0ff8>), FUNC(m68705u_device::eprom_w<0x0ff8>)); // Interrupt vectors
|
||||
}
|
||||
|
||||
m68705u_device::m68705u_device(
|
||||
machine_config const &mconfig,
|
||||
@ -782,31 +784,32 @@ std::unique_ptr<util::disasm_interface> m68705u_device::create_disassembler()
|
||||
* M68705Rx family
|
||||
****************************************************************************/
|
||||
|
||||
ADDRESS_MAP_START(m68705r_device::r_map)
|
||||
ADDRESS_MAP_GLOBAL_MASK(0x0fff)
|
||||
ADDRESS_MAP_UNMAP_HIGH
|
||||
void m68705r_device::r_map(address_map &map)
|
||||
{
|
||||
map.global_mask(0x0fff);
|
||||
map.unmap_value_high();
|
||||
|
||||
AM_RANGE(0x0000, 0x0000) AM_READWRITE(port_r<0>, port_latch_w<0>)
|
||||
AM_RANGE(0x0001, 0x0001) AM_READWRITE(port_r<1>, port_latch_w<1>)
|
||||
AM_RANGE(0x0002, 0x0002) AM_READWRITE(port_r<2>, port_latch_w<2>)
|
||||
AM_RANGE(0x0003, 0x0003) AM_READWRITE(port_r<3>, port_latch_w<3>)
|
||||
AM_RANGE(0x0004, 0x0004) AM_WRITE(port_ddr_w<0>)
|
||||
AM_RANGE(0x0005, 0x0005) AM_WRITE(port_ddr_w<1>)
|
||||
AM_RANGE(0x0006, 0x0006) AM_WRITE(port_ddr_w<2>)
|
||||
map(0x0000, 0x0000).rw(this, FUNC(m68705r_device::port_r<0>), FUNC(m68705r_device::port_latch_w<0>));
|
||||
map(0x0001, 0x0001).rw(this, FUNC(m68705r_device::port_r<1>), FUNC(m68705r_device::port_latch_w<1>));
|
||||
map(0x0002, 0x0002).rw(this, FUNC(m68705r_device::port_r<2>), FUNC(m68705r_device::port_latch_w<2>));
|
||||
map(0x0003, 0x0003).rw(this, FUNC(m68705r_device::port_r<3>), FUNC(m68705r_device::port_latch_w<3>));
|
||||
map(0x0004, 0x0004).w(this, FUNC(m68705r_device::port_ddr_w<0>));
|
||||
map(0x0005, 0x0005).w(this, FUNC(m68705r_device::port_ddr_w<1>));
|
||||
map(0x0006, 0x0006).w(this, FUNC(m68705r_device::port_ddr_w<2>));
|
||||
// 0x0007 not used (port D is input only)
|
||||
AM_RANGE(0x0008, 0x0008) AM_READWRITE(tdr_r, tdr_w)
|
||||
AM_RANGE(0x0009, 0x0009) AM_READWRITE(tcr_r, tcr_w)
|
||||
AM_RANGE(0x000a, 0x000a) AM_READWRITE(misc_r, misc_w)
|
||||
AM_RANGE(0x000b, 0x000b) AM_READWRITE(pcr_r, pcr_w)
|
||||
map(0x0008, 0x0008).rw(this, FUNC(m68705r_device::tdr_r), FUNC(m68705r_device::tdr_w));
|
||||
map(0x0009, 0x0009).rw(this, FUNC(m68705r_device::tcr_r), FUNC(m68705r_device::tcr_w));
|
||||
map(0x000a, 0x000a).rw(this, FUNC(m68705r_device::misc_r), FUNC(m68705r_device::misc_w));
|
||||
map(0x000b, 0x000b).rw(this, FUNC(m68705r_device::pcr_r), FUNC(m68705r_device::pcr_w));
|
||||
// 0x000c-0x000d not used
|
||||
AM_RANGE(0x000e, 0x000e) AM_READWRITE(acr_r, acr_w)
|
||||
AM_RANGE(0x000f, 0x000f) AM_READWRITE(arr_r, arr_w)
|
||||
AM_RANGE(0x0010, 0x007f) AM_RAM
|
||||
AM_RANGE(0x0080, 0x0f38) AM_READWRITE(eprom_r<0x0080>, eprom_w<0x0080>) // User EPROM
|
||||
map(0x000e, 0x000e).rw(this, FUNC(m68705r_device::acr_r), FUNC(m68705r_device::acr_w));
|
||||
map(0x000f, 0x000f).rw(this, FUNC(m68705r_device::arr_r), FUNC(m68705r_device::arr_w));
|
||||
map(0x0010, 0x007f).ram();
|
||||
map(0x0080, 0x0f38).rw(this, FUNC(m68705r_device::eprom_r<0x0080>), FUNC(m68705r_device::eprom_w<0x0080>)); // User EPROM
|
||||
// 0x0f39-0x0f7f not used
|
||||
AM_RANGE(0x0f80, 0x0ff7) AM_ROM AM_REGION("bootstrap", 0)
|
||||
AM_RANGE(0x0ff8, 0x0fff) AM_READWRITE(eprom_r<0x0ff8>, eprom_w<0x0ff8>) // Interrupt vectors
|
||||
ADDRESS_MAP_END
|
||||
map(0x0f80, 0x0ff7).rom().region("bootstrap", 0);
|
||||
map(0x0ff8, 0x0fff).rw(this, FUNC(m68705r_device::eprom_r<0x0ff8>), FUNC(m68705r_device::eprom_w<0x0ff8>)); // Interrupt vectors
|
||||
}
|
||||
|
||||
m68705r_device::m68705r_device(
|
||||
machine_config const &mconfig,
|
||||
|
||||
@ -718,12 +718,13 @@ m68hc705_device::m68hc705_device(
|
||||
* MC68HC05C4 device
|
||||
****************************************************************************/
|
||||
|
||||
ADDRESS_MAP_START(m68hc05c4_device::c4_map)
|
||||
ADDRESS_MAP_GLOBAL_MASK(0x1fff)
|
||||
ADDRESS_MAP_UNMAP_HIGH
|
||||
void m68hc05c4_device::c4_map(address_map &map)
|
||||
{
|
||||
map.global_mask(0x1fff);
|
||||
map.unmap_value_high();
|
||||
|
||||
AM_RANGE(0x0000, 0x0003) AM_READWRITE(port_r, port_latch_w)
|
||||
AM_RANGE(0x0004, 0x0006) AM_READWRITE(port_ddr_r, port_ddr_w)
|
||||
map(0x0000, 0x0003).rw(this, FUNC(m68hc05c4_device::port_r), FUNC(m68hc05c4_device::port_latch_w));
|
||||
map(0x0004, 0x0006).rw(this, FUNC(m68hc05c4_device::port_ddr_r), FUNC(m68hc05c4_device::port_ddr_w));
|
||||
// 0x0007-0x0009 unused
|
||||
// 0x000a SPCR
|
||||
// 0x000b SPSR
|
||||
@ -733,20 +734,20 @@ ADDRESS_MAP_START(m68hc05c4_device::c4_map)
|
||||
// 0x000f SCCR2
|
||||
// 0x0010 SCSR
|
||||
// 0x0011 SCDR
|
||||
AM_RANGE(0x0012, 0x0012) AM_READWRITE(tcr_r, tcr_w)
|
||||
AM_RANGE(0x0013, 0x0013) AM_READ(tsr_r)
|
||||
AM_RANGE(0x0014, 0x0015) AM_READ(icr_r)
|
||||
AM_RANGE(0x0016, 0x0017) AM_READWRITE(ocr_r, ocr_w)
|
||||
AM_RANGE(0x0018, 0x001b) AM_READ(timer_r)
|
||||
map(0x0012, 0x0012).rw(this, FUNC(m68hc05c4_device::tcr_r), FUNC(m68hc05c4_device::tcr_w));
|
||||
map(0x0013, 0x0013).r(this, FUNC(m68hc05c4_device::tsr_r));
|
||||
map(0x0014, 0x0015).r(this, FUNC(m68hc05c4_device::icr_r));
|
||||
map(0x0016, 0x0017).rw(this, FUNC(m68hc05c4_device::ocr_r), FUNC(m68hc05c4_device::ocr_w));
|
||||
map(0x0018, 0x001b).r(this, FUNC(m68hc05c4_device::timer_r));
|
||||
// 0x001c-0x001f unused
|
||||
AM_RANGE(0x0020, 0x004f) AM_ROM // user ROM
|
||||
AM_RANGE(0x0050, 0x00ff) AM_RAM // RAM/stack
|
||||
AM_RANGE(0x0100, 0x10ff) AM_ROM // user ROM
|
||||
map(0x0020, 0x004f).rom(); // user ROM
|
||||
map(0x0050, 0x00ff).ram(); // RAM/stack
|
||||
map(0x0100, 0x10ff).rom(); // user ROM
|
||||
// 0x1100-0x1eff unused
|
||||
AM_RANGE(0x1f00, 0x1fef) AM_ROM // self-check
|
||||
map(0x1f00, 0x1fef).rom(); // self-check
|
||||
// 0x1ff0-0x1ff3 unused
|
||||
AM_RANGE(0x1ff4, 0x1fff) AM_ROM // user vectors
|
||||
ADDRESS_MAP_END
|
||||
map(0x1ff4, 0x1fff).rom(); // user vectors
|
||||
}
|
||||
|
||||
|
||||
m68hc05c4_device::m68hc05c4_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock)
|
||||
@ -783,12 +784,13 @@ std::unique_ptr<util::disasm_interface> m68hc05c4_device::create_disassembler()
|
||||
* MC68HC05C8 device
|
||||
****************************************************************************/
|
||||
|
||||
ADDRESS_MAP_START(m68hc05c8_device::c8_map)
|
||||
ADDRESS_MAP_GLOBAL_MASK(0x1fff)
|
||||
ADDRESS_MAP_UNMAP_HIGH
|
||||
void m68hc05c8_device::c8_map(address_map &map)
|
||||
{
|
||||
map.global_mask(0x1fff);
|
||||
map.unmap_value_high();
|
||||
|
||||
AM_RANGE(0x0000, 0x0003) AM_READWRITE(port_r, port_latch_w)
|
||||
AM_RANGE(0x0004, 0x0006) AM_READWRITE(port_ddr_r, port_ddr_w)
|
||||
map(0x0000, 0x0003).rw(this, FUNC(m68hc05c8_device::port_r), FUNC(m68hc05c8_device::port_latch_w));
|
||||
map(0x0004, 0x0006).rw(this, FUNC(m68hc05c8_device::port_ddr_r), FUNC(m68hc05c8_device::port_ddr_w));
|
||||
// 0x0007-0x0009 unused
|
||||
// 0x000a SPCR
|
||||
// 0x000b SPSR
|
||||
@ -798,19 +800,19 @@ ADDRESS_MAP_START(m68hc05c8_device::c8_map)
|
||||
// 0x000f SCCR2
|
||||
// 0x0010 SCSR
|
||||
// 0x0011 SCDR
|
||||
AM_RANGE(0x0012, 0x0012) AM_READWRITE(tcr_r, tcr_w)
|
||||
AM_RANGE(0x0013, 0x0013) AM_READ(tsr_r)
|
||||
AM_RANGE(0x0014, 0x0015) AM_READ(icr_r)
|
||||
AM_RANGE(0x0016, 0x0017) AM_READWRITE(ocr_r, ocr_w)
|
||||
AM_RANGE(0x0018, 0x001b) AM_READ(timer_r)
|
||||
map(0x0012, 0x0012).rw(this, FUNC(m68hc05c8_device::tcr_r), FUNC(m68hc05c8_device::tcr_w));
|
||||
map(0x0013, 0x0013).r(this, FUNC(m68hc05c8_device::tsr_r));
|
||||
map(0x0014, 0x0015).r(this, FUNC(m68hc05c8_device::icr_r));
|
||||
map(0x0016, 0x0017).rw(this, FUNC(m68hc05c8_device::ocr_r), FUNC(m68hc05c8_device::ocr_w));
|
||||
map(0x0018, 0x001b).r(this, FUNC(m68hc05c8_device::timer_r));
|
||||
// 0x001c-0x001f unused
|
||||
AM_RANGE(0x0020, 0x004f) AM_ROM // user ROM
|
||||
AM_RANGE(0x0050, 0x00ff) AM_RAM // RAM/stack
|
||||
AM_RANGE(0x0100, 0x1eff) AM_ROM // user ROM
|
||||
AM_RANGE(0x1f00, 0x1fef) AM_ROM // self-check
|
||||
map(0x0020, 0x004f).rom(); // user ROM
|
||||
map(0x0050, 0x00ff).ram(); // RAM/stack
|
||||
map(0x0100, 0x1eff).rom(); // user ROM
|
||||
map(0x1f00, 0x1fef).rom(); // self-check
|
||||
// 0x1ff0-0x1ff3 unused
|
||||
AM_RANGE(0x1ff4, 0x1fff) AM_ROM // user vectors
|
||||
ADDRESS_MAP_END
|
||||
map(0x1ff4, 0x1fff).rom(); // user vectors
|
||||
}
|
||||
|
||||
|
||||
m68hc05c8_device::m68hc05c8_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock)
|
||||
@ -847,12 +849,13 @@ std::unique_ptr<util::disasm_interface> m68hc05c8_device::create_disassembler()
|
||||
* MC68HC705C8A device
|
||||
****************************************************************************/
|
||||
|
||||
ADDRESS_MAP_START(m68hc705c8a_device::c8a_map)
|
||||
ADDRESS_MAP_GLOBAL_MASK(0x1fff)
|
||||
ADDRESS_MAP_UNMAP_HIGH
|
||||
void m68hc705c8a_device::c8a_map(address_map &map)
|
||||
{
|
||||
map.global_mask(0x1fff);
|
||||
map.unmap_value_high();
|
||||
|
||||
AM_RANGE(0x0000, 0x0003) AM_READWRITE(port_r, port_latch_w)
|
||||
AM_RANGE(0x0004, 0x0006) AM_READWRITE(port_ddr_r, port_ddr_w)
|
||||
map(0x0000, 0x0003).rw(this, FUNC(m68hc705c8a_device::port_r), FUNC(m68hc705c8a_device::port_latch_w));
|
||||
map(0x0004, 0x0006).rw(this, FUNC(m68hc705c8a_device::port_ddr_r), FUNC(m68hc705c8a_device::port_ddr_w));
|
||||
// 0x0007-0x0009 unused
|
||||
// 0x000a SPCR
|
||||
// 0x000b SPSR
|
||||
@ -862,25 +865,25 @@ ADDRESS_MAP_START(m68hc705c8a_device::c8a_map)
|
||||
// 0x000f SCCR2
|
||||
// 0x0010 SCSR
|
||||
// 0x0011 SCDR
|
||||
AM_RANGE(0x0012, 0x0012) AM_READWRITE(tcr_r, tcr_w)
|
||||
AM_RANGE(0x0013, 0x0013) AM_READ(tsr_r)
|
||||
AM_RANGE(0x0014, 0x0015) AM_READ(icr_r)
|
||||
AM_RANGE(0x0016, 0x0017) AM_READWRITE(ocr_r, ocr_w)
|
||||
AM_RANGE(0x0018, 0x001b) AM_READ(timer_r)
|
||||
map(0x0012, 0x0012).rw(this, FUNC(m68hc705c8a_device::tcr_r), FUNC(m68hc705c8a_device::tcr_w));
|
||||
map(0x0013, 0x0013).r(this, FUNC(m68hc705c8a_device::tsr_r));
|
||||
map(0x0014, 0x0015).r(this, FUNC(m68hc705c8a_device::icr_r));
|
||||
map(0x0016, 0x0017).rw(this, FUNC(m68hc705c8a_device::ocr_r), FUNC(m68hc705c8a_device::ocr_w));
|
||||
map(0x0018, 0x001b).r(this, FUNC(m68hc705c8a_device::timer_r));
|
||||
// 0x001c PROG
|
||||
AM_RANGE(0x001d, 0x001d) AM_WRITE(coprst_w)
|
||||
AM_RANGE(0x001e, 0x001e) AM_READWRITE(copcr_r, copcr_w)
|
||||
map(0x001d, 0x001d).w(this, FUNC(m68hc705c8a_device::coprst_w));
|
||||
map(0x001e, 0x001e).rw(this, FUNC(m68hc705c8a_device::copcr_r), FUNC(m68hc705c8a_device::copcr_w));
|
||||
// 0x001f unused
|
||||
AM_RANGE(0x0020, 0x004f) AM_ROM // user PROM FIXME: banked with RAM
|
||||
AM_RANGE(0x0050, 0x00ff) AM_RAM // RAM/stack
|
||||
AM_RANGE(0x0100, 0x015f) AM_ROM // user PROM FIXME: banked with RAM
|
||||
AM_RANGE(0x0160, 0x1eff) AM_ROM // user PROM
|
||||
AM_RANGE(0x1f00, 0x1fde) AM_ROM AM_REGION("bootstrap", 0x0000) // bootloader
|
||||
map(0x0020, 0x004f).rom(); // user PROM FIXME: banked with RAM
|
||||
map(0x0050, 0x00ff).ram(); // RAM/stack
|
||||
map(0x0100, 0x015f).rom(); // user PROM FIXME: banked with RAM
|
||||
map(0x0160, 0x1eff).rom(); // user PROM
|
||||
map(0x1f00, 0x1fde).rom().region("bootstrap", 0x0000); // bootloader
|
||||
// 0x1fdf option register FIXME: controls banking
|
||||
AM_RANGE(0x1fe0, 0x1fef) AM_ROM AM_REGION("bootstrap", 0x00e0) // boot ROM vectors
|
||||
AM_RANGE(0x1ff0, 0x1ff0) AM_WRITE(copr_w)
|
||||
AM_RANGE(0x1ff0, 0x1fff) AM_ROM // user vectors
|
||||
ADDRESS_MAP_END
|
||||
map(0x1fe0, 0x1fef).rom().region("bootstrap", 0x00e0); // boot ROM vectors
|
||||
map(0x1ff0, 0x1ff0).w(this, FUNC(m68hc705c8a_device::copr_w));
|
||||
map(0x1ff0, 0x1fff).rom(); // user vectors
|
||||
}
|
||||
|
||||
|
||||
m68hc705c8a_device::m68hc705c8a_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock)
|
||||
|
||||
@ -42,13 +42,15 @@
|
||||
DEFINE_DEVICE_TYPE(MB86235, mb86235_device, "mb86235", "Fujitsu MB86235 \"TGPx4\"")
|
||||
|
||||
|
||||
ADDRESS_MAP_START(mb86235_device::internal_abus)
|
||||
AM_RANGE(0x000000, 0x0003ff) AM_RAM
|
||||
ADDRESS_MAP_END
|
||||
void mb86235_device::internal_abus(address_map &map)
|
||||
{
|
||||
map(0x000000, 0x0003ff).ram();
|
||||
}
|
||||
|
||||
ADDRESS_MAP_START(mb86235_device::internal_bbus)
|
||||
AM_RANGE(0x000000, 0x0003ff) AM_RAM
|
||||
ADDRESS_MAP_END
|
||||
void mb86235_device::internal_bbus(address_map &map)
|
||||
{
|
||||
map(0x000000, 0x0003ff).ram();
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
@ -77,33 +77,40 @@ DEFINE_DEVICE_TYPE(MB8844, mb8844_cpu_device, "mb8844", "Fujitsu MB8844")
|
||||
ADDRESS MAPS
|
||||
***************************************************************************/
|
||||
|
||||
ADDRESS_MAP_START(mb88_cpu_device::program_9bit)
|
||||
AM_RANGE(0x000, 0x1ff) AM_ROM
|
||||
ADDRESS_MAP_END
|
||||
void mb88_cpu_device::program_9bit(address_map &map)
|
||||
{
|
||||
map(0x000, 0x1ff).rom();
|
||||
}
|
||||
|
||||
ADDRESS_MAP_START(mb88_cpu_device::program_10bit)
|
||||
AM_RANGE(0x000, 0x3ff) AM_ROM
|
||||
ADDRESS_MAP_END
|
||||
void mb88_cpu_device::program_10bit(address_map &map)
|
||||
{
|
||||
map(0x000, 0x3ff).rom();
|
||||
}
|
||||
|
||||
ADDRESS_MAP_START(mb88_cpu_device::program_11bit)
|
||||
AM_RANGE(0x000, 0x7ff) AM_ROM
|
||||
ADDRESS_MAP_END
|
||||
void mb88_cpu_device::program_11bit(address_map &map)
|
||||
{
|
||||
map(0x000, 0x7ff).rom();
|
||||
}
|
||||
|
||||
ADDRESS_MAP_START(mb88_cpu_device::data_4bit)
|
||||
AM_RANGE(0x00, 0x0f) AM_RAM
|
||||
ADDRESS_MAP_END
|
||||
void mb88_cpu_device::data_4bit(address_map &map)
|
||||
{
|
||||
map(0x00, 0x0f).ram();
|
||||
}
|
||||
|
||||
ADDRESS_MAP_START(mb88_cpu_device::data_5bit)
|
||||
AM_RANGE(0x00, 0x1f) AM_RAM
|
||||
ADDRESS_MAP_END
|
||||
void mb88_cpu_device::data_5bit(address_map &map)
|
||||
{
|
||||
map(0x00, 0x1f).ram();
|
||||
}
|
||||
|
||||
ADDRESS_MAP_START(mb88_cpu_device::data_6bit)
|
||||
AM_RANGE(0x00, 0x3f) AM_RAM
|
||||
ADDRESS_MAP_END
|
||||
void mb88_cpu_device::data_6bit(address_map &map)
|
||||
{
|
||||
map(0x00, 0x3f).ram();
|
||||
}
|
||||
|
||||
ADDRESS_MAP_START(mb88_cpu_device::data_7bit)
|
||||
AM_RANGE(0x00, 0x7f) AM_RAM
|
||||
ADDRESS_MAP_END
|
||||
void mb88_cpu_device::data_7bit(address_map &map)
|
||||
{
|
||||
map(0x00, 0x7f).ram();
|
||||
}
|
||||
|
||||
|
||||
mb88_cpu_device::mb88_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, int program_width, int data_width)
|
||||
|
||||
@ -167,29 +167,35 @@ DEFINE_DEVICE_TYPE(M58715, m58715_device, "m58715", "M58715")
|
||||
***************************************************************************/
|
||||
|
||||
/* FIXME: the memory maps should probably support rom banking for EA */
|
||||
ADDRESS_MAP_START(mcs48_cpu_device::program_10bit)
|
||||
AM_RANGE(0x000, 0x3ff) AM_ROM
|
||||
ADDRESS_MAP_END
|
||||
void mcs48_cpu_device::program_10bit(address_map &map)
|
||||
{
|
||||
map(0x000, 0x3ff).rom();
|
||||
}
|
||||
|
||||
ADDRESS_MAP_START(mcs48_cpu_device::program_11bit)
|
||||
AM_RANGE(0x000, 0x7ff) AM_ROM
|
||||
ADDRESS_MAP_END
|
||||
void mcs48_cpu_device::program_11bit(address_map &map)
|
||||
{
|
||||
map(0x000, 0x7ff).rom();
|
||||
}
|
||||
|
||||
ADDRESS_MAP_START(mcs48_cpu_device::program_12bit)
|
||||
AM_RANGE(0x000, 0xfff) AM_ROM
|
||||
ADDRESS_MAP_END
|
||||
void mcs48_cpu_device::program_12bit(address_map &map)
|
||||
{
|
||||
map(0x000, 0xfff).rom();
|
||||
}
|
||||
|
||||
ADDRESS_MAP_START(mcs48_cpu_device::data_6bit)
|
||||
AM_RANGE(0x00, 0x3f) AM_RAM
|
||||
ADDRESS_MAP_END
|
||||
void mcs48_cpu_device::data_6bit(address_map &map)
|
||||
{
|
||||
map(0x00, 0x3f).ram();
|
||||
}
|
||||
|
||||
ADDRESS_MAP_START(mcs48_cpu_device::data_7bit)
|
||||
AM_RANGE(0x00, 0x7f) AM_RAM
|
||||
ADDRESS_MAP_END
|
||||
void mcs48_cpu_device::data_7bit(address_map &map)
|
||||
{
|
||||
map(0x00, 0x7f).ram();
|
||||
}
|
||||
|
||||
ADDRESS_MAP_START(mcs48_cpu_device::data_8bit)
|
||||
AM_RANGE(0x00, 0xff) AM_RAM
|
||||
ADDRESS_MAP_END
|
||||
void mcs48_cpu_device::data_8bit(address_map &map)
|
||||
{
|
||||
map(0x00, 0xff).ram();
|
||||
}
|
||||
|
||||
|
||||
mcs48_cpu_device::mcs48_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, int rom_size, int ram_size, uint8_t feature_mask, const mcs48_cpu_device::mcs48_ophandler *opcode_table)
|
||||
|
||||
@ -242,23 +242,27 @@ DEFINE_DEVICE_TYPE(DS5002FP, ds5002fp_device, "ds5002fp", "Dallas DS5002FP")
|
||||
ADDRESS MAPS
|
||||
***************************************************************************/
|
||||
|
||||
ADDRESS_MAP_START(mcs51_cpu_device::program_12bit)
|
||||
AM_RANGE(0x00, 0x0fff) AM_ROM
|
||||
ADDRESS_MAP_END
|
||||
void mcs51_cpu_device::program_12bit(address_map &map)
|
||||
{
|
||||
map(0x00, 0x0fff).rom();
|
||||
}
|
||||
|
||||
ADDRESS_MAP_START(mcs51_cpu_device::program_13bit)
|
||||
AM_RANGE(0x00, 0x1fff) AM_ROM
|
||||
ADDRESS_MAP_END
|
||||
void mcs51_cpu_device::program_13bit(address_map &map)
|
||||
{
|
||||
map(0x00, 0x1fff).rom();
|
||||
}
|
||||
|
||||
ADDRESS_MAP_START(mcs51_cpu_device::data_7bit)
|
||||
AM_RANGE(0x0000, 0x007f) AM_RAM AM_SHARE("scratchpad")
|
||||
AM_RANGE(0x0100, 0x01ff) AM_RAM AM_SHARE("sfr_ram") /* SFR */
|
||||
ADDRESS_MAP_END
|
||||
void mcs51_cpu_device::data_7bit(address_map &map)
|
||||
{
|
||||
map(0x0000, 0x007f).ram().share("scratchpad");
|
||||
map(0x0100, 0x01ff).ram().share("sfr_ram"); /* SFR */
|
||||
}
|
||||
|
||||
ADDRESS_MAP_START(mcs51_cpu_device::data_8bit)
|
||||
AM_RANGE(0x0000, 0x00ff) AM_RAM AM_SHARE("scratchpad")
|
||||
AM_RANGE(0x0100, 0x01ff) AM_RAM AM_SHARE("sfr_ram") /* SFR */
|
||||
ADDRESS_MAP_END
|
||||
void mcs51_cpu_device::data_8bit(address_map &map)
|
||||
{
|
||||
map(0x0000, 0x00ff).ram().share("scratchpad");
|
||||
map(0x0100, 0x01ff).ram().share("sfr_ram"); /* SFR */
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
@ -14,14 +14,16 @@ DEFINE_DEVICE_TYPE(M58846, m58846_device, "m58846", "Mitsubishi M58846")
|
||||
|
||||
|
||||
// internal memory maps
|
||||
ADDRESS_MAP_START(m58846_device::program_2kx9)
|
||||
AM_RANGE(0x0000, 0x07ff) AM_ROM
|
||||
ADDRESS_MAP_END
|
||||
void m58846_device::program_2kx9(address_map &map)
|
||||
{
|
||||
map(0x0000, 0x07ff).rom();
|
||||
}
|
||||
|
||||
|
||||
ADDRESS_MAP_START(m58846_device::data_128x4)
|
||||
AM_RANGE(0x00, 0x7f) AM_RAM
|
||||
ADDRESS_MAP_END
|
||||
void m58846_device::data_128x4(address_map &map)
|
||||
{
|
||||
map(0x00, 0x7f).ram();
|
||||
}
|
||||
|
||||
|
||||
// device definitions
|
||||
|
||||
@ -40,9 +40,10 @@ enum mn10200_flag
|
||||
DEFINE_DEVICE_TYPE(MN1020012A, mn1020012a_device, "mn1020012a", "Panasonic MN1020012A")
|
||||
|
||||
// internal memory maps
|
||||
ADDRESS_MAP_START(mn10200_device::mn1020012a_internal_map)
|
||||
AM_RANGE(0x00fc00, 0x00ffff) AM_READWRITE8(io_control_r, io_control_w, 0xffff)
|
||||
ADDRESS_MAP_END
|
||||
void mn10200_device::mn1020012a_internal_map(address_map &map)
|
||||
{
|
||||
map(0x00fc00, 0x00ffff).rw(this, FUNC(mn10200_device::io_control_r), FUNC(mn10200_device::io_control_w));
|
||||
}
|
||||
|
||||
|
||||
mn10200_device::mn10200_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor program)
|
||||
|
||||
@ -414,9 +414,10 @@ WRITE_LINE_MEMBER(v53_base_device::hack_w)
|
||||
|
||||
/* General stuff */
|
||||
|
||||
ADDRESS_MAP_START(v53_base_device::v53_internal_port_map)
|
||||
AM_RANGE(0xffe0, 0xffe1) AM_WRITE8( BSEL_w, 0x00ff) // 0xffe0 // uPD71037 DMA mode bank selection register
|
||||
AM_RANGE(0xffe0, 0xffe1) AM_WRITE8( BADR_w, 0xff00) // 0xffe1 // uPD71037 DMA mode bank register peripheral mapping (also uses OPHA)
|
||||
void v53_base_device::v53_internal_port_map(address_map &map)
|
||||
{
|
||||
map(0xffe0, 0xffe0).w(this, FUNC(v53_base_device::BSEL_w)); // 0xffe0 // uPD71037 DMA mode bank selection register
|
||||
map(0xffe1, 0xffe1).w(this, FUNC(v53_base_device::BADR_w)); // 0xffe1 // uPD71037 DMA mode bank register peripheral mapping (also uses OPHA)
|
||||
// AM_RANGE(0xffe2, 0xffe3) // (reserved , 0x00ff) // 0xffe2
|
||||
// AM_RANGE(0xffe2, 0xffe3) // (reserved , 0xff00) // 0xffe3
|
||||
// AM_RANGE(0xffe4, 0xffe5) // (reserved , 0x00ff) // 0xffe4
|
||||
@ -424,30 +425,30 @@ ADDRESS_MAP_START(v53_base_device::v53_internal_port_map)
|
||||
// AM_RANGE(0xffe6, 0xffe7) // (reserved , 0x00ff) // 0xffe6
|
||||
// AM_RANGE(0xffe6, 0xffe7) // (reserved , 0xff00) // 0xffe7
|
||||
// AM_RANGE(0xffe8, 0xffe9) // (reserved , 0x00ff) // 0xffe8
|
||||
AM_RANGE(0xffe8, 0xffe9) AM_WRITE8( BRC_w , 0xff00) // 0xffe9 // baud rate counter (used for serial peripheral)
|
||||
AM_RANGE(0xffea, 0xffeb) AM_WRITE8( WMB0_w, 0x00ff) // 0xffea // waitstate control
|
||||
AM_RANGE(0xffea, 0xffeb) AM_WRITE8( WCY1_w, 0xff00) // 0xffeb // waitstate control
|
||||
AM_RANGE(0xffec, 0xffed) AM_WRITE8( WCY0_w, 0x00ff) // 0xffec // waitstate control
|
||||
AM_RANGE(0xffec, 0xffed) AM_WRITE8( WAC_w, 0xff00) // 0xffed // waitstate control
|
||||
map(0xffe9, 0xffe9).w(this, FUNC(v53_base_device::BRC_w)); // 0xffe9 // baud rate counter (used for serial peripheral)
|
||||
map(0xffea, 0xffea).w(this, FUNC(v53_base_device::WMB0_w)); // 0xffea // waitstate control
|
||||
map(0xffeb, 0xffeb).w(this, FUNC(v53_base_device::WCY1_w)); // 0xffeb // waitstate control
|
||||
map(0xffec, 0xffec).w(this, FUNC(v53_base_device::WCY0_w)); // 0xffec // waitstate control
|
||||
map(0xffed, 0xffed).w(this, FUNC(v53_base_device::WAC_w)); // 0xffed // waitstate control
|
||||
// AM_RANGE(0xffee, 0xffef) // (reserved , 0x00ff) // 0xffee
|
||||
// AM_RANGE(0xffee, 0xffef) // (reserved , 0xff00) // 0xffef
|
||||
AM_RANGE(0xfff0, 0xfff1) AM_WRITE8( TCKS_w, 0x00ff) // 0xfff0 // timer clocks
|
||||
AM_RANGE(0xfff0, 0xfff1) AM_WRITE8( SBCR_w, 0xff00) // 0xfff1 // internal clock divider, halt behavior etc.
|
||||
AM_RANGE(0xfff2, 0xfff3) AM_WRITE8( REFC_w, 0x00ff) // 0xfff2 // ram refresh control
|
||||
AM_RANGE(0xfff2, 0xfff3) AM_WRITE8( WMB1_w, 0xff00) // 0xfff3 // waitstate control
|
||||
AM_RANGE(0xfff4, 0xfff5) AM_WRITE8( WCY2_w, 0x00ff) // 0xfff4 // waitstate control
|
||||
AM_RANGE(0xfff4, 0xfff5) AM_WRITE8( WCY3_w, 0xff00) // 0xfff5 // waitstate control
|
||||
AM_RANGE(0xfff6, 0xfff7) AM_WRITE8( WCY4_w, 0x00ff) // 0xfff6 // waitstate control
|
||||
map(0xfff0, 0xfff0).w(this, FUNC(v53_base_device::TCKS_w)); // 0xfff0 // timer clocks
|
||||
map(0xfff1, 0xfff1).w(this, FUNC(v53_base_device::SBCR_w)); // 0xfff1 // internal clock divider, halt behavior etc.
|
||||
map(0xfff2, 0xfff2).w(this, FUNC(v53_base_device::REFC_w)); // 0xfff2 // ram refresh control
|
||||
map(0xfff3, 0xfff3).w(this, FUNC(v53_base_device::WMB1_w)); // 0xfff3 // waitstate control
|
||||
map(0xfff4, 0xfff4).w(this, FUNC(v53_base_device::WCY2_w)); // 0xfff4 // waitstate control
|
||||
map(0xfff5, 0xfff5).w(this, FUNC(v53_base_device::WCY3_w)); // 0xfff5 // waitstate control
|
||||
map(0xfff6, 0xfff6).w(this, FUNC(v53_base_device::WCY4_w)); // 0xfff6 // waitstate control
|
||||
// AM_RANGE(0xfff6, 0xfff7) // (reserved , 0xff00) // 0xfff7
|
||||
AM_RANGE(0xfff8, 0xfff9) AM_WRITE8( SULA_w, 0x00ff) // 0xfff8 // peripheral mapping
|
||||
AM_RANGE(0xfff8, 0xfff9) AM_WRITE8( TULA_w, 0xff00) // 0xfff9 // peripheral mapping
|
||||
AM_RANGE(0xfffa, 0xfffb) AM_WRITE8( IULA_w, 0x00ff) // 0xfffa // peripheral mapping
|
||||
AM_RANGE(0xfffa, 0xfffb) AM_WRITE8( DULA_w, 0xff00) // 0xfffb // peripheral mapping
|
||||
AM_RANGE(0xfffc, 0xfffd) AM_WRITE8( OPHA_w, 0x00ff) // 0xfffc // peripheral mapping (upper bits, common)
|
||||
AM_RANGE(0xfffc, 0xfffd) AM_WRITE8( OPSEL_w, 0xff00) // 0xfffd // peripheral enabling
|
||||
AM_RANGE(0xfffe, 0xffff) AM_WRITE8( SCTL_w, 0x00ff) // 0xfffe // peripheral configuration (& byte / word mapping)
|
||||
map(0xfff8, 0xfff8).w(this, FUNC(v53_base_device::SULA_w)); // 0xfff8 // peripheral mapping
|
||||
map(0xfff9, 0xfff9).w(this, FUNC(v53_base_device::TULA_w)); // 0xfff9 // peripheral mapping
|
||||
map(0xfffa, 0xfffa).w(this, FUNC(v53_base_device::IULA_w)); // 0xfffa // peripheral mapping
|
||||
map(0xfffb, 0xfffb).w(this, FUNC(v53_base_device::DULA_w)); // 0xfffb // peripheral mapping
|
||||
map(0xfffc, 0xfffc).w(this, FUNC(v53_base_device::OPHA_w)); // 0xfffc // peripheral mapping (upper bits, common)
|
||||
map(0xfffd, 0xfffd).w(this, FUNC(v53_base_device::OPSEL_w)); // 0xfffd // peripheral enabling
|
||||
map(0xfffe, 0xfffe).w(this, FUNC(v53_base_device::SCTL_w)); // 0xfffe // peripheral configuration (& byte / word mapping)
|
||||
// AM_RANGE(0xfffe, 0xffff) // (reserved , 0xff00) // 0xffff
|
||||
ADDRESS_MAP_END
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
@ -53,9 +53,10 @@ void patinho_feio_cpu_device::compute_effective_address(unsigned int addr){
|
||||
DEFINE_DEVICE_TYPE(PATO_FEIO_CPU, patinho_feio_cpu_device, "pato_feio_cpu", "Patinho Feio CPU")
|
||||
|
||||
//Internal 4kbytes of RAM
|
||||
ADDRESS_MAP_START(patinho_feio_cpu_device::prog_8bit)
|
||||
AM_RANGE(0x0000, 0x0fff) AM_RAM AM_SHARE("internalram")
|
||||
ADDRESS_MAP_END
|
||||
void patinho_feio_cpu_device::prog_8bit(address_map &map)
|
||||
{
|
||||
map(0x0000, 0x0fff).ram().share("internalram");
|
||||
}
|
||||
|
||||
patinho_feio_cpu_device::patinho_feio_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
|
||||
: cpu_device(mconfig, PATO_FEIO_CPU, tag, owner, clock)
|
||||
|
||||
@ -91,32 +91,37 @@ DEFINE_DEVICE_TYPE(PIC1655, pic1655_device, "pic1655", "Microchip PIC1655")
|
||||
* Internal Memory Maps
|
||||
****************************************************************************/
|
||||
|
||||
ADDRESS_MAP_START(pic16c5x_device::pic16c5x_rom_9)
|
||||
AM_RANGE(0x000, 0x1ff) AM_ROM
|
||||
ADDRESS_MAP_END
|
||||
void pic16c5x_device::pic16c5x_rom_9(address_map &map)
|
||||
{
|
||||
map(0x000, 0x1ff).rom();
|
||||
}
|
||||
|
||||
ADDRESS_MAP_START(pic16c5x_device::pic16c5x_ram_5)
|
||||
AM_RANGE(0x00, 0x07) AM_RAM
|
||||
AM_RANGE(0x08, 0x0f) AM_RAM
|
||||
AM_RANGE(0x10, 0x1f) AM_RAM
|
||||
ADDRESS_MAP_END
|
||||
void pic16c5x_device::pic16c5x_ram_5(address_map &map)
|
||||
{
|
||||
map(0x00, 0x07).ram();
|
||||
map(0x08, 0x0f).ram();
|
||||
map(0x10, 0x1f).ram();
|
||||
}
|
||||
|
||||
ADDRESS_MAP_START(pic16c5x_device::pic16c5x_rom_10)
|
||||
AM_RANGE(0x000, 0x3ff) AM_ROM
|
||||
ADDRESS_MAP_END
|
||||
void pic16c5x_device::pic16c5x_rom_10(address_map &map)
|
||||
{
|
||||
map(0x000, 0x3ff).rom();
|
||||
}
|
||||
|
||||
ADDRESS_MAP_START(pic16c5x_device::pic16c5x_rom_11)
|
||||
AM_RANGE(0x000, 0x7ff) AM_ROM
|
||||
ADDRESS_MAP_END
|
||||
void pic16c5x_device::pic16c5x_rom_11(address_map &map)
|
||||
{
|
||||
map(0x000, 0x7ff).rom();
|
||||
}
|
||||
|
||||
ADDRESS_MAP_START(pic16c5x_device::pic16c5x_ram_7)
|
||||
AM_RANGE(0x00, 0x07) AM_RAM AM_MIRROR(0x60)
|
||||
AM_RANGE(0x08, 0x0f) AM_RAM AM_MIRROR(0x60)
|
||||
AM_RANGE(0x10, 0x1f) AM_RAM
|
||||
AM_RANGE(0x30, 0x3f) AM_RAM
|
||||
AM_RANGE(0x50, 0x5f) AM_RAM
|
||||
AM_RANGE(0x70, 0x7f) AM_RAM
|
||||
ADDRESS_MAP_END
|
||||
void pic16c5x_device::pic16c5x_ram_7(address_map &map)
|
||||
{
|
||||
map(0x00, 0x07).ram().mirror(0x60);
|
||||
map(0x08, 0x0f).ram().mirror(0x60);
|
||||
map(0x10, 0x1f).ram();
|
||||
map(0x30, 0x3f).ram();
|
||||
map(0x50, 0x5f).ram();
|
||||
map(0x70, 0x7f).ram();
|
||||
}
|
||||
|
||||
|
||||
pic16c5x_device::pic16c5x_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, int program_width, int data_width, int picmodel)
|
||||
|
||||
@ -71,47 +71,53 @@ DEFINE_DEVICE_TYPE(PIC16C622A, pic16c622a_device, "pic16c622a", "Microchip PIC1
|
||||
* Internal Memory Map
|
||||
****************************************************************************/
|
||||
|
||||
ADDRESS_MAP_START(pic16c62x_device::pic16c62x_rom_9)
|
||||
AM_RANGE(0x000, 0x1ff) AM_ROM
|
||||
ADDRESS_MAP_END
|
||||
void pic16c62x_device::pic16c62x_rom_9(address_map &map)
|
||||
{
|
||||
map(0x000, 0x1ff).rom();
|
||||
}
|
||||
|
||||
ADDRESS_MAP_START(pic16c62x_device::pic16c62x_rom_10)
|
||||
AM_RANGE(0x000, 0x3ff) AM_ROM
|
||||
ADDRESS_MAP_END
|
||||
void pic16c62x_device::pic16c62x_rom_10(address_map &map)
|
||||
{
|
||||
map(0x000, 0x3ff).rom();
|
||||
}
|
||||
|
||||
ADDRESS_MAP_START(pic16c62x_device::pic16c62x_rom_11)
|
||||
AM_RANGE(0x000, 0x7ff) AM_ROM
|
||||
ADDRESS_MAP_END
|
||||
void pic16c62x_device::pic16c62x_rom_11(address_map &map)
|
||||
{
|
||||
map(0x000, 0x7ff).rom();
|
||||
}
|
||||
|
||||
ADDRESS_MAP_START(pic16c62x_device::pic16c620_ram)
|
||||
AM_RANGE(0x00, 0x06) AM_RAM
|
||||
AM_RANGE(0x0a, 0x0c) AM_RAM
|
||||
AM_RANGE(0x1f, 0x6f) AM_RAM
|
||||
AM_RANGE(0x80, 0x86) AM_RAM
|
||||
AM_RANGE(0x8a, 0x8e) AM_RAM
|
||||
AM_RANGE(0x9f, 0x9f) AM_RAM
|
||||
ADDRESS_MAP_END
|
||||
void pic16c62x_device::pic16c620_ram(address_map &map)
|
||||
{
|
||||
map(0x00, 0x06).ram();
|
||||
map(0x0a, 0x0c).ram();
|
||||
map(0x1f, 0x6f).ram();
|
||||
map(0x80, 0x86).ram();
|
||||
map(0x8a, 0x8e).ram();
|
||||
map(0x9f, 0x9f).ram();
|
||||
}
|
||||
|
||||
ADDRESS_MAP_START(pic16c62x_device::pic16c622_ram)
|
||||
AM_RANGE(0x00, 0x06) AM_RAM
|
||||
AM_RANGE(0x0a, 0x0c) AM_RAM
|
||||
AM_RANGE(0x1f, 0x7f) AM_RAM
|
||||
AM_RANGE(0x80, 0x86) AM_RAM
|
||||
AM_RANGE(0x8a, 0x8e) AM_RAM
|
||||
AM_RANGE(0x9f, 0xbf) AM_RAM
|
||||
ADDRESS_MAP_END
|
||||
void pic16c62x_device::pic16c622_ram(address_map &map)
|
||||
{
|
||||
map(0x00, 0x06).ram();
|
||||
map(0x0a, 0x0c).ram();
|
||||
map(0x1f, 0x7f).ram();
|
||||
map(0x80, 0x86).ram();
|
||||
map(0x8a, 0x8e).ram();
|
||||
map(0x9f, 0xbf).ram();
|
||||
}
|
||||
|
||||
// pic16c620a, pic16c621a and pic16c622a
|
||||
ADDRESS_MAP_START(pic16c62x_device::pic16c62xa_ram)
|
||||
AM_RANGE(0x00, 0x06) AM_RAM
|
||||
AM_RANGE(0x0a, 0x0c) AM_RAM
|
||||
AM_RANGE(0x1f, 0x6f) AM_RAM
|
||||
AM_RANGE(0x70, 0x7f) AM_RAM AM_SHARE(nullptr)
|
||||
AM_RANGE(0x80, 0x86) AM_RAM
|
||||
AM_RANGE(0x8a, 0x8e) AM_RAM
|
||||
AM_RANGE(0x9f, 0xbf) AM_RAM
|
||||
AM_RANGE(0xf0, 0xff) AM_RAM AM_SHARE(nullptr)
|
||||
ADDRESS_MAP_END
|
||||
void pic16c62x_device::pic16c62xa_ram(address_map &map)
|
||||
{
|
||||
map(0x00, 0x06).ram();
|
||||
map(0x0a, 0x0c).ram();
|
||||
map(0x1f, 0x6f).ram();
|
||||
map(0x70, 0x7f).ram().share(nullptr);
|
||||
map(0x80, 0x86).ram();
|
||||
map(0x8a, 0x8e).ram();
|
||||
map(0x9f, 0xbf).ram();
|
||||
map(0xf0, 0xff).ram().share(nullptr);
|
||||
}
|
||||
|
||||
|
||||
pic16c62x_device::pic16c62x_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, int program_width, int picmodel)
|
||||
|
||||
@ -276,9 +276,10 @@ ppc604_device::ppc604_device(const machine_config &mconfig, const char *tag, dev
|
||||
{
|
||||
}
|
||||
|
||||
ADDRESS_MAP_START(ppc4xx_device::internal_ppc4xx)
|
||||
AM_RANGE(0x40000000, 0x4000000f) AM_READWRITE8(ppc4xx_spu_r, ppc4xx_spu_w, 0xffffffff)
|
||||
ADDRESS_MAP_END
|
||||
void ppc4xx_device::internal_ppc4xx(address_map &map)
|
||||
{
|
||||
map(0x40000000, 0x4000000f).rw(this, FUNC(ppc4xx_device::ppc4xx_spu_r), FUNC(ppc4xx_device::ppc4xx_spu_w));
|
||||
}
|
||||
|
||||
ppc4xx_device::ppc4xx_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, powerpc_flavor flavor, uint32_t cap, uint32_t tb_divisor)
|
||||
: ppc_device(mconfig, type, tag, owner, clock, 31, 32, flavor, cap, tb_divisor, address_map_constructor(FUNC(ppc4xx_device::internal_ppc4xx), this))
|
||||
|
||||
@ -1724,38 +1724,39 @@ int psxcpu_device::store_data_address_breakpoint( uint32_t address )
|
||||
}
|
||||
|
||||
// On-board RAM and peripherals
|
||||
ADDRESS_MAP_START(psxcpu_device::psxcpu_internal_map)
|
||||
AM_RANGE( 0x1f800000, 0x1f8003ff ) AM_NOP /* scratchpad */
|
||||
AM_RANGE( 0x1f800400, 0x1f800fff ) AM_READWRITE( berr_r, berr_w )
|
||||
AM_RANGE( 0x1f801000, 0x1f801003 ) AM_READWRITE( exp_base_r, exp_base_w )
|
||||
AM_RANGE( 0x1f801004, 0x1f801007 ) AM_RAM
|
||||
AM_RANGE( 0x1f801008, 0x1f80100b ) AM_READWRITE( exp_config_r, exp_config_w )
|
||||
AM_RANGE( 0x1f80100c, 0x1f80100f ) AM_RAM
|
||||
AM_RANGE( 0x1f801010, 0x1f801013 ) AM_READWRITE( rom_config_r, rom_config_w )
|
||||
AM_RANGE( 0x1f801014, 0x1f80101f ) AM_RAM
|
||||
void psxcpu_device::psxcpu_internal_map(address_map &map)
|
||||
{
|
||||
map(0x1f800000, 0x1f8003ff).noprw(); /* scratchpad */
|
||||
map(0x1f800400, 0x1f800fff).rw(this, FUNC(psxcpu_device::berr_r), FUNC(psxcpu_device::berr_w));
|
||||
map(0x1f801000, 0x1f801003).rw(this, FUNC(psxcpu_device::exp_base_r), FUNC(psxcpu_device::exp_base_w));
|
||||
map(0x1f801004, 0x1f801007).ram();
|
||||
map(0x1f801008, 0x1f80100b).rw(this, FUNC(psxcpu_device::exp_config_r), FUNC(psxcpu_device::exp_config_w));
|
||||
map(0x1f80100c, 0x1f80100f).ram();
|
||||
map(0x1f801010, 0x1f801013).rw(this, FUNC(psxcpu_device::rom_config_r), FUNC(psxcpu_device::rom_config_w));
|
||||
map(0x1f801014, 0x1f80101f).ram();
|
||||
/* 1f801014 spu delay */
|
||||
/* 1f801018 dv delay */
|
||||
AM_RANGE( 0x1f801020, 0x1f801023 ) AM_READWRITE( com_delay_r, com_delay_w )
|
||||
AM_RANGE( 0x1f801024, 0x1f80102f ) AM_RAM
|
||||
AM_RANGE( 0x1f801040, 0x1f80104f ) AM_DEVREADWRITE( "sio0", psxsio_device, read, write )
|
||||
AM_RANGE( 0x1f801050, 0x1f80105f ) AM_DEVREADWRITE( "sio1", psxsio_device, read, write )
|
||||
AM_RANGE( 0x1f801060, 0x1f801063 ) AM_READWRITE( ram_config_r, ram_config_w )
|
||||
AM_RANGE( 0x1f801064, 0x1f80106f ) AM_RAM
|
||||
AM_RANGE( 0x1f801070, 0x1f801077 ) AM_DEVREADWRITE( "irq", psxirq_device, read, write )
|
||||
AM_RANGE( 0x1f801080, 0x1f8010ff ) AM_DEVREADWRITE( "dma", psxdma_device, read, write )
|
||||
AM_RANGE( 0x1f801100, 0x1f80112f ) AM_DEVREADWRITE( "rcnt", psxrcnt_device, read, write )
|
||||
AM_RANGE( 0x1f801800, 0x1f801803 ) AM_READWRITE8( cd_r, cd_w, 0xffffffff )
|
||||
AM_RANGE( 0x1f801810, 0x1f801817 ) AM_READWRITE( gpu_r, gpu_w )
|
||||
AM_RANGE( 0x1f801820, 0x1f801827 ) AM_DEVREADWRITE( "mdec", psxmdec_device, read, write )
|
||||
AM_RANGE( 0x1f801c00, 0x1f801dff ) AM_READWRITE16( spu_r, spu_w, 0xffffffff )
|
||||
AM_RANGE( 0x1f802020, 0x1f802033 ) AM_RAM /* ?? */
|
||||
map(0x1f801020, 0x1f801023).rw(this, FUNC(psxcpu_device::com_delay_r), FUNC(psxcpu_device::com_delay_w));
|
||||
map(0x1f801024, 0x1f80102f).ram();
|
||||
map(0x1f801040, 0x1f80104f).rw("sio0", FUNC(psxsio_device::read), FUNC(psxsio_device::write));
|
||||
map(0x1f801050, 0x1f80105f).rw("sio1", FUNC(psxsio_device::read), FUNC(psxsio_device::write));
|
||||
map(0x1f801060, 0x1f801063).rw(this, FUNC(psxcpu_device::ram_config_r), FUNC(psxcpu_device::ram_config_w));
|
||||
map(0x1f801064, 0x1f80106f).ram();
|
||||
map(0x1f801070, 0x1f801077).rw("irq", FUNC(psxirq_device::read), FUNC(psxirq_device::write));
|
||||
map(0x1f801080, 0x1f8010ff).rw("dma", FUNC(psxdma_device::read), FUNC(psxdma_device::write));
|
||||
map(0x1f801100, 0x1f80112f).rw("rcnt", FUNC(psxrcnt_device::read), FUNC(psxrcnt_device::write));
|
||||
map(0x1f801800, 0x1f801803).rw(this, FUNC(psxcpu_device::cd_r), FUNC(psxcpu_device::cd_w));
|
||||
map(0x1f801810, 0x1f801817).rw(this, FUNC(psxcpu_device::gpu_r), FUNC(psxcpu_device::gpu_w));
|
||||
map(0x1f801820, 0x1f801827).rw("mdec", FUNC(psxmdec_device::read), FUNC(psxmdec_device::write));
|
||||
map(0x1f801c00, 0x1f801dff).rw(this, FUNC(psxcpu_device::spu_r), FUNC(psxcpu_device::spu_w));
|
||||
map(0x1f802020, 0x1f802033).ram(); /* ?? */
|
||||
/* 1f802030 int 2000 */
|
||||
/* 1f802040 dip switches */
|
||||
AM_RANGE( 0x1f802040, 0x1f802043 ) AM_WRITENOP
|
||||
AM_RANGE( 0x20000000, 0x7fffffff ) AM_READWRITE( berr_r, berr_w )
|
||||
AM_RANGE( 0xc0000000, 0xfffdffff ) AM_READWRITE( berr_r, berr_w )
|
||||
AM_RANGE( 0xfffe0130, 0xfffe0133 ) AM_READWRITE( biu_r, biu_w )
|
||||
ADDRESS_MAP_END
|
||||
map(0x1f802040, 0x1f802043).nopw();
|
||||
map(0x20000000, 0x7fffffff).rw(this, FUNC(psxcpu_device::berr_r), FUNC(psxcpu_device::berr_w));
|
||||
map(0xc0000000, 0xfffdffff).rw(this, FUNC(psxcpu_device::berr_r), FUNC(psxcpu_device::berr_w));
|
||||
map(0xfffe0130, 0xfffe0133).rw(this, FUNC(psxcpu_device::biu_r), FUNC(psxcpu_device::biu_w));
|
||||
}
|
||||
|
||||
|
||||
//**************************************************************************
|
||||
|
||||
@ -1010,13 +1010,15 @@ void scudsp_cpu_device::execute_set_input(int irqline, int state)
|
||||
}
|
||||
}
|
||||
|
||||
ADDRESS_MAP_START(scudsp_cpu_device::program_map)
|
||||
AM_RANGE(0x00, 0xff) AM_RAM
|
||||
ADDRESS_MAP_END
|
||||
void scudsp_cpu_device::program_map(address_map &map)
|
||||
{
|
||||
map(0x00, 0xff).ram();
|
||||
}
|
||||
|
||||
ADDRESS_MAP_START(scudsp_cpu_device::data_map)
|
||||
AM_RANGE(0x00, 0xff) AM_RAM
|
||||
ADDRESS_MAP_END
|
||||
void scudsp_cpu_device::data_map(address_map &map)
|
||||
{
|
||||
map(0x00, 0xff).ram();
|
||||
}
|
||||
|
||||
scudsp_cpu_device::scudsp_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
|
||||
: cpu_device(mconfig, SCUDSP, tag, owner, clock)
|
||||
|
||||
@ -123,33 +123,36 @@ READ32_MEMBER(sh2_device::sh2_internal_a5)
|
||||
sh2_internal_map - maps SH2 built-ins
|
||||
-------------------------------------------------*/
|
||||
|
||||
ADDRESS_MAP_START(sh2_device::sh7604_map)
|
||||
AM_RANGE(0x40000000, 0xbfffffff) AM_READ(sh2_internal_a5)
|
||||
void sh2_device::sh7604_map(address_map &map)
|
||||
{
|
||||
map(0x40000000, 0xbfffffff).r(this, FUNC(sh2_device::sh2_internal_a5));
|
||||
/*!
|
||||
@todo: cps3boot breaks with this enabled. Needs customization ...
|
||||
*/
|
||||
// AM_RANGE(0xc0000000, 0xc0000fff) AM_RAM // cache data array
|
||||
// AM_RANGE(0xffffff88, 0xffffff8b) AM_READWRITE(dma_dtcr0_r,dma_dtcr0_w)
|
||||
AM_RANGE(0xe0000000, 0xe00001ff) AM_MIRROR(0x1ffffe00) AM_READWRITE(sh7604_r, sh7604_w)
|
||||
ADDRESS_MAP_END
|
||||
map(0xe0000000, 0xe00001ff).mirror(0x1ffffe00).rw(this, FUNC(sh2_device::sh7604_r), FUNC(sh2_device::sh7604_w));
|
||||
}
|
||||
|
||||
ADDRESS_MAP_START(sh2a_device::sh7021_map)
|
||||
void sh2a_device::sh7021_map(address_map &map)
|
||||
{
|
||||
// fall-back
|
||||
AM_RANGE(0x05fffe00, 0x05ffffff) AM_READWRITE16(sh7021_r,sh7021_w,0xffffffff) // SH-7032H internal i/o
|
||||
map(0x05fffe00, 0x05ffffff).rw(this, FUNC(sh2a_device::sh7021_r), FUNC(sh2a_device::sh7021_w)); // SH-7032H internal i/o
|
||||
// overrides
|
||||
AM_RANGE(0x05ffff40, 0x05ffff43) AM_READWRITE(dma_sar0_r, dma_sar0_w)
|
||||
AM_RANGE(0x05ffff44, 0x05ffff47) AM_READWRITE(dma_dar0_r, dma_dar0_w)
|
||||
AM_RANGE(0x05ffff48, 0x05ffff4b) AM_READWRITE16(dmaor_r, dmaor_w,0xffff0000)
|
||||
AM_RANGE(0x05ffff48, 0x05ffff4b) AM_READWRITE16(dma_tcr0_r, dma_tcr0_w,0x0000ffff)
|
||||
AM_RANGE(0x05ffff4c, 0x05ffff4f) AM_READWRITE16(dma_chcr0_r, dma_chcr0_w, 0x0000ffff)
|
||||
map(0x05ffff40, 0x05ffff43).rw(this, FUNC(sh2a_device::dma_sar0_r), FUNC(sh2a_device::dma_sar0_w));
|
||||
map(0x05ffff44, 0x05ffff47).rw(this, FUNC(sh2a_device::dma_dar0_r), FUNC(sh2a_device::dma_dar0_w));
|
||||
map(0x05ffff48, 0x05ffff49).rw(this, FUNC(sh2a_device::dmaor_r), FUNC(sh2a_device::dmaor_w));
|
||||
map(0x05ffff4a, 0x05ffff4b).rw(this, FUNC(sh2a_device::dma_tcr0_r), FUNC(sh2a_device::dma_tcr0_w));
|
||||
map(0x05ffff4e, 0x05ffff4f).rw(this, FUNC(sh2a_device::dma_chcr0_r), FUNC(sh2a_device::dma_chcr0_w));
|
||||
// AM_RANGE(0x07000000, 0x070003ff) AM_RAM AM_SHARE("oram")// on-chip RAM, actually at 0xf000000 (1 kb)
|
||||
// AM_RANGE(0x0f000000, 0x0f0003ff) AM_RAM AM_SHARE("oram")// on-chip RAM, actually at 0xf000000 (1 kb)
|
||||
ADDRESS_MAP_END
|
||||
}
|
||||
|
||||
ADDRESS_MAP_START(sh1_device::sh7032_map)
|
||||
void sh1_device::sh7032_map(address_map &map)
|
||||
{
|
||||
// fall-back
|
||||
AM_RANGE(0x05fffe00, 0x05ffffff) AM_READWRITE16(sh7032_r,sh7032_w,0xffffffff) // SH-7032H internal i/o
|
||||
ADDRESS_MAP_END
|
||||
map(0x05fffe00, 0x05ffffff).rw(this, FUNC(sh1_device::sh7032_r), FUNC(sh1_device::sh7032_w)); // SH-7032H internal i/o
|
||||
}
|
||||
|
||||
sh2_device::sh2_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
|
||||
: sh2_device(mconfig, SH2, tag, owner, clock, CPU_TYPE_SH2, address_map_constructor(FUNC(sh2_device::sh7604_map), this), 32)
|
||||
|
||||
@ -43,30 +43,33 @@ DEFINE_DEVICE_TYPE(SH4BE, sh4be_device, "sh4be", "Hitachi SH-4 (big)")
|
||||
|
||||
#if 0
|
||||
/*When OC index mode is off (CCR.OIX = 0)*/
|
||||
ADDRESS_MAP_START(sh4_base_device::sh4_internal_map)
|
||||
AM_RANGE(0x1C000000, 0x1C000FFF) AM_RAM AM_MIRROR(0x03FFD000)
|
||||
AM_RANGE(0x1C002000, 0x1C002FFF) AM_RAM AM_MIRROR(0x03FFD000)
|
||||
AM_RANGE(0xE0000000, 0xE000003F) AM_RAM AM_MIRROR(0x03FFFFC0)
|
||||
ADDRESS_MAP_END
|
||||
void sh4_base_device::sh4_internal_map(address_map &map)
|
||||
{
|
||||
map(0x1C000000, 0x1C000FFF).ram().mirror(0x03FFD000);
|
||||
map(0x1C002000, 0x1C002FFF).ram().mirror(0x03FFD000);
|
||||
map(0xE0000000, 0xE000003F).ram().mirror(0x03FFFFC0);
|
||||
}
|
||||
#endif
|
||||
|
||||
/*When OC index mode is on (CCR.OIX = 1)*/
|
||||
ADDRESS_MAP_START(sh4_base_device::sh4_internal_map)
|
||||
AM_RANGE(0x1C000000, 0x1C000FFF) AM_RAM AM_MIRROR(0x01FFF000)
|
||||
AM_RANGE(0x1E000000, 0x1E000FFF) AM_RAM AM_MIRROR(0x01FFF000)
|
||||
AM_RANGE(0xE0000000, 0xE000003F) AM_RAM AM_MIRROR(0x03FFFFC0) // todo: store queues should be write only on DC's SH4, executing PREFM shouldn't cause an actual memory read access!
|
||||
void sh4_base_device::sh4_internal_map(address_map &map)
|
||||
{
|
||||
map(0x1C000000, 0x1C000FFF).ram().mirror(0x01FFF000);
|
||||
map(0x1E000000, 0x1E000FFF).ram().mirror(0x01FFF000);
|
||||
map(0xE0000000, 0xE000003F).ram().mirror(0x03FFFFC0); // todo: store queues should be write only on DC's SH4, executing PREFM shouldn't cause an actual memory read access!
|
||||
|
||||
AM_RANGE(0xF6000000, 0xF6FFFFFF) AM_READWRITE(sh4_utlb_address_array_r,sh4_utlb_address_array_w)
|
||||
AM_RANGE(0xF7000000, 0xF77FFFFF) AM_READWRITE(sh4_utlb_data_array1_r,sh4_utlb_data_array1_w)
|
||||
AM_RANGE(0xF7800000, 0xF7FFFFFF) AM_READWRITE(sh4_utlb_data_array2_r,sh4_utlb_data_array2_w)
|
||||
map(0xF6000000, 0xF6FFFFFF).rw(this, FUNC(sh4_base_device::sh4_utlb_address_array_r), FUNC(sh4_base_device::sh4_utlb_address_array_w));
|
||||
map(0xF7000000, 0xF77FFFFF).rw(this, FUNC(sh4_base_device::sh4_utlb_data_array1_r), FUNC(sh4_base_device::sh4_utlb_data_array1_w));
|
||||
map(0xF7800000, 0xF7FFFFFF).rw(this, FUNC(sh4_base_device::sh4_utlb_data_array2_r), FUNC(sh4_base_device::sh4_utlb_data_array2_w));
|
||||
|
||||
AM_RANGE(0xFE000000, 0xFFFFFFFF) AM_READWRITE32(sh4_internal_r, sh4_internal_w, 0xffffffffffffffffU)
|
||||
ADDRESS_MAP_END
|
||||
map(0xFE000000, 0xFFFFFFFF).rw(this, FUNC(sh4_base_device::sh4_internal_r), FUNC(sh4_base_device::sh4_internal_w)).umask32(0xffffffff);
|
||||
}
|
||||
|
||||
ADDRESS_MAP_START(sh3_base_device::sh3_internal_map)
|
||||
AM_RANGE(SH3_LOWER_REGBASE, SH3_LOWER_REGEND) AM_READWRITE32(sh3_internal_r, sh3_internal_w, 0xffffffffffffffffU)
|
||||
AM_RANGE(SH3_UPPER_REGBASE, SH3_UPPER_REGEND) AM_READWRITE32(sh3_internal_high_r, sh3_internal_high_w, 0xffffffffffffffffU)
|
||||
ADDRESS_MAP_END
|
||||
void sh3_base_device::sh3_internal_map(address_map &map)
|
||||
{
|
||||
map(SH3_LOWER_REGBASE, SH3_LOWER_REGEND).rw(this, FUNC(sh3_base_device::sh3_internal_r), FUNC(sh3_base_device::sh3_internal_w));
|
||||
map(SH3_UPPER_REGBASE, SH3_UPPER_REGEND).rw(this, FUNC(sh3_base_device::sh3_internal_high_r), FUNC(sh3_base_device::sh3_internal_high_w));
|
||||
}
|
||||
|
||||
|
||||
sh34_base_device::sh34_base_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, endianness_t endianness, address_map_constructor internal)
|
||||
|
||||
@ -93,16 +93,17 @@ WRITE16_MEMBER(sh7604_bus_device::refresh_timer_constant_w)
|
||||
COMBINE_DATA(&m_rtcor);
|
||||
}
|
||||
|
||||
ADDRESS_MAP_START(sh7604_bus_device::bus_regs)
|
||||
AM_RANGE(0x00, 0x01) AM_READWRITE(bus_control_1_r, bus_control_1_w)
|
||||
AM_RANGE(0x02, 0x03) AM_READWRITE(bus_control_2_r, bus_control_2_w)
|
||||
AM_RANGE(0x04, 0x05) AM_READWRITE(wait_control_r, wait_control_w)
|
||||
AM_RANGE(0x06, 0x07) AM_READWRITE(memory_control_r, memory_control_w)
|
||||
AM_RANGE(0x08, 0x09) AM_READWRITE(refresh_timer_status_r, refresh_timer_control_w)
|
||||
AM_RANGE(0x0a, 0x0b) AM_READWRITE(refresh_timer_counter_r, refresh_timer_counter_w)
|
||||
AM_RANGE(0x0c, 0x0d) AM_READWRITE(refresh_timer_constant_r, refresh_timer_constant_w)
|
||||
void sh7604_bus_device::bus_regs(address_map &map)
|
||||
{
|
||||
map(0x00, 0x01).rw(this, FUNC(sh7604_bus_device::bus_control_1_r), FUNC(sh7604_bus_device::bus_control_1_w));
|
||||
map(0x02, 0x03).rw(this, FUNC(sh7604_bus_device::bus_control_2_r), FUNC(sh7604_bus_device::bus_control_2_w));
|
||||
map(0x04, 0x05).rw(this, FUNC(sh7604_bus_device::wait_control_r), FUNC(sh7604_bus_device::wait_control_w));
|
||||
map(0x06, 0x07).rw(this, FUNC(sh7604_bus_device::memory_control_r), FUNC(sh7604_bus_device::memory_control_w));
|
||||
map(0x08, 0x09).rw(this, FUNC(sh7604_bus_device::refresh_timer_status_r), FUNC(sh7604_bus_device::refresh_timer_control_w));
|
||||
map(0x0a, 0x0b).rw(this, FUNC(sh7604_bus_device::refresh_timer_counter_r), FUNC(sh7604_bus_device::refresh_timer_counter_w));
|
||||
map(0x0c, 0x0d).rw(this, FUNC(sh7604_bus_device::refresh_timer_constant_r), FUNC(sh7604_bus_device::refresh_timer_constant_w));
|
||||
// AM_RANGE(0x0e, 0x0f) unmapped, mirror?
|
||||
ADDRESS_MAP_END
|
||||
}
|
||||
|
||||
//-------------------------------------------------
|
||||
// sh7604_bus_device - constructor
|
||||
|
||||
@ -99,14 +99,15 @@ READ8_MEMBER(sh7604_sci_device::receive_data_r)
|
||||
return 0;
|
||||
}
|
||||
|
||||
ADDRESS_MAP_START(sh7604_sci_device::sci_regs)
|
||||
AM_RANGE(0x00, 0x00) AM_READWRITE(serial_mode_r, serial_mode_w)
|
||||
AM_RANGE(0x01, 0x01) AM_READWRITE(bitrate_r, bitrate_w)
|
||||
AM_RANGE(0x02, 0x02) AM_READWRITE(serial_control_r,serial_control_w)
|
||||
AM_RANGE(0x03, 0x03) AM_READWRITE(transmit_data_r, transmit_data_w)
|
||||
AM_RANGE(0x04, 0x04) AM_READWRITE(serial_status_r, serial_ack_w)
|
||||
AM_RANGE(0x05, 0x05) AM_READ(receive_data_r)
|
||||
ADDRESS_MAP_END
|
||||
void sh7604_sci_device::sci_regs(address_map &map)
|
||||
{
|
||||
map(0x00, 0x00).rw(this, FUNC(sh7604_sci_device::serial_mode_r), FUNC(sh7604_sci_device::serial_mode_w));
|
||||
map(0x01, 0x01).rw(this, FUNC(sh7604_sci_device::bitrate_r), FUNC(sh7604_sci_device::bitrate_w));
|
||||
map(0x02, 0x02).rw(this, FUNC(sh7604_sci_device::serial_control_r), FUNC(sh7604_sci_device::serial_control_w));
|
||||
map(0x03, 0x03).rw(this, FUNC(sh7604_sci_device::transmit_data_r), FUNC(sh7604_sci_device::transmit_data_w));
|
||||
map(0x04, 0x04).rw(this, FUNC(sh7604_sci_device::serial_status_r), FUNC(sh7604_sci_device::serial_ack_w));
|
||||
map(0x05, 0x05).r(this, FUNC(sh7604_sci_device::receive_data_r));
|
||||
}
|
||||
|
||||
//-------------------------------------------------
|
||||
// sh7604_sci_device - constructor
|
||||
|
||||
@ -27,12 +27,13 @@ DEFINE_DEVICE_TYPE(SH7604_WDT, sh7604_wdt_device, "sh7604wdt", "SH7604 Watchdog
|
||||
// LIVE DEVICE
|
||||
//**************************************************************************
|
||||
|
||||
ADDRESS_MAP_START(sh7604_wdt_device::wdt_regs)
|
||||
void sh7604_wdt_device::wdt_regs(address_map &map)
|
||||
{
|
||||
// AM_RANGE(0x00, 0x00) timer control/status
|
||||
// AM_RANGE(0x01, 0x01) timer counter
|
||||
// AM_RANGE(0x02, 0x02) write only, reset control register
|
||||
// AM_RANGE(0x03, 0x03) read status register, write reset status register
|
||||
ADDRESS_MAP_END
|
||||
}
|
||||
|
||||
//-------------------------------------------------
|
||||
// sh7604_wdt_device - constructor
|
||||
|
||||
@ -56,24 +56,26 @@ enum
|
||||
|
||||
DEFINE_DEVICE_TYPE(ADSP21062, adsp21062_device, "adsp21062", "Analog Devices ADSP21062 \"SHARC\"")
|
||||
|
||||
ADDRESS_MAP_START(adsp21062_device::internal_pgm)
|
||||
AM_RANGE(0x20000, 0x24fff) AM_READWRITE(pm0_r, pm0_w)
|
||||
AM_RANGE(0x28000, 0x2cfff) AM_READWRITE(pm1_r, pm1_w)
|
||||
AM_RANGE(0x30000, 0x34fff) AM_READWRITE(pm1_r, pm1_w)
|
||||
AM_RANGE(0x38000, 0x3cfff) AM_READWRITE(pm1_r, pm1_w)
|
||||
ADDRESS_MAP_END
|
||||
void adsp21062_device::internal_pgm(address_map &map)
|
||||
{
|
||||
map(0x20000, 0x24fff).rw(this, FUNC(adsp21062_device::pm0_r), FUNC(adsp21062_device::pm0_w));
|
||||
map(0x28000, 0x2cfff).rw(this, FUNC(adsp21062_device::pm1_r), FUNC(adsp21062_device::pm1_w));
|
||||
map(0x30000, 0x34fff).rw(this, FUNC(adsp21062_device::pm1_r), FUNC(adsp21062_device::pm1_w));
|
||||
map(0x38000, 0x3cfff).rw(this, FUNC(adsp21062_device::pm1_r), FUNC(adsp21062_device::pm1_w));
|
||||
}
|
||||
|
||||
ADDRESS_MAP_START(adsp21062_device::internal_data)
|
||||
AM_RANGE(0x00000, 0x000ff) AM_READWRITE(iop_r, iop_w)
|
||||
AM_RANGE(0x20000, 0x27fff) AM_RAM AM_SHARE("block0")
|
||||
AM_RANGE(0x28000, 0x2ffff) AM_RAM AM_SHARE("block1")
|
||||
AM_RANGE(0x30000, 0x37fff) AM_RAM AM_SHARE("block1")
|
||||
AM_RANGE(0x38000, 0x3ffff) AM_RAM AM_SHARE("block1")
|
||||
AM_RANGE(0x40000, 0x4ffff) AM_READWRITE(dmw0_r, dmw0_w)
|
||||
AM_RANGE(0x50000, 0x5ffff) AM_READWRITE(dmw1_r, dmw1_w)
|
||||
AM_RANGE(0x60000, 0x6ffff) AM_READWRITE(dmw1_r, dmw1_w)
|
||||
AM_RANGE(0x70000, 0x7ffff) AM_READWRITE(dmw1_r, dmw1_w)
|
||||
ADDRESS_MAP_END
|
||||
void adsp21062_device::internal_data(address_map &map)
|
||||
{
|
||||
map(0x00000, 0x000ff).rw(this, FUNC(adsp21062_device::iop_r), FUNC(adsp21062_device::iop_w));
|
||||
map(0x20000, 0x27fff).ram().share("block0");
|
||||
map(0x28000, 0x2ffff).ram().share("block1");
|
||||
map(0x30000, 0x37fff).ram().share("block1");
|
||||
map(0x38000, 0x3ffff).ram().share("block1");
|
||||
map(0x40000, 0x4ffff).rw(this, FUNC(adsp21062_device::dmw0_r), FUNC(adsp21062_device::dmw0_w));
|
||||
map(0x50000, 0x5ffff).rw(this, FUNC(adsp21062_device::dmw1_r), FUNC(adsp21062_device::dmw1_w));
|
||||
map(0x60000, 0x6ffff).rw(this, FUNC(adsp21062_device::dmw1_r), FUNC(adsp21062_device::dmw1_w));
|
||||
map(0x70000, 0x7ffff).rw(this, FUNC(adsp21062_device::dmw1_r), FUNC(adsp21062_device::dmw1_w));
|
||||
}
|
||||
|
||||
adsp21062_device::adsp21062_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
|
||||
: cpu_device(mconfig, ADSP21062, tag, owner, clock)
|
||||
|
||||
@ -21,16 +21,18 @@ DEFINE_DEVICE_TYPE(SM500, sm500_device, "sm500", "Sharp SM500") // 1.2K ROM, 4x1
|
||||
|
||||
|
||||
// internal memory maps
|
||||
ADDRESS_MAP_START(sm500_device::program_1_2k)
|
||||
AM_RANGE(0x000, 0x4bf) AM_ROM
|
||||
ADDRESS_MAP_END
|
||||
void sm500_device::program_1_2k(address_map &map)
|
||||
{
|
||||
map(0x000, 0x4bf).rom();
|
||||
}
|
||||
|
||||
ADDRESS_MAP_START(sm500_device::data_4x10x4)
|
||||
AM_RANGE(0x00, 0x09) AM_RAM
|
||||
AM_RANGE(0x10, 0x19) AM_RAM
|
||||
AM_RANGE(0x20, 0x29) AM_RAM
|
||||
AM_RANGE(0x30, 0x39) AM_RAM
|
||||
ADDRESS_MAP_END
|
||||
void sm500_device::data_4x10x4(address_map &map)
|
||||
{
|
||||
map(0x00, 0x09).ram();
|
||||
map(0x10, 0x19).ram();
|
||||
map(0x20, 0x29).ram();
|
||||
map(0x30, 0x39).ram();
|
||||
}
|
||||
|
||||
|
||||
// device definitions
|
||||
|
||||
@ -20,18 +20,20 @@ DEFINE_DEVICE_TYPE(SM510, sm510_device, "sm510", "Sharp SM510") // 2.7Kx8 ROM, 1
|
||||
|
||||
|
||||
// internal memory maps
|
||||
ADDRESS_MAP_START(sm510_device::program_2_7k)
|
||||
AM_RANGE(0x0000, 0x02bf) AM_ROM
|
||||
AM_RANGE(0x0400, 0x06bf) AM_ROM
|
||||
AM_RANGE(0x0800, 0x0abf) AM_ROM
|
||||
AM_RANGE(0x0c00, 0x0ebf) AM_ROM
|
||||
ADDRESS_MAP_END
|
||||
void sm510_device::program_2_7k(address_map &map)
|
||||
{
|
||||
map(0x0000, 0x02bf).rom();
|
||||
map(0x0400, 0x06bf).rom();
|
||||
map(0x0800, 0x0abf).rom();
|
||||
map(0x0c00, 0x0ebf).rom();
|
||||
}
|
||||
|
||||
ADDRESS_MAP_START(sm510_device::data_96_32x4)
|
||||
AM_RANGE(0x00, 0x5f) AM_RAM
|
||||
AM_RANGE(0x60, 0x6f) AM_RAM AM_SHARE("lcd_ram_a")
|
||||
AM_RANGE(0x70, 0x7f) AM_RAM AM_SHARE("lcd_ram_b")
|
||||
ADDRESS_MAP_END
|
||||
void sm510_device::data_96_32x4(address_map &map)
|
||||
{
|
||||
map(0x00, 0x5f).ram();
|
||||
map(0x60, 0x6f).ram().share("lcd_ram_a");
|
||||
map(0x70, 0x7f).ram().share("lcd_ram_b");
|
||||
}
|
||||
|
||||
|
||||
// device definitions
|
||||
|
||||
@ -25,22 +25,25 @@ DEFINE_DEVICE_TYPE(SM512, sm512_device, "sm512", "Sharp SM512") // 4Kx8 ROM, 128
|
||||
|
||||
|
||||
// internal memory maps
|
||||
ADDRESS_MAP_START(sm511_device::program_4k)
|
||||
AM_RANGE(0x0000, 0x0fff) AM_ROM
|
||||
ADDRESS_MAP_END
|
||||
void sm511_device::program_4k(address_map &map)
|
||||
{
|
||||
map(0x0000, 0x0fff).rom();
|
||||
}
|
||||
|
||||
ADDRESS_MAP_START(sm511_device::data_96_32x4)
|
||||
AM_RANGE(0x00, 0x5f) AM_RAM
|
||||
AM_RANGE(0x60, 0x6f) AM_RAM AM_SHARE("lcd_ram_a")
|
||||
AM_RANGE(0x70, 0x7f) AM_RAM AM_SHARE("lcd_ram_b")
|
||||
ADDRESS_MAP_END
|
||||
void sm511_device::data_96_32x4(address_map &map)
|
||||
{
|
||||
map(0x00, 0x5f).ram();
|
||||
map(0x60, 0x6f).ram().share("lcd_ram_a");
|
||||
map(0x70, 0x7f).ram().share("lcd_ram_b");
|
||||
}
|
||||
|
||||
ADDRESS_MAP_START(sm512_device::data_80_48x4)
|
||||
AM_RANGE(0x00, 0x4f) AM_RAM
|
||||
AM_RANGE(0x50, 0x5f) AM_RAM AM_SHARE("lcd_ram_c")
|
||||
AM_RANGE(0x60, 0x6f) AM_RAM AM_SHARE("lcd_ram_a")
|
||||
AM_RANGE(0x70, 0x7f) AM_RAM AM_SHARE("lcd_ram_b")
|
||||
ADDRESS_MAP_END
|
||||
void sm512_device::data_80_48x4(address_map &map)
|
||||
{
|
||||
map(0x00, 0x4f).ram();
|
||||
map(0x50, 0x5f).ram().share("lcd_ram_c");
|
||||
map(0x60, 0x6f).ram().share("lcd_ram_a");
|
||||
map(0x70, 0x7f).ram().share("lcd_ram_b");
|
||||
}
|
||||
|
||||
|
||||
// disasm
|
||||
|
||||
@ -23,14 +23,16 @@ DEFINE_DEVICE_TYPE(SM590, sm590_device, "sm590", "Sharp SM590") // 512x8 ROM, 32
|
||||
//DEFINE_DEVICE_TYPE(SM595, sm595_device, "sm595", "Sharp SM595") // 768x8 ROM, 32x4 RAM
|
||||
|
||||
// internal memory maps
|
||||
ADDRESS_MAP_START(sm590_device::program_1x128x4)
|
||||
AM_RANGE(0x000, 0x1ff) AM_ROM
|
||||
ADDRESS_MAP_END
|
||||
void sm590_device::program_1x128x4(address_map &map)
|
||||
{
|
||||
map(0x000, 0x1ff).rom();
|
||||
}
|
||||
|
||||
ADDRESS_MAP_START(sm590_device::data_16x2x4)
|
||||
AM_RANGE(0x00, 0x0f) AM_RAM
|
||||
AM_RANGE(0x10, 0x1f) AM_RAM
|
||||
ADDRESS_MAP_END
|
||||
void sm590_device::data_16x2x4(address_map &map)
|
||||
{
|
||||
map(0x00, 0x0f).ram();
|
||||
map(0x10, 0x1f).ram();
|
||||
}
|
||||
|
||||
// device definitions
|
||||
sm590_device::sm590_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
|
||||
|
||||
@ -22,23 +22,25 @@ DEFINE_DEVICE_TYPE(KB1013VK12, kb1013vk12_device, "kb1013vk1_2", "KB1013VK1-2")
|
||||
|
||||
|
||||
// internal memory maps
|
||||
ADDRESS_MAP_START(sm5a_device::program_1_8k)
|
||||
AM_RANGE(0x000, 0x6ff) AM_ROM
|
||||
AM_RANGE(0x700, 0x73f) AM_ROM AM_MIRROR(0x0c0)
|
||||
ADDRESS_MAP_END
|
||||
void sm5a_device::program_1_8k(address_map &map)
|
||||
{
|
||||
map(0x000, 0x6ff).rom();
|
||||
map(0x700, 0x73f).rom().mirror(0x0c0);
|
||||
}
|
||||
|
||||
ADDRESS_MAP_START(sm5a_device::data_5x13x4)
|
||||
AM_RANGE(0x00, 0x0b) AM_RAM
|
||||
AM_RANGE(0x0c, 0x0c) AM_RAM AM_MIRROR(0x03)
|
||||
AM_RANGE(0x10, 0x1b) AM_RAM
|
||||
AM_RANGE(0x1c, 0x1c) AM_RAM AM_MIRROR(0x03)
|
||||
AM_RANGE(0x20, 0x2b) AM_RAM
|
||||
AM_RANGE(0x2c, 0x2c) AM_RAM AM_MIRROR(0x03)
|
||||
AM_RANGE(0x30, 0x3b) AM_RAM
|
||||
AM_RANGE(0x3c, 0x3c) AM_RAM AM_MIRROR(0x03)
|
||||
AM_RANGE(0x40, 0x4b) AM_RAM AM_MIRROR(0x30)
|
||||
AM_RANGE(0x4c, 0x4c) AM_RAM AM_MIRROR(0x33)
|
||||
ADDRESS_MAP_END
|
||||
void sm5a_device::data_5x13x4(address_map &map)
|
||||
{
|
||||
map(0x00, 0x0b).ram();
|
||||
map(0x0c, 0x0c).ram().mirror(0x03);
|
||||
map(0x10, 0x1b).ram();
|
||||
map(0x1c, 0x1c).ram().mirror(0x03);
|
||||
map(0x20, 0x2b).ram();
|
||||
map(0x2c, 0x2c).ram().mirror(0x03);
|
||||
map(0x30, 0x3b).ram();
|
||||
map(0x3c, 0x3c).ram().mirror(0x03);
|
||||
map(0x40, 0x4b).ram().mirror(0x30);
|
||||
map(0x4c, 0x4c).ram().mirror(0x33);
|
||||
}
|
||||
|
||||
|
||||
// device definitions
|
||||
|
||||
@ -75,46 +75,47 @@
|
||||
|
||||
DEFINE_DEVICE_TYPE(TMP87PH40AN, tmp87ph40an_device, "tmp87ph40an", "Toshiba TMP87PH40AN")
|
||||
|
||||
ADDRESS_MAP_START(tlcs870_device::tmp87ph40an_mem)
|
||||
void tlcs870_device::tmp87ph40an_mem(address_map &map)
|
||||
{
|
||||
#if 0
|
||||
AM_RANGE(0x0000, 0x0000) AM_READWRITE(port0_r,port0_w)
|
||||
AM_RANGE(0x0001, 0x0001) AM_READWRITE(port1_r,port1_w)
|
||||
AM_RANGE(0x0002, 0x0002) AM_READWRITE(port2_r,port2_w)
|
||||
AM_RANGE(0x0003, 0x0003) AM_READWRITE(port3_r,port3_w)
|
||||
AM_RANGE(0x0004, 0x0004) AM_READWRITE(port4_r,port4_w)
|
||||
AM_RANGE(0x0005, 0x0005) AM_READWRITE(port5_r,port5_w)
|
||||
AM_RANGE(0x0006, 0x0006) AM_READWRITE(port6_r,port6_w)
|
||||
AM_RANGE(0x0007, 0x0007) AM_READWRITE(port7_r,port7_w)
|
||||
map(0x0000, 0x0000).rw(this, FUNC(tlcs870_device::port0_r), FUNC(tlcs870_device::port0_w));
|
||||
map(0x0001, 0x0001).rw(this, FUNC(tlcs870_device::port1_r), FUNC(tlcs870_device::port1_w));
|
||||
map(0x0002, 0x0002).rw(this, FUNC(tlcs870_device::port2_r), FUNC(tlcs870_device::port2_w));
|
||||
map(0x0003, 0x0003).rw(this, FUNC(tlcs870_device::port3_r), FUNC(tlcs870_device::port3_w));
|
||||
map(0x0004, 0x0004).rw(this, FUNC(tlcs870_device::port4_r), FUNC(tlcs870_device::port4_w));
|
||||
map(0x0005, 0x0005).rw(this, FUNC(tlcs870_device::port5_r), FUNC(tlcs870_device::port5_w));
|
||||
map(0x0006, 0x0006).rw(this, FUNC(tlcs870_device::port6_r), FUNC(tlcs870_device::port6_w));
|
||||
map(0x0007, 0x0007).rw(this, FUNC(tlcs870_device::port7_r), FUNC(tlcs870_device::port7_w));
|
||||
// 0x8 reserved
|
||||
// 0x9 reserved
|
||||
AM_RANGE(0x000a, 0x000a) AM_WRITE(p0cr_w) // Port 0 I/O control
|
||||
AM_RANGE(0x000b, 0x000b) AM_WRITE(p1cr_w) // Port 1 I/O control
|
||||
AM_RANGE(0x000c, 0x000c) AM_WRITE(p6cr_w) // Port 6 I/O control
|
||||
AM_RANGE(0x000d, 0x000d) AM_WRITE(p7cr_w) // Port 7 I/O control
|
||||
AM_RANGE(0x000e, 0x000e) AM_READWRITE(adccr_r,adccr_w) // A/D converter control
|
||||
AM_RANGE(0x000f, 0x000f) AM_READ(adcdr_r) // A/D converter result
|
||||
map(0x000a, 0x000a).w(this, FUNC(tlcs870_device::p0cr_w)); // Port 0 I/O control
|
||||
map(0x000b, 0x000b).w(this, FUNC(tlcs870_device::p1cr_w)); // Port 1 I/O control
|
||||
map(0x000c, 0x000c).w(this, FUNC(tlcs870_device::p6cr_w)); // Port 6 I/O control
|
||||
map(0x000d, 0x000d).w(this, FUNC(tlcs870_device::p7cr_w)); // Port 7 I/O control
|
||||
map(0x000e, 0x000e).rw(this, FUNC(tlcs870_device::adccr_r), FUNC(tlcs870_device::adccr_w)); // A/D converter control
|
||||
map(0x000f, 0x000f).r(this, FUNC(tlcs870_device::adcdr_r)); // A/D converter result
|
||||
|
||||
AM_RANGE(0x0010, 0x0010) AM_WRITE(treg1a_l_w) // Timer register 1A
|
||||
AM_RANGE(0x0011, 0x0011) AM_WRITE(treg1a_h_w) //
|
||||
AM_RANGE(0x0012, 0x0012) AM_READWRITE(treg1b_l_r, treg1b_l_w) // Timer register 1B
|
||||
AM_RANGE(0x0013, 0x0013) AM_READWRITE(treg1b_h_r, treg1b_h_w) //
|
||||
AM_RANGE(0x0014, 0x0014) AM_WRITE(tc1cr_w) // TC1 control
|
||||
AM_RANGE(0x0015, 0x0015) AM_WRITE(tc2cr_w) // TC2 control
|
||||
AM_RANGE(0x0016, 0x0016) AM_WRITE(treg2_l_w) // Timer register 2
|
||||
AM_RANGE(0x0017, 0x0017) AM_WRITE(treg2_h_w) //
|
||||
AM_RANGE(0x0018, 0x0018) AM_READWRITE(treg3a_r, treg3a_w) // Timer register 3A
|
||||
AM_RANGE(0x0019, 0x0019) AM_READ(treg3b_r) // Timer register 3B
|
||||
AM_RANGE(0x001a, 0x001a) AM_WRITE(tc3cr_w) // TC3 control
|
||||
AM_RANGE(0x001b, 0x001b) AM_READ(treg4_r) // Timer register 4
|
||||
AM_RANGE(0x001c, 0x001c) AM_WRITE(tc4cr_w) // TC4 control
|
||||
map(0x0010, 0x0010).w(this, FUNC(tlcs870_device::treg1a_l_w)); // Timer register 1A
|
||||
map(0x0011, 0x0011).w(this, FUNC(tlcs870_device::treg1a_h_w)); //
|
||||
map(0x0012, 0x0012).rw(this, FUNC(tlcs870_device::treg1b_l_r), FUNC(tlcs870_device::treg1b_l_w)); // Timer register 1B
|
||||
map(0x0013, 0x0013).rw(this, FUNC(tlcs870_device::treg1b_h_r), FUNC(tlcs870_device::treg1b_h_w)); //
|
||||
map(0x0014, 0x0014).w(this, FUNC(tlcs870_device::tc1cr_w)); // TC1 control
|
||||
map(0x0015, 0x0015).w(this, FUNC(tlcs870_device::tc2cr_w)); // TC2 control
|
||||
map(0x0016, 0x0016).w(this, FUNC(tlcs870_device::treg2_l_w)); // Timer register 2
|
||||
map(0x0017, 0x0017).w(this, FUNC(tlcs870_device::treg2_h_w)); //
|
||||
map(0x0018, 0x0018).rw(this, FUNC(tlcs870_device::treg3a_r), FUNC(tlcs870_device::treg3a_w)); // Timer register 3A
|
||||
map(0x0019, 0x0019).r(this, FUNC(tlcs870_device::treg3b_r)); // Timer register 3B
|
||||
map(0x001a, 0x001a).w(this, FUNC(tlcs870_device::tc3cr_w)); // TC3 control
|
||||
map(0x001b, 0x001b).r(this, FUNC(tlcs870_device::treg4_r)); // Timer register 4
|
||||
map(0x001c, 0x001c).w(this, FUNC(tlcs870_device::tc4cr_w)); // TC4 control
|
||||
// 0x1d reserved
|
||||
// 0x1e reserved
|
||||
// 0x1f reserved
|
||||
|
||||
AM_RANGE(0x0020, 0x0020) AM_READWRITE(sio1sr_r, sio1cr1_w) // SIO1 status / SIO1 control
|
||||
AM_RANGE(0x0021, 0x0021) AM_WRITE(sio1cr2_w) // SIO1 control
|
||||
AM_RANGE(0x0022, 0x0022) AM_READWRITE(sio2sr_r, sio2cr1_w) // SIO2 status / SIO2 control
|
||||
AM_RANGE(0x0023, 0x0023) AM_WRITE(sio2cr2_w) // SIO2 control
|
||||
map(0x0020, 0x0020).rw(this, FUNC(tlcs870_device::sio1sr_r), FUNC(tlcs870_device::sio1cr1_w)); // SIO1 status / SIO1 control
|
||||
map(0x0021, 0x0021).w(this, FUNC(tlcs870_device::sio1cr2_w)); // SIO1 control
|
||||
map(0x0022, 0x0022).rw(this, FUNC(tlcs870_device::sio2sr_r), FUNC(tlcs870_device::sio2cr1_w)); // SIO2 status / SIO2 control
|
||||
map(0x0023, 0x0023).w(this, FUNC(tlcs870_device::sio2cr2_w)); // SIO2 control
|
||||
// 0x24 reserved
|
||||
// 0x25 reserved
|
||||
// 0x26 reserved
|
||||
@ -132,28 +133,28 @@ ADDRESS_MAP_START(tlcs870_device::tmp87ph40an_mem)
|
||||
// 0x31 reserved
|
||||
// 0x32 reserved
|
||||
// 0x33 reserved
|
||||
AM_RANGE(0x0034, 0x0034) AM_WRITE(wdtcr1_w) // WDT control
|
||||
AM_RANGE(0x0035, 0x0035) AM_WRITE(wdtcr2_w) //
|
||||
map(0x0034, 0x0034).w(this, FUNC(tlcs870_device::wdtcr1_w)); // WDT control
|
||||
map(0x0035, 0x0035).w(this, FUNC(tlcs870_device::wdtcr2_w)); //
|
||||
|
||||
AM_RANGE(0x0036, 0x0036) AM_READWRITE(tbtcr_r, tbtcr_w) // TBT / TG / DVO control
|
||||
AM_RANGE(0x0037, 0x0037) AM_READWRITE(eintcr_r, eintcr_w) // External interrupt control
|
||||
map(0x0036, 0x0036).rw(this, FUNC(tlcs870_device::tbtcr_r), FUNC(tlcs870_device::tbtcr_w)); // TBT / TG / DVO control
|
||||
map(0x0037, 0x0037).rw(this, FUNC(tlcs870_device::eintcr_r), FUNC(tlcs870_device::eintcr_w)); // External interrupt control
|
||||
|
||||
AM_RANGE(0x0038, 0x0038) AM_READWRITE(syscr1_r, syscr1_w) // System Control
|
||||
AM_RANGE(0x0039, 0x0039) AM_READWRITE(syscr2_r, syscr2_w) //
|
||||
map(0x0038, 0x0038).rw(this, FUNC(tlcs870_device::syscr1_r), FUNC(tlcs870_device::syscr1_w)); // System Control
|
||||
map(0x0039, 0x0039).rw(this, FUNC(tlcs870_device::syscr2_r), FUNC(tlcs870_device::syscr2_w)); //
|
||||
|
||||
AM_RANGE(0x003a, 0x003a) AM_READWRITE(eir_l_r, eir_l_w) // Interrupt enable register
|
||||
AM_RANGE(0x003b, 0x003b) AM_READWRITE(eir_h_r, eir_h_w) //
|
||||
map(0x003a, 0x003a).rw(this, FUNC(tlcs870_device::eir_l_r), FUNC(tlcs870_device::eir_l_w)); // Interrupt enable register
|
||||
map(0x003b, 0x003b).rw(this, FUNC(tlcs870_device::eir_h_r), FUNC(tlcs870_device::eir_h_w)); //
|
||||
|
||||
AM_RANGE(0x003c, 0x003c) AM_READWRITE(il_l_r, il_l_w) // Interrupt latch
|
||||
AM_RANGE(0x003d, 0x003d) AM_READWRITE(il_h_r, il_h_w) //
|
||||
map(0x003c, 0x003c).rw(this, FUNC(tlcs870_device::il_l_r), FUNC(tlcs870_device::il_l_w)); // Interrupt latch
|
||||
map(0x003d, 0x003d).rw(this, FUNC(tlcs870_device::il_h_r), FUNC(tlcs870_device::il_h_w)); //
|
||||
// 0x3e reserved
|
||||
AM_RANGE(0x003f, 0x003f) AM_READWRITE(psw_r, rbs_w) // Program status word / Register bank selector
|
||||
map(0x003f, 0x003f).rw(this, FUNC(tlcs870_device::psw_r), FUNC(tlcs870_device::rbs_w)); // Program status word / Register bank selector
|
||||
#endif
|
||||
|
||||
AM_RANGE(0x0040, 0x023f) AM_RAM AM_SHARE("intram") // register banks + internal RAM, not, code execution NOT allowed here
|
||||
AM_RANGE(0x0f80, 0x0fff) AM_RAM // DBR
|
||||
AM_RANGE(0xc000, 0xffff) AM_ROM
|
||||
ADDRESS_MAP_END
|
||||
map(0x0040, 0x023f).ram().share("intram"); // register banks + internal RAM, not, code execution NOT allowed here
|
||||
map(0x0f80, 0x0fff).ram(); // DBR
|
||||
map(0xc000, 0xffff).rom();
|
||||
}
|
||||
|
||||
|
||||
tlcs870_device::tlcs870_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor program_map)
|
||||
|
||||
@ -41,35 +41,40 @@ enum e_ir
|
||||
};
|
||||
|
||||
|
||||
ADDRESS_MAP_START(tlcs90_device::tmp90840_mem)
|
||||
AM_RANGE( 0x0000, 0x1fff ) AM_ROM // 8KB ROM (internal)
|
||||
AM_RANGE( 0xfec0, 0xffbf ) AM_RAM // 256b RAM (internal)
|
||||
AM_RANGE( T90_IOBASE, T90_IOBASE+47 ) AM_READWRITE( t90_internal_registers_r, t90_internal_registers_w )
|
||||
ADDRESS_MAP_END
|
||||
void tlcs90_device::tmp90840_mem(address_map &map)
|
||||
{
|
||||
map(0x0000, 0x1fff).rom(); // 8KB ROM (internal)
|
||||
map(0xfec0, 0xffbf).ram(); // 256b RAM (internal)
|
||||
map(T90_IOBASE, T90_IOBASE+47).rw(this, FUNC(tlcs90_device::t90_internal_registers_r), FUNC(tlcs90_device::t90_internal_registers_w));
|
||||
}
|
||||
|
||||
ADDRESS_MAP_START(tlcs90_device::tmp90841_mem)
|
||||
void tlcs90_device::tmp90841_mem(address_map &map)
|
||||
{
|
||||
// AM_RANGE( 0x0000, 0x1fff ) AM_ROM // rom-less
|
||||
AM_RANGE( 0xfec0, 0xffbf ) AM_RAM // 256b RAM (internal)
|
||||
AM_RANGE( T90_IOBASE, T90_IOBASE+47 ) AM_READWRITE( t90_internal_registers_r, t90_internal_registers_w )
|
||||
ADDRESS_MAP_END
|
||||
map(0xfec0, 0xffbf).ram(); // 256b RAM (internal)
|
||||
map(T90_IOBASE, T90_IOBASE+47).rw(this, FUNC(tlcs90_device::t90_internal_registers_r), FUNC(tlcs90_device::t90_internal_registers_w));
|
||||
}
|
||||
|
||||
ADDRESS_MAP_START(tlcs90_device::tmp91640_mem)
|
||||
AM_RANGE( 0x0000, 0x3fff ) AM_ROM // 16KB ROM (internal)
|
||||
AM_RANGE( 0xfdc0, 0xffbf ) AM_RAM // 512b RAM (internal)
|
||||
AM_RANGE( T90_IOBASE, T90_IOBASE+47 ) AM_READWRITE( t90_internal_registers_r, t90_internal_registers_w )
|
||||
ADDRESS_MAP_END
|
||||
void tlcs90_device::tmp91640_mem(address_map &map)
|
||||
{
|
||||
map(0x0000, 0x3fff).rom(); // 16KB ROM (internal)
|
||||
map(0xfdc0, 0xffbf).ram(); // 512b RAM (internal)
|
||||
map(T90_IOBASE, T90_IOBASE+47).rw(this, FUNC(tlcs90_device::t90_internal_registers_r), FUNC(tlcs90_device::t90_internal_registers_w));
|
||||
}
|
||||
|
||||
ADDRESS_MAP_START(tlcs90_device::tmp91641_mem)
|
||||
void tlcs90_device::tmp91641_mem(address_map &map)
|
||||
{
|
||||
// AM_RANGE( 0x0000, 0x3fff ) AM_ROM // rom-less
|
||||
AM_RANGE( 0xfdc0, 0xffbf ) AM_RAM // 512b RAM (internal)
|
||||
AM_RANGE( T90_IOBASE, T90_IOBASE+47 ) AM_READWRITE( t90_internal_registers_r, t90_internal_registers_w )
|
||||
ADDRESS_MAP_END
|
||||
map(0xfdc0, 0xffbf).ram(); // 512b RAM (internal)
|
||||
map(T90_IOBASE, T90_IOBASE+47).rw(this, FUNC(tlcs90_device::t90_internal_registers_r), FUNC(tlcs90_device::t90_internal_registers_w));
|
||||
}
|
||||
|
||||
ADDRESS_MAP_START(tlcs90_device::tmp90ph44_mem)
|
||||
AM_RANGE( 0x0000, 0x3fff ) AM_ROM // 16KB PROM (internal)
|
||||
AM_RANGE( 0xfdc0, 0xffbf ) AM_RAM // 512b RAM (internal)
|
||||
AM_RANGE( T90_IOBASE, T90_IOBASE+55 ) AM_READWRITE( t90_internal_registers_r, t90_internal_registers_w ) // TODO: has 8 more registers
|
||||
ADDRESS_MAP_END
|
||||
void tlcs90_device::tmp90ph44_mem(address_map &map)
|
||||
{
|
||||
map(0x0000, 0x3fff).rom(); // 16KB PROM (internal)
|
||||
map(0xfdc0, 0xffbf).ram(); // 512b RAM (internal)
|
||||
map(T90_IOBASE, T90_IOBASE+55).rw(this, FUNC(tlcs90_device::t90_internal_registers_r), FUNC(tlcs90_device::t90_internal_registers_w)); // TODO: has 8 more registers
|
||||
}
|
||||
|
||||
|
||||
tlcs90_device::tlcs90_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor program_map)
|
||||
|
||||
@ -25,22 +25,26 @@ DEFINE_DEVICE_TYPE(TMP95C061, tmp95c061_device, "tmp95c061", "Toshiba TMP95C061"
|
||||
DEFINE_DEVICE_TYPE(TMP95C063, tmp95c063_device, "tmp95c063", "Toshiba TMP95C063")
|
||||
|
||||
|
||||
ADDRESS_MAP_START(tmp95c061_device::tmp95c061_mem8)
|
||||
AM_RANGE( 0x000000, 0x00007f ) AM_READWRITE( internal_r, internal_w )
|
||||
ADDRESS_MAP_END
|
||||
void tmp95c061_device::tmp95c061_mem8(address_map &map)
|
||||
{
|
||||
map(0x000000, 0x00007f).rw(this, FUNC(tmp95c061_device::internal_r), FUNC(tmp95c061_device::internal_w));
|
||||
}
|
||||
|
||||
ADDRESS_MAP_START(tmp95c061_device::tmp95c061_mem16)
|
||||
AM_RANGE( 0x000000, 0x00007f ) AM_READWRITE8( internal_r, internal_w, 0xffff )
|
||||
ADDRESS_MAP_END
|
||||
void tmp95c061_device::tmp95c061_mem16(address_map &map)
|
||||
{
|
||||
map(0x000000, 0x00007f).rw(this, FUNC(tmp95c061_device::internal_r), FUNC(tmp95c061_device::internal_w));
|
||||
}
|
||||
|
||||
|
||||
ADDRESS_MAP_START(tmp95c063_device::tmp95c063_mem8)
|
||||
AM_RANGE( 0x000000, 0x00009f ) AM_READWRITE( internal_r, internal_w )
|
||||
ADDRESS_MAP_END
|
||||
void tmp95c063_device::tmp95c063_mem8(address_map &map)
|
||||
{
|
||||
map(0x000000, 0x00009f).rw(this, FUNC(tmp95c063_device::internal_r), FUNC(tmp95c063_device::internal_w));
|
||||
}
|
||||
|
||||
ADDRESS_MAP_START(tmp95c063_device::tmp95c063_mem16)
|
||||
AM_RANGE( 0x000000, 0x00009f ) AM_READWRITE8( internal_r, internal_w, 0xffff )
|
||||
ADDRESS_MAP_END
|
||||
void tmp95c063_device::tmp95c063_mem16(address_map &map)
|
||||
{
|
||||
map(0x000000, 0x00009f).rw(this, FUNC(tmp95c063_device::internal_r), FUNC(tmp95c063_device::internal_w));
|
||||
}
|
||||
|
||||
|
||||
tlcs900h_device::tlcs900h_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock)
|
||||
|
||||
@ -31,14 +31,16 @@ DEFINE_DEVICE_TYPE(TMS1980, tms1980_cpu_device, "tms1980", "Texas Instruments TM
|
||||
|
||||
|
||||
// internal memory maps
|
||||
ADDRESS_MAP_START(tms0980_cpu_device::program_11bit_9)
|
||||
AM_RANGE(0x000, 0x7ff) AM_ROM
|
||||
ADDRESS_MAP_END
|
||||
void tms0980_cpu_device::program_11bit_9(address_map &map)
|
||||
{
|
||||
map(0x000, 0x7ff).rom();
|
||||
}
|
||||
|
||||
ADDRESS_MAP_START(tms0980_cpu_device::data_144x4)
|
||||
AM_RANGE(0x00, 0x7f) AM_RAM
|
||||
AM_RANGE(0x80, 0x8f) AM_RAM AM_MIRROR(0x70) // DAM
|
||||
ADDRESS_MAP_END
|
||||
void tms0980_cpu_device::data_144x4(address_map &map)
|
||||
{
|
||||
map(0x00, 0x7f).ram();
|
||||
map(0x80, 0x8f).ram().mirror(0x70); // DAM
|
||||
}
|
||||
|
||||
|
||||
// device definitions
|
||||
|
||||
@ -37,22 +37,26 @@ DEFINE_DEVICE_TYPE(MC141200, mc141200_cpu_device, "mc141200", "Motorola MC141200
|
||||
|
||||
|
||||
// internal memory maps
|
||||
ADDRESS_MAP_START(tms1000_cpu_device::program_10bit_8)
|
||||
AM_RANGE(0x000, 0x3ff) AM_ROM
|
||||
ADDRESS_MAP_END
|
||||
void tms1000_cpu_device::program_10bit_8(address_map &map)
|
||||
{
|
||||
map(0x000, 0x3ff).rom();
|
||||
}
|
||||
|
||||
ADDRESS_MAP_START(tms1000_cpu_device::data_64x4)
|
||||
AM_RANGE(0x00, 0x3f) AM_RAM
|
||||
ADDRESS_MAP_END
|
||||
void tms1000_cpu_device::data_64x4(address_map &map)
|
||||
{
|
||||
map(0x00, 0x3f).ram();
|
||||
}
|
||||
|
||||
ADDRESS_MAP_START(tms1000_cpu_device::program_9bit_8)
|
||||
AM_RANGE(0x000, 0x1ff) AM_MIRROR(0x200) AM_ROM
|
||||
ADDRESS_MAP_END
|
||||
void tms1000_cpu_device::program_9bit_8(address_map &map)
|
||||
{
|
||||
map(0x000, 0x1ff).mirror(0x200).rom();
|
||||
}
|
||||
|
||||
ADDRESS_MAP_START(tms1000_cpu_device::data_32x4)
|
||||
AM_RANGE(0x00, 0x3f) AM_RAM
|
||||
AM_RANGE(0x08, 0x0f) AM_MIRROR(0x30) AM_NOP // override
|
||||
ADDRESS_MAP_END
|
||||
void tms1000_cpu_device::data_32x4(address_map &map)
|
||||
{
|
||||
map(0x00, 0x3f).ram();
|
||||
map(0x08, 0x0f).mirror(0x30).noprw(); // override
|
||||
}
|
||||
|
||||
|
||||
// device definitions
|
||||
|
||||
@ -27,9 +27,10 @@ DEFINE_DEVICE_TYPE(TMS1670, tms1670_cpu_device, "tms1670", "Texas Instruments TM
|
||||
|
||||
|
||||
// internal memory maps
|
||||
ADDRESS_MAP_START(tms1400_cpu_device::program_12bit_8)
|
||||
AM_RANGE(0x000, 0xfff) AM_ROM
|
||||
ADDRESS_MAP_END
|
||||
void tms1400_cpu_device::program_12bit_8(address_map &map)
|
||||
{
|
||||
map(0x000, 0xfff).rom();
|
||||
}
|
||||
|
||||
|
||||
// device definitions
|
||||
|
||||
@ -83,19 +83,21 @@ DEFINE_DEVICE_TYPE(TMS32016, tms32016_device, "tms32016", "Texas Instruments TMS
|
||||
* TMS32010 Internal Memory Map
|
||||
****************************************************************************/
|
||||
|
||||
ADDRESS_MAP_START(tms32010_device::tms32010_ram)
|
||||
AM_RANGE(0x00, 0x7f) AM_RAM /* Page 0 */
|
||||
AM_RANGE(0x80, 0x8f) AM_RAM /* Page 1 */
|
||||
ADDRESS_MAP_END
|
||||
void tms32010_device::tms32010_ram(address_map &map)
|
||||
{
|
||||
map(0x00, 0x7f).ram(); /* Page 0 */
|
||||
map(0x80, 0x8f).ram(); /* Page 1 */
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* TMS32015/6 Internal Memory Map
|
||||
****************************************************************************/
|
||||
|
||||
ADDRESS_MAP_START(tms32010_device::tms32015_ram)
|
||||
AM_RANGE(0x00, 0x7f) AM_RAM /* Page 0 */
|
||||
AM_RANGE(0x80, 0xff) AM_RAM /* Page 1 */
|
||||
ADDRESS_MAP_END
|
||||
void tms32010_device::tms32015_ram(address_map &map)
|
||||
{
|
||||
map(0x00, 0x7f).ram(); /* Page 0 */
|
||||
map(0x80, 0xff).ram(); /* Page 1 */
|
||||
}
|
||||
|
||||
|
||||
tms32010_device::tms32010_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
|
||||
|
||||
@ -187,30 +187,32 @@ Table 3-2. TMS32025/26 Memory Blocks
|
||||
DEFINE_DEVICE_TYPE(TMS32025, tms32025_device, "tms32025", "Texas Instruments TMS32025")
|
||||
DEFINE_DEVICE_TYPE(TMS32026, tms32026_device, "tms32026", "Texas Instruments TMS32026")
|
||||
|
||||
ADDRESS_MAP_START(tms32025_device::tms32025_data)
|
||||
AM_RANGE(0x0000, 0x0000) AM_READWRITE(drr_r, drr_w)
|
||||
AM_RANGE(0x0001, 0x0001) AM_READWRITE(dxr_r, dxr_w)
|
||||
AM_RANGE(0x0002, 0x0002) AM_READWRITE(tim_r, tim_w)
|
||||
AM_RANGE(0x0003, 0x0003) AM_READWRITE(prd_r, prd_w)
|
||||
AM_RANGE(0x0004, 0x0004) AM_READWRITE(imr_r, imr_w)
|
||||
AM_RANGE(0x0005, 0x0005) AM_READWRITE(greg_r, greg_w)
|
||||
AM_RANGE(0x0060, 0x007f) AM_RAM AM_SHARE("b2")
|
||||
AM_RANGE(0x0200, 0x02ff) AM_RAM AM_SHARE("b0")
|
||||
AM_RANGE(0x0300, 0x03ff) AM_RAM AM_SHARE("b1")
|
||||
ADDRESS_MAP_END
|
||||
void tms32025_device::tms32025_data(address_map &map)
|
||||
{
|
||||
map(0x0000, 0x0000).rw(this, FUNC(tms32025_device::drr_r), FUNC(tms32025_device::drr_w));
|
||||
map(0x0001, 0x0001).rw(this, FUNC(tms32025_device::dxr_r), FUNC(tms32025_device::dxr_w));
|
||||
map(0x0002, 0x0002).rw(this, FUNC(tms32025_device::tim_r), FUNC(tms32025_device::tim_w));
|
||||
map(0x0003, 0x0003).rw(this, FUNC(tms32025_device::prd_r), FUNC(tms32025_device::prd_w));
|
||||
map(0x0004, 0x0004).rw(this, FUNC(tms32025_device::imr_r), FUNC(tms32025_device::imr_w));
|
||||
map(0x0005, 0x0005).rw(this, FUNC(tms32025_device::greg_r), FUNC(tms32025_device::greg_w));
|
||||
map(0x0060, 0x007f).ram().share("b2");
|
||||
map(0x0200, 0x02ff).ram().share("b0");
|
||||
map(0x0300, 0x03ff).ram().share("b1");
|
||||
}
|
||||
|
||||
ADDRESS_MAP_START(tms32025_device::tms32026_data)
|
||||
AM_RANGE(0x0000, 0x0000) AM_READWRITE(drr_r, drr_w)
|
||||
AM_RANGE(0x0001, 0x0001) AM_READWRITE(dxr_r, dxr_w)
|
||||
AM_RANGE(0x0002, 0x0002) AM_READWRITE(tim_r, tim_w)
|
||||
AM_RANGE(0x0003, 0x0003) AM_READWRITE(prd_r, prd_w)
|
||||
AM_RANGE(0x0004, 0x0004) AM_READWRITE(imr_r, imr_w)
|
||||
AM_RANGE(0x0005, 0x0005) AM_READWRITE(greg_r, greg_w)
|
||||
AM_RANGE(0x0060, 0x007f) AM_RAM AM_SHARE("b2")
|
||||
AM_RANGE(0x0200, 0x03ff) AM_RAM AM_SHARE("b0")
|
||||
AM_RANGE(0x0400, 0x05ff) AM_RAM AM_SHARE("b1")
|
||||
AM_RANGE(0x0600, 0x07ff) AM_RAM AM_SHARE("b3")
|
||||
ADDRESS_MAP_END
|
||||
void tms32025_device::tms32026_data(address_map &map)
|
||||
{
|
||||
map(0x0000, 0x0000).rw(this, FUNC(tms32025_device::drr_r), FUNC(tms32025_device::drr_w));
|
||||
map(0x0001, 0x0001).rw(this, FUNC(tms32025_device::dxr_r), FUNC(tms32025_device::dxr_w));
|
||||
map(0x0002, 0x0002).rw(this, FUNC(tms32025_device::tim_r), FUNC(tms32025_device::tim_w));
|
||||
map(0x0003, 0x0003).rw(this, FUNC(tms32025_device::prd_r), FUNC(tms32025_device::prd_w));
|
||||
map(0x0004, 0x0004).rw(this, FUNC(tms32025_device::imr_r), FUNC(tms32025_device::imr_w));
|
||||
map(0x0005, 0x0005).rw(this, FUNC(tms32025_device::greg_r), FUNC(tms32025_device::greg_w));
|
||||
map(0x0060, 0x007f).ram().share("b2");
|
||||
map(0x0200, 0x03ff).ram().share("b0");
|
||||
map(0x0400, 0x05ff).ram().share("b1");
|
||||
map(0x0600, 0x07ff).ram().share("b3");
|
||||
}
|
||||
|
||||
|
||||
tms32025_device::tms32025_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
|
||||
|
||||
@ -93,13 +93,15 @@ DEFINE_DEVICE_TYPE(TMS32032, tms32032_device, "tms32032", "Texas Instruments TMS
|
||||
|
||||
|
||||
// internal memory maps
|
||||
ADDRESS_MAP_START(tms32031_device::internal_32031)
|
||||
AM_RANGE(0x809800, 0x809fff) AM_RAM
|
||||
ADDRESS_MAP_END
|
||||
void tms32031_device::internal_32031(address_map &map)
|
||||
{
|
||||
map(0x809800, 0x809fff).ram();
|
||||
}
|
||||
|
||||
ADDRESS_MAP_START(tms32032_device::internal_32032)
|
||||
AM_RANGE(0x87fe00, 0x87ffff) AM_RAM
|
||||
ADDRESS_MAP_END
|
||||
void tms32032_device::internal_32032(address_map &map)
|
||||
{
|
||||
map(0x87fe00, 0x87ffff).ram();
|
||||
}
|
||||
|
||||
|
||||
// ROM definitions for the internal boot loader programs
|
||||
|
||||
@ -55,19 +55,21 @@ DEFINE_DEVICE_TYPE(TMS32053, tms32053_device, "tms32053", "Texas Instruments TMS
|
||||
* TMS32051 Internal memory map
|
||||
**************************************************************************/
|
||||
|
||||
ADDRESS_MAP_START(tms32051_device::tms32051_internal_pgm)
|
||||
void tms32051_device::tms32051_internal_pgm(address_map &map)
|
||||
{
|
||||
// AM_RANGE(0x0000, 0x1fff) AM_ROM // ROM TODO: is off-chip if MP/_MC = 0
|
||||
AM_RANGE(0x2000, 0x23ff) AM_RAM AM_SHARE("saram") // SARAM TODO: is off-chip if RAM bit = 0
|
||||
AM_RANGE(0xfe00, 0xffff) AM_RAM AM_SHARE("daram_b0") // DARAM B0 TODO: is off-chip if CNF = 0
|
||||
ADDRESS_MAP_END
|
||||
map(0x2000, 0x23ff).ram().share("saram"); // SARAM TODO: is off-chip if RAM bit = 0
|
||||
map(0xfe00, 0xffff).ram().share("daram_b0"); // DARAM B0 TODO: is off-chip if CNF = 0
|
||||
}
|
||||
|
||||
ADDRESS_MAP_START(tms32051_device::tms32051_internal_data)
|
||||
AM_RANGE(0x0000, 0x005f) AM_READWRITE(cpuregs_r, cpuregs_w)
|
||||
AM_RANGE(0x0060, 0x007f) AM_RAM // DARAM B2
|
||||
AM_RANGE(0x0100, 0x02ff) AM_RAM AM_SHARE("daram_b0") // DARAM B0 TODO: is unconnected if CNF = 1
|
||||
AM_RANGE(0x0300, 0x04ff) AM_RAM // DARAM B1
|
||||
AM_RANGE(0x0800, 0x0bff) AM_RAM AM_SHARE("saram") // SARAM TODO: is off-chip if OVLY = 0
|
||||
ADDRESS_MAP_END
|
||||
void tms32051_device::tms32051_internal_data(address_map &map)
|
||||
{
|
||||
map(0x0000, 0x005f).rw(this, FUNC(tms32051_device::cpuregs_r), FUNC(tms32051_device::cpuregs_w));
|
||||
map(0x0060, 0x007f).ram(); // DARAM B2
|
||||
map(0x0100, 0x02ff).ram().share("daram_b0"); // DARAM B0 TODO: is unconnected if CNF = 1
|
||||
map(0x0300, 0x04ff).ram(); // DARAM B1
|
||||
map(0x0800, 0x0bff).ram().share("saram"); // SARAM TODO: is off-chip if OVLY = 0
|
||||
}
|
||||
|
||||
|
||||
tms32051_device::tms32051_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor internal_pgm, address_map_constructor internal_data)
|
||||
@ -97,19 +99,21 @@ device_memory_interface::space_config_vector tms32051_device::memory_space_confi
|
||||
* TMS32053 Internal memory map
|
||||
**************************************************************************/
|
||||
|
||||
ADDRESS_MAP_START(tms32053_device::tms32053_internal_pgm)
|
||||
void tms32053_device::tms32053_internal_pgm(address_map &map)
|
||||
{
|
||||
// AM_RANGE(0x0000, 0x3fff) AM_ROM // ROM TODO: is off-chip if MP/_MC = 0
|
||||
AM_RANGE(0x4000, 0x4bff) AM_RAM AM_SHARE("saram") // SARAM TODO: is off-chip if RAM bit = 0
|
||||
AM_RANGE(0xfe00, 0xffff) AM_RAM AM_SHARE("daram_b0") // DARAM B0 TODO: is off-chip if CNF = 0
|
||||
ADDRESS_MAP_END
|
||||
map(0x4000, 0x4bff).ram().share("saram"); // SARAM TODO: is off-chip if RAM bit = 0
|
||||
map(0xfe00, 0xffff).ram().share("daram_b0"); // DARAM B0 TODO: is off-chip if CNF = 0
|
||||
}
|
||||
|
||||
ADDRESS_MAP_START(tms32053_device::tms32053_internal_data)
|
||||
AM_RANGE(0x0000, 0x005f) AM_READWRITE(cpuregs_r, cpuregs_w)
|
||||
AM_RANGE(0x0060, 0x007f) AM_RAM // DARAM B2
|
||||
AM_RANGE(0x0100, 0x02ff) AM_RAM AM_SHARE("daram_b0") // DARAM B0 TODO: is unconnected if CNF = 1
|
||||
AM_RANGE(0x0300, 0x04ff) AM_RAM // DARAM B1
|
||||
AM_RANGE(0x0800, 0x13ff) AM_RAM AM_SHARE("saram") // SARAM TODO: is off-chip if OVLY = 0
|
||||
ADDRESS_MAP_END
|
||||
void tms32053_device::tms32053_internal_data(address_map &map)
|
||||
{
|
||||
map(0x0000, 0x005f).rw(this, FUNC(tms32053_device::cpuregs_r), FUNC(tms32053_device::cpuregs_w));
|
||||
map(0x0060, 0x007f).ram(); // DARAM B2
|
||||
map(0x0100, 0x02ff).ram().share("daram_b0"); // DARAM B0 TODO: is unconnected if CNF = 1
|
||||
map(0x0300, 0x04ff).ram(); // DARAM B1
|
||||
map(0x0800, 0x13ff).ram().share("saram"); // SARAM TODO: is off-chip if OVLY = 0
|
||||
}
|
||||
|
||||
|
||||
tms32053_device::tms32053_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
|
||||
|
||||
@ -22,15 +22,16 @@ DEFINE_DEVICE_TYPE(TMS32082_PP, tms32082_pp_device, "tms32082_pp", "Texas Instru
|
||||
// Master Processor
|
||||
|
||||
// internal memory map
|
||||
ADDRESS_MAP_START(tms32082_mp_device::mp_internal_map)
|
||||
AM_RANGE(0x00000000, 0x00000fff) AM_RAM AM_SHARE("pp0_data0")
|
||||
AM_RANGE(0x00001000, 0x00001fff) AM_RAM AM_SHARE("pp1_data0")
|
||||
AM_RANGE(0x00008000, 0x00008fff) AM_RAM AM_SHARE("pp0_data1")
|
||||
AM_RANGE(0x00009000, 0x00009fff) AM_RAM AM_SHARE("pp1_data1")
|
||||
AM_RANGE(0x01000000, 0x01000fff) AM_RAM AM_SHARE("pp0_param")
|
||||
AM_RANGE(0x01001000, 0x01001fff) AM_RAM AM_SHARE("pp1_param")
|
||||
AM_RANGE(0x01010000, 0x010107ff) AM_READWRITE(mp_param_r, mp_param_w)
|
||||
ADDRESS_MAP_END
|
||||
void tms32082_mp_device::mp_internal_map(address_map &map)
|
||||
{
|
||||
map(0x00000000, 0x00000fff).ram().share("pp0_data0");
|
||||
map(0x00001000, 0x00001fff).ram().share("pp1_data0");
|
||||
map(0x00008000, 0x00008fff).ram().share("pp0_data1");
|
||||
map(0x00009000, 0x00009fff).ram().share("pp1_data1");
|
||||
map(0x01000000, 0x01000fff).ram().share("pp0_param");
|
||||
map(0x01001000, 0x01001fff).ram().share("pp1_param");
|
||||
map(0x01010000, 0x010107ff).rw(this, FUNC(tms32082_mp_device::mp_param_r), FUNC(tms32082_mp_device::mp_param_w));
|
||||
}
|
||||
|
||||
const uint32_t tms32082_mp_device::SHIFT_MASK[] =
|
||||
{
|
||||
@ -484,14 +485,15 @@ void tms32082_mp_device::execute_run()
|
||||
// Parallel Processor
|
||||
|
||||
// internal memory map
|
||||
ADDRESS_MAP_START(tms32082_pp_device::pp_internal_map)
|
||||
AM_RANGE(0x00000000, 0x00000fff) AM_RAM AM_SHARE("pp0_data0")
|
||||
AM_RANGE(0x00001000, 0x00001fff) AM_RAM AM_SHARE("pp1_data0")
|
||||
AM_RANGE(0x00008000, 0x00008fff) AM_RAM AM_SHARE("pp0_data1")
|
||||
AM_RANGE(0x00009000, 0x00009fff) AM_RAM AM_SHARE("pp1_data1")
|
||||
AM_RANGE(0x01000000, 0x01000fff) AM_RAM AM_SHARE("pp0_param")
|
||||
AM_RANGE(0x01001000, 0x01001fff) AM_RAM AM_SHARE("pp1_param")
|
||||
ADDRESS_MAP_END
|
||||
void tms32082_pp_device::pp_internal_map(address_map &map)
|
||||
{
|
||||
map(0x00000000, 0x00000fff).ram().share("pp0_data0");
|
||||
map(0x00001000, 0x00001fff).ram().share("pp1_data0");
|
||||
map(0x00008000, 0x00008fff).ram().share("pp0_data1");
|
||||
map(0x00009000, 0x00009fff).ram().share("pp1_data1");
|
||||
map(0x01000000, 0x01000fff).ram().share("pp0_param");
|
||||
map(0x01001000, 0x01001fff).ram().share("pp1_param");
|
||||
}
|
||||
|
||||
tms32082_pp_device::tms32082_pp_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
|
||||
: cpu_device(mconfig, TMS32082_PP, tag, owner, clock)
|
||||
|
||||
@ -17,9 +17,10 @@
|
||||
DEFINE_DEVICE_TYPE(TMS57002, tms57002_device, "tms57002", "Texas Instruments TMS57002 \"DASP\"")
|
||||
|
||||
// Can't use a DEVICE_ADDRESS_MAP, not yet anyway
|
||||
ADDRESS_MAP_START(tms57002_device::internal_pgm)
|
||||
AM_RANGE(0x00, 0xff) AM_RAM
|
||||
ADDRESS_MAP_END
|
||||
void tms57002_device::internal_pgm(address_map &map)
|
||||
{
|
||||
map(0x00, 0xff).ram();
|
||||
}
|
||||
|
||||
tms57002_device::tms57002_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
|
||||
: cpu_device(mconfig, TMS57002, tag, owner, clock)
|
||||
|
||||
@ -52,54 +52,62 @@ DEFINE_DEVICE_TYPE(TMS70C46, tms70c46_device, "tms70c46", "Texas Instruments TMS
|
||||
|
||||
|
||||
// internal memory maps
|
||||
ADDRESS_MAP_START(tms7000_device::tms7000_mem)
|
||||
AM_RANGE(0x0000, 0x007f) AM_RAM // 128 bytes internal RAM
|
||||
AM_RANGE(0x0080, 0x00ff) AM_READWRITE(tms7000_unmapped_rf_r, tms7000_unmapped_rf_w)
|
||||
AM_RANGE(0x0100, 0x010b) AM_READWRITE(tms7000_pf_r, tms7000_pf_w)
|
||||
AM_RANGE(0x0104, 0x0105) AM_WRITENOP // no port A write or ddr
|
||||
ADDRESS_MAP_END
|
||||
void tms7000_device::tms7000_mem(address_map &map)
|
||||
{
|
||||
map(0x0000, 0x007f).ram(); // 128 bytes internal RAM
|
||||
map(0x0080, 0x00ff).rw(this, FUNC(tms7000_device::tms7000_unmapped_rf_r), FUNC(tms7000_device::tms7000_unmapped_rf_w));
|
||||
map(0x0100, 0x010b).rw(this, FUNC(tms7000_device::tms7000_pf_r), FUNC(tms7000_device::tms7000_pf_w));
|
||||
map(0x0104, 0x0105).nopw(); // no port A write or ddr
|
||||
}
|
||||
|
||||
ADDRESS_MAP_START(tms7000_device::tms7001_mem)
|
||||
AM_RANGE(0x0000, 0x007f) AM_RAM // 128 bytes internal RAM
|
||||
AM_RANGE(0x0080, 0x00ff) AM_READWRITE(tms7000_unmapped_rf_r, tms7000_unmapped_rf_w)
|
||||
AM_RANGE(0x0100, 0x010b) AM_READWRITE(tms7000_pf_r, tms7000_pf_w)
|
||||
AM_RANGE(0x0110, 0x0117) AM_READWRITE(tms7002_pf_r, tms7002_pf_w)
|
||||
ADDRESS_MAP_END
|
||||
void tms7000_device::tms7001_mem(address_map &map)
|
||||
{
|
||||
map(0x0000, 0x007f).ram(); // 128 bytes internal RAM
|
||||
map(0x0080, 0x00ff).rw(this, FUNC(tms7000_device::tms7000_unmapped_rf_r), FUNC(tms7000_device::tms7000_unmapped_rf_w));
|
||||
map(0x0100, 0x010b).rw(this, FUNC(tms7000_device::tms7000_pf_r), FUNC(tms7000_device::tms7000_pf_w));
|
||||
map(0x0110, 0x0117).rw(this, FUNC(tms7000_device::tms7002_pf_r), FUNC(tms7000_device::tms7002_pf_w));
|
||||
}
|
||||
|
||||
ADDRESS_MAP_START(tms7000_device::tms7002_mem)
|
||||
AM_RANGE(0x0000, 0x00ff) AM_RAM // 256 bytes internal RAM
|
||||
AM_RANGE(0x0100, 0x010b) AM_READWRITE(tms7000_pf_r, tms7000_pf_w)
|
||||
AM_RANGE(0x0110, 0x0117) AM_READWRITE(tms7002_pf_r, tms7002_pf_w)
|
||||
ADDRESS_MAP_END
|
||||
void tms7000_device::tms7002_mem(address_map &map)
|
||||
{
|
||||
map(0x0000, 0x00ff).ram(); // 256 bytes internal RAM
|
||||
map(0x0100, 0x010b).rw(this, FUNC(tms7000_device::tms7000_pf_r), FUNC(tms7000_device::tms7000_pf_w));
|
||||
map(0x0110, 0x0117).rw(this, FUNC(tms7000_device::tms7002_pf_r), FUNC(tms7000_device::tms7002_pf_w));
|
||||
}
|
||||
|
||||
ADDRESS_MAP_START(tms7000_device::tms7020_mem)
|
||||
AM_IMPORT_FROM( tms7000_mem )
|
||||
AM_RANGE(0xf800, 0xffff) AM_ROM AM_REGION(DEVICE_SELF, 0) // 2kB internal ROM
|
||||
ADDRESS_MAP_END
|
||||
void tms7000_device::tms7020_mem(address_map &map)
|
||||
{
|
||||
tms7000_mem(map);
|
||||
map(0xf800, 0xffff).rom().region(DEVICE_SELF, 0); // 2kB internal ROM
|
||||
}
|
||||
|
||||
ADDRESS_MAP_START(tms7000_device::tms7040_mem)
|
||||
AM_IMPORT_FROM( tms7000_mem )
|
||||
AM_RANGE(0xf000, 0xffff) AM_ROM AM_REGION(DEVICE_SELF, 0) // 4kB internal ROM
|
||||
ADDRESS_MAP_END
|
||||
void tms7000_device::tms7040_mem(address_map &map)
|
||||
{
|
||||
tms7000_mem(map);
|
||||
map(0xf000, 0xffff).rom().region(DEVICE_SELF, 0); // 4kB internal ROM
|
||||
}
|
||||
|
||||
ADDRESS_MAP_START(tms7000_device::tms7041_mem)
|
||||
AM_IMPORT_FROM( tms7001_mem )
|
||||
AM_RANGE(0xf000, 0xffff) AM_ROM AM_REGION(DEVICE_SELF, 0)
|
||||
ADDRESS_MAP_END
|
||||
void tms7000_device::tms7041_mem(address_map &map)
|
||||
{
|
||||
tms7001_mem(map);
|
||||
map(0xf000, 0xffff).rom().region(DEVICE_SELF, 0);
|
||||
}
|
||||
|
||||
ADDRESS_MAP_START(tms7000_device::tms7042_mem)
|
||||
AM_IMPORT_FROM( tms7002_mem )
|
||||
AM_RANGE(0xf000, 0xffff) AM_ROM AM_REGION(DEVICE_SELF, 0)
|
||||
ADDRESS_MAP_END
|
||||
void tms7000_device::tms7042_mem(address_map &map)
|
||||
{
|
||||
tms7002_mem(map);
|
||||
map(0xf000, 0xffff).rom().region(DEVICE_SELF, 0);
|
||||
}
|
||||
|
||||
ADDRESS_MAP_START(tms70c46_device::tms70c46_mem)
|
||||
AM_IMPORT_FROM( tms7040_mem )
|
||||
AM_RANGE(0x010c, 0x010c) AM_READWRITE(e_bus_data_r, e_bus_data_w)
|
||||
AM_RANGE(0x010d, 0x010d) AM_NOP // ? always writes $FF before checking keyboard... maybe INT3 ack?
|
||||
AM_RANGE(0x010e, 0x010e) AM_READWRITE(dockbus_data_r, dockbus_data_w)
|
||||
AM_RANGE(0x010f, 0x010f) AM_READWRITE(dockbus_status_r, dockbus_status_w)
|
||||
AM_RANGE(0x0118, 0x0118) AM_READWRITE(control_r, control_w)
|
||||
ADDRESS_MAP_END
|
||||
void tms70c46_device::tms70c46_mem(address_map &map)
|
||||
{
|
||||
tms7040_mem(map);
|
||||
map(0x010c, 0x010c).rw(this, FUNC(tms70c46_device::e_bus_data_r), FUNC(tms70c46_device::e_bus_data_w));
|
||||
map(0x010d, 0x010d).noprw(); // ? always writes $FF before checking keyboard... maybe INT3 ack?
|
||||
map(0x010e, 0x010e).rw(this, FUNC(tms70c46_device::dockbus_data_r), FUNC(tms70c46_device::dockbus_data_w));
|
||||
map(0x010f, 0x010f).rw(this, FUNC(tms70c46_device::dockbus_status_r), FUNC(tms70c46_device::dockbus_status_w));
|
||||
map(0x0118, 0x0118).rw(this, FUNC(tms70c46_device::control_r), FUNC(tms70c46_device::control_w));
|
||||
}
|
||||
|
||||
|
||||
// device definitions
|
||||
|
||||
@ -40,24 +40,28 @@ DEFINE_DEVICE_TYPE(NEC_D552, upd552_cpu_device, "upd552", "NEC uPD552") // 42
|
||||
|
||||
|
||||
// internal memory maps
|
||||
ADDRESS_MAP_START(ucom4_cpu_device::program_1k)
|
||||
AM_RANGE(0x0000, 0x03ff) AM_ROM
|
||||
ADDRESS_MAP_END
|
||||
void ucom4_cpu_device::program_1k(address_map &map)
|
||||
{
|
||||
map(0x0000, 0x03ff).rom();
|
||||
}
|
||||
|
||||
ADDRESS_MAP_START(ucom4_cpu_device::program_2k)
|
||||
AM_RANGE(0x0000, 0x07ff) AM_ROM
|
||||
ADDRESS_MAP_END
|
||||
void ucom4_cpu_device::program_2k(address_map &map)
|
||||
{
|
||||
map(0x0000, 0x07ff).rom();
|
||||
}
|
||||
|
||||
|
||||
ADDRESS_MAP_START(ucom4_cpu_device::data_64x4)
|
||||
AM_RANGE(0x00, 0x3f) AM_RAM
|
||||
ADDRESS_MAP_END
|
||||
void ucom4_cpu_device::data_64x4(address_map &map)
|
||||
{
|
||||
map(0x00, 0x3f).ram();
|
||||
}
|
||||
|
||||
ADDRESS_MAP_START(ucom4_cpu_device::data_96x4)
|
||||
AM_RANGE(0x00, 0x3f) AM_RAM
|
||||
AM_RANGE(0x40, 0x4f) AM_RAM
|
||||
AM_RANGE(0x70, 0x7f) AM_RAM
|
||||
ADDRESS_MAP_END
|
||||
void ucom4_cpu_device::data_96x4(address_map &map)
|
||||
{
|
||||
map(0x00, 0x3f).ram();
|
||||
map(0x40, 0x4f).ram();
|
||||
map(0x70, 0x7f).ram();
|
||||
}
|
||||
|
||||
|
||||
// device definitions
|
||||
|
||||
@ -384,13 +384,15 @@ DEFINE_DEVICE_TYPE(UPD78C05, upd78c05_device, "upd78c05", "NEC uPD78C05")
|
||||
DEFINE_DEVICE_TYPE(UPD78C06, upd78c06_device, "upd78c06", "NEC uPD78C06")
|
||||
|
||||
|
||||
ADDRESS_MAP_START(upd7810_device::upd_internal_128_ram_map)
|
||||
AM_RANGE(0xff80, 0xffff) AM_RAM
|
||||
ADDRESS_MAP_END
|
||||
void upd7810_device::upd_internal_128_ram_map(address_map &map)
|
||||
{
|
||||
map(0xff80, 0xffff).ram();
|
||||
}
|
||||
|
||||
ADDRESS_MAP_START(upd7810_device::upd_internal_256_ram_map)
|
||||
AM_RANGE(0xff00, 0xffff) AM_RAM
|
||||
ADDRESS_MAP_END
|
||||
void upd7810_device::upd_internal_256_ram_map(address_map &map)
|
||||
{
|
||||
map(0xff00, 0xffff).ram();
|
||||
}
|
||||
|
||||
upd7810_device::upd7810_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor internal_map)
|
||||
: cpu_device(mconfig, type, tag, owner, clock)
|
||||
|
||||
@ -23,10 +23,11 @@
|
||||
|
||||
*/
|
||||
|
||||
ADDRESS_MAP_START(upd7810_device::upd_internal_4096_rom_map)
|
||||
AM_RANGE(0x0000, 0x0fff) AM_ROM
|
||||
AM_RANGE(0xff00, 0xffff) AM_RAM
|
||||
ADDRESS_MAP_END
|
||||
void upd7810_device::upd_internal_4096_rom_map(address_map &map)
|
||||
{
|
||||
map(0x0000, 0x0fff).rom();
|
||||
map(0xff00, 0xffff).ram();
|
||||
}
|
||||
|
||||
DEFINE_DEVICE_TYPE(UPD7811, upd7811_device, "upd78c11", "NEC uPD78C11")
|
||||
|
||||
|
||||
@ -165,13 +165,15 @@ DEFINE_DEVICE_TYPE(Z8681, z8681_device, "z8681", "Zilog Z8681")
|
||||
ADDRESS MAPS
|
||||
***************************************************************************/
|
||||
|
||||
ADDRESS_MAP_START(z8_device::program_2kb)
|
||||
AM_RANGE(0x0000, 0x07ff) AM_ROM
|
||||
ADDRESS_MAP_END
|
||||
void z8_device::program_2kb(address_map &map)
|
||||
{
|
||||
map(0x0000, 0x07ff).rom();
|
||||
}
|
||||
|
||||
ADDRESS_MAP_START(z8_device::program_4kb)
|
||||
AM_RANGE(0x0000, 0x0fff) AM_ROM
|
||||
ADDRESS_MAP_END
|
||||
void z8_device::program_4kb(address_map &map)
|
||||
{
|
||||
map(0x0000, 0x0fff).rom();
|
||||
}
|
||||
|
||||
|
||||
z8_device::z8_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, uint32_t rom_size, address_map_constructor map)
|
||||
|
||||
@ -15,20 +15,21 @@
|
||||
|
||||
DEFINE_DEVICE_TYPE(TMPZ84C011, tmpz84c011_device, "tmpz84c011", "Toshiba TMPZ84C011")
|
||||
|
||||
ADDRESS_MAP_START(tmpz84c011_device::tmpz84c011_internal_io_map)
|
||||
AM_RANGE(0x10, 0x13) AM_MIRROR(0xff00) AM_DEVREADWRITE("tmpz84c011_ctc", z80ctc_device, read, write)
|
||||
void tmpz84c011_device::tmpz84c011_internal_io_map(address_map &map)
|
||||
{
|
||||
map(0x10, 0x13).mirror(0xff00).rw("tmpz84c011_ctc", FUNC(z80ctc_device::read), FUNC(z80ctc_device::write));
|
||||
|
||||
AM_RANGE(0x50, 0x50) AM_MIRROR(0xff00) AM_READWRITE(tmpz84c011_pa_r, tmpz84c011_pa_w)
|
||||
AM_RANGE(0x51, 0x51) AM_MIRROR(0xff00) AM_READWRITE(tmpz84c011_pb_r, tmpz84c011_pb_w)
|
||||
AM_RANGE(0x52, 0x52) AM_MIRROR(0xff00) AM_READWRITE(tmpz84c011_pc_r, tmpz84c011_pc_w)
|
||||
AM_RANGE(0x30, 0x30) AM_MIRROR(0xff00) AM_READWRITE(tmpz84c011_pd_r, tmpz84c011_pd_w)
|
||||
AM_RANGE(0x40, 0x40) AM_MIRROR(0xff00) AM_READWRITE(tmpz84c011_pe_r, tmpz84c011_pe_w)
|
||||
AM_RANGE(0x54, 0x54) AM_MIRROR(0xff00) AM_READWRITE(tmpz84c011_dir_pa_r, tmpz84c011_dir_pa_w)
|
||||
AM_RANGE(0x55, 0x55) AM_MIRROR(0xff00) AM_READWRITE(tmpz84c011_dir_pb_r, tmpz84c011_dir_pb_w)
|
||||
AM_RANGE(0x56, 0x56) AM_MIRROR(0xff00) AM_READWRITE(tmpz84c011_dir_pc_r, tmpz84c011_dir_pc_w)
|
||||
AM_RANGE(0x34, 0x34) AM_MIRROR(0xff00) AM_READWRITE(tmpz84c011_dir_pd_r, tmpz84c011_dir_pd_w)
|
||||
AM_RANGE(0x44, 0x44) AM_MIRROR(0xff00) AM_READWRITE(tmpz84c011_dir_pe_r, tmpz84c011_dir_pe_w)
|
||||
ADDRESS_MAP_END
|
||||
map(0x50, 0x50).mirror(0xff00).rw(this, FUNC(tmpz84c011_device::tmpz84c011_pa_r), FUNC(tmpz84c011_device::tmpz84c011_pa_w));
|
||||
map(0x51, 0x51).mirror(0xff00).rw(this, FUNC(tmpz84c011_device::tmpz84c011_pb_r), FUNC(tmpz84c011_device::tmpz84c011_pb_w));
|
||||
map(0x52, 0x52).mirror(0xff00).rw(this, FUNC(tmpz84c011_device::tmpz84c011_pc_r), FUNC(tmpz84c011_device::tmpz84c011_pc_w));
|
||||
map(0x30, 0x30).mirror(0xff00).rw(this, FUNC(tmpz84c011_device::tmpz84c011_pd_r), FUNC(tmpz84c011_device::tmpz84c011_pd_w));
|
||||
map(0x40, 0x40).mirror(0xff00).rw(this, FUNC(tmpz84c011_device::tmpz84c011_pe_r), FUNC(tmpz84c011_device::tmpz84c011_pe_w));
|
||||
map(0x54, 0x54).mirror(0xff00).rw(this, FUNC(tmpz84c011_device::tmpz84c011_dir_pa_r), FUNC(tmpz84c011_device::tmpz84c011_dir_pa_w));
|
||||
map(0x55, 0x55).mirror(0xff00).rw(this, FUNC(tmpz84c011_device::tmpz84c011_dir_pb_r), FUNC(tmpz84c011_device::tmpz84c011_dir_pb_w));
|
||||
map(0x56, 0x56).mirror(0xff00).rw(this, FUNC(tmpz84c011_device::tmpz84c011_dir_pc_r), FUNC(tmpz84c011_device::tmpz84c011_dir_pc_w));
|
||||
map(0x34, 0x34).mirror(0xff00).rw(this, FUNC(tmpz84c011_device::tmpz84c011_dir_pd_r), FUNC(tmpz84c011_device::tmpz84c011_dir_pd_w));
|
||||
map(0x44, 0x44).mirror(0xff00).rw(this, FUNC(tmpz84c011_device::tmpz84c011_dir_pe_r), FUNC(tmpz84c011_device::tmpz84c011_dir_pe_w));
|
||||
}
|
||||
|
||||
|
||||
tmpz84c011_device::tmpz84c011_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
|
||||
|
||||
@ -17,12 +17,13 @@
|
||||
|
||||
DEFINE_DEVICE_TYPE(TMPZ84C015, tmpz84c015_device, "tmpz84c015", "Toshiba TMPZ84C015")
|
||||
|
||||
ADDRESS_MAP_START(tmpz84c015_device::tmpz84c015_internal_io_map)
|
||||
AM_RANGE(0x10, 0x13) AM_MIRROR(0xff00) AM_DEVREADWRITE("tmpz84c015_ctc", z80ctc_device, read, write)
|
||||
AM_RANGE(0x18, 0x1b) AM_MIRROR(0xff00) AM_DEVREADWRITE("tmpz84c015_sio", z80dart_device, ba_cd_r, ba_cd_w)
|
||||
AM_RANGE(0x1c, 0x1f) AM_MIRROR(0xff00) AM_DEVREADWRITE("tmpz84c015_pio", z80pio_device, read_alt, write_alt)
|
||||
AM_RANGE(0xf4, 0xf4) AM_MIRROR(0xff00) AM_WRITE(irq_priority_w)
|
||||
ADDRESS_MAP_END
|
||||
void tmpz84c015_device::tmpz84c015_internal_io_map(address_map &map)
|
||||
{
|
||||
map(0x10, 0x13).mirror(0xff00).rw("tmpz84c015_ctc", FUNC(z80ctc_device::read), FUNC(z80ctc_device::write));
|
||||
map(0x18, 0x1b).mirror(0xff00).rw("tmpz84c015_sio", FUNC(z80dart_device::ba_cd_r), FUNC(z80dart_device::ba_cd_w));
|
||||
map(0x1c, 0x1f).mirror(0xff00).rw("tmpz84c015_pio", FUNC(z80pio_device::read_alt), FUNC(z80pio_device::write_alt));
|
||||
map(0xf4, 0xf4).mirror(0xff00).w(this, FUNC(tmpz84c015_device::irq_priority_w));
|
||||
}
|
||||
|
||||
|
||||
tmpz84c015_device::tmpz84c015_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
|
||||
|
||||
Loading…
Reference in New Issue
Block a user