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netlist: Add power terminals to most logic devices.

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This fixes an over simplification. Logic devices implicitly assumed that
GND/VDD actually is connected to GND(i.e. 0V). There is no immediate
benefit from this change. It is a preparation for the future
scalability. Now all power terminals (typically 7/14, 8/16) have to be
explicitly connected to the supply rails.

Also added a validation mode to the netlist core. This is not
intended for running, but solely to better indentify pins which
are not properly connected.
This commit is contained in:
couriersud 2019-04-19 13:54:51 +02:00
parent e826ac0a56
commit 6b96f7ba60
92 changed files with 1362 additions and 985 deletions
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6
src/devices/machine/netlist.cpp
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@ -81,7 +81,7 @@ protected:
m_parent.logerror("netlist ERROR: %s\n", ls.c_str());
break;
case plib::plog_level::FATAL:
throw emu_fatalerror(1, "netlist ERROR: %s\n", ls.c_str());
throw emu_fatalerror(1, "netlist FATAL: %s\n", ls.c_str());
}
}
@ -117,7 +117,7 @@ protected:
osd_printf_error("netlist ERROR: %s\n", ls.c_str());
break;
case plib::plog_level::FATAL:
throw emu_fatalerror(1, "netlist ERROR: %s\n", ls.c_str());
throw emu_fatalerror(1, "netlist FATAL: %s\n", ls.c_str());
}
}
@ -1018,6 +1018,8 @@ void netlist_mame_device::device_validity_check(validity_checker &valid) const
{
//netlist_mame_t lnetlist(*this, "netlist", plib::make_unique<netlist_validate_callbacks_t>());
netlist::netlist_t lnetlist("netlist", plib::make_unique<netlist_validate_callbacks_t>());
// enable validation mode
lnetlist.nlstate().setup().enable_validation();
common_dev_start(&lnetlist);
}
catch (memregion_not_set &err)

9
src/lib/netlist/devices/nld_2102A.cpp
View File

@ -7,6 +7,7 @@
#include "nld_2102A.h"
#include "netlist/nl_base.h"
#include "nlid_system.h"
#define ADDR2BYTE(a) ((a) >> 3)
#define ADDR2BIT(a) ((a) & 0x7)
@ -25,6 +26,7 @@ namespace netlist
, m_DO(*this, "DO")
, m_ram(*this, "m_ram", 0)
, m_RAM(*this, "m_RAM", &m_ram[0])
, m_power_pins(*this)
{
}
@ -41,6 +43,7 @@ namespace netlist
state_array<uint8_t, 128> m_ram; // 1024x1 bits
param_ptr_t m_RAM;
nld_power_pins m_power_pins;
};
NETLIB_OBJECT_DERIVED(2102A_dip, 2102A)
@ -63,6 +66,10 @@ namespace netlist
register_subalias("11", m_DI);
register_subalias("12", m_DO);
register_subalias("10", "VCC");
register_subalias("9", "GND");
}
};
@ -97,7 +104,7 @@ namespace netlist
m_ram[i] = 0;
}
NETLIB_DEVICE_IMPL(2102A, "RAM_2102A", "+CEQ,+A0,+A1,+A2,+A3,+A4,+A5,+A6,+A7,+A8,+A9,+RWQ,+DI")
NETLIB_DEVICE_IMPL(2102A, "RAM_2102A", "+CEQ,+A0,+A1,+A2,+A3,+A4,+A5,+A6,+A7,+A8,+A9,+RWQ,+DI,@VCC,@GND")
NETLIB_DEVICE_IMPL(2102A_dip,"RAM_2102A_DIP","")
} //namespace devices

30
src/lib/netlist/devices/nld_2102A.h
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@ -27,22 +27,24 @@
#include "netlist/nl_setup.h"
#define RAM_2102A(name, cCEQ, cA0, cA1, cA2, cA3, cA4, cA5, cA6, cA7, cA8, cA9, cRWQ, cDI) \
NET_REGISTER_DEV(RAM_2102A, name) \
NET_CONNECT(name, CEQ, cCEQ) \
NET_CONNECT(name, A0, cA0) \
NET_CONNECT(name, A1, cA1) \
NET_CONNECT(name, A2, cA2) \
NET_CONNECT(name, A3, cA3) \
NET_CONNECT(name, A4, cA4) \
NET_CONNECT(name, A5, cA5) \
NET_CONNECT(name, A6, cA6) \
NET_CONNECT(name, A7, cA7) \
NET_CONNECT(name, A8, cA8) \
NET_CONNECT(name, A9, cA9) \
NET_CONNECT(name, RWQ, cRWQ) \
NET_REGISTER_DEV(RAM_2102A, name) \
NET_CONNECT(name, GND, GND) \
NET_CONNECT(name, VCC, VCC) \
NET_CONNECT(name, CEQ, cCEQ) \
NET_CONNECT(name, A0, cA0) \
NET_CONNECT(name, A1, cA1) \
NET_CONNECT(name, A2, cA2) \
NET_CONNECT(name, A3, cA3) \
NET_CONNECT(name, A4, cA4) \
NET_CONNECT(name, A5, cA5) \
NET_CONNECT(name, A6, cA6) \
NET_CONNECT(name, A7, cA7) \
NET_CONNECT(name, A8, cA8) \
NET_CONNECT(name, A9, cA9) \
NET_CONNECT(name, RWQ, cRWQ) \
NET_CONNECT(name, DI, cDI)
#define RAM_2102A_DIP(name) \
#define RAM_2102A_DIP(name) \
NET_REGISTER_DEV(RAM_2102A_DIP, name)
#endif /* NLD_2102A_H_ */

8
src/lib/netlist/devices/nld_2716.cpp
View File

@ -7,6 +7,7 @@
#include "nld_2716.h"
#include "netlist/nl_base.h"
#include "nlid_system.h"
namespace netlist
{
@ -21,6 +22,7 @@ namespace netlist
, m_D(*this, {{ "D0", "D1", "D2", "D3", "D4", "D5", "D6", "D7" }})
, m_last_EPQ(*this, "m_last_EPQ", 1)
, m_ROM(*this, "ROM")
, m_power_pins(*this)
{
}
@ -35,6 +37,7 @@ namespace netlist
state_var<unsigned> m_last_EPQ;
param_rom_t<uint8_t, 11, 8> m_ROM; // 16 Kbits, used as 2 Kbit x 8
nld_power_pins m_power_pins;
};
NETLIB_OBJECT_DERIVED(2716_dip, 2716)
@ -64,6 +67,9 @@ namespace netlist
register_subalias("15", m_D[5]);
register_subalias("16", m_D[6]);
register_subalias("17", m_D[7]);
register_subalias("12", "GND");
register_subalias("24", "VCC");
}
};
@ -92,7 +98,7 @@ namespace netlist
m_D[i].push((d >> i) & 1, delay);
}
NETLIB_DEVICE_IMPL(2716, "EPROM_2716", "+GQ,+EPQ,+A0,+A1,+A2,+A3,+A4,+A5,+A6,+A7,+A8,+A9,+A10")
NETLIB_DEVICE_IMPL(2716, "EPROM_2716", "+GQ,+EPQ,+A0,+A1,+A2,+A3,+A4,+A5,+A6,+A7,+A8,+A9,+A10,@VCC,@GND")
NETLIB_DEVICE_IMPL(2716_dip, "EPROM_2716_DIP", "")
} //namespace devices

30
src/lib/netlist/devices/nld_2716.h
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@ -31,22 +31,24 @@
#include "netlist/nl_setup.h"
#define EPROM_2716(name, cGQ, cEPQ, cA0, cA1, cA2, cA3, cA4, cA5, cA6, cA7, cA8, cA9, cA10) \
NET_REGISTER_DEV(EPROM_2716, name) \
NET_CONNECT(name, GQ, cGQ) \
NET_CONNECT(name, EPQ, cEPQ) \
NET_CONNECT(name, A0, cA0) \
NET_CONNECT(name, A1, cA1) \
NET_CONNECT(name, A2, cA2) \
NET_CONNECT(name, A3, cA3) \
NET_CONNECT(name, A4, cA4) \
NET_CONNECT(name, A5, cA5) \
NET_CONNECT(name, A6, cA6) \
NET_CONNECT(name, A7, cA7) \
NET_CONNECT(name, A8, cA8) \
NET_CONNECT(name, A9, cA9) \
NET_REGISTER_DEV(EPROM_2716, name) \
NET_CONNECT(name, GND, GND) \
NET_CONNECT(name, VCC, VCC) \
NET_CONNECT(name, GQ, cGQ) \
NET_CONNECT(name, EPQ, cEPQ) \
NET_CONNECT(name, A0, cA0) \
NET_CONNECT(name, A1, cA1) \
NET_CONNECT(name, A2, cA2) \
NET_CONNECT(name, A3, cA3) \
NET_CONNECT(name, A4, cA4) \
NET_CONNECT(name, A5, cA5) \
NET_CONNECT(name, A6, cA6) \
NET_CONNECT(name, A7, cA7) \
NET_CONNECT(name, A8, cA8) \
NET_CONNECT(name, A9, cA9) \
NET_CONNECT(name, A10, cA10)
#define EPROM_2716_DIP(name) \
#define EPROM_2716_DIP(name) \
NET_REGISTER_DEV(EPROM_2716_DIP, name)
#endif /* NLD_2716_H_ */

14
src/lib/netlist/devices/nld_74107.cpp
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@ -7,6 +7,7 @@
#include "nld_74107.h"
#include "netlist/nl_base.h"
#include "nlid_system.h"
namespace netlist
{
@ -25,6 +26,7 @@ namespace netlist
, m_J(*this, "J")
, m_K(*this, "K")
, m_clrQ(*this, "CLRQ")
, m_power_pins(*this)
{
m_delay[0] = delay_107A[0];
m_delay[1] = delay_107A[1];
@ -50,6 +52,7 @@ namespace netlist
logic_input_t m_K;
logic_input_t m_clrQ;
nld_power_pins m_power_pins;
void newstate(const netlist_sig_t state)
{
m_Q.push(state, m_delay[state]);
@ -81,7 +84,7 @@ namespace netlist
register_subalias("5", m_2.m_Q);
register_subalias("6", m_2.m_QQ);
// register_subalias("7", ); ==> GND
register_subalias("7", "1.GND");
register_subalias("8", m_2.m_J);
register_subalias("9", m_2.m_clk);
@ -91,7 +94,10 @@ namespace netlist
register_subalias("12", m_1.m_clk);
register_subalias("13", m_1.m_clrQ);
// register_subalias("14", ); ==> VCC
register_subalias("14", "1.VCC" );
connect("1.GND", "2.GND");
connect("1.VCC", "2.VCC");
}
//NETLIB_RESETI();
@ -139,8 +145,8 @@ namespace netlist
m_clk.activate_hl();
}
NETLIB_DEVICE_IMPL(74107, "TTL_74107", "+CLK,+J,+K,+CLRQ")
NETLIB_DEVICE_IMPL(74107A, "TTL_74107A", "+CLK,+J,+K,+CLRQ")
NETLIB_DEVICE_IMPL(74107, "TTL_74107", "+CLK,+J,+K,+CLRQ,@VCC,@GND")
NETLIB_DEVICE_IMPL(74107A, "TTL_74107A", "+CLK,+J,+K,+CLRQ,@VCC,@GND")
NETLIB_DEVICE_IMPL(74107_dip, "TTL_74107_DIP", "")
} //namespace devices

16
src/lib/netlist/devices/nld_74107.h
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@ -66,17 +66,19 @@
#include "netlist/nl_setup.h"
#define TTL_74107A(name, cCLK, cJ, cK, cCLRQ) \
NET_REGISTER_DEV(TTL_74107A, name) \
NET_CONNECT(name, CLK, cCLK) \
NET_CONNECT(name, J, cJ) \
NET_CONNECT(name, K, cK) \
#define TTL_74107A(name, cCLK, cJ, cK, cCLRQ) \
NET_REGISTER_DEV(TTL_74107A, name) \
NET_CONNECT(name, GND, GND) \
NET_CONNECT(name, VCC, VCC) \
NET_CONNECT(name, CLK, cCLK) \
NET_CONNECT(name, J, cJ) \
NET_CONNECT(name, K, cK) \
NET_CONNECT(name, CLRQ, cCLRQ)
#define TTL_74107(name, cCLK, cJ, cK, cCLRQ) \
#define TTL_74107(name, cCLK, cJ, cK, cCLRQ) \
TTL_74107A(name, cCLK, cJ, cK, cCLRQ)
#define TTL_74107_DIP(name) \
#define TTL_74107_DIP(name) \
NET_REGISTER_DEV(TTL_74107_DIP, name)
#endif /* NLD_74107_H_ */

130
src/lib/netlist/devices/nld_74153.cpp
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@ -7,28 +7,55 @@
#include "nld_74153.h"
#include "netlist/nl_base.h"
#include "nlid_system.h"
namespace netlist
{
namespace devices
{
/* FIXME: timing is not 100% accurate, Strobe and Select inputs have a
* slightly longer timing.
* Convert this to sub-devices at some time.
*/
namespace devices
{
NETLIB_OBJECT(74153sub)
/* FIXME: timing is not 100% accurate, Strobe and Select inputs have a
* slightly longer timing.
* Convert this to sub-devices at some time.
*/
NETLIB_OBJECT(74153)
{
NETLIB_CONSTRUCTOR(74153sub)
, m_C(*this, {{"C0", "C1", "C2", "C3"}})
, m_G(*this, "G")
NETLIB_CONSTRUCTOR(74153)
, m_C(*this, {{"C0", "C1", "C2", "C3"}}, NETLIB_DELEGATE(74153, sub))
, m_G(*this, "G", NETLIB_DELEGATE(74153, sub))
, m_Y(*this, "AY") //FIXME: Change netlists
, m_chan(*this, "m_chan", 0)
, m_A(*this, "A")
, m_B(*this, "B")
, m_power_pins(*this)
{
}
NETLIB_RESETI();
NETLIB_UPDATEI();
NETLIB_RESETI()
{
m_chan = 0;
}
NETLIB_UPDATEI()
{
m_chan = (m_A() | (m_B()<<1));
sub();
}
NETLIB_HANDLERI(sub)
{
constexpr const netlist_time delay[2] = { NLTIME_FROM_NS(23), NLTIME_FROM_NS(18) };
if (!m_G())
{
auto t = m_C[m_chan]();
m_Y.push(t, delay[t]);
}
else
{
m_Y.push(0, delay[0]);
}
}
public:
object_array_t<logic_input_t, 4> m_C;
@ -37,29 +64,11 @@ namespace netlist
logic_output_t m_Y;
state_var<unsigned> m_chan;
};
NETLIB_OBJECT(74153)
{
NETLIB_CONSTRUCTOR(74153)
, m_sub(*this, "sub")
, m_A(*this, "A")
, m_B(*this, "B")
{
register_subalias("C0", m_sub.m_C[0]);
register_subalias("C1", m_sub.m_C[1]);
register_subalias("C2", m_sub.m_C[2]);
register_subalias("C3", m_sub.m_C[3]);
register_subalias("G", m_sub.m_G);
register_subalias("AY", m_sub.m_Y); //FIXME: Change netlists
}
NETLIB_RESETI() { }
NETLIB_UPDATEI();
public:
NETLIB_SUB(74153sub) m_sub;
logic_input_t m_A;
logic_input_t m_B;
nld_power_pins m_power_pins;
};
NETLIB_OBJECT(74153_dip)
@ -67,72 +76,41 @@ namespace netlist
NETLIB_CONSTRUCTOR(74153_dip)
, m_1(*this, "1")
, m_2(*this, "2")
, m_A(*this, "14") // m_2.m_B
, m_B(*this, "2") // m_2.m_B
{
register_subalias("1", m_1.m_G);
register_subalias("2", m_1.m_B);
register_subalias("3", m_1.m_C[3]);
register_subalias("4", m_1.m_C[2]);
register_subalias("5", m_1.m_C[1]);
register_subalias("6", m_1.m_C[0]);
register_subalias("7", m_1.m_Y);
register_subalias("8", "1.GND");
register_subalias("9", m_2.m_Y);
register_subalias("10", m_2.m_C[0]);
register_subalias("11", m_2.m_C[1]);
register_subalias("12", m_2.m_C[2]);
register_subalias("13", m_2.m_C[3]);
register_subalias("14", m_1.m_A);
register_subalias("15", m_2.m_G);
register_subalias("16", "1.VCC");
connect("1.GND", "2.GND");
connect("1.VCC", "2.VCC");
connect(m_1.m_A, m_2.m_A);
connect(m_1.m_B, m_2.m_B);
}
//NETLIB_RESETI();
NETLIB_UPDATEI();
//NETLIB_UPDATEI();
protected:
NETLIB_SUB(74153sub) m_1;
NETLIB_SUB(74153sub) m_2;
logic_input_t m_A;
logic_input_t m_B;
NETLIB_SUB(74153) m_1;
NETLIB_SUB(74153) m_2;
};
NETLIB_RESET(74153sub)
{
m_chan = 0;
}
NETLIB_UPDATE(74153sub)
{
const netlist_time delay[2] = { NLTIME_FROM_NS(23), NLTIME_FROM_NS(18) };
if (!m_G())
{
auto t = m_C[m_chan]();
m_Y.push(t, delay[t]);
}
else
{
m_Y.push(0, delay[0]);
}
}
NETLIB_UPDATE(74153)
{
m_sub.m_chan = (m_A() | (m_B()<<1));
m_sub.update();
}
NETLIB_UPDATE(74153_dip)
{
m_2.m_chan = m_1.m_chan = (m_A() | (m_B()<<1));
m_1.update();
m_2.update();
}
NETLIB_DEVICE_IMPL(74153, "TTL_74153", "+C0,+C1,+C2,+C3,+A,+B,+G")
NETLIB_DEVICE_IMPL(74153, "TTL_74153", "+C0,+C1,+C2,+C3,+A,+B,+G,@VCC,@GND")
NETLIB_DEVICE_IMPL(74153_dip, "TTL_74153_DIP", "")
} //namespace devices
} //namespace devices
} // namespace netlist

20
src/lib/netlist/devices/nld_74153.h
View File

@ -47,17 +47,19 @@
#include "netlist/nl_setup.h"
#define TTL_74153(name, cC0, cC1, cC2, cC3, cA, cB, cG) \
NET_REGISTER_DEV(TTL_74153, name) \
NET_CONNECT(name, C0, cC0) \
NET_CONNECT(name, C1, cC1) \
NET_CONNECT(name, C2, cC2) \
NET_CONNECT(name, C3, cC3) \
NET_CONNECT(name, A, cA) \
NET_CONNECT(name, B, cB) \
#define TTL_74153(name, cC0, cC1, cC2, cC3, cA, cB, cG) \
NET_REGISTER_DEV(TTL_74153, name) \
NET_CONNECT(name, GND, GND) \
NET_CONNECT(name, VCC, VCC) \
NET_CONNECT(name, C0, cC0) \
NET_CONNECT(name, C1, cC1) \
NET_CONNECT(name, C2, cC2) \
NET_CONNECT(name, C3, cC3) \
NET_CONNECT(name, A, cA) \
NET_CONNECT(name, B, cB) \
NET_CONNECT(name, G, cG)
#define TTL_74153_DIP(name) \
#define TTL_74153_DIP(name) \
NET_REGISTER_DEV(TTL_74153_DIP, name)
#endif /* NLD_74153_H_ */

8
src/lib/netlist/devices/nld_74161.cpp
View File

@ -7,6 +7,7 @@
#include "nld_74161.h"
#include "netlist/nl_base.h"
#include "nlid_system.h"
namespace netlist
{
@ -31,6 +32,7 @@ namespace netlist
, m_last_CLK(*this, "m_last_CLK", 0)
, m_Q(*this, {{"QA", "QB", "QC", "QD"}})
, m_RCO(*this, "RCO")
, m_power_pins(*this)
{
}
@ -53,6 +55,8 @@ namespace netlist
object_array_t<logic_output_t, 4> m_Q;
logic_output_t m_RCO;
nld_power_pins m_power_pins;
};
NETLIB_OBJECT_DERIVED(74161_dip, 74161)
@ -66,6 +70,7 @@ namespace netlist
register_subalias("5", m_C);
register_subalias("6", m_D);
register_subalias("7", m_ENABLEP);
register_subalias("8", "GND");
register_subalias("9", m_LOADQ);
register_subalias("10", m_ENABLET);
@ -74,6 +79,7 @@ namespace netlist
register_subalias("13", m_Q[1]);
register_subalias("14", m_Q[0]);
register_subalias("15", m_RCO);
register_subalias("16", "VCC");
}
};
@ -126,7 +132,7 @@ namespace netlist
m_RCO.push(tRippleCarryOut, NLTIME_FROM_NS(20)); //FIXME
}
NETLIB_DEVICE_IMPL(74161, "TTL_74161", "+A,+B,+C,+D,+CLRQ,+LOADQ,+CLK,+ENABLEP,+ENABLET")
NETLIB_DEVICE_IMPL(74161, "TTL_74161", "+A,+B,+C,+D,+CLRQ,+LOADQ,+CLK,+ENABLEP,+ENABLET,@VCC,@GND")
NETLIB_DEVICE_IMPL(74161_dip, "TTL_74161_DIP", "")
} //namespace devices

24
src/lib/netlist/devices/nld_74161.h
View File

@ -27,19 +27,21 @@
#include "netlist/nl_setup.h"
#define TTL_74161(name, cA, cB, cC, cD, cCLRQ, cLOADQ, cCLK, cENABLEP, cENABLET) \
NET_REGISTER_DEV(TTL_74161, name) \
NET_CONNECT(name, A, cA) \
NET_CONNECT(name, B, cB) \
NET_CONNECT(name, C, cC) \
NET_CONNECT(name, D, cD) \
NET_CONNECT(name, CLRQ, cCLRQ) \
NET_CONNECT(name, LOADQ, cLOADQ) \
NET_CONNECT(name, CLK, cCLK) \
NET_CONNECT(name, ENABLEP, cENABLEP) \
#define TTL_74161(name, cA, cB, cC, cD, cCLRQ, cLOADQ, cCLK, cENABLEP, cENABLET) \
NET_REGISTER_DEV(TTL_74161, name) \
NET_CONNECT(name, GND, GND) \
NET_CONNECT(name, VCC, VCC) \
NET_CONNECT(name, A, cA) \
NET_CONNECT(name, B, cB) \
NET_CONNECT(name, C, cC) \
NET_CONNECT(name, D, cD) \
NET_CONNECT(name, CLRQ, cCLRQ) \
NET_CONNECT(name, LOADQ, cLOADQ) \
NET_CONNECT(name, CLK, cCLK) \
NET_CONNECT(name, ENABLEP, cENABLEP) \
NET_CONNECT(name, ENABLET, cENABLET)
#define TTL_74161_DIP(name) \
#define TTL_74161_DIP(name) \
NET_REGISTER_DEV(TTL_74161_DIP, name)
#endif /* NLD_74161_H_ */

10
src/lib/netlist/devices/nld_74164.cpp
View File

@ -10,6 +10,7 @@
#include "nld_74164.h"
#include "netlist/nl_base.h"
#include "nlid_system.h"
namespace netlist
{
@ -25,6 +26,7 @@ namespace netlist
, m_cnt(*this, "m_cnt", 0)
, m_last_CLK(*this, "m_last_CLK", 0)
, m_Q(*this, {{"QA", "QB", "QC", "QD", "QE", "QF", "QG", "QH"}})
, m_power_pins(*this)
{
}
@ -41,6 +43,7 @@ namespace netlist
state_var<unsigned> m_last_CLK;
object_array_t<logic_output_t, 8> m_Q;
nld_power_pins m_power_pins;
};
NETLIB_OBJECT_DERIVED(74164_dip, 74164)
@ -53,6 +56,7 @@ namespace netlist
register_subalias("4", m_Q[1]);
register_subalias("5", m_Q[2]);
register_subalias("6", m_Q[3]);
register_subalias("7", "A.GND");
register_subalias("8", m_CLK);
register_subalias("9", m_CLRQ);
@ -60,6 +64,10 @@ namespace netlist
register_subalias("11", m_Q[5]);
register_subalias("12", m_Q[6]);
register_subalias("13", m_Q[7]);
register_subalias("14", "A.VCC");
connect("A.GND", "B.GND");
connect("A.VCC", "B.VCC");
}
};
@ -97,7 +105,7 @@ namespace netlist
}
}
NETLIB_DEVICE_IMPL(74164, "TTL_74164", "+A,+B,+CLRQ,+CLK")
NETLIB_DEVICE_IMPL(74164, "TTL_74164", "+A,+B,+CLRQ,+CLK,@VCC,@GND")
NETLIB_DEVICE_IMPL(74164_dip, "TTL_74164_DIP", "")
} //namespace devices

14
src/lib/netlist/devices/nld_74164.h
View File

@ -44,14 +44,16 @@
#include "netlist/nl_setup.h"
#define TTL_74164(name, cA, cB, cCLRQ, cCLK) \
NET_REGISTER_DEV(TTL_74164, name) \
NET_CONNECT(name, A, cA) \
NET_CONNECT(name, B, cB) \
NET_CONNECT(name, CLRQ, cCLRQ) \
#define TTL_74164(name, cA, cB, cCLRQ, cCLK) \
NET_REGISTER_DEV(TTL_74164, name) \
NET_CONNECT(name, GND, GND) \
NET_CONNECT(name, VCC, VCC) \
NET_CONNECT(name, A, cA) \
NET_CONNECT(name, B, cB) \
NET_CONNECT(name, CLRQ, cCLRQ) \
NET_CONNECT(name, CLK, cCLK)
#define TTL_74164_DIP(name) \
#define TTL_74164_DIP(name) \
NET_REGISTER_DEV(TTL_74164_DIP, name)
#endif /* NLD_74164_H_ */

8
src/lib/netlist/devices/nld_74165.cpp
View File

@ -7,6 +7,7 @@
#include "nld_74165.h"
#include "netlist/nl_base.h"
#include "nlid_system.h"
namespace netlist
{
@ -24,6 +25,7 @@ namespace netlist
, m_QHQ(*this, "QHQ")
, m_shifter(*this, "m_shifter", 0)
, m_last_CLK(*this, "m_last_CLK", 0)
, m_power_pins(*this)
{
}
@ -41,6 +43,7 @@ namespace netlist
state_var<unsigned> m_shifter;
state_var<unsigned> m_last_CLK;
nld_power_pins m_power_pins;
};
NETLIB_OBJECT_DERIVED(74165_dip, 74165)
@ -54,6 +57,7 @@ namespace netlist
register_subalias("5", m_DATA[6]);
register_subalias("6", m_DATA[7]);
register_subalias("7", m_QHQ);
register_subalias("8", "GND");
register_subalias("9", m_QH);
register_subalias("10", m_SER);
@ -62,7 +66,7 @@ namespace netlist
register_subalias("13", m_DATA[2]);
register_subalias("14", m_DATA[3]);
register_subalias("15", m_CLKINH);
register_subalias("16", "VCC");
}
};
@ -102,7 +106,7 @@ namespace netlist
m_QH.push(qh, NLTIME_FROM_NS(20)); // FIXME: Timing
}
NETLIB_DEVICE_IMPL(74165, "TTL_74165", "+CLK,+CLKINH,+SH_LDQ,+SER,+A,+B,+C,+D,+E,+F,+G,+H")
NETLIB_DEVICE_IMPL(74165, "TTL_74165", "+CLK,+CLKINH,+SH_LDQ,+SER,+A,+B,+C,+D,+E,+F,+G,+H,@VCC,@GND")
NETLIB_DEVICE_IMPL(74165_dip, "TTL_74165_DIP", "")
} //namespace devices

28
src/lib/netlist/devices/nld_74165.h
View File

@ -30,21 +30,23 @@
#include "netlist/nl_setup.h"
#define TTL_74165(name, cCLK, cCLKINH, cSH_LDQ, cSER, cA, cB, cC, cD, cE, cF, cG, cH) \
NET_REGISTER_DEV(TTL_74165, name) \
NET_CONNECT(name, CLK, cCLK) \
NET_CONNECT(name, CLKINH, cCLKINH) \
NET_CONNECT(name, SH_LDQ, cSH_LDQ) \
NET_CONNECT(name, SER, cSER) \
NET_CONNECT(name, A, cA) \
NET_CONNECT(name, B, cB) \
NET_CONNECT(name, C, cC) \
NET_CONNECT(name, D, cD) \
NET_CONNECT(name, E, cE) \
NET_CONNECT(name, F, cF) \
NET_CONNECT(name, G, cG) \
NET_REGISTER_DEV(TTL_74165, name) \
NET_CONNECT(name, GND, GND) \
NET_CONNECT(name, VCC, VCC) \
NET_CONNECT(name, CLK, cCLK) \
NET_CONNECT(name, CLKINH, cCLKINH) \
NET_CONNECT(name, SH_LDQ, cSH_LDQ) \
NET_CONNECT(name, SER, cSER) \
NET_CONNECT(name, A, cA) \
NET_CONNECT(name, B, cB) \
NET_CONNECT(name, C, cC) \
NET_CONNECT(name, D, cD) \
NET_CONNECT(name, E, cE) \
NET_CONNECT(name, F, cF) \
NET_CONNECT(name, G, cG) \
NET_CONNECT(name, H, cH)
#define TTL_74165_DIP(name) \
#define TTL_74165_DIP(name) \
NET_REGISTER_DEV(TTL_74165_DIP, name)
#endif /* NLD_74165_H_ */

8
src/lib/netlist/devices/nld_74166.cpp
View File

@ -7,6 +7,7 @@
#include "nld_74166.h"
#include "netlist/nl_base.h"
#include "nlid_system.h"
namespace netlist
{
@ -25,6 +26,7 @@ namespace netlist
, m_shifter(*this, "m_shifter", 0)
, m_last_CLRQ(*this, "m_last_CLRQ", 0)
, m_last_CLK(*this, "m_last_CLK", 0)
, m_power_pins(*this)
{
}
@ -43,6 +45,7 @@ namespace netlist
state_var<unsigned> m_shifter;
state_var<unsigned> m_last_CLRQ;
state_var<unsigned> m_last_CLK;
nld_power_pins m_power_pins;
};
NETLIB_OBJECT_DERIVED(74166_dip, 74166)
@ -56,6 +59,7 @@ namespace netlist
register_subalias("5", m_DATA[4]);
register_subalias("6", m_CLKINH);
register_subalias("7", m_CLK);
register_subalias("8", "GND");
register_subalias("9", m_CLRQ);
register_subalias("10", m_DATA[3]);
@ -64,7 +68,7 @@ namespace netlist
register_subalias("13", m_QH);
register_subalias("14", m_DATA[0]);
register_subalias("15", m_SH_LDQ);
register_subalias("16", "VCC");
}
};
@ -121,7 +125,7 @@ namespace netlist
m_QH.push(qh, delay); //FIXME
}
NETLIB_DEVICE_IMPL(74166, "TTL_74166", "+CLK,+CLKINH,+SH_LDQ,+SER,+A,+B,+C,+D,+E,+F,+G,+H,+CLRQ")
NETLIB_DEVICE_IMPL(74166, "TTL_74166", "+CLK,+CLKINH,+SH_LDQ,+SER,+A,+B,+C,+D,+E,+F,+G,+H,+CLRQ,@VCC,@GND")
NETLIB_DEVICE_IMPL(74166_dip,"TTL_74166_DIP", "")
} //namespace devices

30
src/lib/netlist/devices/nld_74166.h
View File

@ -30,22 +30,24 @@
#include "netlist/nl_setup.h"
#define TTL_74166(name, cCLK, cCLKINH, cSH_LDQ, cSER, cA, cB, cC, cD, cE, cF, cG, cH, cCLRQ) \
NET_REGISTER_DEV(TTL_74166, name) \
NET_CONNECT(name, CLK, cCLK) \
NET_CONNECT(name, CLKINH, cCLKINH) \
NET_CONNECT(name, SH_LDQ, cSH_LDQ) \
NET_CONNECT(name, SER, cSER) \
NET_CONNECT(name, A, cA) \
NET_CONNECT(name, B, cB) \
NET_CONNECT(name, C, cC) \
NET_CONNECT(name, D, cD) \
NET_CONNECT(name, E, cE) \
NET_CONNECT(name, F, cF) \
NET_CONNECT(name, G, cG) \
NET_CONNECT(name, H, cH) \
NET_REGISTER_DEV(TTL_74166, name) \
NET_CONNECT(name, GND, GND) \
NET_CONNECT(name, VCC, VCC) \
NET_CONNECT(name, CLK, cCLK) \
NET_CONNECT(name, CLKINH, cCLKINH) \
NET_CONNECT(name, SH_LDQ, cSH_LDQ) \
NET_CONNECT(name, SER, cSER) \
NET_CONNECT(name, A, cA) \
NET_CONNECT(name, B, cB) \
NET_CONNECT(name, C, cC) \
NET_CONNECT(name, D, cD) \
NET_CONNECT(name, E, cE) \
NET_CONNECT(name, F, cF) \
NET_CONNECT(name, G, cG) \
NET_CONNECT(name, H, cH) \
NET_CONNECT(name, CLRQ, cCLRQ)
#define TTL_74166_DIP(name) \
#define TTL_74166_DIP(name) \
NET_REGISTER_DEV(TTL_74166_DIP, name)
#endif /* NLD_74166_H_ */

111
src/lib/netlist/devices/nld_74174.cpp
View File

@ -7,56 +7,51 @@
#include "nld_74174.h"
#include "netlist/nl_base.h"
#include "nlid_system.h"
namespace netlist
{
namespace devices
namespace devices
{
NETLIB_OBJECT(74174)
{
NETLIB_OBJECT(74174_sub)
{
NETLIB_CONSTRUCTOR(74174_sub)
, m_CLK(*this, "CLK")
NETLIB_CONSTRUCTOR(74174)
, m_CLK(*this, "CLK", NETLIB_DELEGATE(74174, sub))
, m_Q(*this, {{"Q1", "Q2", "Q3", "Q4", "Q5", "Q6"}})
, m_clrq(*this, "m_clr", 0)
, m_data(*this, "m_data", 0)
, m_D(*this, {{"D1", "D2", "D3", "D4", "D5", "D6"}})
, m_CLRQ(*this, "CLRQ")
, m_power_pins(*this)
{
}
NETLIB_RESETI();
NETLIB_UPDATEI();
public:
NETLIB_HANDLERI(sub)
{
if (m_clrq)
{
for (std::size_t i=0; i<6; i++)
{
netlist_sig_t d = (m_data >> i) & 1;
m_Q[i].push(d, NLTIME_FROM_NS(25));
}
m_CLK.inactivate();
}
}
protected:
logic_input_t m_CLK;
object_array_t<logic_output_t, 6> m_Q;
state_var<netlist_sig_t> m_clrq;
state_var<unsigned> m_data;
};
NETLIB_OBJECT(74174)
{
NETLIB_CONSTRUCTOR(74174)
, m_sub(*this, "sub")
, m_D(*this, {{"D1", "D2", "D3", "D4", "D5", "D6"}})
, m_CLRQ(*this, "CLRQ")
{
register_subalias("CLK", m_sub.m_CLK);
register_subalias("Q1", m_sub.m_Q[0]);
register_subalias("Q2", m_sub.m_Q[1]);
register_subalias("Q3", m_sub.m_Q[2]);
register_subalias("Q4", m_sub.m_Q[3]);
register_subalias("Q5", m_sub.m_Q[4]);
register_subalias("Q6", m_sub.m_Q[5]);
}
NETLIB_RESETI();
NETLIB_UPDATEI();
protected:
NETLIB_SUB(74174_sub) m_sub;
object_array_t<logic_input_t, 6> m_D;
logic_input_t m_CLRQ;
nld_power_pins m_power_pins;
};
NETLIB_OBJECT_DERIVED(74174_dip, 74174)
@ -64,48 +59,32 @@ namespace netlist
NETLIB_CONSTRUCTOR_DERIVED(74174_dip, 74174)
{
register_subalias("1", m_CLRQ);
register_subalias("9", m_sub.m_CLK);
register_subalias("9", m_CLK);
register_subalias("3", m_D[0]);
register_subalias("2", m_sub.m_Q[0]);
register_subalias("2", m_Q[0]);
register_subalias("4", m_D[1]);
register_subalias("5", m_sub.m_Q[1]);
register_subalias("5", m_Q[1]);
register_subalias("6", m_D[2]);
register_subalias("7", m_sub.m_Q[2]);
register_subalias("7", m_Q[2]);
register_subalias("11", m_D[3]);
register_subalias("10", m_sub.m_Q[3]);
register_subalias("10", m_Q[3]);
register_subalias("13", m_D[4]);
register_subalias("12", m_sub.m_Q[4]);
register_subalias("12", m_Q[4]);
register_subalias("14", m_D[5]);
register_subalias("15", m_sub.m_Q[5]);
register_subalias("15", m_Q[5]);
register_subalias("8", "GND");
register_subalias("16", "VCC");
}
};
NETLIB_RESET(74174_sub)
{
m_CLK.set_state(logic_t::STATE_INP_LH);
m_clrq = 0;
m_data = 0xFF;
}
NETLIB_UPDATE(74174_sub)
{
if (m_clrq)
{
for (std::size_t i=0; i<6; i++)
{
netlist_sig_t d = (m_data >> i) & 1;
m_Q[i].push(d, NLTIME_FROM_NS(25));
}
m_CLK.inactivate();
}
}
NETLIB_UPDATE(74174)
{
uint_fast8_t d = 0;
@ -113,28 +92,30 @@ namespace netlist
{
d |= (m_D[i]() << i);
}
m_sub.m_clrq = m_CLRQ();
if (!m_sub.m_clrq)
m_clrq = m_CLRQ();
if (!m_clrq)
{
for (std::size_t i=0; i<6; i++)
{
m_sub.m_Q[i].push(0, NLTIME_FROM_NS(40));
m_Q[i].push(0, NLTIME_FROM_NS(40));
}
m_sub.m_data = 0;
} else if (d != m_sub.m_data)
m_data = 0;
} else if (d != m_data)
{
m_sub.m_data = d;
m_sub.m_CLK.activate_lh();
m_data = d;
m_CLK.activate_lh();
}
}
NETLIB_RESET(74174)
{
//m_sub.do_reset();
m_CLK.set_state(logic_t::STATE_INP_LH);
m_clrq = 0;
m_data = 0xFF;
}
NETLIB_DEVICE_IMPL(74174, "TTL_74174", "+CLK,+D1,+D2,+D3,+D4,+D5,+D6,+CLRQ")
NETLIB_DEVICE_IMPL(74174, "TTL_74174", "+CLK,+D1,+D2,+D3,+D4,+D5,+D6,+CLRQ,@VCC,@GND")
NETLIB_DEVICE_IMPL(74174_dip,"TTL_74174_DIP", "")
} //namespace devices

22
src/lib/netlist/devices/nld_74174.h
View File

@ -38,18 +38,20 @@
#include "netlist/nl_setup.h"
#define TTL_74174(name, cCLK, cD1, cD2, cD3, cD4, cD5, cD6, cCLRQ) \
NET_REGISTER_DEV(TTL_74174, name) \
NET_CONNECT(name, CLK, cCLK) \
NET_CONNECT(name, D1, cD1) \
NET_CONNECT(name, D2, cD2) \
NET_CONNECT(name, D3, cD3) \
NET_CONNECT(name, D4, cD4) \
NET_CONNECT(name, D5, cD5) \
NET_CONNECT(name, D6, cD6) \
#define TTL_74174(name, cCLK, cD1, cD2, cD3, cD4, cD5, cD6, cCLRQ) \
NET_REGISTER_DEV(TTL_74174, name) \
NET_CONNECT(name, GND, GND) \
NET_CONNECT(name, VCC, VCC) \
NET_CONNECT(name, CLK, cCLK) \
NET_CONNECT(name, D1, cD1) \
NET_CONNECT(name, D2, cD2) \
NET_CONNECT(name, D3, cD3) \
NET_CONNECT(name, D4, cD4) \
NET_CONNECT(name, D5, cD5) \
NET_CONNECT(name, D6, cD6) \
NET_CONNECT(name, CLRQ, cCLRQ)
#define TTL_74174_DIP(name) \
#define TTL_74174_DIP(name) \
NET_REGISTER_DEV(TTL_74174_DIP, name)

8
src/lib/netlist/devices/nld_74175.cpp
View File

@ -7,6 +7,7 @@
#include "nld_74175.h"
#include "netlist/nl_base.h"
#include "nlid_system.h"
namespace netlist
{
@ -22,6 +23,7 @@ namespace netlist
, m_Q(*this, {{"Q1", "Q2", "Q3", "Q4"}})
, m_QQ(*this, {{"Q1Q", "Q2Q", "Q3Q", "Q4Q"}})
, m_data(*this, "m_data", 0)
, m_power_pins(*this)
{
}
@ -38,6 +40,7 @@ namespace netlist
object_array_t<logic_output_t, 4> m_QQ;
state_var<unsigned> m_data;
nld_power_pins m_power_pins;
};
NETLIB_OBJECT_DERIVED(74175_dip, 74175)
@ -62,6 +65,9 @@ namespace netlist
register_subalias("13", m_D[3]);
register_subalias("15", m_Q[3]);
register_subalias("14", m_QQ[3]);
register_subalias("8", "GND");
register_subalias("16", "VCC");
}
};
@ -111,7 +117,7 @@ namespace netlist
m_data = 0xFF;
}
NETLIB_DEVICE_IMPL(74175, "TTL_74175", "+CLK,+D1,+D2,+D3,+D4,+CLRQ")
NETLIB_DEVICE_IMPL(74175, "TTL_74175", "+CLK,+D1,+D2,+D3,+D4,+CLRQ,@VCC,@GND")
NETLIB_DEVICE_IMPL(74175_dip,"TTL_74175_DIP", "")
} //namespace devices

18
src/lib/netlist/devices/nld_74175.h
View File

@ -38,16 +38,18 @@
#include "netlist/nl_setup.h"
#define TTL_74175(name, cCLK, cD1, cD2, cD3, cD4, cCLRQ) \
NET_REGISTER_DEV(TTL_74175, name) \
NET_CONNECT(name, CLK, cCLK) \
NET_CONNECT(name, D1, cD1) \
NET_CONNECT(name, D2, cD2) \
NET_CONNECT(name, D3, cD3) \
NET_CONNECT(name, D4, cD4) \
#define TTL_74175(name, cCLK, cD1, cD2, cD3, cD4, cCLRQ) \
NET_REGISTER_DEV(TTL_74175, name) \
NET_CONNECT(name, GND, GND) \
NET_CONNECT(name, VCC, VCC) \
NET_CONNECT(name, CLK, cCLK) \
NET_CONNECT(name, D1, cD1) \
NET_CONNECT(name, D2, cD2) \
NET_CONNECT(name, D3, cD3) \
NET_CONNECT(name, D4, cD4) \
NET_CONNECT(name, CLRQ, cCLRQ)
#define TTL_74175_DIP(name) \
#define TTL_74175_DIP(name) \
NET_REGISTER_DEV(TTL_74175_DIP, name)

68
src/lib/netlist/devices/nld_74192.cpp
View File

@ -7,6 +7,7 @@
#include "nld_74192.h"
#include "netlist/nl_base.h"
#include "nlid_system.h"
namespace netlist
{
@ -15,35 +16,9 @@ namespace netlist
static constexpr const unsigned MAXCNT = 9;
NETLIB_OBJECT(74192_subABCD)
{
NETLIB_CONSTRUCTOR(74192_subABCD)
, m_A(*this, "A")
, m_B(*this, "B")
, m_C(*this, "C")
, m_D(*this, "D")
{
}
//NETLIB_RESETI()
//NETLIB_UPDATEI();
public:
logic_input_t m_A;
logic_input_t m_B;
logic_input_t m_C;
logic_input_t m_D;
unsigned read_ABCD() const
{
return (m_D() << 3) | (m_C() << 2) | (m_B() << 1) | (m_A() << 0);
}
};
NETLIB_OBJECT(74192)
{
NETLIB_CONSTRUCTOR(74192)
, m_ABCD(*this, "subABCD")
, m_CLEAR(*this, "CLEAR")
, m_LOADQ(*this, "LOADQ")
, m_CU(*this, "CU")
@ -54,18 +29,18 @@ namespace netlist
, m_Q(*this, {{"QA", "QB", "QC", "QD"}})
, m_BORROWQ(*this, "BORROWQ")
, m_CARRYQ(*this, "CARRYQ")
, m_A(*this, "A", NETLIB_DELEGATE(74192, sub))
, m_B(*this, "B", NETLIB_DELEGATE(74192, sub))
, m_C(*this, "C", NETLIB_DELEGATE(74192, sub))
, m_D(*this, "D", NETLIB_DELEGATE(74192, sub))
, m_power_pins(*this)
{
register_subalias("A", m_ABCD.m_A);
register_subalias("B", m_ABCD.m_B);
register_subalias("C", m_ABCD.m_C);
register_subalias("D", m_ABCD.m_D);
}
NETLIB_RESETI();
NETLIB_UPDATEI();
protected:
NETLIB_SUB(74192_subABCD) m_ABCD;
logic_input_t m_CLEAR;
logic_input_t m_LOADQ;
logic_input_t m_CU;
@ -78,27 +53,46 @@ namespace netlist
object_array_t<logic_output_t, 4> m_Q;
logic_output_t m_BORROWQ;
logic_output_t m_CARRYQ;
logic_input_t m_A;
logic_input_t m_B;
logic_input_t m_C;
logic_input_t m_D;
nld_power_pins m_power_pins;
NETLIB_HANDLERI(sub)
{
// FIXME: can use more optimization
}
unsigned read_ABCD() const
{
return (m_D() << 3) | (m_C() << 2) | (m_B() << 1) | (m_A() << 0);
}
};
NETLIB_OBJECT_DERIVED(74192_dip, 74192)
{
NETLIB_CONSTRUCTOR_DERIVED(74192_dip, 74192)
{
register_subalias("1", m_ABCD.m_B);
register_subalias("1", m_B);
register_subalias("2", m_Q[1]);
register_subalias("3", m_Q[0]);
register_subalias("4", m_CD);
register_subalias("5", m_CU);
register_subalias("6", m_Q[2]);
register_subalias("7", m_Q[3]);
register_subalias("8", "GND");
register_subalias("9", m_ABCD.m_D);
register_subalias("10", m_ABCD.m_C);
register_subalias("9", m_D);
register_subalias("10", m_C);
register_subalias("11", m_LOADQ);
register_subalias("12", m_CARRYQ);
register_subalias("13", m_BORROWQ);
register_subalias("14", m_CLEAR);
register_subalias("15", m_ABCD.m_A);
register_subalias("15", m_A);
register_subalias("16", "VCC");
}
};
@ -128,7 +122,7 @@ namespace netlist
}
else if (!m_LOADQ())
{
m_cnt = m_ABCD.read_ABCD();
m_cnt = read_ABCD();
}
else
{
@ -162,7 +156,7 @@ namespace netlist
m_CARRYQ.push(tCarry, NLTIME_FROM_NS(20)); //FIXME
}
NETLIB_DEVICE_IMPL(74192, "TTL_74192", "+A,+B,+C,+D,+CLEAR,+LOADQ,+CU,+CD")
NETLIB_DEVICE_IMPL(74192, "TTL_74192", "+A,+B,+C,+D,+CLEAR,+LOADQ,+CU,+CD,@VCC,@GND")
NETLIB_DEVICE_IMPL(74192_dip,"TTL_74192_DIP", "")
} //namespace devices

22
src/lib/netlist/devices/nld_74192.h
View File

@ -31,18 +31,20 @@
#include "netlist/nl_setup.h"
#define TTL_74192(name, cA, cB, cC, cD, cCLEAR, cLOADQ, cCU, cCD) \
NET_REGISTER_DEV(TTL_74192, name) \
NET_CONNECT(name, A, cA) \
NET_CONNECT(name, B, cB) \
NET_CONNECT(name, C, cC) \
NET_CONNECT(name, D, cD) \
NET_CONNECT(name, CLEAR, cCLEAR) \
NET_CONNECT(name, LOADQ, cLOADQ) \
NET_CONNECT(name, CU, cCU) \
#define TTL_74192(name, cA, cB, cC, cD, cCLEAR, cLOADQ, cCU, cCD) \
NET_REGISTER_DEV(TTL_74192, name) \
NET_CONNECT(name, GND, GND) \
NET_CONNECT(name, VCC, VCC) \
NET_CONNECT(name, A, cA) \
NET_CONNECT(name, B, cB) \
NET_CONNECT(name, C, cC) \
NET_CONNECT(name, D, cD) \
NET_CONNECT(name, CLEAR, cCLEAR) \
NET_CONNECT(name, LOADQ, cLOADQ) \
NET_CONNECT(name, CU, cCU) \
NET_CONNECT(name, CD, cCD)
#define TTL_74192_DIP(name) \
#define TTL_74192_DIP(name) \
NET_REGISTER_DEV(TTL_74192_DIP, name)
#endif /* NLD_74192_H_ */

8
src/lib/netlist/devices/nld_74193.cpp
View File

@ -7,6 +7,7 @@
#include "nld_74193.h"
#include "netlist/nl_base.h"
#include "nlid_system.h"
namespace netlist
{
@ -31,6 +32,7 @@ namespace netlist
, m_Q(*this, {{"QA", "QB", "QC", "QD"}})
, m_BORROWQ(*this, "BORROWQ")
, m_CARRYQ(*this, "CARRYQ")
, m_power_pins(*this)
{
}
@ -54,6 +56,7 @@ namespace netlist
object_array_t<logic_output_t, 4> m_Q;
logic_output_t m_BORROWQ;
logic_output_t m_CARRYQ;
nld_power_pins m_power_pins;
};
NETLIB_OBJECT_DERIVED(74193_dip, 74193)
@ -67,6 +70,7 @@ namespace netlist
register_subalias("5", m_CU);
register_subalias("6", m_Q[2]);
register_subalias("7", m_Q[3]);
register_subalias("8", "GND");
register_subalias("9", m_D);
register_subalias("10", m_C);
@ -75,7 +79,7 @@ namespace netlist
register_subalias("13", m_BORROWQ);
register_subalias("14", m_CLEAR);
register_subalias("15", m_A);
register_subalias("16", "VCC");
}
};
@ -139,7 +143,7 @@ namespace netlist
m_CARRYQ.push(tCarry, NLTIME_FROM_NS(20)); //FIXME timing
}
NETLIB_DEVICE_IMPL(74193, "TTL_74193", "+A,+B,+C,+D,+CLEAR,+LOADQ,+CU,+CD")
NETLIB_DEVICE_IMPL(74193, "TTL_74193", "+A,+B,+C,+D,+CLEAR,+LOADQ,+CU,+CD,@VCC,@GND")
NETLIB_DEVICE_IMPL(74193_dip, "TTL_74193_DIP", "")
} //namespace devices

22
src/lib/netlist/devices/nld_74193.h
View File

@ -28,18 +28,20 @@
#include "netlist/nl_setup.h"
#define TTL_74193(name, cA, cB, cC, cD, cCLEAR, cLOADQ, cCU, cCD) \
NET_REGISTER_DEV(TTL_74193, name) \
NET_CONNECT(name, A, cA) \
NET_CONNECT(name, B, cB) \
NET_CONNECT(name, C, cC) \
NET_CONNECT(name, D, cD) \
NET_CONNECT(name, CLEAR, cCLEAR) \
NET_CONNECT(name, LOADQ, cLOADQ) \
NET_CONNECT(name, CU, cCU) \
#define TTL_74193(name, cA, cB, cC, cD, cCLEAR, cLOADQ, cCU, cCD) \
NET_REGISTER_DEV(TTL_74193, name) \
NET_CONNECT(name, GND, GND) \
NET_CONNECT(name, VCC, VCC) \
NET_CONNECT(name, A, cA) \
NET_CONNECT(name, B, cB) \
NET_CONNECT(name, C, cC) \
NET_CONNECT(name, D, cD) \
NET_CONNECT(name, CLEAR, cCLEAR) \
NET_CONNECT(name, LOADQ, cLOADQ) \
NET_CONNECT(name, CU, cCU) \
NET_CONNECT(name, CD, cCD)
#define TTL_74193_DIP(name) \
#define TTL_74193_DIP(name) \
NET_REGISTER_DEV(TTL_74193_DIP, name)
#endif /* NLD_74193_H_ */

7
src/lib/netlist/devices/nld_74194.cpp
View File

@ -7,6 +7,7 @@
#include "nld_74194.h"
#include "netlist/nl_base.h"
#include "nlid_system.h"
namespace netlist
{
@ -25,6 +26,7 @@ namespace netlist
, m_Q(*this, {{"QD", "QC", "QB", "QA"}})
, m_last_CLK(*this, "m_last_CLK", 0)
, m_last_Q(*this, "m_last_Q", 0)
, m_power_pins(*this)
{
}
@ -43,6 +45,7 @@ namespace netlist
state_var<unsigned> m_last_CLK;
state_var<unsigned> m_last_Q;
nld_power_pins m_power_pins;
};
NETLIB_OBJECT_DERIVED(74194_dip, 74194)
@ -56,6 +59,7 @@ namespace netlist
register_subalias("5", m_DATA[1]);
register_subalias("6", m_DATA[0]);
register_subalias("7", m_SLIN);
register_subalias("8", "GND");
register_subalias("9", m_S0);
register_subalias("10", m_S1);
@ -64,6 +68,7 @@ namespace netlist
register_subalias("13", m_Q[1]);
register_subalias("14", m_Q[2]);
register_subalias("15", m_Q[3]);
register_subalias("16", "VCC");
}
};
@ -116,7 +121,7 @@ namespace netlist
m_Q[i].push((q >> i) & 1, NLTIME_FROM_NS(26)); // FIXME: Timing
}
NETLIB_DEVICE_IMPL(74194, "TTL_74194", "+CLK,+S0,+S1,+SRIN,+A,+B,+C,+D,+SLIN,+CLRQ")
NETLIB_DEVICE_IMPL(74194, "TTL_74194", "+CLK,+S0,+S1,+SRIN,+A,+B,+C,+D,+SLIN,+CLRQ,@VCC,@GND")
NETLIB_DEVICE_IMPL(74194_dip, "TTL_74194_DIP", "")
} //namespace devices

26
src/lib/netlist/devices/nld_74194.h
View File

@ -28,20 +28,22 @@
#include "netlist/nl_setup.h"
#define TTL_74194(name, cCLK, cS0, cS1, cSRIN, cA, cB, cC, cD, cSLIN, cCLRQ) \
NET_REGISTER_DEV(TTL_74194, name) \
NET_CONNECT(name, CLK, cCLK) \
NET_CONNECT(name, S0, cS0) \
NET_CONNECT(name, S1, cS1) \
NET_CONNECT(name, SRIN, cSRIN) \
NET_CONNECT(name, A, cA) \
NET_CONNECT(name, B, cB) \
NET_CONNECT(name, C, cC) \
NET_CONNECT(name, D, cD) \
NET_CONNECT(name, SLIN, cSLIN) \
#define TTL_74194(name, cCLK, cS0, cS1, cSRIN, cA, cB, cC, cD, cSLIN, cCLRQ) \
NET_REGISTER_DEV(TTL_74194, name) \
NET_CONNECT(name, GND, GND) \
NET_CONNECT(name, VCC, VCC) \
NET_CONNECT(name, CLK, cCLK) \
NET_CONNECT(name, S0, cS0) \
NET_CONNECT(name, S1, cS1) \
NET_CONNECT(name, SRIN, cSRIN) \
NET_CONNECT(name, A, cA) \
NET_CONNECT(name, B, cB) \
NET_CONNECT(name, C, cC) \
NET_CONNECT(name, D, cD) \
NET_CONNECT(name, SLIN, cSLIN) \
NET_CONNECT(name, CLRQ, cCLRQ)
#define TTL_74194_DIP(name) \
#define TTL_74194_DIP(name) \
NET_REGISTER_DEV(TTL_74194_DIP, name)
#endif /* NLD_74194_H_ */

7
src/lib/netlist/devices/nld_74365.cpp
View File

@ -7,6 +7,7 @@
#include "nld_74365.h"
#include "netlist/nl_base.h"
#include "nlid_system.h"
namespace netlist
{
@ -27,6 +28,7 @@ namespace netlist
, m_G2Q(*this, "G2Q")
, m_A(*this, {{ "A1", "A2", "A3", "A4", "A5", "A6" }})
, m_Y(*this, {{ "Y1", "Y2", "Y3", "Y4", "Y5", "Y6" }})
, m_power_pins(*this)
{
}
@ -37,6 +39,7 @@ namespace netlist
logic_input_t m_G2Q;
object_array_t<logic_input_t, 6> m_A;
object_array_t<logic_output_t, 6> m_Y;
nld_power_pins m_power_pins;
};
NETLIB_OBJECT_DERIVED(74365_dip, 74365)
@ -50,6 +53,7 @@ namespace netlist
register_subalias("5", m_Y[1]);
register_subalias("6", m_A[2]);
register_subalias("7", m_Y[2]);
register_subalias("8", "GND");
register_subalias("9", m_A[3]);
register_subalias("10", m_Y[3]);
@ -58,6 +62,7 @@ namespace netlist
register_subalias("13", m_A[5]);
register_subalias("14", m_Y[5]);
register_subalias("15", m_G2Q);
register_subalias("16", "VCC");
}
};
@ -76,7 +81,7 @@ namespace netlist
}
}
NETLIB_DEVICE_IMPL(74365, "TTL_74365", "+G1Q,+G2Q,+A1,+A2,+A3,+A4,+A5,+A6")
NETLIB_DEVICE_IMPL(74365, "TTL_74365", "+G1Q,+G2Q,+A1,+A2,+A3,+A4,+A5,+A6,@VCC,@GND")
NETLIB_DEVICE_IMPL(74365_dip, "TTL_74365_DIP", "")
} //namespace devices

22
src/lib/netlist/devices/nld_74365.h
View File

@ -27,18 +27,20 @@
#include "netlist/nl_setup.h"
#define TTL_74365(name, cG1Q, cG2Q, cA1, cA2, cA3, cA4, cA5, cA6) \
NET_REGISTER_DEV(TTL_74365, name) \
NET_CONNECT(name, G1Q, cG1Q) \
NET_CONNECT(name, G2Q, cG2Q) \
NET_CONNECT(name, A1, cA1) \
NET_CONNECT(name, A2, cA2) \
NET_CONNECT(name, A3, cA3) \
NET_CONNECT(name, A4, cA4) \
NET_CONNECT(name, A5, cA5) \
#define TTL_74365(name, cG1Q, cG2Q, cA1, cA2, cA3, cA4, cA5, cA6) \
NET_REGISTER_DEV(TTL_74365, name) \
NET_CONNECT(name, GND, GND) \
NET_CONNECT(name, VCC, VCC) \
NET_CONNECT(name, G1Q, cG1Q) \
NET_CONNECT(name, G2Q, cG2Q) \
NET_CONNECT(name, A1, cA1) \
NET_CONNECT(name, A2, cA2) \
NET_CONNECT(name, A3, cA3) \
NET_CONNECT(name, A4, cA4) \
NET_CONNECT(name, A5, cA5) \
NET_CONNECT(name, A6, cA6)
#define TTL_74365_DIP(name) \
#define TTL_74365_DIP(name) \
NET_REGISTER_DEV(TTL_74365_DIP, name)
#endif /* NLD_74365_H_ */

13
src/lib/netlist/devices/nld_7450.cpp
View File

@ -7,6 +7,7 @@
#include "nld_7450.h"
#include "netlist/nl_base.h"
#include "nlid_system.h"
namespace netlist
{
@ -20,6 +21,7 @@ namespace netlist
, m_C(*this, "C")
, m_D(*this, "D")
, m_Q(*this, "Q")
, m_power_pins(*this)
{
}
//NETLIB_RESETI();
@ -31,6 +33,7 @@ namespace netlist
logic_input_t m_C;
logic_input_t m_D;
logic_output_t m_Q;
nld_power_pins m_power_pins;
};
NETLIB_OBJECT(7450_dip)
@ -45,7 +48,7 @@ namespace netlist
register_subalias("4", m_2.m_C);
register_subalias("5", m_2.m_D);
register_subalias("6", m_2.m_Q);
//register_subalias("7",); GND
register_subalias("7", "1.GND");
register_subalias("8", m_1.m_Q);
register_subalias("9", m_1.m_C);
@ -53,7 +56,11 @@ namespace netlist
//register_subalias("11", m_1.m_X1);
//register_subalias("12", m_1.m_X1Q);
register_subalias("13", m_1.m_B);
//register_subalias("14",); VCC
register_subalias("14", "1.VCC");
connect("1.GND", "2.GND");
connect("1.VCC", "2.VCC");
}
//NETLIB_RESETI();
//NETLIB_UPDATEI();
@ -97,7 +104,7 @@ namespace netlist
m_Q.push(res, times[res]);// ? 22000 : 15000);
}
NETLIB_DEVICE_IMPL(7450, "TTL_7450_ANDORINVERT", "+A,+B,+C,+D")
NETLIB_DEVICE_IMPL(7450, "TTL_7450_ANDORINVERT", "+A,+B,+C,+D,@VCC,@GND")
NETLIB_DEVICE_IMPL(7450_dip, "TTL_7450_DIP", "")
} //namespace devices

14
src/lib/netlist/devices/nld_7450.h
View File

@ -26,14 +26,16 @@
#include "netlist/nl_setup.h"
#define TTL_7450_ANDORINVERT(name, cI1, cI2, cI3, cI4) \
NET_REGISTER_DEV(TTL_7450_ANDORINVERT, name) \
NET_CONNECT(name, A, cI1) \
NET_CONNECT(name, B, cI2) \
NET_CONNECT(name, C, cI3) \
#define TTL_7450_ANDORINVERT(name, cI1, cI2, cI3, cI4) \
NET_REGISTER_DEV(TTL_7450_ANDORINVERT, name) \
NET_CONNECT(name, GND, GND) \
NET_CONNECT(name, VCC, VCC) \
NET_CONNECT(name, A, cI1) \
NET_CONNECT(name, B, cI2) \
NET_CONNECT(name, C, cI3) \
NET_CONNECT(name, D, cI4)
#define TTL_7450_DIP(name) \
#define TTL_7450_DIP(name) \
NET_REGISTER_DEV(TTL_7450_DIP, name)
#endif /* NLD_7450_H_ */

11
src/lib/netlist/devices/nld_7473.cpp
View File

@ -7,6 +7,7 @@
#include "nld_7473.h"
#include "netlist/nl_base.h"
#include "nlid_system.h"
namespace netlist
{
@ -23,6 +24,7 @@ namespace netlist
, m_q(*this, "m_q", 0)
, m_Q(*this, "Q")
, m_QQ(*this, "QQ")
, m_power_pins(*this)
{
}
@ -40,6 +42,7 @@ namespace netlist
logic_output_t m_Q;
logic_output_t m_QQ;
nld_power_pins m_power_pins;
};
NETLIB_OBJECT_DERIVED(7473A, 7473)
@ -58,7 +61,7 @@ namespace netlist
register_subalias("1", m_1.m_CLK);
register_subalias("2", m_1.m_CLRQ);
register_subalias("3", m_1.m_K);
//register_subalias("4", ); ==> VCC
register_subalias("4", "VCC");
register_subalias("5", m_2.m_CLK);
register_subalias("6", m_2.m_CLRQ);
register_subalias("7", m_2.m_J);
@ -66,7 +69,7 @@ namespace netlist
register_subalias("8", m_2.m_QQ);
register_subalias("9", m_2.m_Q);
register_subalias("10", m_2.m_K);
//register_subalias("11", ); ==> VCC
register_subalias("11", "GND");
register_subalias("12", m_2.m_Q);
register_subalias("13", m_1.m_QQ);
register_subalias("14", m_1.m_J);
@ -142,8 +145,8 @@ namespace netlist
m_QQ.push(m_q ^ 1, NLTIME_FROM_NS(20)); // FIXME: timing
}
NETLIB_DEVICE_IMPL(7473, "TTL_7473", "+CLK,+J,+K,+CLRQ")
NETLIB_DEVICE_IMPL(7473A, "TTL_7473A", "+CLK,+J,+K,+CLRQ")
NETLIB_DEVICE_IMPL(7473, "TTL_7473", "+CLK,+J,+K,+CLRQ,@VCC,@GND")
NETLIB_DEVICE_IMPL(7473A, "TTL_7473A", "+CLK,+J,+K,+CLRQ,@VCC,@GND")
NETLIB_DEVICE_IMPL(7473_dip, "TTL_7473_DIP", "")
NETLIB_DEVICE_IMPL(7473A_dip, "TTL_7473A_DIP", "")

14
src/lib/netlist/devices/nld_7473.h
View File

@ -62,14 +62,16 @@
#include "netlist/nl_setup.h"
#define TTL_7473(name, cCLK, cJ, cK, cCLRQ) \
NET_REGISTER_DEV(TTL_7473, name) \
NET_CONNECT(name, CLK, cCLK) \
NET_CONNECT(name, J, cJ) \
NET_CONNECT(name, K, cK) \
#define TTL_7473(name, cCLK, cJ, cK, cCLRQ) \
NET_REGISTER_DEV(TTL_7473, name) \
NET_CONNECT(name, GND, GND) \
NET_CONNECT(name, VCC, VCC) \
NET_CONNECT(name, CLK, cCLK) \
NET_CONNECT(name, J, cJ) \
NET_CONNECT(name, K, cK) \
NET_CONNECT(name, CLRQ, cCLRQ)
#define TTL_7473A(name, cCLK, cJ, cK, cCLRQ) \
#define TTL_7473A(name, cCLK, cJ, cK, cCLRQ) \
TTL_7473(name, cCLK, cJ, cK, cCLRQ)
#define TTL_7473_DIP(name) \

13
src/lib/netlist/devices/nld_7474.cpp
View File

@ -8,6 +8,7 @@
#include "nld_7474.h"
#include "netlist/nl_base.h"
#include "nlid_system.h"
namespace netlist
{
@ -24,6 +25,7 @@ namespace netlist
, m_Q(*this, "Q")
, m_QQ(*this, "QQ")
, m_nextD(*this, "m_nextD", 0)
, m_power_pins(*this)
{
}
@ -41,6 +43,8 @@ namespace netlist
state_var<netlist_sig_t> m_nextD;
nld_power_pins m_power_pins;
void newstate(const netlist_sig_t stateQ, const netlist_sig_t stateQQ)
{
// 0: High-to-low 40 ns, 1: Low-to-high 25 ns
@ -62,7 +66,7 @@ namespace netlist
register_subalias("4", "1.PREQ");
register_subalias("5", "1.Q");
register_subalias("6", "1.QQ");
// register_subalias("7", ); ==> GND
register_subalias("7", "1.GND");
register_subalias("8", "2.QQ");
register_subalias("9", "2.Q");
@ -70,7 +74,10 @@ namespace netlist
register_subalias("11", "2.CLK");
register_subalias("12", "2.D");
register_subalias("13", "2.CLRQ");
// register_subalias("14", ); ==> VCC
register_subalias("14", "1.VCC");
connect("1.GND", "2.GND");
connect("1.VCC", "2.VCC");
}
NETLIB_UPDATEI();
NETLIB_RESETI();
@ -119,7 +126,7 @@ namespace netlist
{
}
NETLIB_DEVICE_IMPL(7474, "TTL_7474", "+CLK,+D,+CLRQ,+PREQ")
NETLIB_DEVICE_IMPL(7474, "TTL_7474", "+CLK,+D,+CLRQ,+PREQ,@VCC,@GND")
NETLIB_DEVICE_IMPL(7474_dip, "TTL_7474_DIP", "")
} //namespace devices

14
src/lib/netlist/devices/nld_7474.h
View File

@ -44,14 +44,16 @@
#include "netlist/nl_setup.h"
#define TTL_7474(name, cCLK, cD, cCLRQ, cPREQ) \
NET_REGISTER_DEV(TTL_7474, name) \
NET_CONNECT(name, CLK, cCLK) \
NET_CONNECT(name, D, cD) \
NET_CONNECT(name, CLRQ, cCLRQ) \
#define TTL_7474(name, cCLK, cD, cCLRQ, cPREQ) \
NET_REGISTER_DEV(TTL_7474, name) \
NET_CONNECT(name, GND, GND) \
NET_CONNECT(name, VCC, VCC) \
NET_CONNECT(name, CLK, cCLK) \
NET_CONNECT(name, D, cD) \
NET_CONNECT(name, CLRQ, cCLRQ) \
NET_CONNECT(name, PREQ, cPREQ)
#define TTL_7474_DIP(name) \
#define TTL_7474_DIP(name) \
NET_REGISTER_DEV(TTL_7474_DIP, name)
#endif /* NLD_7474_H_ */

7
src/lib/netlist/devices/nld_7475.cpp
View File

@ -8,6 +8,7 @@
#include "nld_7475.h"
#include "netlist/nl_base.h"
#include "nlid_system.h"
namespace netlist
{
@ -21,6 +22,7 @@ namespace netlist
, m_last_Q(*this, "m_last_Q", 0)
, m_D(*this, {{"D1", "D2", "D3", "D4"}})
, m_Q(*this, {{"Q1", "Q2", "Q3", "Q4"}})
, m_power_pins(*this)
{
register_subalias("Q1", m_Q[0]);
}
@ -36,6 +38,7 @@ namespace netlist
state_var<unsigned> m_last_Q;
object_array_t<logic_input_t, 4> m_D;
object_array_t<logic_output_t, 4> m_Q;
nld_power_pins m_power_pins;
};
NETLIB_OBJECT_DERIVED(7475, 7477)
@ -59,7 +62,7 @@ namespace netlist
register_subalias("2", m_D[0]);
register_subalias("3", m_D[1]);
register_subalias("4", m_C3C4);
//register_subalias("5", ); ==> VCC
register_subalias("5", "VCC");
register_subalias("6", m_D[2]);
register_subalias("7", m_D[3]);
register_subalias("8", m_QQ[3]);
@ -67,7 +70,7 @@ namespace netlist
register_subalias("9", m_Q[3]);
register_subalias("10", m_Q[2]);
register_subalias("11", m_QQ[2]);
//register_subalias("12", ); ==> GND
register_subalias("12", "GND");
register_subalias("13", m_C1C2);
register_subalias("14", m_QQ[1]);
register_subalias("15", m_Q[1]);

26
src/lib/netlist/devices/nld_7475.h
View File

@ -37,26 +37,28 @@
#include "netlist/nl_setup.h"
#define PARAMS_7475_7477(name, cC1C2, cC3C4, cD1, cD2, cD3, cD4) \
NET_CONNECT(name, C1C2, cC1C2) \
NET_CONNECT(name, C3C4, cC3C4) \
NET_CONNECT(name, D1, cD1) \
NET_CONNECT(name, D2, cD2) \
NET_CONNECT(name, D3, cD3) \
#define PARAMS_7475_7477(name, cC1C2, cC3C4, cD1, cD2, cD3, cD4) \
NET_CONNECT(name, GND, GND) \
NET_CONNECT(name, VCC, VCC) \
NET_CONNECT(name, C1C2, cC1C2) \
NET_CONNECT(name, C3C4, cC3C4) \
NET_CONNECT(name, D1, cD1) \
NET_CONNECT(name, D2, cD2) \
NET_CONNECT(name, D3, cD3) \
NET_CONNECT(name, D4, cD4)
#define TTL_7475(name, cC1C2, cC3C4, cD1, cD2, cD3, cD4) \
NET_REGISTER_DEV(TTL_7475, name) \
#define TTL_7475(name, cC1C2, cC3C4, cD1, cD2, cD3, cD4) \
NET_REGISTER_DEV(TTL_7475, name) \
PARAMS_7475_7477(name, cC1C2, cC3C4, cD1, cD2, cD3, cD4)
#define TTL_7477(name, cC1C2, cC3C4, cD1, cD2, cD3, cD4) \
NET_REGISTER_DEV(TTL_7477, name) \
#define TTL_7477(name, cC1C2, cC3C4, cD1, cD2, cD3, cD4) \
NET_REGISTER_DEV(TTL_7477, name) \
PARAMS_7475_7477(name, cC1C2, cC3C4, cD1, cD2, cD3, cD4)
#define TTL_7475_DIP(name) \
#define TTL_7475_DIP(name) \
NET_REGISTER_DEV(TTL_7475_DIP, name)
#define TTL_7477_DIP(name) \
#define TTL_7477_DIP(name) \
NET_REGISTER_DEV(TTL_7477_DIP, name)
#endif /* NLD_7475_H_ */

10
src/lib/netlist/devices/nld_7483.cpp
View File

@ -7,6 +7,7 @@
#include "nld_7483.h"
#include "netlist/nl_base.h"
#include "nlid_system.h"
namespace netlist
{
@ -32,6 +33,7 @@ namespace netlist
, m_S3(*this, "S3")
, m_S4(*this, "S4")
, m_C4(*this, "C4")
, m_power_pins(*this)
{
}
NETLIB_RESETI();
@ -59,7 +61,7 @@ namespace netlist
logic_output_t m_S3;
logic_output_t m_S4;
logic_output_t m_C4;
nld_power_pins m_power_pins;
};
NETLIB_OBJECT_DERIVED(7483_dip, 7483)
@ -70,7 +72,7 @@ namespace netlist
register_subalias("2", m_S3);
register_subalias("3", m_A3);
register_subalias("4", m_B3);
// register_subalias("5", ); --> VCC
register_subalias("5", "VCC");
register_subalias("6", m_S2);
register_subalias("7", m_B2);
register_subalias("8", m_A2);
@ -78,7 +80,7 @@ namespace netlist
register_subalias("9", m_S1);
register_subalias("10", m_A1);
register_subalias("11", m_B1);
// register_subalias("12", ); --> GND
register_subalias("12", "GND");
register_subalias("13", m_C0);
register_subalias("14", m_C4);
register_subalias("15", m_S4);
@ -120,7 +122,7 @@ namespace netlist
}
}
NETLIB_DEVICE_IMPL(7483, "TTL_7483", "+A1,+A2,+A3,+A4,+B1,+B2,+B3,+B4,+C0")
NETLIB_DEVICE_IMPL(7483, "TTL_7483", "+A1,+A2,+A3,+A4,+B1,+B2,+B3,+B4,+C0,@VCC,@GND")
NETLIB_DEVICE_IMPL(7483_dip, "TTL_7483_DIP", "")
} //namespace devices

24
src/lib/netlist/devices/nld_7483.h
View File

@ -29,19 +29,21 @@
#include "netlist/nl_setup.h"
#define TTL_7483(name, cA1, cA2, cA3, cA4, cB1, cB2, cB3, cB4, cCI) \
NET_REGISTER_DEV(TTL_7483, name) \
NET_CONNECT(name, A1, cA1) \
NET_CONNECT(name, A2, cA2) \
NET_CONNECT(name, A3, cA3) \
NET_CONNECT(name, A4, cA4) \
NET_CONNECT(name, B1, cB1) \
NET_CONNECT(name, B2, cB2) \
NET_CONNECT(name, B3, cB3) \
NET_CONNECT(name, B4, cB4) \
#define TTL_7483(name, cA1, cA2, cA3, cA4, cB1, cB2, cB3, cB4, cCI) \
NET_REGISTER_DEV(TTL_7483, name) \
NET_CONNECT(name, GND, GND) \
NET_CONNECT(name, VCC, VCC) \
NET_CONNECT(name, A1, cA1) \
NET_CONNECT(name, A2, cA2) \
NET_CONNECT(name, A3, cA3) \
NET_CONNECT(name, A4, cA4) \
NET_CONNECT(name, B1, cB1) \
NET_CONNECT(name, B2, cB2) \
NET_CONNECT(name, B3, cB3) \
NET_CONNECT(name, B4, cB4) \
NET_CONNECT(name, C0, cCI)
#define TTL_7483_DIP(name) \
#define TTL_7483_DIP(name) \
NET_REGISTER_DEV(TTL_7483_DIP, name)
#endif /* NLD_7483_H_ */

7
src/lib/netlist/devices/nld_7485.cpp
View File

@ -7,6 +7,7 @@
#include "nld_7485.h"
#include "netlist/nl_base.h"
#include "nlid_system.h"
namespace netlist
{
@ -23,6 +24,7 @@ namespace netlist
, m_LTOUT(*this, "LTOUT")
, m_EQOUT(*this, "EQOUT")
, m_GTOUT(*this, "GTOUT")
, m_power_pins(*this)
{
}
@ -39,6 +41,7 @@ namespace netlist
logic_output_t m_LTOUT;
logic_output_t m_EQOUT;
logic_output_t m_GTOUT;
nld_power_pins m_power_pins;
};
NETLIB_OBJECT_DERIVED(7485_dip, 7485)
@ -52,6 +55,7 @@ namespace netlist
register_subalias("5", m_GTOUT);
register_subalias("6", m_EQOUT);
register_subalias("7", m_LTOUT);
register_subalias("8", "GND");
register_subalias("9", m_B[0]);
register_subalias("10", m_A[0]);
@ -60,6 +64,7 @@ namespace netlist
register_subalias("13", m_A[2]);
register_subalias("14", m_B[2]);
register_subalias("15", m_A[3]);
register_subalias("16", "VCC");
}
};
@ -101,7 +106,7 @@ namespace netlist
update_outputs(1, 1, 0);
}
NETLIB_DEVICE_IMPL(7485, "TTL_7485", "+A0,+A1,+A2,+A3,+B0,+B1,+B2,+B3,+LTIN,+EQIN,+GTIN")
NETLIB_DEVICE_IMPL(7485, "TTL_7485", "+A0,+A1,+A2,+A3,+B0,+B1,+B2,+B3,+LTIN,+EQIN,+GTIN,@VCC,@GND")
NETLIB_DEVICE_IMPL(7485_dip, "TTL_7485_DIP", "")
} //namespace devices

24
src/lib/netlist/devices/nld_7485.h
View File

@ -26,17 +26,19 @@
#include "netlist/nl_setup.h"
#define TTL_7485(name, cA0, cA1, cA2, cA3, cB0, cB1, cB2, cB3, cLTIN, cEQIN, cGTIN) \
NET_REGISTER_DEV(TTL_7485, name) \
NET_CONNECT(name, A0, cA0) \
NET_CONNECT(name, A1, cA1) \
NET_CONNECT(name, A2, cA2) \
NET_CONNECT(name, A3, cA3) \
NET_CONNECT(name, B0, cB0) \
NET_CONNECT(name, B1, cB1) \
NET_CONNECT(name, B2, cB2) \
NET_CONNECT(name, B3, cB3) \
NET_CONNECT(name, LTIN, cLTIN) \
NET_CONNECT(name, EQIN, cEQIN) \
NET_REGISTER_DEV(TTL_7485, name) \
NET_CONNECT(name, GND, GND) \
NET_CONNECT(name, VCC, VCC) \
NET_CONNECT(name, A0, cA0) \
NET_CONNECT(name, A1, cA1) \
NET_CONNECT(name, A2, cA2) \
NET_CONNECT(name, A3, cA3) \
NET_CONNECT(name, B0, cB0) \
NET_CONNECT(name, B1, cB1) \
NET_CONNECT(name, B2, cB2) \
NET_CONNECT(name, B3, cB3) \
NET_CONNECT(name, LTIN, cLTIN) \
NET_CONNECT(name, EQIN, cEQIN) \
NET_CONNECT(name, GTIN, cGTIN)
#define TTL_7485_DIP(name) \

9
src/lib/netlist/devices/nld_7490.cpp
View File

@ -7,6 +7,7 @@
#include "nld_7490.h"
#include "netlist/nl_base.h"
#include "nlid_system.h"
namespace netlist
{
@ -25,6 +26,7 @@ namespace netlist
, m_last_A(*this, "m_last_A", 0)
, m_last_B(*this, "m_last_B", 0)
, m_Q(*this, {{"QA", "QB", "QC", "QD"}})
, m_power_pins(*this)
{
}
@ -46,6 +48,7 @@ namespace netlist
state_var<netlist_sig_t> m_last_B;
object_array_t<logic_output_t, 4> m_Q;
nld_power_pins m_power_pins;
};
NETLIB_OBJECT_DERIVED(7490_dip, 7490)
@ -57,13 +60,13 @@ namespace netlist
register_subalias("3", "R2");
// register_subalias("4", ); --> NC
// register_subalias("5", ); --> VCC
register_subalias("5", "VCC");
register_subalias("6", "R91");
register_subalias("7", "R92");
register_subalias("8", "QC");
register_subalias("9", "QB");
// register_subalias("10", ); --> GND
register_subalias("10", "GND");
register_subalias("11", "QD");
register_subalias("12", "QA");
// register_subalias("13", ); --> NC
@ -126,7 +129,7 @@ namespace netlist
m_Q[i].push((m_cnt >> i) & 1, delay[i]);
}
NETLIB_DEVICE_IMPL(7490, "TTL_7490", "+A,+B,+R1,+R2,+R91,+R92")
NETLIB_DEVICE_IMPL(7490, "TTL_7490", "+A,+B,+R1,+R2,+R91,+R92,@VCC,@GND")
NETLIB_DEVICE_IMPL(7490_dip, "TTL_7490_DIP", "")
} //namespace devices

18
src/lib/netlist/devices/nld_7490.h
View File

@ -57,16 +57,18 @@
#include "netlist/nl_setup.h"
#define TTL_7490(name, cA, cB, cR1, cR2, cR91, cR92) \
NET_REGISTER_DEV(TTL_7490, name) \
NET_CONNECT(name, A, cA) \
NET_CONNECT(name, B, cB) \
NET_CONNECT(name, R1, cR1) \
NET_CONNECT(name, R2, cR2) \
NET_CONNECT(name, R91, cR91) \
#define TTL_7490(name, cA, cB, cR1, cR2, cR91, cR92) \
NET_REGISTER_DEV(TTL_7490, name) \
NET_CONNECT(name, GND, GND) \
NET_CONNECT(name, VCC, VCC) \
NET_CONNECT(name, A, cA) \
NET_CONNECT(name, B, cB) \
NET_CONNECT(name, R1, cR1) \
NET_CONNECT(name, R2, cR2) \
NET_CONNECT(name, R91, cR91) \
NET_CONNECT(name, R92, cR92)
#define TTL_7490_DIP(name) \
#define TTL_7490_DIP(name) \
NET_REGISTER_DEV(TTL_7490_DIP, name)
#endif /* NLD_7490_H_ */

9
src/lib/netlist/devices/nld_7493.cpp
View File

@ -7,6 +7,7 @@
#include "nld_7493.h"
#include "netlist/nl_base.h"
#include "nlid_system.h"
namespace netlist
{
@ -30,6 +31,7 @@ namespace netlist
, m_QB(*this, "QB")
, m_QC(*this, "QC")
, m_QD(*this, "QD")
, m_power_pins(*this)
{
}
@ -87,6 +89,7 @@ namespace netlist
logic_output_t m_QB;
logic_output_t m_QC;
logic_output_t m_QD;
nld_power_pins m_power_pins;
};
NETLIB_OBJECT_DERIVED(7493_dip, 7493)
@ -98,13 +101,13 @@ namespace netlist
register_subalias("3", "R2");
// register_subalias("4", ); --> NC
// register_subalias("5", ); --> VCC
register_subalias("5", "VCC");
// register_subalias("6", ); --> NC
// register_subalias("7", ); --> NC
register_subalias("8", "QC");
register_subalias("9", "QB");
// register_subalias("10", ); -. GND
register_subalias("10", "GND");
register_subalias("11", "QD");
register_subalias("12", "QA");
// register_subalias("13", ); -. NC
@ -113,7 +116,7 @@ namespace netlist
};
NETLIB_DEVICE_IMPL(7493, "TTL_7493", "+CLKA,+CLKB,+R1,+R2")
NETLIB_DEVICE_IMPL(7493, "TTL_7493", "+CLKA,+CLKB,+R1,+R2,@VCC,@GND")
NETLIB_DEVICE_IMPL(7493_dip, "TTL_7493_DIP", "")
} //namespace devices

14
src/lib/netlist/devices/nld_7493.h
View File

@ -59,14 +59,16 @@
#include "netlist/nl_setup.h"
#define TTL_7493(name, cCLKA, cCLKB, cR1, cR2) \
NET_REGISTER_DEV(TTL_7493, name) \
NET_CONNECT(name, CLKA, cCLKA) \
NET_CONNECT(name, CLKB, cCLKB) \
NET_CONNECT(name, R1, cR1) \
#define TTL_7493(name, cCLKA, cCLKB, cR1, cR2) \
NET_REGISTER_DEV(TTL_7493, name) \
NET_CONNECT(name, GND, GND) \
NET_CONNECT(name, VCC, VCC) \
NET_CONNECT(name, CLKA, cCLKA) \
NET_CONNECT(name, CLKB, cCLKB) \
NET_CONNECT(name, R1, cR1) \
NET_CONNECT(name, R2, cR2)
#define TTL_7493_DIP(name) \
#define TTL_7493_DIP(name) \
NET_REGISTER_DEV(TTL_7493_DIP, name)
#endif /* NLD_7493_H_ */

7
src/lib/netlist/devices/nld_7497.cpp
View File

@ -11,6 +11,7 @@
#include "nld_7497.h"
#include "netlist/nl_base.h"
#include "nlid_system.h"
namespace netlist
{
@ -36,6 +37,7 @@ namespace netlist
, m_rate(*this, "_m_rate", 0)
, m_state(*this, "_m_state", 0)
, m_lastclock(*this, "_m_lastclock", 0)
, m_power_pins(*this)
{
}
@ -64,6 +66,7 @@ namespace netlist
state_var_u8 m_rate;
state_var_sig m_state;
state_var_sig m_lastclock;
nld_power_pins m_power_pins;
void newstate(const netlist_sig_t state)
{
@ -155,6 +158,7 @@ namespace netlist
register_subalias("5", m_ZQ);
register_subalias("6", m_Y);
register_subalias("7", m_ENOUTQ);
register_subalias("8", "GND");
register_subalias("9", m_CLK);
register_subalias("10", m_STRBQ);
@ -163,11 +167,12 @@ namespace netlist
register_subalias("13", m_CLR);
register_subalias("14", m_B[3]); // B2
register_subalias("15", m_B[2]); // B3
register_subalias("16", "VCC");
}
};
NETLIB_DEVICE_IMPL(7497, "TTL_7497", "+CLK,+STRBQ,+ENQ,+UNITYQ,+CLR,+B0,+B1,+B2,+B3,+B4,+B5")
NETLIB_DEVICE_IMPL(7497, "TTL_7497", "+CLK,+STRBQ,+ENQ,+UNITYQ,+CLR,+B0,+B1,+B2,+B3,+B4,+B5, @VCC, @GND")
NETLIB_DEVICE_IMPL(7497_dip, "TTL_7497_DIP", "")
} //namespace devices

26
src/lib/netlist/devices/nld_7497.h
View File

@ -38,20 +38,22 @@
#include "netlist/nl_setup.h"
#define TTL_7497(name, cCLK, cSTRB, cEN, cUNITY, cCLR, cB0, cB1, cB2, cB3, cB4, cB5) \
NET_REGISTER_DEV(TTL_7497, name) \
NET_CONNECT(name, CLK, cCLK) \
NET_CONNECT(name, STRBQ, cSTRB) \
NET_CONNECT(name, ENQ, cEN) \
NET_CONNECT(name, UNITYQ,cUNITY) \
NET_CONNECT(name, CLR, cCLR) \
NET_CONNECT(name, B0, cB0) \
NET_CONNECT(name, B1, cB1) \
NET_CONNECT(name, B2, cB2) \
NET_CONNECT(name, B3, cB3) \
NET_CONNECT(name, B4, cB4) \
NET_REGISTER_DEV(TTL_7497, name) \
NET_CONNECT(name, GND, GND) \
NET_CONNECT(name, VCC, VCC) \
NET_CONNECT(name, CLK, cCLK) \
NET_CONNECT(name, STRBQ, cSTRB) \
NET_CONNECT(name, ENQ, cEN) \
NET_CONNECT(name, UNITYQ,cUNITY) \
NET_CONNECT(name, CLR, cCLR) \
NET_CONNECT(name, B0, cB0) \
NET_CONNECT(name, B1, cB1) \
NET_CONNECT(name, B2, cB2) \
NET_CONNECT(name, B3, cB3) \
NET_CONNECT(name, B4, cB4) \
NET_CONNECT(name, B5, cB5)
#define TTL_7497_DIP(name) \
#define TTL_7497_DIP(name) \
NET_REGISTER_DEV(TTL_7497_DIP, name)
#endif /* NLD_7497_H_ */

8
src/lib/netlist/devices/nld_82S115.cpp
View File

@ -7,6 +7,7 @@
#include "nld_82S115.h"
#include "netlist/nl_base.h"
#include "nlid_system.h"
namespace netlist
{
@ -22,6 +23,7 @@ namespace netlist
, m_O(*this, {{"O1", "O2", "O3", "O4", "O5", "O6", "O7", "O8"}})
, m_last_O(*this, "m_last_O", 0)
, m_ROM(*this, "ROM")
, m_power_pins(*this)
{
}
@ -38,6 +40,7 @@ namespace netlist
state_var<unsigned> m_last_O;
param_rom_t<uint8_t, 9, 8> m_ROM; // 4096 bits, 512x8
nld_power_pins m_power_pins;
};
NETLIB_OBJECT_DERIVED(82S115_dip, 82S115)
@ -70,6 +73,9 @@ namespace netlist
register_subalias("15", m_O[5]);
register_subalias("16", m_O[6]);
register_subalias("17", m_O[7]);
register_subalias("12", "GND");
register_subalias("24", "VCC");
}
};
@ -106,7 +112,7 @@ namespace netlist
m_O[i].push((o >> i) & 1, NLTIME_FROM_NS(40)); // FIXME: Timing
}
NETLIB_DEVICE_IMPL(82S115, "PROM_82S115", "+CE1Q,+CE2,+A0,+A1,+A2,+A3,+A4,+A5,+A6,+A7,+A8,+STROBE")
NETLIB_DEVICE_IMPL(82S115, "PROM_82S115", "+CE1Q,+CE2,+A0,+A1,+A2,+A3,+A4,+A5,+A6,+A7,+A8,+STROBE,@VCC,@GND")
NETLIB_DEVICE_IMPL(82S115_dip, "PROM_82S115_DIP", "")
} //namespace devices

28
src/lib/netlist/devices/nld_82S115.h
View File

@ -31,21 +31,23 @@
#include "netlist/nl_setup.h"
#define PROM_82S115(name, cCE1Q, cCE2, cA0, cA1, cA2, cA3, cA4, cA5, cA6, cA7, cA8, cSTROBE) \
NET_REGISTER_DEV(PROM_82S115, name) \
NET_CONNECT(name, CE1Q, cCE1Q) \
NET_CONNECT(name, CE2, cCE2) \
NET_CONNECT(name, A0, cA0) \
NET_CONNECT(name, A1, cA1) \
NET_CONNECT(name, A2, cA2) \
NET_CONNECT(name, A3, cA3) \
NET_CONNECT(name, A4, cA4) \
NET_CONNECT(name, A5, cA5) \
NET_CONNECT(name, A6, cA6) \
NET_CONNECT(name, A7, cA7) \
NET_CONNECT(name, A8, cA8) \
NET_REGISTER_DEV(PROM_82S115, name) \
NET_CONNECT(name, GND, GND) \
NET_CONNECT(name, VCC, VCC) \
NET_CONNECT(name, CE1Q, cCE1Q) \
NET_CONNECT(name, CE2, cCE2) \
NET_CONNECT(name, A0, cA0) \
NET_CONNECT(name, A1, cA1) \
NET_CONNECT(name, A2, cA2) \
NET_CONNECT(name, A3, cA3) \
NET_CONNECT(name, A4, cA4) \
NET_CONNECT(name, A5, cA5) \
NET_CONNECT(name, A6, cA6) \
NET_CONNECT(name, A7, cA7) \
NET_CONNECT(name, A8, cA8) \
NET_CONNECT(name, STROBE, cSTROBE)
#define PROM_82S115_DIP(name) \
#define PROM_82S115_DIP(name) \
NET_REGISTER_DEV(PROM_82S115_DIP, name)
#endif /* NLD_82S115_H_ */

12
src/lib/netlist/devices/nld_82S123.cpp
View File

@ -7,6 +7,7 @@
#include "nld_82S123.h"
#include "netlist/nl_base.h"
#include "nlid_system.h"
namespace netlist
{
@ -19,6 +20,7 @@ namespace netlist
, m_CEQ(*this, "CEQ")
, m_O(*this, {{"O1", "O2", "O3", "O4", "O5", "O6", "O7", "O8"}})
, m_ROM(*this, "ROM")
, m_power_pins(*this)
{
}
@ -30,6 +32,7 @@ namespace netlist
object_array_t<logic_output_t, 8> m_O;
param_rom_t<uint8_t, 5, 8> m_ROM; // 256 bits, 32x8
nld_power_pins m_power_pins;
};
NETLIB_OBJECT_DERIVED(82S123_dip, 82S123)
@ -43,15 +46,16 @@ namespace netlist
register_subalias("5", m_O[4]);
register_subalias("6", m_O[5]);
register_subalias("7", m_O[6]);
register_subalias("8", m_O[7]);
register_subalias("15", m_CEQ);
register_subalias("8", "GND");
register_subalias("9", m_O[7]);
register_subalias("10", m_A[0]);
register_subalias("11", m_A[1]);
register_subalias("12", m_A[2]);
register_subalias("13", m_A[3]);
register_subalias("14", m_A[4]);
register_subalias("15", m_CEQ);
register_subalias("16", "VCC");
}
};
@ -77,7 +81,7 @@ namespace netlist
m_O[i].push((o >> i) & 1, delay);
}
NETLIB_DEVICE_IMPL(82S123, "PROM_82S123", "+CEQ,+A0,+A1,+A2,+A3,+A4")
NETLIB_DEVICE_IMPL(82S123, "PROM_82S123", "+CEQ,+A0,+A1,+A2,+A3,+A4,@VCC,@GND")
NETLIB_DEVICE_IMPL(82S123_dip, "PROM_82S123_DIP", "")
} //namespace devices

18
src/lib/netlist/devices/nld_82S123.h
View File

@ -27,16 +27,18 @@
#include "netlist/nl_setup.h"
#define PROM_82S123(name, cCEQ, cA0, cA1, cA2, cA3, cA4) \
NET_REGISTER_DEV(PROM_82S123, name) \
NET_CONNECT(name, CEQ, cCEQ) \
NET_CONNECT(name, A0, cA0) \
NET_CONNECT(name, A1, cA1) \
NET_CONNECT(name, A2, cA2) \
NET_CONNECT(name, A3, cA3) \
#define PROM_82S123(name, cCEQ, cA0, cA1, cA2, cA3, cA4) \
NET_REGISTER_DEV(PROM_82S123, name) \
NET_CONNECT(name, GND, GND) \
NET_CONNECT(name, VCC, VCC) \
NET_CONNECT(name, CEQ, cCEQ) \
NET_CONNECT(name, A0, cA0) \
NET_CONNECT(name, A1, cA1) \
NET_CONNECT(name, A2, cA2) \
NET_CONNECT(name, A3, cA3) \
NET_CONNECT(name, A4, cA4)
#define PROM_82S123_DIP(name) \
#define PROM_82S123_DIP(name) \
NET_REGISTER_DEV(PROM_82S123_DIP, name)
#endif /* NLD_82S123_H_ */

8
src/lib/netlist/devices/nld_82S126.cpp
View File

@ -7,6 +7,7 @@
#include "nld_82S126.h"
#include "netlist/nl_base.h"
#include "nlid_system.h"
namespace netlist
{
@ -20,6 +21,7 @@ namespace netlist
, m_CE2Q(*this, "CE2Q")
, m_O(*this, {{"O1", "O2", "O3", "O4" }})
, m_ROM(*this, "ROM")
, m_power_pins(*this)
{
}
@ -32,6 +34,7 @@ namespace netlist
object_array_t<logic_output_t, 4> m_O;
param_rom_t<uint8_t, 8, 4> m_ROM; // 1024 bits, 32x32, used as 256x4
nld_power_pins m_power_pins;
};
NETLIB_OBJECT_DERIVED(82S126_dip, 82S126)
@ -54,6 +57,9 @@ namespace netlist
register_subalias("11", m_O[1]);
register_subalias("10", m_O[2]);
register_subalias("9", m_O[3]);
register_subalias("8", "GND");
register_subalias("16", "VCC");
}
};
@ -79,7 +85,7 @@ namespace netlist
m_O[i].push((o >> i) & 1, delay);
}
NETLIB_DEVICE_IMPL(82S126, "PROM_82S126", "+CE1Q,+CE2Q,+A0,+A1,+A2,+A3,+A4,+A5,+A6,+A7")
NETLIB_DEVICE_IMPL(82S126, "PROM_82S126", "+CE1Q,+CE2Q,+A0,+A1,+A2,+A3,+A4,+A5,+A6,+A7,@VCC,@GND")
NETLIB_DEVICE_IMPL(82S126_dip, "PROM_82S126_DIP", "")
} //namespace devices

24
src/lib/netlist/devices/nld_82S126.h
View File

@ -27,19 +27,21 @@
#include "netlist/nl_setup.h"
#define PROM_82S126(name, cCE1Q, cCE2Q, cA0, cA1, cA2, cA3, cA4, cA5, cA6, cA7) \
NET_REGISTER_DEV(PROM_82S126, name) \
NET_CONNECT(name, CE1Q, cCE1Q) \
NET_CONNECT(name, CE2Q, cCE2Q) \
NET_CONNECT(name, A0, cA0) \
NET_CONNECT(name, A1, cA1) \
NET_CONNECT(name, A2, cA2) \
NET_CONNECT(name, A3, cA3) \
NET_CONNECT(name, A4, cA4) \
NET_CONNECT(name, A5, cA5) \
NET_CONNECT(name, A6, cA6) \
NET_REGISTER_DEV(PROM_82S126, name) \
NET_CONNECT(name, GND, GND) \
NET_CONNECT(name, VCC, VCC) \
NET_CONNECT(name, CE1Q, cCE1Q) \
NET_CONNECT(name, CE2Q, cCE2Q) \
NET_CONNECT(name, A0, cA0) \
NET_CONNECT(name, A1, cA1) \
NET_CONNECT(name, A2, cA2) \
NET_CONNECT(name, A3, cA3) \
NET_CONNECT(name, A4, cA4) \
NET_CONNECT(name, A5, cA5) \
NET_CONNECT(name, A6, cA6) \
NET_CONNECT(name, A7, cA7)
#define PROM_82S126_DIP(name) \
#define PROM_82S126_DIP(name) \
NET_REGISTER_DEV(PROM_82S126_DIP, name)
#endif /* NLD_82S126_H_ */

8
src/lib/netlist/devices/nld_82S16.cpp
View File

@ -7,6 +7,7 @@
#include "nld_82S16.h"
#include "netlist/nl_base.h"
#include "nlid_system.h"
namespace netlist
{
@ -25,6 +26,7 @@ namespace netlist
, m_ram(*this, "m_ram", 0)
, m_addr(*this, "m_addr", 0)
, m_enq(*this, "m_enq", 0)
, m_power_pins(*this)
{
}
@ -77,6 +79,7 @@ namespace netlist
state_array<uint64_t, 4> m_ram; // 256 bits
state_var_u8 m_addr; // 256 bits
state_var_sig m_enq;
nld_power_pins m_power_pins;
};
NETLIB_OBJECT_DERIVED(82S16_dip, 82S16)
@ -99,7 +102,10 @@ namespace netlist
register_subalias("12", m_WEQ);
register_subalias("13", m_DIN);
register_subalias("6", m_DOUTQ);
register_subalias("6", m_DOUTQ);
register_subalias("8", "GND");
register_subalias("16", "VCC");
}
};

336
src/lib/netlist/devices/nld_9310.cpp
View File

@ -1,5 +1,5 @@
// license:GPL-2.0+
// copyright-holders:Couriersud
//+opyright-holders:Couriersud
/*
* nld_9310.c
*
@ -7,6 +7,7 @@
#include "nld_9310.h"
#include "netlist/nl_base.h"
#include "nlid_system.h"
#define MAXCNT 9
@ -14,37 +15,19 @@ namespace netlist
{
namespace devices
{
//FIXME: Convert sub devices into NETDEV_DELEGATE logic
NETLIB_OBJECT(9310_subABCD)
NETLIB_OBJECT(9310)
{
NETLIB_CONSTRUCTOR(9310_subABCD)
, m_A(*this, "A")
, m_B(*this, "B")
, m_C(*this, "C")
, m_D(*this, "D")
{
}
NETLIB_RESETI();
//NETLIB_UPDATEI();
public:
logic_input_t m_A;
logic_input_t m_B;
logic_input_t m_C;
logic_input_t m_D;
unsigned read_ABCD() const
{
return (m_D() << 3) | (m_C() << 2) | (m_B() << 1) | (m_A() << 0);
}
};
NETLIB_OBJECT(9310_sub)
{
NETLIB_CONSTRUCTOR(9310_sub)
, m_CLK(*this, "CLK")
, m_ABCD(nullptr)
NETLIB_CONSTRUCTOR(9310)
, m_ENP(*this, "ENP")
, m_ENT(*this, "ENT")
, m_CLRQ(*this, "CLRQ")
, m_LOADQ(*this, "LOADQ")
, m_A(*this, "A", NETLIB_DELEGATE(9310, abcd))
, m_B(*this, "B", NETLIB_DELEGATE(9310, abcd))
, m_C(*this, "C", NETLIB_DELEGATE(9310, abcd))
, m_D(*this, "D", NETLIB_DELEGATE(9310, abcd))
, m_CLK(*this, "CLK", NETLIB_DELEGATE(9310, sub))
, m_QA(*this, "QA")
, m_QB(*this, "QB")
, m_QC(*this, "QC")
@ -53,18 +36,118 @@ namespace netlist
, m_cnt(*this, "m_cnt", 0)
, m_loadq(*this, "m_loadq", 0)
, m_ent(*this, "m_ent", 0)
, m_power_pins(*this)
{
}
NETLIB_RESETI();
NETLIB_UPDATEI();
public:
inline void update_outputs_all(const unsigned cnt, const netlist_time out_delay);
inline void update_outputs(const unsigned cnt);
NETLIB_HANDLERI(abcd) { } // do nothing
NETLIB_HANDLERI(sub)
{
auto cnt(m_cnt);
if (m_loadq)
{
if (cnt < MAXCNT - 1)
{
++cnt;
update_outputs(cnt);
}
else if (cnt == MAXCNT - 1)
{
cnt = MAXCNT;
m_RC.push(m_ent, NLTIME_FROM_NS(20));
m_QA.push(1, NLTIME_FROM_NS(20));
}
else // MAXCNT
{
m_RC.push(0, NLTIME_FROM_NS(20));
cnt = 0;
update_outputs_all(cnt, NLTIME_FROM_NS(20));
}
}
else
{
cnt = read_ABCD();
m_RC.push(m_ent & (cnt == MAXCNT), NLTIME_FROM_NS(27));
update_outputs_all(cnt, NLTIME_FROM_NS(22));
}
m_cnt = cnt;
}
protected:
unsigned read_ABCD() const
{
return (m_D() << 3) | (m_C() << 2) | (m_B() << 1) | (m_A() << 0);
}
void update_outputs_all(const unsigned cnt, const netlist_time out_delay)
{
m_QA.push((cnt >> 0) & 1, out_delay);
m_QB.push((cnt >> 1) & 1, out_delay);
m_QC.push((cnt >> 2) & 1, out_delay);
m_QD.push((cnt >> 3) & 1, out_delay);
}
void update_outputs(const unsigned cnt)
{
/* static */ const netlist_time out_delay = NLTIME_FROM_NS(20);
#if 0
// for (int i=0; i<4; i++)
// m_Q[i], (cnt >> i) & 1, delay[i]);
m_QA.push((cnt >> 0) & 1, out_delay);
m_QB.push((cnt >> 1) & 1, out_delay);
m_QC.push((cnt >> 2) & 1, out_delay);
m_QD.push((cnt >> 3) & 1, out_delay);
#else
if ((cnt & 1) == 1)
m_QA.push(1, out_delay);
else
{
m_QA.push(0, out_delay);
switch (cnt)
{
case 0x00:
m_QB.push(0, out_delay);
m_QC.push(0, out_delay);
m_QD.push(0, out_delay);
break;
case 0x02:
case 0x06:
case 0x0A:
case 0x0E:
m_QB.push(1, out_delay);
break;
case 0x04:
case 0x0C:
m_QB.push(0, out_delay);
m_QC.push(1, out_delay);
break;
case 0x08:
m_QB.push(0, out_delay);
m_QC.push(0, out_delay);
m_QD.push(1, out_delay);
break;
}
}
#endif
}
logic_input_t m_ENP;
logic_input_t m_ENT;
logic_input_t m_CLRQ;
logic_input_t m_LOADQ;
logic_input_t m_A;
logic_input_t m_B;
logic_input_t m_C;
logic_input_t m_D;
logic_input_t m_CLK;
NETLIB_NAME(9310_subABCD) *m_ABCD;
logic_output_t m_QA;
logic_output_t m_QB;
logic_output_t m_QC;
@ -74,44 +157,7 @@ namespace netlist
state_var<unsigned> m_cnt;
state_var<netlist_sig_t> m_loadq;
state_var<netlist_sig_t> m_ent;
};
NETLIB_OBJECT(9310)
{
NETLIB_CONSTRUCTOR(9310)
, subABCD(*this, "subABCD")
, sub(*this, "sub")
, m_ENP(*this, "ENP")
, m_ENT(*this, "ENT")
, m_CLRQ(*this, "CLRQ")
, m_LOADQ(*this, "LOADQ")
{
sub.m_ABCD = &(subABCD);
register_subalias("CLK", sub.m_CLK);
register_subalias("A", subABCD.m_A);
register_subalias("B", subABCD.m_B);
register_subalias("C", subABCD.m_C);
register_subalias("D", subABCD.m_D);
register_subalias("QA", sub.m_QA);
register_subalias("QB", sub.m_QB);
register_subalias("QC", sub.m_QC);
register_subalias("QD", sub.m_QD);
register_subalias("RC", sub.m_RC);
}
NETLIB_RESETI();
NETLIB_UPDATEI();
public:
NETLIB_SUB(9310_subABCD) subABCD;
NETLIB_SUB(9310_sub) sub;
logic_input_t m_ENP;
logic_input_t m_ENT;
logic_input_t m_CLRQ;
logic_input_t m_LOADQ;
nld_power_pins m_power_pins;
};
NETLIB_OBJECT_DERIVED(9310_dip, 9310)
@ -119,36 +165,26 @@ namespace netlist
NETLIB_CONSTRUCTOR_DERIVED(9310_dip, 9310)
{
register_subalias("1", m_CLRQ);
register_subalias("2", sub.m_CLK);
register_subalias("3", subABCD.m_A);
register_subalias("4", subABCD.m_B);
register_subalias("5", subABCD.m_C);
register_subalias("6", subABCD.m_D);
register_subalias("2", m_CLK);
register_subalias("3", m_A);
register_subalias("4", m_B);
register_subalias("5", m_C);
register_subalias("6", m_D);
register_subalias("7", m_ENP);
// register_subalias("8", ); -. GND
register_subalias("8", "GND");
register_subalias("9", m_LOADQ);
register_subalias("10", m_ENT);
register_subalias("11", sub.m_QD);
register_subalias("12", sub.m_QC);
register_subalias("13", sub.m_QB);
register_subalias("14", sub.m_QA);
register_subalias("15", sub.m_RC);
// register_subalias("16", ); -. VCC
register_subalias("11", m_QD);
register_subalias("12", m_QC);
register_subalias("13", m_QB);
register_subalias("14", m_QA);
register_subalias("15", m_RC);
register_subalias("16", "VCC");
}
};
NETLIB_RESET(9310)
{
sub.reset();
subABCD.reset();
}
NETLIB_RESET(9310_subABCD)
{
}
NETLIB_RESET(9310_sub)
{
m_CLK.set_state(logic_t::STATE_INP_LH);
m_cnt = 0;
@ -156,117 +192,31 @@ namespace netlist
m_ent = 1;
}
NETLIB_UPDATE(9310_sub)
{
auto cnt(m_cnt);
if (m_loadq)
{
if (cnt < MAXCNT - 1)
{
++cnt;
update_outputs(cnt);
}
else if (cnt == MAXCNT - 1)
{
cnt = MAXCNT;
m_RC.push(m_ent, NLTIME_FROM_NS(20));
m_QA.push(1, NLTIME_FROM_NS(20));
}
else // MAXCNT
{
m_RC.push(0, NLTIME_FROM_NS(20));
cnt = 0;
update_outputs_all(cnt, NLTIME_FROM_NS(20));
}
}
else
{
cnt = m_ABCD->read_ABCD();
m_RC.push(m_ent & (cnt == MAXCNT), NLTIME_FROM_NS(27));
update_outputs_all(cnt, NLTIME_FROM_NS(22));
}
m_cnt = cnt;
}
NETLIB_UPDATE(9310)
{
sub.m_loadq = m_LOADQ();
sub.m_ent = m_ENT();
m_loadq = m_LOADQ();
m_ent = m_ENT();
const netlist_sig_t clrq = m_CLRQ();
if ((!sub.m_loadq || (sub.m_ent & m_ENP())) && clrq)
if ((!m_loadq || (m_ent & m_ENP())) && clrq)
{
sub.m_CLK.activate_lh();
sub.m_RC.push(sub.m_ent & (sub.m_cnt == MAXCNT), NLTIME_FROM_NS(27));
m_CLK.activate_lh();
m_RC.push(m_ent & (m_cnt == MAXCNT), NLTIME_FROM_NS(27));
}
else
{
sub.m_CLK.inactivate();
if (!clrq && (sub.m_cnt>0))
m_CLK.inactivate();
if (!clrq && (m_cnt>0))
{
sub.update_outputs_all(0, NLTIME_FROM_NS(36));
sub.m_cnt = 0;
update_outputs_all(0, NLTIME_FROM_NS(36));
m_cnt = 0;
//return;
}
sub.m_RC.push(sub.m_ent & (sub.m_cnt == MAXCNT), NLTIME_FROM_NS(27));
m_RC.push(m_ent & (m_cnt == MAXCNT), NLTIME_FROM_NS(27));
}
}
inline NETLIB_FUNC_VOID(9310_sub, update_outputs_all, (const unsigned cnt, const netlist_time out_delay))
{
m_QA.push((cnt >> 0) & 1, out_delay);
m_QB.push((cnt >> 1) & 1, out_delay);
m_QC.push((cnt >> 2) & 1, out_delay);
m_QD.push((cnt >> 3) & 1, out_delay);
}
inline NETLIB_FUNC_VOID(9310_sub, update_outputs, (const unsigned cnt))
{
/* static */ const netlist_time out_delay = NLTIME_FROM_NS(20);
#if 0
// for (int i=0; i<4; i++)
// m_Q[i], (cnt >> i) & 1, delay[i]);
m_QA.push((cnt >> 0) & 1, out_delay);
m_QB.push((cnt >> 1) & 1, out_delay);
m_QC.push((cnt >> 2) & 1, out_delay);
m_QD.push((cnt >> 3) & 1, out_delay);
#else
if ((cnt & 1) == 1)
m_QA.push(1, out_delay);
else
{
m_QA.push(0, out_delay);
switch (cnt)
{
case 0x00:
m_QB.push(0, out_delay);
m_QC.push(0, out_delay);
m_QD.push(0, out_delay);
break;
case 0x02:
case 0x06:
case 0x0A:
case 0x0E:
m_QB.push(1, out_delay);
break;
case 0x04:
case 0x0C:
m_QB.push(0, out_delay);
m_QC.push(1, out_delay);
break;
case 0x08:
m_QB.push(0, out_delay);
m_QC.push(0, out_delay);
m_QD.push(1, out_delay);
break;
}
}
#endif
}
NETLIB_DEVICE_IMPL(9310, "TTL_9310", "")
NETLIB_DEVICE_IMPL(9310, "TTL_9310", "+CLK,+ENP,+ENT,+CLRQ,+LOADQ,+A,+B,+C,+D,@VCC,@GND")
NETLIB_DEVICE_IMPL(9310_dip, "TTL_9310_DIP", "")
} //namespace devices

24
src/lib/netlist/devices/nld_9310.h
View File

@ -47,19 +47,21 @@
#include "netlist/nl_setup.h"
#define TTL_9310(name, cCLK, cENP, cENT, cCLRQ, cLOADQ, cA, cB, cC, cD) \
NET_REGISTER_DEV(TTL_9310, name) \
NET_CONNECT(name, CLK, cCLK) \
NET_CONNECT(name, ENP, cENP) \
NET_CONNECT(name, ENT, cENT) \
NET_CONNECT(name, CLRQ, cCLRQ) \
NET_CONNECT(name, LOADQ,_LOADQ) \
NET_CONNECT(name, A, cA) \
NET_CONNECT(name, B, cB) \
NET_CONNECT(name, C, cC) \
#define TTL_9310(name, cCLK, cENP, cENT, cCLRQ, cLOADQ, cA, cB, cC, cD) \
NET_REGISTER_DEV(TTL_9310, name) \
NET_CONNECT(name, GND, GND) \
NET_CONNECT(name, VCC, VCC) \
NET_CONNECT(name, CLK, cCLK) \
NET_CONNECT(name, ENP, cENP) \
NET_CONNECT(name, ENT, cENT) \
NET_CONNECT(name, CLRQ, cCLRQ) \
NET_CONNECT(name, LOADQ,_LOADQ) \
NET_CONNECT(name, A, cA) \
NET_CONNECT(name, B, cB) \
NET_CONNECT(name, C, cC) \
NET_CONNECT(name, D, cD)
#define TTL_9310_DIP(name) \
#define TTL_9310_DIP(name) \
NET_REGISTER_DEV(TTL_9310_DIP, name)
#endif /* NLD_9310_H_ */

9
src/lib/netlist/devices/nld_9316.cpp
View File

@ -7,6 +7,7 @@
#include "nld_9316.h"
#include "netlist/nl_base.h"
#include "nlid_system.h"
namespace netlist
{
@ -33,6 +34,7 @@ namespace netlist
, m_abcd(*this, "m_abcd", 0)
, m_loadq(*this, "m_loadq", 0)
, m_ent(*this, "m_ent", 0)
, m_power_pins(*this)
{
}
@ -103,6 +105,7 @@ namespace netlist
state_var_u8 m_abcd;
state_var_sig m_loadq;
state_var_sig m_ent;
nld_power_pins m_power_pins;
void update_outputs_all(unsigned cnt, netlist_time out_delay) noexcept
{
@ -124,7 +127,7 @@ namespace netlist
register_subalias("5", "C");
register_subalias("6", "D");
register_subalias("7", "ENP");
// register_subalias("8", "); -. GND
register_subalias("8", "GND");
register_subalias("9", "LOADQ");
register_subalias("10", "ENT");
@ -133,12 +136,12 @@ namespace netlist
register_subalias("13", "QB");
register_subalias("14", "QA");
register_subalias("15", "RC");
// register_subalias("16", ); -. VCC
register_subalias("16", "VCC");
}
};
NETLIB_DEVICE_IMPL(9316, "TTL_9316", "+CLK,+ENP,+ENT,+CLRQ,+LOADQ,+A,+B,+C,+D")
NETLIB_DEVICE_IMPL(9316, "TTL_9316", "+CLK,+ENP,+ENT,+CLRQ,+LOADQ,+A,+B,+C,+D,@VCC,@GND")
NETLIB_DEVICE_IMPL(9316_dip, "TTL_9316_DIP", "")
} //namespace devices

24
src/lib/netlist/devices/nld_9316.h
View File

@ -53,19 +53,21 @@
#include "netlist/nl_setup.h"
#define TTL_9316(name, cCLK, cENP, cENT, cCLRQ, cLOADQ, cA, cB, cC, cD) \
NET_REGISTER_DEV(TTL_9316, name) \
NET_CONNECT(name, CLK, cCLK) \
NET_CONNECT(name, ENP, cENP) \
NET_CONNECT(name, ENT, cENT) \
NET_CONNECT(name, CLRQ, cCLRQ) \
NET_CONNECT(name, LOADQ, cLOADQ) \
NET_CONNECT(name, A, cA) \
NET_CONNECT(name, B, cB) \
NET_CONNECT(name, C, cC) \
#define TTL_9316(name, cCLK, cENP, cENT, cCLRQ, cLOADQ, cA, cB, cC, cD) \
NET_REGISTER_DEV(TTL_9316, name) \
NET_CONNECT(name, GND, GND) \
NET_CONNECT(name, VCC, VCC) \
NET_CONNECT(name, CLK, cCLK) \
NET_CONNECT(name, ENP, cENP) \
NET_CONNECT(name, ENT, cENT) \
NET_CONNECT(name, CLRQ, cCLRQ) \
NET_CONNECT(name, LOADQ, cLOADQ) \
NET_CONNECT(name, A, cA) \
NET_CONNECT(name, B, cB) \
NET_CONNECT(name, C, cC) \
NET_CONNECT(name, D, cD)
#define TTL_9316_DIP(name) \
#define TTL_9316_DIP(name) \
NET_REGISTER_DEV(TTL_9316_DIP, name)
#endif /* NLD_9316_H_ */

18
src/lib/netlist/devices/nld_9322.cpp
View File

@ -7,6 +7,7 @@
#include "nld_9322.h"
#include "netlist/nl_base.h"
#include "nlid_system.h"
namespace netlist
{
@ -21,6 +22,7 @@ namespace netlist
, m_A(*this, "A")
, m_B(*this, "B")
, m_Y(*this, "Y")
, m_power_pins(*this)
{
}
@ -31,6 +33,7 @@ namespace netlist
logic_input_t m_A;
logic_input_t m_B;
logic_output_t m_Y;
nld_power_pins m_power_pins;
};
NETLIB_OBJECT(9322)
@ -55,6 +58,17 @@ namespace netlist
register_subalias("A4", m_4.m_A);
register_subalias("B4", m_4.m_B);
register_subalias("Y4", m_4.m_Y);
connect("1.VCC", "2.VCC");
connect("1.VCC", "3.VCC");
connect("1.VCC", "4.VCC");
connect("1.GND", "2.GND");
connect("1.GND", "3.GND");
connect("1.GND", "4.GND");
register_subalias("GND", "1.GND");
register_subalias("VCC", "1.VCC");
}
NETLIB_UPDATEI();
@ -81,6 +95,7 @@ namespace netlist
register_subalias("5", m_2.m_A);
register_subalias("6", m_2.m_B);
register_subalias("7", m_2.m_Y);
register_subalias("8", "GND");
register_subalias("9", m_3.m_Y);
register_subalias("10", m_3.m_B);
@ -89,6 +104,7 @@ namespace netlist
register_subalias("13", m_4.m_B);
register_subalias("14", m_4.m_A);
register_subalias("15", m_STROBE);
register_subalias("16", "VCC");
}
};
@ -111,7 +127,7 @@ namespace netlist
m_4.update();
}
NETLIB_DEVICE_IMPL(9322, "TTL_9322", "+SELECT,+A1,+B1,+A2,+B2,+A3,+B3,+A4,+B4,+STROBE")
NETLIB_DEVICE_IMPL(9322, "TTL_9322", "+SELECT,+A1,+B1,+A2,+B2,+A3,+B3,+A4,+B4,+STROBE,@VCC,@GND")
NETLIB_DEVICE_IMPL(9322_dip, "TTL_9322_DIP", "")
} //namespace devices

22
src/lib/netlist/devices/nld_9322.h
View File

@ -24,16 +24,18 @@
#include "netlist/nl_setup.h"
#define TTL_9322(name, cSELECT, cA1, cB1, cA2, cB2, cA3, cB3, cA4, cB4, cSTROBE) \
NET_REGISTER_DEV(TTL_9322, name) \
NET_CONNECT(name, SELECT, cSELECT) \
NET_CONNECT(name, A1, cA1) \
NET_CONNECT(name, B1, cB1) \
NET_CONNECT(name, A2, cA2) \
NET_CONNECT(name, B2, cB2) \
NET_CONNECT(name, A3, cA3) \
NET_CONNECT(name, B3, cB3) \
NET_CONNECT(name, A4, cA4) \
NET_CONNECT(name, B4, cB4) \
NET_REGISTER_DEV(TTL_9322, name) \
NET_CONNECT(name, SELECT, cSELECT) \
NET_CONNECT(name, GND, GND) \
NET_CONNECT(name, VCC, VCC) \
NET_CONNECT(name, A1, cA1) \
NET_CONNECT(name, B1, cB1) \
NET_CONNECT(name, A2, cA2) \
NET_CONNECT(name, B2, cB2) \
NET_CONNECT(name, A3, cA3) \
NET_CONNECT(name, B3, cB3) \
NET_CONNECT(name, A4, cA4) \
NET_CONNECT(name, B4, cB4) \
NET_CONNECT(name, STROBE, cSTROBE)
#define TTL_9322_DIP(name) \

19
src/lib/netlist/devices/nld_am2847.cpp
View File

@ -7,6 +7,7 @@
#include "nld_am2847.h"
#include "netlist/nl_base.h"
#include "nlid_system.h"
namespace netlist
{
@ -19,6 +20,7 @@ namespace netlist
, m_IN(*this, "IN")
, m_buffer(*this, "m_buffer", 0)
, m_OUT(*this, "OUT")
, m_power_pins(*this, "VSS", "VDD")
{
}
@ -33,6 +35,7 @@ namespace netlist
state_array<uint16_t, 5> m_buffer;
logic_output_t m_OUT;
nld_power_pins m_power_pins;
};
NETLIB_OBJECT(AM2847)
@ -44,6 +47,7 @@ namespace netlist
, m_D(*this, "D")
, m_CP(*this, "CP")
, m_last_CP(*this, "m_last_CP", 0)
// FIXME: needs family!
{
register_subalias("OUTA", m_A.m_OUT);
register_subalias("OUTB", m_B.m_OUT);
@ -57,6 +61,16 @@ namespace netlist
register_subalias("RCB", m_B.m_RC);
register_subalias("RCC", m_C.m_RC);
register_subalias("RCD", m_D.m_RC);
connect("A.VSS", "B.VSS");
connect("A.VSS", "C.VSS");
connect("A.VSS", "D.VSS");
connect("A.VDD", "B.VDD");
connect("A.VDD", "C.VDD");
connect("A.VDD", "D.VDD");
register_subalias("VSS", "A.VSS");
register_subalias("VDD", "A.VDD");
}
NETLIB_RESETI();
@ -83,6 +97,7 @@ namespace netlist
register_subalias("5", m_B.m_RC);
register_subalias("6", m_B.m_IN);
register_subalias("7", m_C.m_OUT);
register_subalias("8", "VDD");
register_subalias("9", m_C.m_RC);
register_subalias("10", m_C.m_IN);
@ -90,7 +105,7 @@ namespace netlist
register_subalias("13", m_D.m_OUT);
register_subalias("14", m_D.m_RC);
register_subalias("15", m_D.m_IN);
register_subalias("8", "VSS");
}
};
@ -130,7 +145,7 @@ namespace netlist
m_OUT.push(out, NLTIME_FROM_NS(200));
}
NETLIB_DEVICE_IMPL(AM2847, "TTL_AM2847", "+CP,+INA,+INB,+INC,+IND,+RCA,+RCB,+RCC,+RCD")
NETLIB_DEVICE_IMPL(AM2847, "TTL_AM2847", "+CP,+INA,+INB,+INC,+IND,+RCA,+RCB,+RCC,+RCD,@VSS,@VDD")
NETLIB_DEVICE_IMPL(AM2847_dip, "TTL_AM2847_DIP", "")
} //namespace devices

22
src/lib/netlist/devices/nld_am2847.h
View File

@ -23,16 +23,18 @@
#include "netlist/nl_setup.h"
#define TTL_AM2847(name, cCP, cINA, cINB, cINC, cIND, cRCA, cRCB, cRCC, cRCD) \
NET_REGISTER_DEV(TTL_AM2847, name) \
NET_CONNECT(name, CP, cCP) \
NET_CONNECT(name, INA, cINA) \
NET_CONNECT(name, INB, cINB) \
NET_CONNECT(name, INC, cINC) \
NET_CONNECT(name, IND, cIND) \
NET_CONNECT(name, RCA, cRCA) \
NET_CONNECT(name, RCB, cRCB) \
NET_CONNECT(name, RCC, cRCC) \
#define TTL_AM2847(name, cCP, cINA, cINB, cINC, cIND, cRCA, cRCB, cRCC, cRCD) \
NET_REGISTER_DEV(TTL_AM2847, name) \
NET_CONNECT(name, VDD, VDD) \
NET_CONNECT(name, VSS, VSS) \
NET_CONNECT(name, CP, cCP) \
NET_CONNECT(name, INA, cINA) \
NET_CONNECT(name, INB, cINB) \
NET_CONNECT(name, INC, cINC) \
NET_CONNECT(name, IND, cIND) \
NET_CONNECT(name, RCA, cRCA) \
NET_CONNECT(name, RCB, cRCB) \
NET_CONNECT(name, RCC, cRCC) \
NET_CONNECT(name, RCD, cRCD)
#define TTL_AM2847_DIP(name) \

7
src/lib/netlist/devices/nld_dm9314.cpp
View File

@ -7,6 +7,7 @@
#include "nld_dm9314.h"
#include "netlist/nl_base.h"
#include "nlid_system.h"
namespace netlist
{
@ -25,6 +26,7 @@ namespace netlist
, m_last_SQ(*this, "m_last_SQ", 0)
, m_last_D(*this, "m_last_D", 0)
, m_last_Q(*this, "m_last_Q", 0)
, m_power_pins(*this)
{
}
@ -43,6 +45,7 @@ namespace netlist
state_var<unsigned> m_last_SQ;
state_var<unsigned> m_last_D;
state_var<unsigned> m_last_Q;
nld_power_pins m_power_pins;
};
NETLIB_OBJECT_DERIVED(9314_dip, 9314)
@ -56,6 +59,7 @@ namespace netlist
register_subalias("5", m_SQ[2]);
register_subalias("6", m_D[2]);
register_subalias("7", m_D[3]);
register_subalias("8", "GND");
register_subalias("9", m_MRQ);
register_subalias("10", m_Q[3]);
@ -64,6 +68,7 @@ namespace netlist
register_subalias("13", m_Q[1]);
register_subalias("14", m_SQ[1]);
register_subalias("15", m_Q[0]);
register_subalias("16", "VCC");
}
};
@ -107,7 +112,7 @@ namespace netlist
}
}
NETLIB_DEVICE_IMPL(9314, "TTL_9314", "+EQ,+MRQ,+S0Q,+S1Q,+S2Q,+S3Q,+D0,+D1,+D2,+D3")
NETLIB_DEVICE_IMPL(9314, "TTL_9314", "+EQ,+MRQ,+S0Q,+S1Q,+S2Q,+S3Q,+D0,+D1,+D2,+D3,@VCC,@GND")
NETLIB_DEVICE_IMPL(9314_dip, "TTL_9314_DIP", "")
} //namespace devices

26
src/lib/netlist/devices/nld_dm9314.h
View File

@ -23,18 +23,20 @@
#include "netlist/nl_setup.h"
#define TTL_9314(name, cEQ, cMRQ, cS0Q, cS1Q, cS2Q, cS3Q, cD0, cD1, cD2, cD3) \
NET_REGISTER_DEV(TTL_9314, name) \
NET_CONNECT(name, EQ, cEQ) \
NET_CONNECT(name, MRQ, cMRQ) \
NET_CONNECT(name, S0Q, cS0Q) \
NET_CONNECT(name, S1Q, cS1Q) \
NET_CONNECT(name, S2Q, cS2Q) \
NET_CONNECT(name, S3Q, cS3Q) \
NET_CONNECT(name, D0, cD0) \
NET_CONNECT(name, D1, cD1) \
NET_CONNECT(name, D2, cD2) \
NET_CONNECT(name, D3, cD3)
#define TTL_9314(name, cEQ, cMRQ, cS0Q, cS1Q, cS2Q, cS3Q, cD0, cD1, cD2, cD3) \
NET_REGISTER_DEV(TTL_9314, name) \
NET_CONNECT(name, GND, GND) \
NET_CONNECT(name, VCC, VCC) \
NET_CONNECT(name, EQ, cEQ) \
NET_CONNECT(name, MRQ, cMRQ) \
NET_CONNECT(name, S0Q, cS0Q) \
NET_CONNECT(name, S1Q, cS1Q) \
NET_CONNECT(name, S2Q, cS2Q) \
NET_CONNECT(name, S3Q, cS3Q) \
NET_CONNECT(name, D0, cD0) \
NET_CONNECT(name, D1, cD1) \
NET_CONNECT(name, D2, cD2) \
NET_CONNECT(name, D3, cD3)
#define TTL_9314_DIP(name) \
NET_REGISTER_DEV(TTL_9314_DIP, name)

7
src/lib/netlist/devices/nld_dm9334.cpp
View File

@ -7,6 +7,7 @@
#include "nld_dm9334.h"
#include "netlist/nl_base.h"
#include "nlid_system.h"
namespace netlist
{
@ -25,6 +26,7 @@ namespace netlist
, m_last_D(*this, "m_last_D", 0)
, m_last_A(*this, "m_last_A", 0)
, m_last_Q(*this, "m_last_Q", 0)
, m_power_pins(*this)
{
}
@ -43,6 +45,7 @@ namespace netlist
state_var<unsigned> m_last_D;
state_var<unsigned> m_last_A;
state_var<unsigned> m_last_Q;
nld_power_pins m_power_pins;
};
NETLIB_OBJECT_DERIVED(9334_dip, 9334)
@ -56,6 +59,7 @@ namespace netlist
register_subalias("5", m_Q[1]);
register_subalias("6", m_Q[2]);
register_subalias("7", m_Q[3]);
register_subalias("8", "GND");
register_subalias("9", m_Q[4]);
register_subalias("10", m_Q[5]);
@ -64,6 +68,7 @@ namespace netlist
register_subalias("13", m_D);
register_subalias("14", m_EQ);
register_subalias("15", m_CQ);
register_subalias("16", "VCC");
}
};
@ -143,7 +148,7 @@ namespace netlist
m_Q[i].push((q >> i) & 1, delay);
}
NETLIB_DEVICE_IMPL(9334, "TTL_9334", "+CQ,+EQ,+D,+A0,+A1,+A2")
NETLIB_DEVICE_IMPL(9334, "TTL_9334", "+CQ,+EQ,+D,+A0,+A1,+A2,@VCC,@GND")
NETLIB_DEVICE_IMPL(9334_dip, "TTL_9334_DIP", "")
} //namespace devices

18
src/lib/netlist/devices/nld_dm9334.h
View File

@ -67,14 +67,16 @@
#include "netlist/nl_setup.h"
#define TTL_9334(name, cCQ, cEQ, cD, cA0, cA1, cA2) \
NET_REGISTER_DEV(TTL_9334, name) \
NET_CONNECT(name, CQ, cCQ) \
NET_CONNECT(name, EQ, cEQ) \
NET_CONNECT(name, D, cD) \
NET_CONNECT(name, A0, cA0) \
NET_CONNECT(name, A1, cA1) \
NET_CONNECT(name, A2, cA2)
#define TTL_9334(name, cCQ, cEQ, cD, cA0, cA1, cA2) \
NET_REGISTER_DEV(TTL_9334, name) \
NET_CONNECT(name, GND, GND) \
NET_CONNECT(name, VCC, VCC) \
NET_CONNECT(name, CQ, cCQ) \
NET_CONNECT(name, EQ, cEQ) \
NET_CONNECT(name, D, cD) \
NET_CONNECT(name, A0, cA0) \
NET_CONNECT(name, A1, cA1) \
NET_CONNECT(name, A2, cA2)
#define TTL_9334_DIP(name) \
NET_REGISTER_DEV(TTL_9334_DIP, name)

7
src/lib/netlist/devices/nlid_cmos.h
View File

@ -13,8 +13,9 @@
namespace netlist
{
namespace devices
{
namespace devices
{
// FIXME: this needs to be removed
NETLIB_OBJECT(vdd_vss)
{
NETLIB_CONSTRUCTOR(vdd_vss)
@ -34,7 +35,7 @@ namespace netlist
analog_input_t m_vss;
};
} //namespace devices
} //namespace devices
} // namespace netlist
#endif /* NLID_CMOS_H_ */

102
src/lib/netlist/devices/nlid_proxy.cpp
View File

@ -7,9 +7,6 @@
#include "nlid_proxy.h"
#include "netlist/solver/nld_solver.h"
//#include "plib/pstream.h"
//#include "plib/pfmtlog.h"
//#include "nld_log.h"
namespace netlist
{
@ -79,36 +76,71 @@ namespace netlist
}
nld_d_to_a_proxy::nld_d_to_a_proxy(netlist_state_t &anetlist, const pstring &name, logic_output_t *out_proxied)
: nld_base_d_to_a_proxy(anetlist, name, out_proxied, m_RV.m_P)
, m_GNDHack(*this, "_Q")
, m_RV(*this, "RV")
: nld_base_d_to_a_proxy(anetlist, name, out_proxied, m_RN.m_P)
, m_RP(*this, "RP")
, m_RN(*this, "RN")
, m_last_state(*this, "m_last_var", -1)
, m_is_timestep(false)
{
const std::vector<std::pair<pstring, pstring>> power_syms = { {"VCC", "VEE"}, {"VCC", "GND"}, {"VDD", "VSS"}};
register_subalias("Q", m_RV.m_P);
register_subalias("Q", m_RN.m_P);
connect(m_RV.m_N, m_GNDHack);
bool f = false;
detail::core_terminal_t *tp(nullptr);
detail::core_terminal_t *tn(nullptr);
for (auto & pwr_sym : power_syms)
{
pstring devname = out_proxied->device().name();
auto tp = setup().find_terminal(devname + "." + pwr_sym.first,
detail::terminal_type::INPUT, false);
auto tn = setup().find_terminal(devname + "." + pwr_sym.second,
detail::terminal_type::INPUT, false);
if (tp != nullptr && tn != nullptr)
auto tp_t = setup().find_terminal(devname + "." + pwr_sym.first,
/*detail::terminal_type::INPUT,*/ false);
auto tn_t = setup().find_terminal(devname + "." + pwr_sym.second,
/*detail::terminal_type::INPUT,*/ false);
if (f && (tp_t != nullptr && tn_t != nullptr))
log().warning(MI_MULTIPLE_POWER_TERMINALS_ON_DEVICE(out_proxied->device().name(),
tp->name(), tn->name(),
tp_t ? tp_t->name() : "",
tn_t ? tn_t->name() : ""));
else if (tp_t != nullptr && tn_t != nullptr)
{
/* alternative logic */
tp = tp_t;
tn = tn_t;
f = true;
}
}
//FIXME: Use power terminals and change info to warning or error
if (!f)
log().info(MI_NO_POWER_TERMINALS_ON_DEVICE_1(out_proxied->device().name()));
{
if (logic_family()->fixed_V() == 0.0)
log().error(MI_NO_POWER_TERMINALS_ON_DEVICE_1(setup().de_alias(out_proxied->device().name())));
else
log().info(MI_NO_POWER_TERMINALS_ON_DEVICE_1(setup().de_alias(out_proxied->device().name())));
m_GNDHack = plib::make_unique<analog_output_t>(*this, "_QGND");
m_VCCHack = plib::make_unique<analog_output_t>(*this, "_QVCC");
connect(m_RN.m_N, *m_GNDHack);
connect(m_RP.m_P, *m_VCCHack);
connect(m_RN.m_P, m_RP.m_N);
}
else
{
log().verbose("D/A Proxy: Found power terminals on device {1}", out_proxied->device().name());
if (setup().is_validation())
{
// During validation, don't connect to terminals found
// This will cause terminals not connected to a rail net to
// fail connection stage.
connect(m_RN.m_N, m_RP.m_P);
}
else
{
connect(m_RN.m_N, *tn);
connect(m_RP.m_P, *tp);
}
connect(m_RN.m_P, m_RP.m_N);
}
//printf("vcc: %f\n", logic_family()->fixed_V());
}
@ -120,10 +152,17 @@ namespace netlist
//m_Q.initial(0.0);
m_last_state = -1;
m_RV.reset();
m_is_timestep = m_RV.m_P.net().solver()->has_timestep_devices();
m_RV.set_G_V_I(plib::constants<nl_double>::one() / logic_family()->R_low(),
logic_family()->low_V(0.0, supply_V), 0.0);
m_RN.reset();
m_RP.reset();
if (m_GNDHack)
m_GNDHack->initial(0);
if (m_VCCHack)
m_VCCHack->initial(supply_V);
m_is_timestep = m_RN.m_P.net().solver()->has_timestep_devices();
m_RN.set_G_V_I(plib::constants<nl_double>::one() / logic_family()->R_low(),
logic_family()->low_offset_V(), 0.0);
m_RP.set_G_V_I(G_OFF,
0.0, 0.0);
}
NETLIB_UPDATE(d_to_a_proxy)
@ -131,20 +170,27 @@ namespace netlist
const auto state = static_cast<int>(m_I());
if (state != m_last_state)
{
// FIXME: Variable voltage
double supply_V = logic_family()->fixed_V();
if (supply_V == 0.0) supply_V = 5.0;
m_last_state = state;
const nl_double R = state ? logic_family()->R_high() : logic_family()->R_low();
const nl_double V = state ? logic_family()->high_V(0.0, supply_V) : logic_family()->low_V(0.0, supply_V);
// We only need to update the net first if this is a time stepping net
if (m_is_timestep)
{
m_RV.update();
m_RN.update(); // RN, RP are connected ...
}
m_RV.set_G_V_I(plib::constants<nl_double>::one() / R, V, 0.0);
m_RV.solve_later();
if (state)
{
m_RN.set_G_V_I(G_OFF,
0.0, 0.0);
m_RP.set_G_V_I(plib::constants<nl_double>::one() / logic_family()->R_high(),
logic_family()->high_offset_V(), 0.0);
}
else
{
m_RN.set_G_V_I(plib::constants<nl_double>::one() / logic_family()->R_low(),
logic_family()->low_offset_V(), 0.0);
m_RP.set_G_V_I(G_OFF,
0.0, 0.0);
}
m_RN.solve_later(); // RN, RP are connected ...
m_last_state = state;
}
}

9
src/lib/netlist/devices/nlid_proxy.h
View File

@ -103,8 +103,13 @@ namespace netlist
NETLIB_UPDATEI();
private:
analog_output_t m_GNDHack; // FIXME: Long term, we need to connect proxy gnd to device gnd
analog::NETLIB_SUB(twoterm) m_RV;
static constexpr const nl_double G_OFF = 1e-9;
plib::unique_ptr<analog_output_t> m_GNDHack; // FIXME: Long term, we need to connect proxy gnd to device gnd
plib::unique_ptr<analog_output_t> m_VCCHack; // FIXME: Long term, we need to connect proxy gnd to device gnd
analog::NETLIB_NAME(twoterm) m_RP;
analog::NETLIB_NAME(twoterm) m_RN;
state_var<int> m_last_state;
bool m_is_timestep;
};

35
src/lib/netlist/devices/nlid_system.h
View File

@ -18,8 +18,8 @@
namespace netlist
{
namespace devices
{
namespace devices
{
// -----------------------------------------------------------------------------
// netlistparams
// -----------------------------------------------------------------------------
@ -420,7 +420,36 @@ namespace netlist
state_var<netlist_sig_t> m_last_state;
};
} //namespace devices
// -----------------------------------------------------------------------------
// power pins - not a device, but a helper
// -----------------------------------------------------------------------------
class nld_power_pins
{
public:
nld_power_pins(device_t &owner, const char *sVCC = "VCC", const char *sGND = "GND")
{
if (owner.setup().is_validation())
{
m_GND = plib::make_unique<analog_input_t>(owner, sGND);
m_VCC = plib::make_unique<analog_input_t>(owner, sVCC);
}
else
{
owner.create_and_register_subdevice("_RVG", m_RVG);
owner.register_subalias(sVCC, "_RVG.1");
owner.register_subalias(sGND, "_RVG.2");
}
}
NETLIB_SUBXX(analog, R) m_RVG; // dummy resistor between VCC and GND
private:
plib::unique_ptr<analog_input_t> m_VCC; // only used during validation
plib::unique_ptr<analog_input_t> m_GND; // only used during validation
};
} //namespace devices
} // namespace netlist
#endif /* NLD_SYSTEM_H_ */

5
src/lib/netlist/devices/nlid_truthtable.h
View File

@ -12,6 +12,7 @@
#include "netlist/nl_base.h"
#include "netlist/nl_setup.h"
#include "netlist/devices/nlid_system.h"
#include "plib/putil.h"
#define NETLIB_TRUTHTABLE(cname, nIN, nOUT) \
@ -108,6 +109,8 @@ namespace devices
, m_fam(*this, fam)
, m_ign(*this, "m_ign", 0)
, m_ttp(ttp)
/* FIXME: the family should provide the names of the power-terminals! */
, m_power_pins(*this)
{
init(desc);
}
@ -211,6 +214,8 @@ namespace devices
/* FIXME: check width */
state_var<type_t> m_ign;
const truthtable_t &m_ttp;
/* FIXME: the family should provide the names of the power-terminals! */
nld_power_pins m_power_pins;
};
class netlist_base_factory_truthtable_t : public factory::element_t

11
src/lib/netlist/macro/nlm_other.cpp
View File

@ -28,18 +28,17 @@ static NETLIST_START(MC14584B_DIP)
MC14584B_GATE(s5)
MC14584B_GATE(s6)
DUMMY_INPUT(GND)
DUMMY_INPUT(VCC)
NET_C(s1.VCC, s2.VCC, s3.VCC, s4.VCC, s5.VCC, s6.VCC)
NET_C(s1.GND, s2.GND, s3.GND, s4.GND, s5.GND, s6.GND)
DIPPINS( /* +--------------+ */
s1.A, /* A1 |1 ++ 14| VCC */ VCC.I,
s1.A, /* A1 |1 ++ 14| VCC */ s1.VCC,
s1.Q, /* Y1 |2 13| A6 */ s6.A,
s2.A, /* A2 |3 12| Y6 */ s6.Q,
s2.Q, /* Y2 |4 MC14584B 11| A5 */ s5.A,
s3.A, /* A3 |5 10| Y5 */ s5.Q,
s3.Q, /* Y3 |6 9| A4 */ s4.A,
GND.I, /* GND |7 8| Y4 */ s4.Q
/* +--------------+ */
s1.GND,/* GND |7 8| Y4 */ s4.Q
/* +--------------+ */
)
NETLIST_END()

205
src/lib/netlist/macro/nlm_ttl74xx.cpp
View File

@ -30,18 +30,18 @@ static NETLIST_START(TTL_7400_DIP)
TTL_7400_GATE(s3)
TTL_7400_GATE(s4)
DUMMY_INPUT(GND)
DUMMY_INPUT(VCC)
NET_C(s1.VCC, s2.VCC, s3.VCC, s4.VCC)
NET_C(s1.GND, s2.GND, s3.GND, s4.GND)
DIPPINS( /* +--------------+ */
s1.A, /* A1 |1 ++ 14| VCC */ VCC.I,
s1.A, /* A1 |1 ++ 14| VCC */ s1.VCC,
s1.B, /* B1 |2 13| B4 */ s4.B,
s1.Q, /* Y1 |3 12| A4 */ s4.A,
s2.A, /* A2 |4 7400 11| Y4 */ s4.Q,
s2.B, /* B2 |5 10| B3 */ s3.B,
s2.Q, /* Y2 |6 9| A3 */ s3.A,
GND.I, /* GND |7 8| Y3 */ s3.Q
/* +--------------+ */
s1.GND,/* GND |7 8| Y3 */ s3.Q
/* +--------------+ */
)
NETLIST_END()
@ -68,18 +68,18 @@ static NETLIST_START(TTL_7402_DIP)
TTL_7402_GATE(s3)
TTL_7402_GATE(s4)
DUMMY_INPUT(GND)
DUMMY_INPUT(VCC)
NET_C(s1.VCC, s2.VCC, s3.VCC, s4.VCC)
NET_C(s1.GND, s2.GND, s3.GND, s4.GND)
DIPPINS( /* +--------------+ */
s1.Q, /* Y1 |1 ++ 14| VCC */ VCC.I,
s1.Q, /* Y1 |1 ++ 14| VCC */ s1.VCC,
s1.A, /* A1 |2 13| Y4 */ s4.Q,
s1.B, /* B1 |3 12| B4 */ s4.B,
s2.Q, /* Y2 |4 7402 11| A4 */ s4.A,
s2.A, /* A2 |5 10| Y3 */ s3.Q,
s2.B, /* B2 |6 9| B3 */ s3.B,
GND.I, /* GND |7 8| A3 */ s3.A
/* +--------------+ */
s1.GND,/* GND |7 8| A3 */ s3.A
/* +--------------+ */
)
NETLIST_END()
@ -106,18 +106,18 @@ static NETLIST_START(TTL_7404_DIP)
TTL_7404_GATE(s5)
TTL_7404_GATE(s6)
DUMMY_INPUT(GND)
DUMMY_INPUT(VCC)
NET_C(s1.VCC, s2.VCC, s3.VCC, s4.VCC, s5.VCC, s6.VCC)
NET_C(s1.GND, s2.GND, s3.GND, s4.GND, s5.GND, s6.GND)
DIPPINS( /* +--------------+ */
s1.A, /* A1 |1 ++ 14| VCC */ VCC.I,
s1.A, /* A1 |1 ++ 14| VCC */ s1.VCC,
s1.Q, /* Y1 |2 13| A6 */ s6.A,
s2.A, /* A2 |3 12| Y6 */ s6.Q,
s2.Q, /* Y2 |4 7404 11| A5 */ s5.A,
s3.A, /* A3 |5 10| Y5 */ s5.Q,
s3.Q, /* Y3 |6 9| A4 */ s4.A,
GND.I, /* GND |7 8| Y4 */ s4.Q
/* +--------------+ */
s1.GND,/* GND |7 8| Y4 */ s4.Q
/* +--------------+ */
)
NETLIST_END()
@ -145,18 +145,18 @@ static NETLIST_START(TTL_7408_DIP)
TTL_7408_GATE(s3)
TTL_7408_GATE(s4)
DUMMY_INPUT(GND)
DUMMY_INPUT(VCC)
NET_C(s1.VCC, s2.VCC, s3.VCC, s4.VCC)
NET_C(s1.GND, s2.GND, s3.GND, s4.GND)
DIPPINS( /* +--------------+ */
s1.A, /* A1 |1 ++ 14| VCC */ VCC.I,
s1.A, /* A1 |1 ++ 14| VCC */ s1.VCC,
s1.B, /* B1 |2 13| B4 */ s4.B,
s1.Q, /* Y1 |3 12| A4 */ s4.A,
s2.A, /* A2 |4 7400 11| Y4 */ s4.Q,
s2.B, /* B2 |5 10| B3 */ s3.B,
s2.Q, /* Y2 |6 9| A3 */ s3.A,
GND.I, /* GND |7 8| Y3 */ s3.Q
/* +--------------+ */
s1.GND,/* GND |7 8| Y3 */ s3.Q
/* +--------------+ */
)
NETLIST_END()
@ -182,18 +182,18 @@ static NETLIST_START(TTL_7410_DIP)
TTL_7410_GATE(s2)
TTL_7410_GATE(s3)
DUMMY_INPUT(GND)
DUMMY_INPUT(VCC)
NET_C(s1.VCC, s2.VCC, s3.VCC)
NET_C(s1.GND, s2.GND, s3.GND)
DIPPINS( /* +--------------+ */
s1.A, /* A1 |1 ++ 14| VCC */ VCC.I,
s1.A, /* A1 |1 ++ 14| VCC */ s1.VCC,
s1.B, /* B1 |2 13| C1 */ s1.C,
s2.A, /* A2 |3 12| Y1 */ s1.Q,
s2.B, /* B2 |4 7410 11| C3 */ s3.C,
s2.C, /* C2 |5 10| B3 */ s3.B,
s2.Q, /* Y2 |6 9| A3 */ s3.A,
GND.I, /* GND |7 8| Y3 */ s3.Q
/* +--------------+ */
s1.GND,/* GND |7 8| Y3 */ s3.Q
/* +--------------+ */
)
NETLIST_END()
@ -219,17 +219,17 @@ static NETLIST_START(TTL_7411_DIP)
TTL_7411_GATE(s2)
TTL_7411_GATE(s3)
DUMMY_INPUT(GND)
DUMMY_INPUT(VCC)
NET_C(s1.VCC, s2.VCC, s3.VCC)
NET_C(s1.GND, s2.GND, s3.GND)
DIPPINS( /* +--------------+ */
s1.A, /* A1 |1 ++ 14| VCC */ VCC.I,
s1.A, /* A1 |1 ++ 14| VCC */ s1.VCC,
s1.B, /* B1 |2 13| C1 */ s1.C,
s2.A, /* A2 |3 12| Y1 */ s1.Q,
s2.B, /* B2 |4 7411 11| C3 */ s3.C,
s2.C, /* C2 |5 10| B3 */ s3.B,
s2.Q, /* Y2 |6 9| A3 */ s3.A,
GND.I, /* GND |7 8| Y3 */ s3.Q
s1.GND,/* GND |7 8| Y3 */ s3.Q
/* +--------------+ */
)
NETLIST_END()
@ -314,18 +314,18 @@ static NETLIST_START(TTL_7416_DIP)
TTL_7416_GATE(s5)
TTL_7416_GATE(s6)
DUMMY_INPUT(GND)
DUMMY_INPUT(VCC)
NET_C(s1.VCC, s2.VCC, s3.VCC, s4.VCC, s5.VCC, s6.VCC)
NET_C(s1.GND, s2.GND, s3.GND, s4.GND, s5.GND, s6.GND)
DIPPINS( /* +--------------+ */
s1.A, /* A1 |1 ++ 14| VCC */ VCC.I,
s1.A, /* A1 |1 ++ 14| VCC */ s1.VCC,
s1.Q, /* Y1 |2 13| A6 */ s6.A,
s2.A, /* A2 |3 12| Y6 */ s6.Q,
s2.Q, /* Y2 |4 7416 11| A5 */ s5.A,
s3.A, /* A3 |5 10| Y5 */ s5.Q,
s3.Q, /* Y3 |6 9| A4 */ s4.A,
GND.I, /* GND |7 8| Y4 */ s4.Q
/* +--------------+ */
s1.GND,/* GND |7 8| Y4 */ s4.Q
/* +--------------+ */
)
NETLIST_END()
@ -351,19 +351,19 @@ static NETLIST_START(TTL_7420_DIP)
TTL_7420_GATE(s1)
TTL_7420_GATE(s2)
DUMMY_INPUT(GND)
DUMMY_INPUT(VCC)
NET_C(s1.VCC, s2.VCC)
NET_C(s1.GND, s2.GND)
DUMMY_INPUT(NC)
DIPPINS( /* +--------------+ */
s1.A, /* A1 |1 ++ 14| VCC */ VCC.I,
s1.A, /* A1 |1 ++ 14| VCC */ s1.VCC,
s1.B, /* B1 |2 13| D2 */ s2.D,
NC.I, /* NC |3 12| C2 */ s2.C,
s1.C, /* C1 |4 7420 11| NC */ NC.I,
s1.D, /* D1 |5 10| B2 */ s2.B,
s1.Q, /* Y1 |6 9| A2 */ s2.A,
GND.I, /* GND |7 8| Y2 */ s2.Q
/* +--------------+ */
s1.GND,/* GND |7 8| Y2 */ s2.Q
/* +--------------+ */
)
NETLIST_END()
@ -393,19 +393,19 @@ static NETLIST_START(TTL_7425_DIP)
TTL_7425_GATE(s1)
TTL_7425_GATE(s2)
DUMMY_INPUT(GND)
DUMMY_INPUT(VCC)
NET_C(s1.VCC, s2.VCC)
NET_C(s1.GND, s2.GND)
DUMMY_INPUT(X)
DIPPINS( /* +--------------+ */
s1.A, /* A1 |1 ++ 14| VCC */ VCC.I,
s1.A, /* A1 |1 ++ 14| VCC */ s1.VCC,
s1.B, /* B1 |2 13| D2 */ s2.D,
X.I, /* X1 |3 12| C2 */ s2.C,
X.I, /* X1 |3 12| C2 */ s2.C,
s1.C, /* C1 |4 7425 11| X2 */ X.I,
s1.D, /* D1 |5 10| B2 */ s2.B,
s1.Q, /* Y1 |6 9| A2 */ s2.A,
GND.I, /* GND |7 8| Y2 */ s2.Q
/* +--------------+ */
s1.GND,/* GND |7 8| Y2 */ s2.Q
/* +--------------+ */
)
NETLIST_END()
@ -432,17 +432,17 @@ static NETLIST_START(TTL_7427_DIP)
TTL_7427_GATE(s2)
TTL_7427_GATE(s3)
DUMMY_INPUT(GND)
DUMMY_INPUT(VCC)
NET_C(s1.VCC, s2.VCC, s3.VCC)
NET_C(s1.GND, s2.GND, s3.GND)
DIPPINS( /* +--------------+ */
s1.A, /* A1 |1 ++ 14| VCC */ VCC.I,
s1.A, /* A1 |1 ++ 14| VCC */ s1.VCC,
s1.B, /* B1 |2 13| C1 */ s1.C,
s2.A, /* A2 |3 12| Y1 */ s1.Q,
s2.B, /* B2 |4 7427 11| C3 */ s3.C,
s2.C, /* C2 |5 10| B3 */ s3.B,
s2.Q, /* Y2 |6 9| A3 */ s3.A,
GND.I, /* GND |7 8| Y3 */ s3.Q
s1.GND,/* GND |7 8| Y3 */ s3.Q
/* +--------------+ */
)
NETLIST_END()
@ -471,18 +471,16 @@ NETLIST_END()
static NETLIST_START(TTL_7430_DIP)
TTL_7430_GATE(s1)
DUMMY_INPUT(GND)
DUMMY_INPUT(VCC)
DUMMY_INPUT(NC)
DIPPINS( /* +--------------+ */
s1.A, /* A |1 ++ 14| VCC */ VCC.I,
s1.A, /* A |1 ++ 14| VCC */ s1.VCC,
s1.B, /* B |2 13| NC */ NC.I,
s1.C, /* C |3 12| H */ s1.H,
s1.D, /* D |4 7430 11| G */ s1.G,
s1.E, /* E |5 10| NC */ NC.I,
s1.F, /* F |6 9| NC */ NC.I,
GND.I, /* GND |7 8| Y */ s1.Q
s1.GND,/* GND |7 8| Y */ s1.Q
/* +--------------+ */
)
NETLIST_END()
@ -511,18 +509,18 @@ static NETLIST_START(TTL_7432_DIP)
TTL_7432_GATE(s3)
TTL_7432_GATE(s4)
DUMMY_INPUT(GND)
DUMMY_INPUT(VCC)
NET_C(s1.VCC, s2.VCC, s3.VCC, s4.VCC)
NET_C(s1.GND, s2.GND, s3.GND, s4.GND)
DIPPINS( /* +--------------+ */
s1.A, /* A1 |1 ++ 14| VCC */ VCC.I,
s1.A, /* A1 |1 ++ 14| VCC */ s1.VCC,
s1.B, /* B1 |2 13| B4 */ s4.B,
s1.Q, /* Y1 |3 12| A4 */ s4.A,
s2.A, /* A2 |4 7400 11| Y4 */ s4.Q,
s2.B, /* B2 |5 10| B3 */ s3.B,
s2.Q, /* Y2 |6 9| A3 */ s3.A,
GND.I, /* GND |7 8| Y3 */ s3.Q
/* +--------------+ */
s1.GND,/* GND |7 8| Y3 */ s3.Q
/* +--------------+ */
)
NETLIST_END()
@ -553,18 +551,18 @@ static NETLIST_START(TTL_7437_DIP)
TTL_7437_GATE(s3)
TTL_7437_GATE(s4)
DUMMY_INPUT(GND)
DUMMY_INPUT(VCC)
NET_C(s1.VCC, s2.VCC, s3.VCC, s4.VCC)
NET_C(s1.GND, s2.GND, s3.GND, s4.GND)
DIPPINS( /* +--------------+ */
s1.A, /* A1 |1 ++ 14| VCC */ VCC.I,
s1.A, /* A1 |1 ++ 14| VCC */ s1.VCC,
s1.B, /* B1 |2 13| B4 */ s4.B,
s1.Q, /* Y1 |3 12| A4 */ s4.A,
s2.A, /* A2 |4 7400 11| Y4 */ s4.Q,
s2.B, /* B2 |5 10| B3 */ s3.B,
s2.Q, /* Y2 |6 9| A3 */ s3.A,
GND.I, /* GND |7 8| Y3 */ s3.Q
/* +--------------+ */
s1.GND,/* GND |7 8| Y3 */ s3.Q
/* +--------------+ */
)
NETLIST_END()
@ -591,17 +589,17 @@ static NETLIST_START(TTL_7486_DIP)
TTL_7486_GATE(s3)
TTL_7486_GATE(s4)
DUMMY_INPUT(GND)
DUMMY_INPUT(VCC)
NET_C(s1.VCC, s2.VCC, s3.VCC, s4.VCC)
NET_C(s1.GND, s2.GND, s3.GND, s4.GND)
DIPPINS( /* +--------------+ */
s1.A, /* A1 |1 ++ 14| VCC */ VCC.I,
s1.A, /* A1 |1 ++ 14| VCC */ s1.VCC,
s1.B, /* B1 |2 13| B4 */ s4.B,
s1.Q, /* Y1 |3 12| A4 */ s4.A,
s2.A, /* A2 |4 7486 11| Y4 */ s4.Q,
s2.B, /* B2 |5 10| B3 */ s3.B,
s2.Q, /* Y2 |6 9| A3 */ s3.A,
GND.I, /* GND |7 8| Y3 */ s3.Q
s1.GND,/* GND |7 8| Y3 */ s3.Q
/* +--------------+ */
)
NETLIST_END()
@ -642,18 +640,18 @@ static NETLIST_START(TTL_74155_DIP)
NET_C(s1.A, s2.A)
NET_C(s1.B, s2.B)
DUMMY_INPUT(GND)
DUMMY_INPUT(VCC)
NET_C(s1.VCC, s2.VCC)
NET_C(s1.GND, s2.GND)
DIPPINS( /* +--------------+ */
s1.C, /* C1 |1 ++ 16| VCC */ VCC.I,
s1.C, /* C1 |1 ++ 16| VCC */ s1.VCC,
s1.G, /* G1 |2 15| B4 */ s2.C,
s1.B, /* B |3 14| B4 */ s2.G,
s1.3, /* 1Y3 |4 74155 13| A4 */ s2.A,
s2.2, /* 1Y2 |5 12| Y4 */ s2.3,
s2.1, /* 1Y1 |6 11| B3 */ s2.2,
s2.0, /* 1Y0 |7 10| A3 */ s2.1,
GND.I, /* GND |8 9| Y3 */ s2.0
s1.GND,/* GND |8 9| Y3 */ s2.0
/* +--------------+ */
)
NETLIST_END()
@ -665,18 +663,18 @@ static NETLIST_START(TTL_74156_DIP)
NET_C(s1.A, s2.A)
NET_C(s1.B, s2.B)
DUMMY_INPUT(GND)
DUMMY_INPUT(VCC)
NET_C(s1.VCC, s2.VCC)
NET_C(s1.GND, s2.GND)
DIPPINS( /* +--------------+ */
s1.C, /* C1 |1 ++ 16| VCC */ VCC.I,
s1.C, /* C1 |1 ++ 16| VCC */ s1.VCC,
s1.G, /* G1 |2 15| B4 */ s2.C,
s1.B, /* B |3 14| B4 */ s2.G,
s1.3, /* 1Y3 |4 74156 13| A4 */ s2.A,
s2.2, /* 1Y2 |5 12| Y4 */ s2.3,
s2.1, /* 1Y1 |6 11| B3 */ s2.2,
s2.0, /* 1Y0 |7 10| A3 */ s2.1,
GND.I, /* GND |8 9| Y3 */ s2.0
s1.GND,/* GND |8 9| Y3 */ s2.0
/* +--------------+ */
)
NETLIST_END()
@ -704,18 +702,18 @@ static NETLIST_START(TTL_74260_DIP)
TTL_74260_GATE(s1)
TTL_74260_GATE(s2)
DUMMY_INPUT(GND)
DUMMY_INPUT(VCC)
NET_C(s1.VCC, s2.VCC)
NET_C(s1.GND, s2.GND)
DIPPINS( /* +--------------+ */
s1.C, /* C1 |1 ++ 14| VCC */ VCC.I,
s1.C, /* C1 |1 ++ 14| VCC */ s1.VCC,
s1.D, /* D1 |2 13| B1 */ s1.B,
s1.E, /* E1 |3 12| A1 */ s1.A,
s2.E, /* E2 |4 74260 11| D2 */ s2.D,
s1.Q, /* Y1 |5 10| C2 */ s2.C,
s2.Q, /* Y2 |6 9| B2 */ s2.B,
GND.I, /* GND |7 8| A2 */ s2.A
/* +--------------+ */
s1.GND,/* GND |7 8| A2 */ s2.A
/* +--------------+ */
)
NETLIST_END()
@ -751,18 +749,18 @@ static NETLIST_START(TTL_74279_DIP)
TTL_74279B(s3)
TTL_74279A(s4)
DUMMY_INPUT(GND)
DUMMY_INPUT(VCC)
NET_C(s1.VCC, s2.VCC, s3.VCC, s4.VCC)
NET_C(s1.GND, s2.GND, s3.GND, s4.GND)
DIPPINS( /* +--------------+ */
s1.R, /* 1R |1 ++ 16| VCC */ VCC.I,
s1.R, /* 1R |1 ++ 16| VCC */ s1.VCC,
s1.S1, /* 1S1 |2 15| 4S */ s4.S,
s1.S2, /* 1S2 |3 14| 4R */ s4.R,
s1.Q, /* 1Q |4 74279 13| 4Q */ s4.Q,
s2.R, /* 2R |5 12| 3S2 */ s3.S2,
s2.S, /* 2S |6 11| 3S1 */ s3.S1,
s2.Q, /* 2Q |7 10| 3R */ s3.R,
GND.I, /* GND |8 9| 3Q */ s3.Q
s1.GND, /* GND |8 9| 3Q */ s3.Q
/* +--------------+ */
)
NETLIST_END()
@ -807,18 +805,15 @@ NETLIST_END()
static NETLIST_START(DM9312_DIP)
DM9312_TT(s)
DUMMY_INPUT(GND)
DUMMY_INPUT(VCC)
DIPPINS( /* +--------------+ */
s.D0, /* D0 |1 ++ 16| VCC */ VCC.I,
DIPPINS( /* +--------------+ */
s.D0, /* D0 |1 ++ 16| VCC */ s.VCC,
s.D1, /* D1 |2 15| Y */ s.Y,
s.D2, /* D2 |3 14| YQ */ s.YQ,
s.D3, /* D3 |4 9312 13| C */ s.C,
s.D4, /* D4 |5 12| B */ s.B,
s.D5, /* D5 |6 11| A */ s.A,
s.D6, /* D6 |7 10| G */ s.G, //Strobe
GND.I, /* GND |8 9| D7 */ s.D7
s.GND, /* GND |8 9| D7 */ s.D7
/* +--------------+ */
)
NETLIST_END()
@ -839,7 +834,7 @@ NETLIST_START(TTL74XX_lib)
TT_FAMILY("74XX")
TRUTHTABLE_END()
TRUTHTABLE_START(TTL_7400_NAND, 2, 1, "+A,+B")
TRUTHTABLE_START(TTL_7400_NAND, 2, 1, "+A,+B,@VCC,@GND")
TT_HEAD("A,B|Q ")
TT_LINE("0,X|1|22")
TT_LINE("X,0|1|22")
@ -855,7 +850,7 @@ NETLIST_START(TTL74XX_lib)
TT_FAMILY("74XX")
TRUTHTABLE_END()
TRUTHTABLE_START(TTL_7402_NOR, 2, 1, "+A,+B")
TRUTHTABLE_START(TTL_7402_NOR, 2, 1, "+A,+B,@VCC,@GND")
TT_HEAD("A,B|Q ")
TT_LINE("0,0|1|22")
TT_LINE("X,1|0|15")
@ -870,7 +865,7 @@ NETLIST_START(TTL74XX_lib)
TT_FAMILY("74XX")
TRUTHTABLE_END()
TRUTHTABLE_START(TTL_7404_INVERT, 1, 1, "+A")
TRUTHTABLE_START(TTL_7404_INVERT, 1, 1, "+A,@VCC,@GND")
TT_HEAD(" A | Q ")
TT_LINE(" 0 | 1 |22")
TT_LINE(" 1 | 0 |15")
@ -885,7 +880,7 @@ NETLIST_START(TTL74XX_lib)
TT_FAMILY("74XX")
TRUTHTABLE_END()
TRUTHTABLE_START(TTL_7408_AND, 2, 1, "+A,+B")
TRUTHTABLE_START(TTL_7408_AND, 2, 1, "+A,+B,@VCC,@GND")
TT_HEAD("A,B|Q ")
TT_LINE("0,X|0|15")
TT_LINE("X,0|0|15")
@ -893,7 +888,7 @@ NETLIST_START(TTL74XX_lib)
TT_FAMILY("74XX")
TRUTHTABLE_END()
TRUTHTABLE_START(TTL_7410_NAND, 3, 1, "+A,+B,+C")
TRUTHTABLE_START(TTL_7410_NAND, 3, 1, "+A,+B,+C,@VCC,@GND")
TT_HEAD("A,B,C|Q ")
TT_LINE("0,X,X|1|22")
TT_LINE("X,0,X|1|22")
@ -911,7 +906,7 @@ NETLIST_START(TTL74XX_lib)
TT_FAMILY("74XX")
TRUTHTABLE_END()
TRUTHTABLE_START(TTL_7411_AND, 3, 1, "+A,+B,+C")
TRUTHTABLE_START(TTL_7411_AND, 3, 1, "+A,+B,+C,@VCC,@GND")
TT_HEAD("A,B,C|Q ")
TT_LINE("0,X,X|0|15")
TT_LINE("X,0,X|0|15")
@ -947,7 +942,7 @@ NETLIST_START(TTL74XX_lib)
TT_FAMILY("74XX")
TRUTHTABLE_END()
TRUTHTABLE_START(TTL_7420_NAND, 4, 1, "+A,+B,+C,+D")
TRUTHTABLE_START(TTL_7420_NAND, 4, 1, "+A,+B,+C,+D,@VCC,@GND")
TT_HEAD("A,B,C,D|Q ")
TT_LINE("0,X,X,X|1|22")
TT_LINE("X,0,X,X|1|22")
@ -967,7 +962,7 @@ NETLIST_START(TTL74XX_lib)
TT_FAMILY("74XX")
TRUTHTABLE_END()
TRUTHTABLE_START(TTL_7425_NOR, 4, 1, "+A,+B,+C,+D")
TRUTHTABLE_START(TTL_7425_NOR, 4, 1, "+A,+B,+C,+D,@VCC,@GND")
TT_HEAD("A,B,C,D|Q ")
TT_LINE("1,X,X,X|0|15")
TT_LINE("X,1,X,X|0|15")
@ -986,7 +981,7 @@ NETLIST_START(TTL74XX_lib)
TT_FAMILY("74XX")
TRUTHTABLE_END()
TRUTHTABLE_START(TTL_7427_NOR, 3, 1, "+A,+B,+C")
TRUTHTABLE_START(TTL_7427_NOR, 3, 1, "+A,+B,+C,@VCC,@GND")
TT_HEAD("A,B,C|Q ")
TT_LINE("1,X,X|0|15")
TT_LINE("X,1,X|0|15")
@ -1009,7 +1004,7 @@ NETLIST_START(TTL74XX_lib)
TT_FAMILY("74XX")
TRUTHTABLE_END()
TRUTHTABLE_START(TTL_7430_NAND, 8, 1, "+A,+B,+C,+D,+E,+F,+G,+H")
TRUTHTABLE_START(TTL_7430_NAND, 8, 1, "+A,+B,+C,+D,+E,+F,+G,+H,@VCC,@GND")
TT_HEAD("A,B,C,D,E,F,G,H|Q ")
TT_LINE("0,X,X,X,X,X,X,X|1|22")
TT_LINE("X,0,X,X,X,X,X,X|1|22")
@ -1031,7 +1026,7 @@ NETLIST_START(TTL74XX_lib)
TT_FAMILY("74XX")
TRUTHTABLE_END()
TRUTHTABLE_START(TTL_7432_OR, 2, 1, "+A,+B")
TRUTHTABLE_START(TTL_7432_OR, 2, 1, "+A,+B,@VCC,@GND")
TT_HEAD("A,B|Q ")
TT_LINE("1,X|1|22")
TT_LINE("X,1|1|22")
@ -1068,7 +1063,7 @@ NETLIST_START(TTL74XX_lib)
TT_FAMILY("74XX")
TRUTHTABLE_END()
TRUTHTABLE_START(TTL_7486_XOR, 2, 1, "+A,+B")
TRUTHTABLE_START(TTL_7486_XOR, 2, 1, "+A,+B,@VCC,@GND")
TT_HEAD("A,B|Q ")
TT_LINE("0,0|0|15")
TT_LINE("0,1|1|22")
@ -1132,8 +1127,8 @@ NETLIST_START(TTL74XX_lib)
TT_FAMILY("74XX")
TRUTHTABLE_END()
TRUTHTABLE_START(TTL_74260_NOR, 5, 1, "+A,+B,+C,+D,+E")
TT_HEAD("A,B,C,D,E|Q ")
TRUTHTABLE_START(TTL_74260_NOR, 5, 1, "+A,+B,+C,+D,+E,@VCC,@GND")
TT_HEAD("A,B,C,D,E|Q")
TT_LINE("0,0,0,0,0|1|10")
TT_LINE("X,X,X,X,1|0|12")
TT_LINE("X,X,X,1,X|0|12")
@ -1163,7 +1158,7 @@ NETLIST_START(TTL74XX_lib)
TT_FAMILY("74XX")
TRUTHTABLE_END()
TRUTHTABLE_START(DM9312_TT, 12, 2, "+A,+B,+C,+G,+D0,+D1,+D2,+D3,+D4,+D5,+D6,+D7")
TRUTHTABLE_START(DM9312_TT, 12, 2, "+A,+B,+C,+G,+D0,+D1,+D2,+D3,+D4,+D5,+D6,+D7,@VCC,@GND")
TT_HEAD(" C, B, A, G,D0,D1,D2,D3,D4,D5,D6,D7| Y,YQ")
TT_LINE(" X, X, X, 1, X, X, X, X, X, X, X, X| 0, 1|33,19")
TT_LINE(" 0, 0, 0, 0, 0, X, X, X, X, X, X, X| 0, 1|33,28")

155
src/lib/netlist/macro/nlm_ttl74xx.h
View File

@ -13,107 +13,118 @@
#ifndef NL_AUTO_DEVICES
#define TTL_7400_GATE(name) \
#define TTL_7400_GATE(name) \
NET_REGISTER_DEV(TTL_7400_GATE, name)
#define TTL_7400_NAND(name, cA, cB) \
#define TTL_7400_NAND(name, cA, cB) \
NET_REGISTER_DEV(TTL_7400_NAND, name) \
NET_CONNECT(name, VCC, VCC) \
NET_CONNECT(name, GND, GND) \
NET_CONNECT(name, A, cA) \
NET_CONNECT(name, B, cB)
#define TTL_7400_DIP(name) \
#define TTL_7400_DIP(name) \
NET_REGISTER_DEV(TTL_7400_DIP, name)
#define TTL_7402_GATE(name) \
#define TTL_7402_GATE(name) \
NET_REGISTER_DEV(TTL_7402_GATE, name)
#define TTL_7402_NOR(name, cI1, cI2) \
NET_REGISTER_DEV(TTL_7402_NOR, name) \
NET_CONNECT(name, A, cI1) \
#define TTL_7402_NOR(name, cI1, cI2) \
NET_REGISTER_DEV(TTL_7402_NOR, name) \
NET_CONNECT(name, VCC, VCC) \
NET_CONNECT(name, GND, GND) \
NET_CONNECT(name, A, cI1) \
NET_CONNECT(name, B, cI2)
#define TTL_7402_DIP(name) \
#define TTL_7402_DIP(name) \
NET_REGISTER_DEV(TTL_7402_DIP, name)
#define TTL_7404_GATE(name) \
#define TTL_7404_GATE(name) \
NET_REGISTER_DEV(TTL_7404_GATE, name)
#define TTL_7404_INVERT(name, cA) \
NET_REGISTER_DEV(TTL_7404_INVERT, name) \
#define TTL_7404_INVERT(name, cA) \
NET_REGISTER_DEV(TTL_7404_INVERT, name) \
NET_CONNECT(name, VCC, VCC) \
NET_CONNECT(name, GND, GND) \
NET_CONNECT(name, A, cA)
#define TTL_7404_DIP(name) \
#define TTL_7404_DIP(name) \
NET_REGISTER_DEV(TTL_7404_DIP, name)
#define TTL_7408_GATE(name) \
#define TTL_7408_GATE(name) \
NET_REGISTER_DEV(TTL_7408_GATE, name)
#define TTL_7408_AND(name, cA, cB) \
#define TTL_7408_AND(name, cA, cB) \
NET_REGISTER_DEV(TTL_7408_AND, name) \
NET_CONNECT(name, VCC, VCC) \
NET_CONNECT(name, GND, GND) \
NET_CONNECT(name, A, cA) \
NET_CONNECT(name, B, cB)
#define TTL_7408_DIP(name) \
#define TTL_7408_DIP(name) \
NET_REGISTER_DEV(TTL_7408_DIP, name)
#define TTL_7410_GATE(name) \
#define TTL_7410_GATE(name) \
NET_REGISTER_DEV(TTL_7410_GATE, name)
#define TTL_7410_NAND(name, cI1, cI2, cI3) \
NET_REGISTER_DEV(TTL_7410_NAND, name) \
NET_CONNECT(name, A, cI1) \
NET_CONNECT(name, B, cI2) \
#define TTL_7410_NAND(name, cI1, cI2, cI3) \
NET_REGISTER_DEV(TTL_7410_NAND, name) \
NET_CONNECT(name, VCC, VCC) \
NET_CONNECT(name, GND, GND) \
NET_CONNECT(name, A, cI1) \
NET_CONNECT(name, B, cI2) \
NET_CONNECT(name, C, cI3)
#define TTL_7410_DIP(name) \
#define TTL_7410_DIP(name) \
NET_REGISTER_DEV(TTL_7410_DIP, name)
#define TTL_7411_GATE(name) \
#define TTL_7411_GATE(name) \
NET_REGISTER_DEV(TTL_7411_GATE, name)
#define TTL_7411_AND(name, cI1, cI2, cI3) \
NET_REGISTER_DEV(TTL_7411_AND, name) \
NET_CONNECT(name, A, cI1) \
NET_CONNECT(name, B, cI2) \
#define TTL_7411_AND(name, cI1, cI2, cI3) \
NET_REGISTER_DEV(TTL_7411_AND, name) \
NET_CONNECT(name, VCC, VCC) \
NET_CONNECT(name, GND, GND) \
NET_CONNECT(name, A, cI1) \
NET_CONNECT(name, B, cI2) \
NET_CONNECT(name, C, cI3)
#define TTL_7411_DIP(name) \
#define TTL_7411_DIP(name) \
NET_REGISTER_DEV(TTL_7411_DIP, name)
#define TTL_7414_GATE(name) \
#define TTL_7414_GATE(name) \
NET_REGISTER_DEV(TTL_7414_GATE, name)
#define TTL_7414_DIP(name) \
#define TTL_7414_DIP(name) \
NET_REGISTER_DEV(TTL_7414_DIP, name)
#define TTL_74LS14_GATE(name) \
#define TTL_74LS14_GATE(name) \
NET_REGISTER_DEV(TTL_74LS14_GATE, name)
#define TTL_74LS14_DIP(name) \
#define TTL_74LS14_DIP(name) \
NET_REGISTER_DEV(TTL_74LS14_DIP, name)
#define TTL_7416_GATE(name) \
#define TTL_7416_GATE(name) \
NET_REGISTER_DEV(TTL_7416_GATE, name)
#define TTL_7416_DIP(name) \
#define TTL_7416_DIP(name) \
NET_REGISTER_DEV(TTL_7416_DIP, name)
#define TTL_7420_GATE(name) \
#define TTL_7420_GATE(name) \
NET_REGISTER_DEV(TTL_7420_GATE, name)
#define TTL_7420_NAND(name, cI1, cI2, cI3, cI4) \
NET_REGISTER_DEV(TTL_7420_NAND, name) \
NET_CONNECT(name, A, cI1) \
NET_CONNECT(name, B, cI2) \
NET_CONNECT(name, C, cI3) \
#define TTL_7420_NAND(name, cI1, cI2, cI3, cI4) \
NET_REGISTER_DEV(TTL_7420_NAND, name) \
NET_CONNECT(name, VCC, VCC) \
NET_CONNECT(name, GND, GND) \
NET_CONNECT(name, A, cI1) \
NET_CONNECT(name, B, cI2) \
NET_CONNECT(name, C, cI3) \
NET_CONNECT(name, D, cI4)
#define TTL_7420_DIP(name) \
@ -125,6 +136,8 @@
#define TTL_7425_NOR(name, cI1, cI2, cI3, cI4) \
NET_REGISTER_DEV(TTL_7425_NOR, name) \
NET_CONNECT(name, VCC, VCC) \
NET_CONNECT(name, GND, GND) \
NET_CONNECT(name, A, cI1) \
NET_CONNECT(name, B, cI2) \
NET_CONNECT(name, C, cI3) \
@ -139,6 +152,8 @@
#define TTL_7427_NOR(name, cI1, cI2, cI3) \
NET_REGISTER_DEV(TTL_7427_NOR, name) \
NET_CONNECT(name, VCC, VCC) \
NET_CONNECT(name, GND, GND) \
NET_CONNECT(name, A, cI1) \
NET_CONNECT(name, B, cI2) \
NET_CONNECT(name, C, cI3)
@ -150,8 +165,10 @@
#define TTL_7430_GATE(name) \
NET_REGISTER_DEV(TTL_7430_GATE, name)
#define TTL_7430_NAND(name, cI1, cI2, cI3, cI4, cI5, cI6, cI7, cI8) \
#define TTL_7430_NAND(name, cI1, cI2, cI3, cI4, cI5, cI6, cI7, cI8)\
NET_REGISTER_DEV(TTL_7430_NAND, name) \
NET_CONNECT(name, VCC, VCC) \
NET_CONNECT(name, GND, GND) \
NET_CONNECT(name, A, cI1) \
NET_CONNECT(name, B, cI2) \
NET_CONNECT(name, C, cI3) \
@ -170,18 +187,21 @@
#define TTL_7432_OR(name, cI1, cI2) \
NET_REGISTER_DEV(TTL_7432_OR, name) \
NET_CONNECT(name, VCC, VCC) \
NET_CONNECT(name, GND, GND) \
NET_CONNECT(name, A, cI1) \
NET_CONNECT(name, B, cI2)
#define TTL_7432_DIP(name) \
NET_REGISTER_DEV(TTL_7432_DIP, name)
#define TTL_7437_GATE(name) \
NET_REGISTER_DEV(TTL_7437_GATE, name)
#define TTL_7437_NAND(name, cA, cB) \
NET_REGISTER_DEV(TTL_7437_NAND, name) \
NET_CONNECT(name, VCC, VCC) \
NET_CONNECT(name, GND, GND) \
NET_CONNECT(name, A, cA) \
NET_CONNECT(name, B, cB)
@ -194,6 +214,8 @@
#define TTL_7486_XOR(name, cA, cB) \
NET_REGISTER_DEV(TTL_7486_XOR, name) \
NET_CONNECT(name, VCC, VCC) \
NET_CONNECT(name, GND, GND) \
NET_CONNECT(name, A, cA) \
NET_CONNECT(name, B, cB)
@ -206,40 +228,43 @@
#define TTL_74156_DIP(name) \
NET_REGISTER_DEV(TTL_74156_DIP, name)
#define TTL_74260_GATE(name) \
NET_REGISTER_DEV(TTL_74260_GATE, name)
#define TTL_74260_NOR(name, cA, cB, cC, cD, cE) \
NET_REGISTER_DEV(TTL_74260_NOR, name) \
NET_CONNECT(name, A, cA) \
NET_CONNECT(name, B, cB) \
NET_CONNECT(name, C, cC) \
NET_CONNECT(name, D, cD) \
#define TTL_74260_NOR(name, cA, cB, cC, cD, cE) \
NET_REGISTER_DEV(TTL_74260_NOR, name) \
NET_CONNECT(name, VCC, VCC) \
NET_CONNECT(name, GND, GND) \
NET_CONNECT(name, A, cA) \
NET_CONNECT(name, B, cB) \
NET_CONNECT(name, C, cC) \
NET_CONNECT(name, D, cD) \
NET_CONNECT(name, E, cE)
#define TTL_74260_DIP(name) \
#define TTL_74260_DIP(name) \
NET_REGISTER_DEV(TTL_74260_DIP, name)
#define TTL_74279_DIP(name) \
NET_REGISTER_DEV(TTL_74279_DIP, name)
#define DM9312(name, cA, cB, cC, cSTROBE, cD0, cD1, cD2, cD3, cD4, cD5, cD6, cD7) \
NET_REGISTER_DEV(DM9312_TT, name) \
NET_CONNECT(name, A, cA) \
NET_CONNECT(name, B, cB) \
NET_CONNECT(name, C, cC) \
NET_CONNECT(name, G, cSTROBE) \
NET_CONNECT(name, D0, cD0) \
NET_CONNECT(name, D1, cD1) \
NET_CONNECT(name, D2, cD2) \
NET_CONNECT(name, D3, cD3) \
NET_CONNECT(name, D4, cD4) \
NET_CONNECT(name, D5, cD5) \
NET_CONNECT(name, D6, cD6) \
NET_REGISTER_DEV(DM9312_TT, name) \
NET_CONNECT(name, VCC, VCC) \
NET_CONNECT(name, GND, GND) \
NET_CONNECT(name, A, cA) \
NET_CONNECT(name, B, cB) \
NET_CONNECT(name, C, cC) \
NET_CONNECT(name, G, cSTROBE) \
NET_CONNECT(name, D0, cD0) \
NET_CONNECT(name, D1, cD1) \
NET_CONNECT(name, D2, cD2) \
NET_CONNECT(name, D3, cD3) \
NET_CONNECT(name, D4, cD4) \
NET_CONNECT(name, D5, cD5) \
NET_CONNECT(name, D6, cD6) \
NET_CONNECT(name, D7, cD7)
#define DM9312_DIP(name) \
#define DM9312_DIP(name) \
NET_REGISTER_DEV(DM9312_DIP, name)
#endif

4
src/lib/netlist/nl_base.h
View File

@ -257,8 +257,8 @@ namespace netlist
double fixed_V() const { return m_fixed_V; }
double low_thresh_V(const double VN, const double VP) const { return VN + (VP - VN) * m_low_thresh_PCNT; }
double high_thresh_V(const double VN, const double VP) const { return VN + (VP - VN) * m_high_thresh_PCNT; }
double low_V(const double VN, const double VP) const { plib::unused_var(VP); return VN + m_low_VO; }
double high_V(const double VN, const double VP) const { plib::unused_var(VN); return VP - m_high_VO; }
double low_offset_V() const { return m_low_VO; }
double high_offset_V() const { return m_high_VO; }
double R_low() const { return m_R_low; }
double R_high() const { return m_R_high; }

4
src/lib/netlist/nl_errstr.h
View File

@ -110,6 +110,9 @@ PERRMSGV(MI_LOGIC_OUTPUT_1_WITHOUT_CONNECTIONS, 1, "Found logic output {1} witho
PERRMSGV(MW_LOGIC_INPUT_1_WITHOUT_CONNECTIONS, 1, "Found logic input {1} without connections")
PERRMSGV(MW_TERMINAL_1_WITHOUT_CONNECTIONS, 1, "Found terminal {1} without connections")
PERRMSGV(ME_TERMINAL_1_WITHOUT_NET, 1, "Found terminal {1} without a net")
PERRMSGV(MF_TERMINALS_WITHOUT_NET, 0, "Found terminals without a net")
PERRMSGV(MI_REMOVE_DEVICE_1_CONNECTED_ONLY_TO_RAILS_2_3, 3, "Found device {1} connected only to railterminals {2}/{3}. Will be removed")
PERRMSGV(MW_DATA_1_NOT_FOUND, 1, "unable to find data {1} in sources collection")
@ -121,6 +124,7 @@ PERRMSGV(MW_FREQUENCY_OUTSIDE_OF_SPECS_1, 1, "MM5837: Frequency outside of
// nlid_proxy.cpp
PERRMSGV(MI_NO_POWER_TERMINALS_ON_DEVICE_1, 1, "D/A Proxy: Found no valid combination of power terminals on device {1}")
PERRMSGV(MI_MULTIPLE_POWER_TERMINALS_ON_DEVICE, 5, "D/A Proxy: Found multiple power terminals on device {1}: {2} {3} {4} {5}")
#endif /* NL_ERRSTR_H_ */

14
src/lib/netlist/nl_parser.cpp
View File

@ -359,16 +359,28 @@ void parser_t::device(const pstring &dev_type)
for (const pstring &tp : paramlist)
{
require_token(m_tok_comma);
if (plib::startsWith(tp, "+"))
{
require_token(m_tok_comma);
pstring output_name = get_identifier();
m_setup.log().debug("Link: {1} {2}\n", tp, output_name);
m_setup.register_link(devname + "." + tp.substr(1), output_name);
}
else if (plib::startsWith(tp, "@"))
{
pstring term = tp.substr(1);
m_setup.log().debug("Link: {1} {2}\n", tp, term);
//FIXME
if (term == "VCC")
m_setup.register_link(devname + "." + term, "V5");
else
m_setup.register_link(devname + "." + term, term);
}
else
{
require_token(m_tok_comma);
pstring paramfq = devname + "." + tp;
m_setup.log().debug("Defparam: {1}\n", paramfq);

53
src/lib/netlist/nl_setup.cpp
View File

@ -194,7 +194,7 @@ namespace netlist
void nlparse_t::register_link_fqn(const pstring &sin, const pstring &sout)
{
link_t temp = link_t(sin, sout);
log().debug("link {1} <== {2}\n", sin, sout);
log().debug("link {1} <== {2}", sin, sout);
m_links.push_back(temp);
}
@ -230,6 +230,7 @@ setup_t::setup_t(netlist_state_t &nlstate)
, m_nlstate(nlstate)
, m_netlist_params(nullptr)
, m_proxy_cnt(0)
, m_validation(false)
{
}
@ -296,17 +297,13 @@ void setup_t::remove_connections(const pstring &pin)
log().fatal(MF_FOUND_NO_OCCURRENCE_OF_1(pin));
}
void setup_t::register_param_t(const pstring &name, param_t &param)
{
if (!m_params.insert({param.name(), param_ref_t(param.name(), param.device(), param)}).second)
log().fatal(MF_ADDING_PARAMETER_1_TO_PARAMETER_LIST(name));
}
const pstring setup_t::resolve_alias(const pstring &name) const
pstring setup_t::resolve_alias(const pstring &name) const
{
pstring temp = name;
pstring ret;
@ -322,7 +319,31 @@ const pstring setup_t::resolve_alias(const pstring &name) const
return ret;
}
std::vector<pstring> setup_t::get_terminals_for_device_name(const pstring &devname)
pstring setup_t::de_alias(const pstring &alias) const
{
pstring temp = alias;
pstring ret;
/* FIXME: Detect endless loop */
do {
ret = temp;
temp = "";
for (auto &e : m_alias)
{
// FIXME: this will resolve first one found
if (e.second == ret)
{
temp = e.first;
break;
}
}
} while (temp != "" && temp != ret);
log().debug("{1}==>{2}\n", alias, ret);
return ret;
}
std::vector<pstring> setup_t::get_terminals_for_device_name(const pstring &devname) const
{
std::vector<pstring> terms;
for (auto & t : m_terminals)
@ -358,7 +379,7 @@ std::vector<pstring> setup_t::get_terminals_for_device_name(const pstring &devna
return terms;
}
detail::core_terminal_t *setup_t::find_terminal(const pstring &terminal_in, bool required)
detail::core_terminal_t *setup_t::find_terminal(const pstring &terminal_in, bool required) const
{
const pstring &tname = resolve_alias(terminal_in);
auto ret = m_terminals.find(tname);
@ -379,7 +400,7 @@ detail::core_terminal_t *setup_t::find_terminal(const pstring &terminal_in, bool
}
detail::core_terminal_t *setup_t::find_terminal(const pstring &terminal_in,
detail::terminal_type atype, bool required)
detail::terminal_type atype, bool required) const
{
const pstring &tname = resolve_alias(terminal_in);
auto ret = m_terminals.find(tname);
@ -746,7 +767,7 @@ void setup_t::resolve_inputs()
if (tries == 0)
{
for (auto & link : m_links)
log().warning(MF_CONNECTING_1_TO_2(link.first, link.second));
log().warning(MF_CONNECTING_1_TO_2(setup().de_alias(link.first), setup().de_alias(link.second)));
log().fatal(MF_LINK_TRIES_EXCEEDED(NL_MAX_LINK_RESOLVE_LOOPS));
}
@ -757,7 +778,7 @@ void setup_t::resolve_inputs()
delete_empty_nets();
pstring errstr("");
bool err(false);
log().verbose("looking for terminals not connected ...");
for (auto & i : m_terminals)
@ -766,7 +787,10 @@ void setup_t::resolve_inputs()
if (!term->has_net() && dynamic_cast< devices::NETLIB_NAME(dummy_input) *>(&term->device()) != nullptr)
log().info(MI_DUMMY_1_WITHOUT_CONNECTIONS(term->name()));
else if (!term->has_net())
errstr += plib::pfmt("Found terminal {1} without a net\n")(term->name());
{
log().error(ME_TERMINAL_1_WITHOUT_NET(setup().de_alias(term->name())));
err = true;
}
else if (term->net().num_cons() == 0)
{
if (term->is_logic_input())
@ -779,9 +803,8 @@ void setup_t::resolve_inputs()
log().warning(MW_TERMINAL_1_WITHOUT_CONNECTIONS(term->name()));
}
}
//FIXME: error string handling
if (errstr != "")
log().fatal("{1}", errstr);
if (err)
log().fatal(MF_TERMINALS_WITHOUT_NET());
}

15
src/lib/netlist/nl_setup.h
View File

@ -369,16 +369,18 @@ namespace netlist
const factory::list_t &factory() const { return m_factory; }
/* helper - also used by nltool */
const pstring resolve_alias(const pstring &name) const;
pstring resolve_alias(const pstring &name) const;
pstring de_alias(const pstring &alias) const;
/* needed by nltool */
std::vector<pstring> get_terminals_for_device_name(const pstring &devname);
std::vector<pstring> get_terminals_for_device_name(const pstring &devname) const;
log_type &log();
const log_type &log() const;
/* needed by proxy */
detail::core_terminal_t *find_terminal(const pstring &outname_in, const detail::terminal_type atype, bool required = true);
detail::core_terminal_t *find_terminal(const pstring &outname_in, const detail::terminal_type atype, bool required = true) const;
detail::core_terminal_t *find_terminal(const pstring &outname_in, bool required = true) const;
/* core net handling */
@ -388,9 +390,11 @@ namespace netlist
void prepare_to_run();
private:
/* validation */
detail::core_terminal_t *find_terminal(const pstring &outname_in, bool required = true);
void enable_validation() { m_validation = true; }
bool is_validation() const { return m_validation; }
private:
void merge_nets(detail::net_t &thisnet, detail::net_t &othernet);
@ -413,6 +417,7 @@ namespace netlist
std::unordered_map<pstring, param_ref_t> m_params;
unsigned m_proxy_cnt;
bool m_validation;
};
// ----------------------------------------------------------------------------------------

2
src/mame/audio/nl_mario.cpp
View File

@ -224,7 +224,9 @@ NETLIST_START(mario)
/* Dynamic timestepping avoids excessive newton loops on startup */
PARAM(Solver.DYNAMIC_LTE, 5e-2)
PARAM(Solver.DYNAMIC_TS, 1)
ANALOG_INPUT(V5, 5)
ALIAS(VCC, V5) // no-ttl-dip devices need VCC!
TTL_INPUT(SOUND0, 1)
INCLUDE(nl_mario_snd0)

7
src/mame/audio/nl_zac1b11142.cpp
View File

@ -425,6 +425,13 @@ NETLIST_START(zac1b11142)
OPTIMIZE_FRONTIER(R96.1, RES_K(4.7), 50)
#endif
/* -----------------------------------------------------------------------
* Power terminals
* -----------------------------------------------------------------------*/
NET_C(VCC, U3A.14)
NET_C(GND, U3A.7)
// Reverse so that volume raises with raising percentage in ui
PARAM(P1.REVERSE, 1)
PARAM(P2.REVERSE, 1)

29
src/mame/machine/nl_breakout.cpp
View File

@ -1704,6 +1704,35 @@ CIRCUIT_LAYOUT( breakout )
NET_C(GND, D9.1, D9.2, D9.13, D9.3, D9.4, D9.5)
//----------------------------------------------------------------
// Power Pins
//----------------------------------------------------------------
NET_C(V5, A3.14, A4.14, A5.14, A6.14,
B3.14, B4.16, B5.16, B6.14, B7.16, B8.16, B9.14,
C2.14, C3.14, C4.14, C5.14, C6.14, C7.16, C8.16,
D2.14, D3.14, D4.16, D5.14, D6.14, D7.14, D8.14,
E1.14, E2.14, E3.14, E4.14, E5.14, E6.14, E7.14, E8.14, E9.14,
F2.14, F4.14, F5.14, F6.16, F7.16, F8.14, F9.14,
H1.14, H2.14, H3.14, H4.14, H5.16, H6.16, H7.14, H8.14, H9.14,
J1.16, J2.14, J3.14, J4.16, J6.16, J7.14, J8.16, J9.14,
K1.16, K2.14, K3.14, K4.14, K5.16, K6.16, K7.14, K8.14, K9.14,
L1.16, L2.14, L3.16, L4.14, L5.16, L6.16, L7.14, L8.16, L9.14,
M1.16, M2.5, M3.14, M4.14, M5.16, M6.16, M8.14, M9.14,
N1.16, N2.5, N3.14, N4.14, N5.16, N6.16, N7.14, N9.16)
NET_C(GND, A3.7, A4.7, A5.7, A6.7,
B3.7, B4.8, B5.8, B6.7, B7.8, B8.8, B9.7,
C2.7, C3.7, C4.7, C5.7, C6.7, C7.8, C8.8,
D2.7, D3.7, D4.8, D5.7, D6.7, D7.7, D8.7,
E1.7, E2.7, E3.7, E4.7, E5.7, E6.7, E7.7, E8.7, E9.7,
F2.7, F4.7, F5.7, F6.8, F7.8, F8.7, F9.7,
H1.7, H2.7, H3.7, H4.7, H5.8, H6.8, H7.7, H8.7, H9.7,
J1.8, J2.7, J3.7, J4.8, J6.8, J7.7, J8.8, J9.7,
K1.8, K2.7, K3.7, K4.7, K5.8, K6.8, K7.7, K8.7, K9.7,
L1.8, L2.7, L3.8, L4.7, L5.8, L6.8, L7.7, L8.8, L9.7,
M1.8, M2.12, M3.7, M4.7, M5.8, M6.8, M8.7, M9.7,
N1.8, N2.12, N3.7, N4.7, N5.8, N6.8, N7.7, N9.8 )
#if 1
// 163% -- manually optimized
HINT(B6.s3, NO_DEACTIVATE)

1
src/mame/machine/nl_gtrak10.cpp
View File

@ -26,6 +26,7 @@ NETLIST_START(gtrak10)
PARAM(NETLIST.USE_DEACTIVATE, 1)
ANALOG_INPUT(V5, 5)
ALIAS(VCC, V5)
TTL_INPUT(high, 1)
TTL_INPUT(low, 0)

4
src/mame/machine/nl_hazelvid.cpp
View File

@ -20,6 +20,10 @@ NETLIST_START(hazelvid)
PARAM(NETLIST.USE_DEACTIVATE, 1)
ANALOG_INPUT(V5, 5)
ALIAS(VCC, V5) // no-ttl-dip devices need VCC!
ALIAS(VSS, V5) // CMOS/MOS default +
ALIAS(VDD, GND) // CMOS/MOS default -
TTL_INPUT(high, 1)
TTL_INPUT(low, 0)

1
src/mame/machine/nl_palestra.cpp
View File

@ -38,6 +38,7 @@ NETLIST_START(palestra)
PARAM(NETLIST.USE_DEACTIVATE, 1)
ANALOG_INPUT(V5, 5)
ALIAS(VCC, V5) // no-ttl-dip devices need VCC!
TTL_INPUT(high, 1)
TTL_INPUT(low, 0)

1
src/mame/machine/nl_pong.cpp
View File

@ -23,6 +23,7 @@ NETLIST_START(pong_fast)
PARAM(NETLIST.USE_DEACTIVATE, 1)
ANALOG_INPUT(V5, 5)
ALIAS(VCC, V5) // we need VCC for TTL chips
TTL_INPUT(high, 1)
TTL_INPUT(low, 0)

24
src/mame/machine/nl_pongd.cpp
View File

@ -87,7 +87,6 @@ CIRCUIT_LAYOUT( pongdoubles )
ANALOG_INPUT(V5, 5)
#define VCC "V5", Q
#undef GND
#define GND "GND", Q
CHIP("F9", 7493)
@ -1202,6 +1201,29 @@ CIRCUIT_LAYOUT( pongdoubles )
//CONNECTION("AUDIO", 1, "C2", 6)
ALIAS(AUDIO, C2.6)
//----------------------------------------------------------------
// Power Pins
//----------------------------------------------------------------
NET_C(V5, A1.16, A2.14, A4.16, A5.14, A6.14, A7.5, A8.14, A9.5,
B1.16, B2.14, B3.14, B4.16, B5.5, B6.14, B7.14, B8.14,
C1.5, C2.14, C3.14, C4.14, C5.14, C7.16, C8.5, C9.14, C10.14,
D1.5, D2.14, D3.14, D4.14, D5.14, D6.14, D7.16, D8.5, D9.14, D10.14,
E1.14, E2.14, E3.14, E4.14, E5.14, E6.14, E7.14, E8.14, E9.5, E10.5,
F1.14, F2.5, F3.14, F4.14, F6.14, F7.14, F8.14, F9.5, F10.5,
G1.14, G2.14, G3.14, G4.14, G6.14, G7.14, G8.16, G10.14,
H1.14, H2.14, H3.14, H4.14, H5.14, H6.14, H7.14, H8.16, H10.14,
J1.14, J10.14)
NET_C(GND, A1.8, A2.7, A4.8, A5.7, A6.7, A7.10, A8.7, A9.10,
B1.8, B2.7, B3.7, B4.8, B5.12, B6.7, B7.7, B8.7,
C1.10, C2.7, C3.7, C4.7, C5.7, C7.8, C8.10, C9.7, C10.7,
D1.10, D2.7, D3.7, D4.7, D5.7, D6.7, D7.8, D8.10, D9.7, D10.7,
E1.7, E2.7, E3.7, E4.7, E5.7, E6.7, E7.7, E8.7, E9.10, E10.10,
F1.7, F2.10, F3.7, F4.7, F6.7, F7.7, F8.7, F9.10, F10.10,
G1.7, G2.7, G3.7, G4.7, G6.7, G7.7, G8.8, G10.7,
H1.7, H2.7, H3.7, H4.7, H5.7, H6.7, H7.7, H8.8, H10.7,
J1.7, J10.7)
#ifdef DEBUG
CONNECTION("LOG1", 1, "COIN", 1)
CONNECTION("LOG1", 2, "A3", 3)

2
src/mame/machine/nl_prodigy.cpp
View File

@ -14,6 +14,8 @@ NETLIST_START(prodigy)
SOLVER(Solver, 48000)
PARAM(Solver.ACCURACY, 1e-4) // works and is sufficient
ANALOG_INPUT(VCC, 5) // For TTL chips
TTL_INPUT(high, 1)
TTL_INPUT(low, 0)

22
src/mame/machine/nl_rebound.cpp
View File

@ -1270,4 +1270,26 @@ NETLIST_START(rebound_schematics)
NET_C(V5, F3.2.CLK, F3.2.CLRQ, F3.2.J, F3.2.K)
NET_C(V5, F9.s1.A, F9.s5.A, F9.s6.A)
/* -----------------------------------------------------------------------
* Power terminals
* -----------------------------------------------------------------------*/
NET_C(V5, A1.14,
B1.14, B2.14, B3.14, B4.16, B5.14, B6.16, B7.16, B8.14,
C1.5, C2.14, C3.14, C4.16, C5.14, C6.14, C7.16, C8.14,
D2.14, D3.16, D4.16, D5.14, D6.14, D7.14, D8.14,
E1.14, E2.5, E3.16, E4.16, E5.14, E6.14, E7.14, E8.14, E9.14,
F1.14, F2.14, F3.14, F4.14, F5.5, F6.14, F7.14, F8.14, F9.14,
H1.14, H2.14, H3.5, H4.14, H5.5, H6.14, H7.14, H8.14, H9.14,
J1.14, J2.14, J3.5, J4.14, J5.14, J6.14, J7.14, J8.16, J9.5,
K2.5, K3.16, K4.14, K5.14, K6.14, K8.16, K9.5)
NET_C(GND, A1.7,
B1.7, B2.7, B3.7, B4.8, B5.7, B6.8, B7.8, B8.7,
C1.10, C2.7, C3.7, C4.8, C5.7, C6.7, C7.8, C8.7,
D2.7, D3.8, D4.8, D5.7, D6.7, D7.7, D8.7,
E1.7, E2.12, E3.8, E4.8, E5.7, E6.7, E7.7, E8.7, E9.7,
F1.7, F2.7, F3.7, F4.7, F5.10, F6.7, F7.7, F8.7, F9.7,
H1.7, H2.7, H3.10, H4.7, H5.10, H6.7, H7.7, H8.7, H9.7,
J1.7, J2.7, J3.10, J4.7, J5.7, J6.7, J7.7, J8.8, J9.10,
K2.10, K3.8, K4.7, K5.7, K6.7, K8.8, K9.10)
NETLIST_END()

1
src/mame/machine/nl_stuntcyc.cpp
View File

@ -17,6 +17,7 @@ NETLIST_START(stuntcyc)
PARAM(NETLIST.USE_DEACTIVATE, 1)
ANALOG_INPUT(V5, 5)
ALIAS(VCC, V5)
TTL_INPUT(high, 1)
TTL_INPUT(low, 0)

1
src/mame/machine/nl_tp1983.cpp
View File

@ -36,6 +36,7 @@ NETLIST_START(tp1983)
PARAM(NETLIST.USE_DEACTIVATE, 1)
ANALOG_INPUT(V5, 5)
ALIAS(VCC, V5) // no-ttl-dip devices need VCC!
TTL_INPUT(high, 1)
TTL_INPUT(low, 0)

1
src/mame/machine/nl_tp1985.cpp
View File

@ -43,6 +43,7 @@ NETLIST_START(tp1985)
PARAM(NETLIST.USE_DEACTIVATE, 0)
ANALOG_INPUT(V5, 5)
ALIAS(VCC, V5) // no-ttl-dip devices need VCC!
TTL_INPUT(high, 1)
TTL_INPUT(low, 0)