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pps41: add remaining mm78 opcodes

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This commit is contained in:
hap 2021-03-09 16:43:11 +01:00
parent 9605d49146
commit fa467244bf
3 changed files with 63 additions and 13 deletions
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21
src/devices/cpu/pps41/mm76op.cpp
View File

@ -96,11 +96,12 @@ void mm76_device::op_sb()
// Bu falling or Bu == 3: SOS
if (((m_prev2_b & 0x30) == 0x30 && (m_prev_b & 0x30) != 0x30) || (m_prev_b & 0x30) == 0x30)
{
if ((m_ram_addr & 0xf) > m_d_pins)
logerror("SOS invalid pin %d at $%03X\n", m_ram_addr & 0xf, m_prev_pc);
u8 bl = m_ram_addr & 0xf;
if (bl > m_d_pins)
logerror("SOS invalid pin %d at $%03X\n", bl, m_prev_pc);
else
{
m_d_output = (m_d_output | (1 << (m_ram_addr & 0xf))) & m_d_mask;
m_d_output = (m_d_output | (1 << bl)) & m_d_mask;
m_write_d(m_d_output);
}
}
@ -124,11 +125,12 @@ void mm76_device::op_rb()
// Bu falling or Bu == 3: ROS
if (((m_prev2_b & 0x30) == 0x30 && (m_prev_b & 0x30) != 0x30) || (m_prev_b & 0x30) == 0x30)
{
if ((m_ram_addr & 0xf) > m_d_pins)
logerror("ROS invalid pin %d at $%03X\n", m_ram_addr & 0xf, m_prev_pc);
u8 bl = m_ram_addr & 0xf;
if (bl > m_d_pins)
logerror("ROS invalid pin %d at $%03X\n", bl, m_prev_pc);
else
{
m_d_output = m_d_output & ~(1 << (m_ram_addr & 0xf));
m_d_output = m_d_output & ~(1 << bl);
m_write_d(m_d_output);
}
}
@ -152,10 +154,11 @@ void mm76_device::op_skbf()
// Bu falling or Bu == 3: SKISL
if (((m_prev2_b & 0x30) == 0x30 && (m_prev_b & 0x30) != 0x30) || (m_prev_b & 0x30) == 0x30)
{
if ((m_ram_addr & 0xf) > m_d_pins)
logerror("SKISL invalid pin %d at $%03X\n", m_ram_addr & 0xf, m_prev_pc);
u8 bl = m_ram_addr & 0xf;
if (bl > m_d_pins)
logerror("SKISL invalid pin %d at $%03X\n", bl, m_prev_pc);
else
m_skip = !BIT((m_d_output | m_read_d()) & m_d_mask, m_ram_addr & 0xf);
m_skip = !BIT((m_d_output | m_read_d()) & m_d_mask, bl);
}
// Bu != 3: SKBF

54
src/devices/cpu/pps41/mm78op.cpp
View File

@ -54,19 +54,67 @@ void mm78_device::op_skbf()
void mm78_device::op_sos()
{
// SOS: SB/SOS opcodes are separated
op_todo();
// B7 must be low
if (m_ram_addr & 0x40)
{
logerror("SOS invalid access at $%03X\n", m_prev_pc);
return;
}
u8 bl = m_ram_addr & 0xf;
if (bl < 10)
{
m_d_output = (m_d_output | (1 << bl)) & m_d_mask;
m_write_d(m_d_output);
}
else if (bl < 12)
m_int_ff[~bl & 1] = 1;
else
logerror("SOS invalid pin %d at $%03X\n", bl, m_prev_pc);
}
void mm78_device::op_ros()
{
// ROS: RB/ROS opcodes are separated
op_todo();
// B7 must be low
if (m_ram_addr & 0x40)
{
logerror("ROS invalid access at $%03X\n", m_prev_pc);
return;
}
u8 bl = m_ram_addr & 0xf;
if (bl < 10)
{
m_d_output = m_d_output & ~(1 << bl);
m_write_d(m_d_output);
}
else if (bl < 12)
m_int_ff[~bl & 1] = 0;
else
logerror("ROS invalid pin %d at $%03X\n", bl, m_prev_pc);
}
void mm78_device::op_skisl()
{
// SKISL: SKBF/SKISL opcodes are separated
op_todo();
// B7 must be low
if (m_ram_addr & 0x40)
{
logerror("SKISL invalid access at $%03X\n", m_prev_pc);
return;
}
u8 bl = m_ram_addr & 0xf;
if (bl < 10)
m_skip = !BIT((m_d_output | m_read_d()) & m_d_mask, bl);
else if (bl < 12)
m_skip = !m_int_ff[~bl & 1];
else
logerror("SKISL invalid pin %d at $%03X\n", bl, m_prev_pc);
}

1
src/devices/cpu/pps41/pps41base.cpp
View File

@ -41,7 +41,6 @@ TODO:
- allowed opcodes after TAB should be limited
- add MCU mask options, there's one for inverting interrupts
- add serial i/o
- finish MM78 opcodes
- add MM78LA
*/