cpu/e132xs: Implemented supervisor and trace modes as recompiler modes.
This eliminates or simplifies a lot of run-time checks. In particular,
the trace checks on every instruction are not generated when not
tracing, and simplified to just checking the P bit when tracing.
cpu/e132xs: Optimised code generation for RET, avoid a redundant load
when checking for an overflow trap, use the exception parameter for
exception codes rather than generating one function for each possible
code. Also simplified interpreter code for RET.
cpu/e132xs: Implemented SUMS for the recompiler.
cpu/e132xs: Implemented privilege check for setting L (interrupt
lockout) for recompiler. Not implemented for interpreter.
cpu/e132xs: Partially fixed tracing. P flag should be set by all
instructions except RET. Trace exceptions are not triggered for
branches when using the recompiler.
cpu/e132xs: Fixed ILC being set incorrectly for RET.
cpu/drcbex64.cpp: Avoid unnecessary expensive operations when a shift
operation request the zero and/or sign flags but not the carry flag.
* Also avoid an redundant load when checking if trace is active.
* Reduces generated native instruction count by about 24% on x86-64 and
gives an overall performance improvement of about 3.5% in -bench
scores.
- Simplified ROM/RAM banking.
- Added Alpha and Numerical keyboards for POS variants.
- Applied software list filters.
- Added topslot for Organiser II variants.
- Removed fake LZ64S model, ROMs moved to LZ64.
psion/psion_pack.cpp: Allow setting image_interface.
New working clones
------------------
Organiser II Alpha POS 200 [Nigel Barnes, Jaap Scherphuis]
Organiser II P 250 [Nigel Barnes, Jaap Scherphuis]
Organiser II P 432 [Nigel Barnes, Jaap Scherphuis]
* Made interrupt check function generate far more compact code (about
85% reduction in number of native instructions on x86-64).
* Optimised out-of-cycles check.
* Applied prior optimisation for trap/interrupt checks to static
exception checks as well (code is still copy/pasted).
* Hi-hat decay knob is now working.
* Open and closed hats have different decays.
* Better default tuning for the snare.
* Removed `strobe_` prefix from functions where it was redundant. Made it an argument in a function where it matters.
New systems marked not working
------------------------------
MICE-IIIS 68000 [ArcadeHacker]
Also renamed "Microtek International" to just "Microtek" as manufacturer name on the driver for older MICE models (the commercial brand was "Microtek", without any suffix).
New systems marked not working
------------------------------
Turnier Dart [Victor Fernandez (City Game)]
New clones marked not working
------------------------------
Turnier Dart (HB8-97) [Victor Fernandez (City Game)]
- igs/spoker.cpp: dumped missing GFX ROM for jinhulu2101is and cjdh6. Renamed cjdh6 to huahuas2a as it was misnamed [little0]
- igs/spoker.cpp: implemented more tile banking bits following Haze's IGS033 implementation, gives correct GFX for the sets which use that chip without breaking the ones using the IGS001 / IGS002 combo
* Tatsumi code location shuffle
* put the wrong class name here
* chip type difference is definitely not the CLUT size, which is weird, but now confirmed on a PCB.
---------
Co-authored-by: David Haywood <hazemamewip@hotmail.com>
* Cleaned up and commented code for generating an exception, reducing
about nine memory accesses to update SR to two.
* Implemented NEGS, and fixed ADDS and SUBS not setting excption handler
address.
* Optimised code to update Z flag on logic operations to avoid branches.
* Reduced copy/paste a bit more.
------------------------------
Da Fu Wang III (V130LI) [Dr.Liu(BJ), little0]
Huahua Shijie II (v100FI) [Dr.Liu(BJ), little0]
Hua Sheng II (v120DI) [Dr.Liu(BJ), little0]
Hu Lu Wang II (v100KI) [Dr.Liu(BJ), little0]
Jin Huang Guan [Dr.Liu(BJ), little0]
Shuiguo Leyuan (V150UI) [Dr.Liu(BJ), little0]
Zuanshi Wutai (V110II) [Dr.Liu(BJ), little0]
New clones marked not working
-----------------------------
Jin Hu Lu II (v100GI) [Dr.Liu(BJ), little0]
cpu/e132xs.cpp: Refactored code generation to improve performance and
fixed some issues:
* Moved a considerable amound of logic from execution time to code
generation time.
* Fixed some cases where add/subtract carry was being interpreted
incorrectly.
* Fixed a case where a load double intruction was incorrectly writing
the same register twice.
* Use UML flags to generate condition codes for addition/subtraction.
* Use UML carry flag for carry-/borrow-in.
* Reduced UML register pressure (improves performance for hosts with
fewer callee-saved CPU registers).
* Moved more logic to helper functions to simplify maintenance.
cpu/drcbex64.cpp: Fixed upper bits of UML registers being cleared when
used as address offset for LOAD/STORE.
cpu/drcbex64.cpp: Don't do expensive zero/sign flag update for shift
operations if only carry flag will be used.
cpu/drcbex64.cpp: Reduced copy/paste in READ[M]/WRITE[M] generators.
