New systems marked not working
------------------------------
Turnier Dart [Victor Fernandez (City Game)]
New clones marked not working
------------------------------
Turnier Dart (HB8-97) [Victor Fernandez (City Game)]
- igs/spoker.cpp: dumped missing GFX ROM for jinhulu2101is and cjdh6. Renamed cjdh6 to huahuas2a as it was misnamed [little0]
- igs/spoker.cpp: implemented more tile banking bits following Haze's IGS033 implementation, gives correct GFX for the sets which use that chip without breaking the ones using the IGS001 / IGS002 combo
* Tatsumi code location shuffle
* put the wrong class name here
* chip type difference is definitely not the CLUT size, which is weird, but now confirmed on a PCB.
---------
Co-authored-by: David Haywood <hazemamewip@hotmail.com>
* Cleaned up and commented code for generating an exception, reducing
about nine memory accesses to update SR to two.
* Implemented NEGS, and fixed ADDS and SUBS not setting excption handler
address.
* Optimised code to update Z flag on logic operations to avoid branches.
* Reduced copy/paste a bit more.
------------------------------
Da Fu Wang III (V130LI) [Dr.Liu(BJ), little0]
Huahua Shijie II (v100FI) [Dr.Liu(BJ), little0]
Hua Sheng II (v120DI) [Dr.Liu(BJ), little0]
Hu Lu Wang II (v100KI) [Dr.Liu(BJ), little0]
Jin Huang Guan [Dr.Liu(BJ), little0]
Shuiguo Leyuan (V150UI) [Dr.Liu(BJ), little0]
Zuanshi Wutai (V110II) [Dr.Liu(BJ), little0]
New clones marked not working
-----------------------------
Jin Hu Lu II (v100GI) [Dr.Liu(BJ), little0]
cpu/e132xs.cpp: Refactored code generation to improve performance and
fixed some issues:
* Moved a considerable amound of logic from execution time to code
generation time.
* Fixed some cases where add/subtract carry was being interpreted
incorrectly.
* Fixed a case where a load double intruction was incorrectly writing
the same register twice.
* Use UML flags to generate condition codes for addition/subtraction.
* Use UML carry flag for carry-/borrow-in.
* Reduced UML register pressure (improves performance for hosts with
fewer callee-saved CPU registers).
* Moved more logic to helper functions to simplify maintenance.
cpu/drcbex64.cpp: Fixed upper bits of UML registers being cleared when
used as address offset for LOAD/STORE.
cpu/drcbex64.cpp: Don't do expensive zero/sign flag update for shift
operations if only carry flag will be used.
cpu/drcbex64.cpp: Reduced copy/paste in READ[M]/WRITE[M] generators.
- Added a default NVRAM to fastdrwp.
- Derivated inputs for fasdrwp.
- Added buttons-lamps layout for fastdrwp.
- Promoted fastdrwp set to working.
Systems promoted to working
---------------------------
Fast Draw (poker conversion kit) [Roberto Fresca, Grull Osgo]
Sega Rally has an instruction that calculates d += p and loads a value into d at the same time; it is the loaded value that should be used, not the result of the ALU operation
Also only test the d register when performing an ALU operation
cpu/drcbex64.cpp: Avoid a lot of unnecessary flag manipulation on
shift/rotate operations. Don't calculate flags when not requested.
Don't preserve carry in for operations that don't use it as an input.
cpu/drcbex64.cpp: Avoid loading CL when ECX can be used. Loading CL
doesn't clear the upper bits, so it depends on the previous value of
RCX, causing pipeline dependencies. Loading ECX can grab a fresh rename
register.
cpu/drcbearm64.cpp: Attempt more optimisation on one more load immediate
operation.
cpu/e132xs: Get rid of a redundant TEST - ROLAND can set the Z flag.
* cpu/uml.cpp: Handle some more cases where ROLAND can be turned into
AND in the simplifier.
* cpu/drcbearm.cpp, cpu/drcbex64.cpp: Fixed a number of cases where
4-byte operations wouldn't clear the upper half of the destination
(there are plenty more of these caused by the simplifier that will be
harder to fix).
* cpu/drcbearm64.cpp: Fixed some cases where a conditional MOV could
unexpectedly clear the upper bits of the destination.
* cpu/drcbex64.cpp: Improved code generation for various arithmetic and
logical operations. More AND/OR/XOR/ADD/ADDC operand combinations are
optimised. Special cases of ROLAND/ROLINS are optimised.
* cpu/drcbex64.cpp: Don't treat operands to FADD/FMUL as commutative.
This isn't true when one is a NaN.
-cpu/e132xs: Use osd_printf_error for diagnositc output, and make more
local variables const.
* bus/nes/disksys.cpp: Updates
- Fix dead link
- Implement readable nametable mirroring status
- Fix save state support, Fix initializing function
* sound/rp2c33_snd.cpp: Fix dead link
* Mix and pan sliders work.
* Master volume knob works.
* Tuning knobs and trimmer work. Adjusted knob sensitivity on the layout.
* Corrected relative levels of voices.
* Added output LPF and DC-blocking HPFs.
* Mild refactoring: moved voice setup in strobe_* functions.
- Implemented a custom timer and counter to get correct reads in unknown hardware.
- Added buttons-lamps layout to smshilo.
- Promoted dphl, dphljp, and smshilo to working.
- Added technical notes.
Systems promoted to working
---------------------------
Draw Poker HI-LO (M.Kramer) [Roberto Fresca, Grull Osgo]
HI-LO Double Up Joker Poker [Roberto Fresca, Grull Osgo]
Draw Poker HI-LO (Japanese) [Roberto Fresca, Grull Osgo]
- igs/spoker.cpp: fixed bitplane order in jinhulu2's decode. Fixes colors [David Haywood]
New working clones
------------------
Xingyun Man Guan (China, V651C, set 2) [little0]
New systems marked not working
------------------------------
Chaoji Daheng 6th (v100FI) [little0]
Chao Ji Laizi Dou Dizhu (V109CN) [little0]
New clones marked not working
-----------------------------
Jin Hu Lu 2 (v101IS) [little0]
-cpu/drcbearm64.cpp: Don't emit code for UML NOP - the simplifier
litters the code with these for elided operations.
-frontend/mame/clifront.cpp: Added newline at end of -version output.
