Creation
This commit is contained in:
commit
0271ac3713
8
.gitignore
vendored
Normal file
8
.gitignore
vendored
Normal file
@ -0,0 +1,8 @@
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/.DS_Store
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/.tmp
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/.vscode
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/Build
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/Debug
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/Icon
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/SP_Core.code-workspace
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/RUN
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7
Make_all.cmd
Normal file
7
Make_all.cmd
Normal file
@ -0,0 +1,7 @@
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@echo off
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cd src
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call make_firmware.cmd
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call build_firmware.cmd
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cd ..
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20
ZXMAK2.cmd
Normal file
20
ZXMAK2.cmd
Normal file
@ -0,0 +1,20 @@
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@rem COPY ROM TO EMULATOR
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@rem
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@echo -------------------------------------------------------[Copy to emul start]
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@mkdir SPRINTER
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@copy Build\_SPRIN.BIN SPRINTER\SP_304.BIN
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@if errorlevel 1 goto error
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@"C:\Program Files\7-Zip\7z.exe" a "Shared_Includes\Hide\Emulators\ZXMAK2\ROMS.PAK" SPRINTER\SP_304.BIN
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@if errorlevel 1 goto error
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@del SPRINTER\SP_304.BIN
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@rmdir SPRINTER
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@goto quit
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:error
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@echo ERROR during copying to emulator
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@pause 0
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@exit 3
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:quit
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@echo -------------------------------------------------------[Copy to emul done]
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7
__make_all_.cmd
Normal file
7
__make_all_.cmd
Normal file
@ -0,0 +1,7 @@
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@if [%1]==[] (set NO_STOP="3") else (set NO_STOP=%1)
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@set error_level="0"
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@cd src
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@call make_firmware.cmd %NO_STOP%
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@cd ..
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@call build_firmware.cmd %NO_STOP%
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@cd ..
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13
clean_all.cmd
Normal file
13
clean_all.cmd
Normal file
@ -0,0 +1,13 @@
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cd src\altera\acex
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rem call clean.cmd
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cd ..\..\
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cd bios\loader
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call clean.cmd
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cd ..\exp
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call clean.cmd
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cd ..\logo
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call clean.cmd
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cd ..\rom
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call clean.cmd
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pause 0
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20
copy_to_zxmak2.cmd
Normal file
20
copy_to_zxmak2.cmd
Normal file
@ -0,0 +1,20 @@
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@rem COPY ROM TO EMULATOR
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@rem
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@echo -------------------------------------------------------[Copy to emul start]
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@mkdir SPRINTER
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@copy Build\_SPRIN.BIN SPRINTER\SP_304.BIN
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@if errorlevel 1 goto error
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@"C:\Program Files\7-Zip\7z.exe" a "Shared_Includes\Hide\Emulators\ZXMAK2\ROMS.PAK" SPRINTER\SP_304.BIN
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@if errorlevel 1 goto error
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@del SPRINTER\SP_304.BIN
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@rmdir SPRINTER
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@goto quit
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:error
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@echo ERROR during copying to emulator
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@pause 0
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@exit 3
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:quit
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@echo -------------------------------------------------------[Copy to emul done]
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4
make_and_start_emul_.cmd
Normal file
4
make_and_start_emul_.cmd
Normal file
@ -0,0 +1,4 @@
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@echo off
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call __make_all_vs.cmd
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call copy_to_zxmak2.cmd
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call start_emul.cmd
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BIN
src/ZX_ROMS/SP_128.BIN
Normal file
BIN
src/ZX_ROMS/SP_128.BIN
Normal file
Binary file not shown.
BIN
src/ZX_ROMS/SP_EXP.BIN
Normal file
BIN
src/ZX_ROMS/SP_EXP.BIN
Normal file
Binary file not shown.
BIN
src/ZX_ROMS/SP_EXP2.BIN
Normal file
BIN
src/ZX_ROMS/SP_EXP2.BIN
Normal file
Binary file not shown.
BIN
src/ZX_ROMS/SP_TRD.BIN
Normal file
BIN
src/ZX_ROMS/SP_TRD.BIN
Normal file
Binary file not shown.
BIN
src/ZX_ROMS/SP__48.BIN
Normal file
BIN
src/ZX_ROMS/SP__48.BIN
Normal file
Binary file not shown.
BIN
src/ZX_ROMS/sp_128.bin.hst
Normal file
BIN
src/ZX_ROMS/sp_128.bin.hst
Normal file
Binary file not shown.
BIN
src/ZX_ROMS/sp__48.bin.hst
Normal file
BIN
src/ZX_ROMS/sp__48.bin.hst
Normal file
Binary file not shown.
BIN
src/ZX_ROMS/sp_exp.bin.hst
Normal file
BIN
src/ZX_ROMS/sp_exp.bin.hst
Normal file
Binary file not shown.
BIN
src/ZX_ROMS/sp_trd.bin.hst
Normal file
BIN
src/ZX_ROMS/sp_trd.bin.hst
Normal file
Binary file not shown.
BIN
src/altera/acex/SP2_ACEX.sof
Normal file
BIN
src/altera/acex/SP2_ACEX.sof
Normal file
Binary file not shown.
770
src/altera/acex/SP2_ACEX.ttf
Normal file
770
src/altera/acex/SP2_ACEX.ttf
Normal file
@ -0,0 +1,770 @@
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255,255, 98,123, 57, 0,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,
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||||
224, 12,148,129, 50, 96, 6,202, 64, 25, 0,115, 96, 6, 76,128, 9, 50, 65, 6,200, 0, 25, 32, 3,108,128,109,144, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 12,144, 1, 50, 0, 54,216, 4, 27, 96, 3,108,128, 13,176, 13, 54,192, 6,192, 6,216, 32, 3,108,160, 12,148, 1,240,250,
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0, 20,128, 2, 80, 0, 10, 64, 1, 40,128, 2, 80, 0, 58, 64, 3,120, 0, 11, 96, 1, 44,128, 5,144, 0, 18,224, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 18,224, 2, 92, 0, 9,160, 3, 36,128, 4,144, 0, 18, 64, 2, 72, 0, 9, 32, 1, 36,128, 5,144, 0, 21,160, 2,184,255,
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||||
0, 2, 64, 0, 8, 0, 1, 32, 0, 4, 0, 4,128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 64,128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 4,128, 0, 16, 0, 2, 64, 0, 8, 16, 1, 32, 0, 0, 8, 0, 1, 0, 2, 0, 0, 0, 0,168,248,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2,128, 0,176,253,
|
||||
0, 5,160, 0, 20,128, 2, 80,128, 10, 0, 10, 64, 1, 32, 16, 0,133,160, 0, 20, 0, 2, 64, 0, 0, 64, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 4, 0, 16, 0, 18, 2, 0, 0, 8, 0, 0, 40, 0, 4, 34, 0, 0, 16, 0, 0, 0, 0, 0, 1, 32, 0,224,254,
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||||
0, 2,128, 16, 1, 0, 16, 80, 0, 8, 32, 0, 1, 32, 0, 0, 0, 18, 0, 2, 64, 0, 10, 0, 0, 40,128, 8,128, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0, 0,128, 16, 16, 66, 4, 0, 1, 2, 16, 1, 8, 0, 6, 16, 1, 16, 0, 2,128, 0, 1, 0, 0, 40, 0, 2, 8, 0,184,255,
|
||||
160, 9, 1,128, 66, 0,136,152, 72, 0, 72, 65, 0, 32, 4, 0, 0, 64, 80, 0, 90, 64, 3, 72, 1, 1, 32, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 4,128, 0,208, 0, 2, 0, 96, 72, 1, 13, 32, 0, 52,128, 2, 24, 0, 10, 67, 0, 40, 65, 73, 16, 48, 0, 34, 80,249,
|
||||
128, 0, 0, 0, 4,194, 0, 24, 0, 0, 96, 0, 0, 0,128, 0, 0, 6, 4, 64, 24, 8, 0, 96, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 96, 32, 12, 0, 0, 48, 0, 4,192, 0, 0, 0, 0, 0, 0, 4, 0, 0, 0, 0,144,251,
|
||||
224,129, 0,128, 3, 48, 0, 30, 0, 0, 0, 32, 0, 0,128, 0,128, 1,244, 0, 16, 0, 0, 89, 32, 3, 0, 0, 48, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 48, 0, 6,192,128, 24,192, 0, 96, 32, 0, 98, 0, 0,128, 3, 48, 0, 24, 8, 0, 96, 32, 8,226,129, 12, 0, 72,251,
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||||
160, 16, 0,128, 4,208, 2, 27, 0, 32, 97, 1, 0, 0, 0, 0,128, 22, 80, 0, 25, 8, 32,104, 1, 77, 4, 0, 48, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 48, 0, 6,192, 2, 24, 64, 35, 97, 1, 0, 32, 0, 48,160, 4,208, 8, 17, 1, 0, 64, 2, 4, 32, 8, 4, 0, 56,249,
|
||||
0, 64, 0, 0, 2,192, 0, 24, 0, 32, 98,129, 0, 0, 16, 0, 0, 6, 64, 24, 24, 9, 32, 1, 18, 44, 0, 4, 48, 33, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 48, 34, 70,200, 66, 88, 0, 8, 97, 2,140,128, 81,176, 0, 2,192, 2, 16, 0, 3, 32, 0, 72,130, 1, 48, 6,224,249,
|
||||
96, 1, 0,128, 5, 32, 0, 30,192, 0, 56, 0, 0, 96,128, 0, 0, 1,176, 0, 30,192, 0, 56, 0, 15, 98, 0, 61, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 96, 0, 61,128, 7, 48, 0, 30,208, 3, 56, 32, 15,232, 1, 60,136, 5,224, 64, 18,192, 3, 42, 0, 7,224,129, 60, 0,224,251,
|
||||
0, 65, 0, 0, 2,192, 0, 24, 0, 3, 96, 0, 0,128, 0, 1,128, 6,192, 32, 24, 16, 0, 96, 0, 12,130, 1, 49, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 1, 49, 0, 6,192, 0, 24, 0, 3, 96, 0, 0,132, 1, 48, 0, 2,192, 0, 8, 0, 3, 32, 0, 8, 0, 0, 48, 0,184,249,
|
||||
128, 17, 0, 0, 4, 0, 0, 26, 0, 0,113, 8, 0, 0, 0, 0, 0, 0,208, 2, 24, 0, 32, 34, 16,141,128, 9, 48, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 9, 48, 33, 38,196, 68, 24, 32,147, 16, 66, 44,128, 1, 48,192, 4, 16, 34, 8, 0, 3, 32, 0, 12,144,145, 48, 0,144,255,
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||||
32, 9, 5,128, 2,212, 0,152, 64, 3,104, 33, 0,128, 5, 0, 0, 64, 80, 0, 26, 80, 0, 8, 0, 1, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 6, 80, 0, 2, 0, 96,104, 33, 1, 32, 0, 0,128, 2,208, 0, 74, 0, 96, 8, 0,129, 2, 0, 52, 0,196,251,
|
||||
128, 1, 0, 0, 4,192, 0, 24, 4, 0, 64, 0, 0, 0, 64, 0, 0, 6, 4, 64, 24, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 6,128, 64, 0, 0, 0, 96, 0, 0, 0, 0, 0, 0, 4, 2, 0, 0, 8, 0, 0, 0, 0, 0, 0, 48, 0, 24,255,
|
||||
96, 1, 13,136, 3,192, 0, 6, 0, 0, 33, 0, 0,224, 1, 0,128, 1, 64, 32, 30, 0, 0, 96, 0, 12, 96, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 7, 64, 0, 6,192, 0, 32, 0, 0, 0, 0, 0,128, 3,240, 0, 24,192, 0, 96, 0, 4, 0, 0, 12, 0, 72,249,
|
||||
168, 5,180,128, 4,192, 0, 2, 0, 32, 64, 8, 0, 32, 0, 1,128, 38, 8, 2, 26, 5, 32, 97, 0, 32,176, 1, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 6,128, 0,154, 72, 35, 97, 66, 0, 0, 0, 0,128, 4, 16, 8,145, 96, 35, 97, 0, 32, 8, 0, 4, 0,251,252,
|
||||
128, 64, 0, 1, 2, 0, 2, 0, 3, 16, 96, 1, 0, 0, 0, 0, 0, 6, 0, 24,136, 16, 32, 98, 0, 76,144, 9, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 6, 64, 0,128, 0, 16, 32,128, 12,128,137, 0, 0, 2,192, 2, 16, 0, 8, 97, 0,140, 4, 0, 0, 2,165,249,
|
||||
96, 0, 60,160, 5, 48,128, 4,192, 0,122, 32, 0,192, 1, 0, 0, 1, 48, 0, 30,192, 3,120, 16, 3,224, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 7,176, 0, 30,200, 3,122, 0, 15,228, 1, 0,128, 5,224, 64, 18,192, 3,104, 0, 15, 0, 0, 12, 8,240,254,
|
||||
132, 65, 0, 16, 2, 0, 0, 2, 0, 0, 97, 0, 0, 0, 0, 0,128, 6, 64, 0, 24, 4, 0, 0, 16, 12,128, 65, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 6, 64, 0, 24, 4, 3, 32, 32, 0, 8, 0, 0, 0, 2, 0, 0, 8, 0, 3, 0, 0, 12, 2, 0, 0, 0, 42,252,
|
||||
128, 4, 0, 2, 4, 0, 0, 2, 17, 0, 64, 66, 0,160, 1, 0, 0, 0,128, 34, 24, 1, 0, 1, 2,140,130, 17, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 6,128, 0, 26, 1,131, 64, 4, 32, 0, 72, 0,128, 4,208, 34, 8, 0,131, 0, 0,140, 0, 0, 0, 16,120,251,
|
||||
32,133, 4,128, 0, 0,136,152, 68, 3, 40,132, 0, 32, 4, 50, 1, 16, 82,128, 66, 64, 0,104, 0, 5,160, 1, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 52, 0, 32, 4, 0, 2, 32, 96, 8, 0, 1, 32, 0,180, 0,192, 0,132, 10, 16, 19, 42, 34, 1, 0, 0, 0, 34,160,251,
|
||||
128, 1, 0, 0, 0,192, 0, 24, 0, 0, 0, 0, 0, 0, 0, 0, 16, 6,128, 0, 0, 8, 0, 96, 0, 0,132, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 48, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 48, 16, 6, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,104,254,
|
||||
96, 1, 13, 0, 6, 50, 64, 30, 0, 0,121, 0, 0,224,128, 60,160, 1,112, 0, 16, 0, 0, 96, 16, 4, 8,128, 12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 1, 0, 0, 8,192, 0, 24, 64, 0, 0, 0, 16,160, 7, 48, 0, 24,192, 3, 97, 32, 0, 0, 0, 12, 0,248,255,
|
||||
164, 17, 52, 17, 64,208, 4, 26, 0, 32, 40, 68, 0, 32, 16,132,128, 38,152, 0, 0, 8, 32, 97, 1,128,128, 17, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 0, 0, 0, 16, 68, 35,105, 2, 0, 0, 0,176,128, 16, 17, 0, 16, 73, 8, 64, 0, 0, 0, 0, 4, 0, 10,255,
|
||||
12, 64, 48, 9, 16,196, 0,128, 0, 16, 32, 8, 0, 0, 8, 0, 0, 6, 64, 0, 0, 9, 35, 98, 0,128,129, 49, 48, 9, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 48, 32, 22, 0, 0, 0, 0, 8, 2, 0, 44, 0, 68,176, 8, 32,200,130, 8, 0, 0, 32, 0,140, 8, 0,176, 0, 16,253,
|
||||
224, 0, 60,128, 1, 32, 0, 4,208, 0, 90, 0, 0, 96, 0, 57, 0, 1,176, 0, 6,192, 0,120, 16, 3,224, 1, 60, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 60,128, 7, 2, 0, 30,208, 3, 16, 64, 15,104, 0, 60,128, 0,240, 0, 10,128, 3, 40, 0, 15, 0, 0, 60, 16, 64,255,
|
||||
136, 65, 48, 8, 0,194, 0, 2, 0, 0, 97, 64, 0, 0, 64, 0, 0, 6, 64, 0, 0, 16, 0, 96, 16, 4, 0,129, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 48, 0, 6, 0, 0, 0, 8, 3, 0, 32, 12,128, 1, 48, 32, 0,192, 0, 8, 0, 0, 32, 0, 0, 0, 0, 48, 0,177,251,
|
||||
128, 0, 48, 0, 0, 0, 0, 2, 0, 0, 96, 4, 0, 0, 8, 52, 0, 0,128, 0, 0, 0, 0, 1, 0,136,194, 4,128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 48, 64, 6, 0, 0, 64, 0,139, 0, 1, 12,128, 81, 48, 0, 0,208, 0, 8, 64, 3, 32, 0, 64, 16, 0, 48, 0,144,248,
|
||||
32, 9, 53,128, 0, 0,136, 66, 68, 0, 72, 36,128, 36, 0, 48,129, 6, 16, 0,146, 64, 8,108, 18,133,160,133, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 48, 0,128, 0, 16, 0, 66, 32, 96, 72, 8, 13,128, 9, 5, 0,192,208, 0, 2, 0, 0, 8, 0, 13,160, 4, 4, 0,124,252,
|
||||
128, 1, 0, 0, 0,192, 0, 8, 0, 0, 96, 0, 0, 0, 0, 0, 16, 6, 0, 0, 24, 8, 0, 96, 0, 8,136, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 96, 0, 12, 0, 0, 0, 0, 0,192, 0, 0, 0, 0, 0, 0, 12, 0, 1, 5, 0, 96,249,
|
||||
96, 1, 12, 8, 0, 50, 64, 0, 0, 0, 96, 32, 3, 0,128, 60, 16, 0,192, 0, 30,200, 0, 24, 0, 7,128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 96, 0, 0, 0, 0, 0, 0, 24,196, 0, 0, 32, 15,224, 1, 0,128, 5, 48, 0, 24, 0, 0, 96, 0, 15,232, 0, 12, 0,208,252,
|
||||
168,145,132, 0, 70,208, 8, 64, 32, 32, 97, 1, 1, 0, 16,132, 0, 0, 0, 2, 27, 65,144,104, 0, 9,128, 33, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 0, 0, 65, 35, 97, 1, 13, 32, 4, 1,128, 34,212, 8, 25, 0, 0, 96, 0, 77, 32, 1, 4, 0,155,250,
|
||||
128, 65, 48, 1, 16,196, 0,128, 8, 32, 98, 4, 76, 16,144, 0, 0,192,192, 4,152, 0, 8,112, 64, 4,128, 4, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 17, 2, 0, 16, 2, 0, 0, 3, 8,100, 12, 12, 0, 0, 48, 2, 3,192, 2, 24, 0, 0, 96, 0, 76,136, 0, 48, 1, 41,251,
|
||||
224, 0, 12,160, 1, 32, 0, 6,192, 0, 56, 32, 15,224, 1, 56,128, 1, 48, 64, 30,208, 0,105, 0, 11,224, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,224, 1, 0,128, 1, 48, 64, 6,192, 3, 56, 0, 14,192, 1, 60,144, 4, 32, 64, 26, 0, 0,104, 0, 15, 96, 1, 56, 8, 92,251,
|
||||
132, 0, 0, 16, 0,194, 0, 24, 0, 0, 96, 0, 12, 0, 0, 0, 0, 6,192, 0, 24, 0, 0, 96, 0, 4,128,128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 6,192,128, 8, 0, 3, 96, 0, 12, 32, 0, 48, 0, 5,192, 0, 0, 0, 0, 0, 0, 0,128, 0, 48, 0,250,255,
|
||||
0, 80, 0, 2, 0, 0, 0, 0, 16, 3, 17, 8, 13, 0, 16, 53, 0,166,192, 34,152, 4,130, 0, 8, 8, 0, 9, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16, 2, 0, 22,200, 2,144, 8,163,112, 66, 13,160, 1, 48, 0, 2, 16, 34, 0, 0, 0, 0, 0, 12, 33, 1, 48, 0, 8,253,
|
||||
160, 0, 52,128, 2,208, 0, 66, 96, 8,108, 33, 0,160, 1, 0, 0, 16, 18, 0, 2, 64, 8, 44, 2, 13,160, 1, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 9, 0,128, 0, 16, 0, 10, 1, 96,104, 33, 1, 32, 0, 4, 0,192,208, 4, 10, 2, 96, 40, 64, 32,144, 49, 0, 34, 28,251,
|
||||
0, 65, 0, 32, 4,194, 0, 0, 0, 0, 96, 0, 0, 0, 0, 0, 0, 6, 0, 0, 0, 0, 0, 64, 16, 0,128, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128,128, 0, 0, 0, 0, 0, 16, 8, 0, 96, 0, 0, 0, 0, 48, 0, 0,192,128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 88,254,
|
||||
128, 0, 32,128, 3,192, 0, 0,196, 0, 32, 0, 0, 0, 0, 0,128, 1, 48, 0, 6,192, 0, 88, 0, 0, 0, 0, 12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,129, 0, 0, 0, 0,128, 14,192, 0, 32, 0, 12, 0, 0, 0,136, 5, 64, 64, 24,208, 0, 96, 0, 15, 96,128, 12, 0,152,254,
|
||||
4, 65, 0,145, 4,192, 0, 72, 64,136, 96, 8, 0, 0,144, 0,128, 22,212, 68, 2, 64, 80, 40, 17, 32,144, 1, 5, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 16, 0, 0, 0, 0, 2, 18, 64, 35, 97, 66, 12, 0, 0, 48,129, 2,128, 0, 16, 65, 35, 65, 65, 13, 32, 4, 4, 0,227,253,
|
||||
140, 4, 0, 32, 2, 0, 0, 16, 1, 16, 32, 64, 0, 0, 16, 1, 0, 6,192, 8,152, 16, 8, 64, 0, 12, 8, 4,176, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,133, 0, 0, 38,194, 66, 8, 0, 0, 33, 2,128, 4,136, 48, 6, 3, 64, 0, 8, 0,147, 32, 0,128,132, 9, 50, 4, 25,249,
|
||||
96, 65, 12,128, 5, 48, 32, 14,208,128,120, 0, 0, 96, 0, 0, 0, 1,240, 32, 30,192,129,104, 0, 15,224,129, 60, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,224, 0, 0,128, 7, 48, 0, 22,192, 3,120, 64, 3, 96, 0, 60,128, 4,180,128, 10,192, 0, 40, 0, 2, 96, 0, 60, 0, 52,250,
|
||||
136, 0, 0, 0, 2, 0, 0, 0, 8, 0, 32, 0, 0, 0, 0, 0, 0, 6,192, 32, 24, 0, 0, 64, 0, 12, 0, 0, 48, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 8, 0,131, 32, 0, 0,128, 65, 48, 0, 4, 66, 64, 8, 0, 0, 32, 0, 0, 0, 0, 48, 0,218,254,
|
||||
128, 80, 16, 8, 4, 0, 0, 0, 1, 9, 65, 17, 0, 0,128, 0, 0, 0,208, 4, 24, 0, 8,105, 0, 64, 1, 8, 49, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 1, 0, 0,160, 0, 68, 16, 0, 35, 64, 34, 0,136, 1,128, 16, 2,192, 2, 8, 0, 0, 34, 0, 0, 8,144, 48, 0, 24,254,
|
||||
160, 1, 4,128, 66,192,136, 24, 69, 0, 72, 32, 0, 32, 4, 6, 0, 22, 82, 8, 26, 64, 0, 8, 18,141, 36, 0,180, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 49, 0, 0, 32, 80, 2, 2, 0, 99, 72, 1, 69,136, 9, 53, 0,192,208, 0, 2, 0, 96, 8, 0,129, 0, 16, 53, 0, 36,249,
|
||||
0, 0, 0, 0, 4, 4, 0, 24, 0, 0, 96, 0, 0, 0, 0, 0, 0, 0,128, 64, 24, 0, 0, 0, 0, 12, 0, 0, 48, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,129,128, 0, 0, 0, 32, 16, 8, 0, 0, 48, 0, 0,192, 0, 0, 0, 0, 0, 0, 0, 4, 0, 48, 0,104,254,
|
||||
128, 1, 12,128, 3,240, 0, 30, 0, 0, 96, 32, 0, 96, 0, 12,128, 7,116, 0, 30, 16, 0, 88, 0, 0, 96, 0, 44, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 96, 0, 0,128, 1, 64, 0, 6,192, 0, 66, 0, 7,224, 1, 60,128, 5,240, 0, 24,192, 3, 97, 0, 3, 96, 0, 12, 0,184,250,
|
||||
8, 64, 4,128, 4, 16,136, 26, 0, 32, 97, 1, 0, 32, 80, 4,128, 16,144, 0,154, 0, 32, 41, 0, 12, 36, 0, 52, 18, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 4, 1,128, 0,132, 0,154, 72, 0, 32, 0, 9, 32, 8, 54,128, 2, 16, 8, 25, 64, 32, 96, 0, 1, 48, 0, 4, 16, 59,252,
|
||||
0, 8, 48, 17, 2, 0, 0, 24, 8, 35, 98, 0, 0, 0, 4, 48, 33, 0, 64, 0,152, 16, 32,114, 64, 12,128, 65, 48, 18, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 5, 2, 0, 0, 68, 0,152, 0, 19, 66, 0, 4, 0, 0, 0, 33, 3, 0, 2, 24, 0,139, 96, 0, 0,129, 17, 0, 1,237,249,
|
||||
224, 65, 60,128, 5,224, 0, 30,192, 0, 56, 32, 0, 96,128, 60, 0, 7,176, 0, 30,192, 3, 72, 0, 15,232, 1, 60, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 96, 0, 0, 0, 7,176, 0, 30,196, 0, 56, 0, 11,192, 1, 8,128, 4,228, 64, 26,192, 3,104, 0, 3,224,129, 60, 32, 34,255,
|
||||
132, 1, 0, 8, 2, 0, 0, 0, 4, 0, 96, 0, 0, 0, 64, 48, 0, 0, 64, 0, 0, 4, 0, 96, 0, 8,132, 1, 48, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 6, 66, 0, 24, 8, 0, 64, 0, 4, 32, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0,130, 1, 0, 0,226,250,
|
||||
0, 68,128,128, 4,192, 0,130, 0, 0, 17, 8, 0,128, 16, 48, 0, 6,128, 0,152, 0, 0, 33, 64, 38,128, 1, 52, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16, 2, 0, 38,128, 0, 26, 0, 32, 33, 0, 9,160, 1, 0, 0, 18,216, 34, 0, 0, 35, 1, 0,132,128, 1, 0, 8, 0,254,
|
||||
32, 0, 52,128, 38,209, 0, 2, 64, 8,108, 33, 0, 32, 4, 6, 0, 0, 16, 8, 27, 64, 3, 8, 18, 45, 36, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 4,128, 0, 16, 0, 2, 0, 99, 40, 17, 13,128, 9, 5, 0,192, 16, 0, 74, 0, 96,104, 68,129, 0, 48, 52, 0, 12,251,
|
||||
0, 0, 48, 0, 6,192, 0, 0, 0, 0, 96, 0, 0, 0, 0, 0, 0, 0, 0, 0, 24, 0, 0, 0, 0, 12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 12,128, 1, 0, 0, 0, 0, 0, 0, 16, 0, 64, 0, 0, 4, 0, 48, 0, 8,250,
|
||||
128, 1, 0, 0, 0,192, 0, 0,192, 0, 32, 0, 0, 96,128, 12, 0, 0,128, 0, 30, 16, 0, 89, 0, 4, 0, 0, 48, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 48, 0, 6, 48, 0, 24,192, 0, 32, 0, 15,224, 1, 48,128, 5, 0, 0, 24,192, 3, 32, 0, 3,232, 1, 1, 0, 72,248,
|
||||
132, 1,176, 64, 38,193, 0, 0, 64,128, 96, 8, 0,160, 16, 4, 0, 0, 0, 68,154, 0, 32, 40, 0, 76, 8, 0, 48, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 48, 0, 6, 16, 2, 25, 64, 16, 65, 0, 13,160, 1, 48,128, 2, 0, 0, 80, 96, 0, 1, 33, 77, 32, 8, 0, 0,179,250,
|
||||
140, 9, 0, 2, 22, 0, 2,128, 0, 0, 32, 34, 0, 0, 8,176, 8, 0, 0, 72,152, 16, 32,113, 64, 36, 8, 0, 48, 17, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 48, 1, 38, 0, 32,152, 0, 67, 32, 0, 32,132, 1, 48, 32, 3,192,136, 8, 0,163, 32, 0, 8,129,137,128, 8,105,250,
|
||||
224, 65, 60,160, 7, 50, 32, 6,208,128,120, 0, 0, 96, 0, 61, 0, 0,240, 0, 30,192, 0, 72, 0, 15, 96,128, 60, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 96,128, 60,160, 7, 52, 0, 30,208, 0, 88, 0, 3,192, 1, 60,128, 4,244, 0, 10,192, 3, 40, 0, 7,224, 1, 12, 0,250,249,
|
||||
8, 0, 0, 0, 4, 0, 0, 24, 0, 0, 32, 16, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 0, 96, 32, 4,128, 1, 49, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 1, 49, 32, 6, 0,128, 24, 0, 0, 32, 0, 0,128, 1, 48, 0, 4,194, 0, 8, 0, 0, 64, 0, 12, 0, 0, 0, 16,170,254,
|
||||
0, 68,128, 16, 67, 4, 0, 88, 32, 9, 65, 2, 0, 0, 72, 0, 2, 0, 64, 16,152, 16, 32, 34, 0,136,132, 9, 48, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 9, 48, 0, 6,200, 0, 88, 16, 32, 65, 0, 0,160, 1,176, 16, 18,192, 0, 8, 0, 35, 65, 0, 36,144,145,128, 0,124,251,
|
||||
160, 1, 4,146, 38, 0,136, 26, 64, 8, 12,132, 1, 32, 4, 48, 66, 64, 16, 0,130, 64, 8, 76, 18, 1, 32, 8, 38, 10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 49, 36,138, 68,209, 0, 18, 5, 96, 0, 0,129,176, 1, 4, 0,192,208, 0, 2, 64, 0, 32, 12, 1,128, 49, 0, 34, 24,249,
|
||||
128, 65, 0, 0, 6,196, 0, 24, 0, 0, 0, 0, 0, 0,128, 4, 0, 6,196, 0, 0, 8, 0, 0, 0, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16, 0, 2, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,192, 0, 0, 0, 0, 96, 0, 0, 0, 0, 0, 0,112,253,
|
||||
224, 1, 28, 0, 2, 48, 64, 30,192, 0, 90, 0, 3, 0,128, 60,128, 1,192, 0, 6,200,130, 88, 0, 0,224, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 96,128, 32, 0, 4, 0,128, 16,192, 0, 0, 0, 12,224, 1, 12,128, 5,240, 0, 24, 0, 0, 56, 32, 0, 96, 0, 12, 0,168,251,
|
||||
168, 65,164, 8, 22,210, 2, 26, 64, 16, 40, 10, 1, 0, 0,132,160, 22,196, 2, 19, 65, 0, 8, 18, 0, 32, 65, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 8, 16, 0, 2, 0, 2, 8, 64, 35, 1, 0, 12, 34,144,132,192, 2,208, 0, 24, 0, 0,104, 1, 0, 32, 8, 5, 0,146,252,
|
||||
128, 5, 0, 6,130,192, 0, 24, 0,136, 32, 2, 12, 0, 16, 0, 0, 6, 0, 72,128, 0, 8,112, 64, 44, 2, 48, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 5, 32, 0, 4, 0, 66, 16, 0, 0, 4, 0, 0, 0, 16, 48, 6, 3,192, 0, 24, 0, 3, 80, 0, 44,136,145, 48, 64,112,255,
|
||||
224, 65, 60,128, 7, 32, 0, 28,192, 1, 24, 32, 15,100,128, 56, 0, 1, 48, 0, 6,208, 0, 73, 0, 15,224, 1, 28, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 96,128, 28,128, 3, 48, 0, 14,192, 3, 0, 0, 11, 98,128, 8,128, 4,244, 0, 26,192, 3, 41, 64, 15, 96, 0, 60, 0,120,254,
|
||||
132, 1, 0, 0, 2,192, 0, 24, 0, 0, 96, 64, 12, 0, 1, 1,128, 6, 0, 0, 0, 0,128, 96, 64, 12, 0,128, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 4, 0, 0, 16, 0,131, 0, 0, 12,132, 1, 4, 16, 4,192, 0, 0, 0, 3, 64, 0, 12, 0, 0, 48, 0,225,250,
|
||||
160, 80, 0, 10, 4, 1, 0, 24, 0, 8, 33, 0, 12, 0, 0, 52, 0, 0,192, 72, 64, 4, 8, 64, 2, 12, 0, 4, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16, 18, 0, 2, 0, 68, 8, 0, 19, 0, 0, 12,128, 9, 5, 0, 18,194, 0, 0, 0, 3, 32, 64, 12, 0,144, 48, 0, 80,252,
|
||||
0, 1, 0, 0, 0, 0, 0, 16, 0, 0, 0, 0, 8, 0, 0, 0, 1, 32,130, 0, 0, 0, 0, 64, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 2, 0, 16, 0, 0, 0, 0, 8, 0, 4, 0, 9, 4,128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,252,252,
|
||||
0, 0, 4, 0, 0, 16, 0, 0, 68, 0, 8, 0, 0, 32, 0, 4,136, 0, 0, 0, 2, 64, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 4, 0, 0, 16, 0, 0, 64, 0, 8, 0, 1, 64,128, 4,128, 0, 0, 0, 2,128, 0, 8, 0, 1, 0, 0, 4, 16,200,254,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 96,252,
|
||||
36, 0, 4,128, 0, 24, 0, 0, 64, 0, 8, 0, 1, 32, 8, 4, 1, 0, 16, 0, 2, 64, 0, 8, 0, 1, 32, 0, 4, 33, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 4, 0, 16, 16, 0, 2, 64, 0, 8, 0, 1, 0, 0, 0,128, 0, 16, 0, 2, 64, 0, 8, 0, 1, 32, 40, 4, 0, 43,254,
|
||||
12, 0, 0, 0, 0, 0, 0, 64, 4, 0, 0, 0, 0, 0,128, 0, 17, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 4, 0, 0, 0, 0, 0, 4,128, 8, 16, 0, 4, 0, 0, 32, 0, 0, 8, 0, 0, 32, 0, 0,128, 64,177,249,
|
||||
0, 0, 0,128, 0, 16,128, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 0, 64, 0, 0, 0, 16, 0, 2, 0, 0, 1, 0, 0, 2, 0, 0, 0, 20,250,
|
||||
8, 0, 32, 0, 4, 0, 0, 0, 0, 2, 64, 0, 0, 0, 1, 32, 0, 0, 0, 0, 16, 0, 2, 0, 64, 0, 0, 1, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 4, 0, 64, 0, 0, 2, 64, 0, 8, 0,128, 0, 32, 4, 0, 0, 0, 0, 2, 64, 0, 8, 0, 1, 32, 0,234,249,
|
||||
32,132, 4,128, 0, 0, 72, 64, 72, 0, 8, 0, 33, 4, 0, 0, 0, 64, 18, 20, 2, 64, 0, 8, 0, 1, 48, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 4, 0, 0, 16, 0,130, 66, 0, 8, 0, 0, 0, 0, 0,128, 0, 0, 68, 2, 0, 0, 8, 0, 0, 32, 0, 0, 0,168,254,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4,128, 16, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 18, 0, 64, 0, 0, 0, 0, 0, 0, 64, 0, 8, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 56,252,
|
||||
0, 0, 0, 0, 0, 64, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 48,253,
|
||||
128, 0, 0, 16,128, 0, 0, 0, 0,128, 0,128, 0, 0, 64, 32, 0, 0, 0, 0, 0, 4,128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 0, 2, 0, 0, 0, 16, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,192,254,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 1, 1, 16,128, 8, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 0, 1, 0, 2, 0, 1, 0, 0,128, 0, 64, 0, 92,254,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 32,217,249,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0,128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 0, 0, 0,251,
|
||||
0, 0, 0, 0, 0, 16, 0, 0, 4, 0, 0, 0, 1, 4, 0, 16, 8, 2, 1, 0, 4, 0, 64, 0, 0, 1, 2, 64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 64, 32, 0, 0, 0, 0, 0, 0,128, 0, 16, 4, 0, 0, 16, 8, 0, 0, 32, 8, 0,129, 32, 16, 4, 0, 0, 0, 8, 0,249,
|
||||
0, 1, 0, 0, 0,128, 0, 8, 0, 0, 0, 32, 4, 8, 1, 0, 0,128, 0, 0, 0, 0, 0, 65, 32, 0,128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 4, 4, 32, 0, 16, 1, 2, 0, 0, 0, 0, 0, 0, 0,128, 16, 0, 0, 0, 0, 0, 0, 2, 64, 16, 0,160,254,
|
||||
32, 0, 0, 64, 0, 48, 0,210, 10, 96,192, 64, 3, 44, 0, 8, 16,193,134, 2, 4, 0, 0,203, 64, 2, 36,128,160, 5, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64,128,168,165,180, 4,148,128, 82, 0, 67, 33, 2,128, 0, 10, 24,180, 16,216, 52,135, 0, 17, 32, 26, 8, 0, 5, 16, 56,248,
|
||||
32, 3, 32, 60, 70,193, 40, 16, 18, 34,194, 24, 60, 2, 3, 0, 13,172,144, 3, 34, 2, 0, 96, 0, 0, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 32, 0, 0,128, 68, 32, 8, 5,225,160, 1,160, 34,130,160,170, 0, 68, 16,136, 5, 22,144, 8, 40, 8, 1, 48, 36,128,252,
|
||||
10, 0, 0, 32, 2, 65, 32, 0, 0, 0, 0, 32, 1, 8, 0, 0, 4, 0, 0, 0, 0, 0, 0, 8, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 0, 0, 0, 0, 64, 32, 2, 4,129, 32, 0, 0, 2, 0, 0, 8, 0, 64, 0, 8, 4, 0, 0, 0, 0, 0, 0, 16, 0,208,254,
|
||||
128, 0, 32, 8, 4, 16, 0, 16, 4, 2, 32, 64, 4,128, 0, 0, 32, 2, 17, 0, 0, 4, 0, 64, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 0, 0,128, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 8, 0, 0, 0, 32, 0, 0, 1, 0, 16, 2,128, 0, 32,136,212,255,
|
||||
0, 0, 0, 64, 0,128, 0, 0, 0, 0, 32, 8, 0, 0, 4,128, 0, 4, 4, 0, 1, 0, 0, 0, 0, 4,144,128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 32, 0, 34, 0, 0, 0, 0, 1, 0, 0, 64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16, 0,192,254,
|
||||
0, 0, 16, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16, 0, 1, 0, 0, 0, 0, 48,254,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 0, 0, 32, 0, 0, 0, 16, 0, 0, 0, 0, 0, 64,160,249,
|
||||
0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 33, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16, 0, 2, 0, 0, 80, 4, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 2, 0, 0, 0, 48,254,
|
||||
0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 0, 32,192, 0, 0, 64, 0, 0, 0, 0,128, 0, 0, 0, 0, 64, 0, 8, 0, 0, 36, 0, 0, 0,152,253,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 0, 10, 0, 0, 0, 0, 32, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,112,251,
|
||||
0, 0, 0, 0, 0, 0, 32, 0, 8, 0, 4, 0, 0, 0, 0, 2, 0, 0, 0, 0, 16, 0, 0, 4, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 0, 0, 0, 0,128, 0, 0, 0, 0, 0, 4, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,144,252,
|
||||
2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16, 0, 0, 0,252,252,
|
||||
0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 32, 0, 0, 0, 0, 4, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0,176,250,
|
||||
0, 32, 0, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64,128, 0, 0, 0, 1, 0, 0, 0, 0, 0, 16, 0, 32, 0, 0, 0, 0, 0, 0, 0, 64, 64, 0, 0, 8,128, 0, 0,120,250,
|
||||
0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0,128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 0, 32, 0, 0, 0, 0, 0,184,255,
|
||||
0, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 17, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 64, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0,128, 24,250,
|
||||
0, 0, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16, 0, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 8, 0, 0, 0, 1,128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 48, 0, 0, 0, 0,176,253,
|
||||
0, 1, 32, 0, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 64, 0, 0, 0, 24,248,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,254,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16, 0, 0, 0, 0, 1, 0, 0, 0, 32, 0,176,249,
|
||||
0, 0, 0, 0, 8, 0, 0, 0, 0, 2, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0,160,254,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 40, 0, 1, 0, 0, 0, 0, 0, 0, 16, 0, 0, 0, 0, 0,176,255,
|
||||
0, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,172,252,
|
||||
0, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,152,250,
|
||||
0, 0, 0, 0, 0, 0, 0, 4, 0, 0, 64, 0, 0, 0, 0, 0, 0, 0,128, 0, 0, 0, 0, 8, 32, 0, 1, 0, 34, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 0, 16, 2, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 2, 0, 2, 0, 0, 0, 0, 1, 0, 0,216,255,
|
||||
128, 0, 0, 0, 1, 0, 0, 0,128, 2, 0, 0, 0, 64, 1, 0, 32, 0, 0, 0, 20,136, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 10, 0, 0, 4, 0, 32, 32, 0, 0, 0, 0, 0, 96,253,
|
||||
0, 0, 0, 8, 0, 0, 0, 0, 36, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16, 0, 64,136,216,252,
|
||||
0, 0, 0,128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 4, 32, 0, 0, 0, 0, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0,120,252,
|
||||
10, 0, 16, 16, 0, 68, 32, 0, 0,129, 0, 64, 0, 0, 0, 0, 16, 2, 1, 0, 0, 0, 0, 64, 16, 0,128, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 0, 32, 0, 0,128, 32, 0, 0, 0, 0, 0, 4, 1, 0, 16, 8, 0, 0, 0, 8, 4, 0, 32, 16, 4,130, 64, 0,128,253,248,
|
||||
0, 0, 0, 0,129,128, 16, 8, 8, 0, 0, 0, 1, 2, 0, 4, 32, 0, 18, 32, 0, 4, 0, 0, 64, 8, 4, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 16, 0, 0, 0, 0, 0,129, 32, 16, 0, 0,128, 0, 0, 0, 0, 0, 2, 0,129, 0, 0, 0, 0, 0, 4, 8, 12,248,
|
||||
0, 3, 8,144, 2, 54,192, 2,144, 0, 1, 32, 1, 8, 0, 20, 48, 1, 86,128, 8, 16, 96, 20, 96, 1, 72, 48, 1, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 9, 32, 0,160, 86, 0, 96, 0, 10, 64,130,133, 0,105, 16,180,128, 2, 6, 72, 0, 22, 32, 2, 68,133, 20, 32,176,248,
|
||||
0, 32,132, 36, 2,193, 32, 0, 0, 33, 2, 0, 69, 2,128, 18, 38, 22, 65, 34,164, 2, 0, 33, 16, 1, 34,194, 2, 80, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 64, 48,136,128, 68, 17, 2, 10,195,136, 10, 0, 65, 38,208, 9, 33, 20, 17, 8, 68,192, 1, 24, 33,149, 65, 16, 36, 72,250,
|
||||
0, 0, 0,128, 0, 65, 32, 0, 0, 1, 0, 0, 1, 1, 0, 16,128, 0,129, 16, 0, 0, 0, 8, 64, 0, 8, 64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 64, 4, 16, 0, 64, 0, 0, 0, 2, 2, 0, 0, 0, 0, 16, 8, 0, 0, 0, 8, 4,128, 0, 16, 0,128, 64, 16, 0,152,255,
|
||||
0, 0, 1, 8, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 2, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16, 0,128, 0, 32, 0, 4,129, 0, 16, 0, 2,128, 0, 0, 0, 0, 32, 0, 0, 0, 1, 64, 0, 40, 0, 0, 8,192,251,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0, 2, 0, 0,248,253,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16, 0, 16, 16, 0, 16, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 0, 0, 2, 0, 32, 0, 0, 0, 8, 0, 0,128, 0, 0, 0, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 80,252,
|
||||
0, 1,128, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 2, 0, 0, 0, 0, 0, 0, 32, 0, 0,128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 8, 0, 0, 0, 0, 0, 0, 4, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 1, 8, 0, 0, 0, 0, 0,208,248,
|
||||
4, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 80, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 4, 0, 0, 0, 0, 0, 0, 0, 64, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 64, 0, 0,233,251,
|
||||
10, 0, 4, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 5, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 32, 0, 0, 1, 0, 0,128,162,254,
|
||||
0, 0, 64, 0, 0, 0, 0, 0, 0, 0, 0, 64, 2, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 16, 4, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 0, 0, 32, 8, 0, 0, 32, 0, 0, 0, 0, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0, 0, 4,132, 0, 72,248,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16, 0, 0, 0, 0, 0, 1, 0, 4, 0, 0,200,248,
|
||||
0, 0, 8, 16, 0, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 0, 0,128, 0, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0,248,255,
|
||||
0, 0, 0, 0, 0, 0, 0, 2, 0, 4, 0, 1, 0, 0, 2, 0, 0, 0, 0, 0, 32, 0, 4, 0, 0, 0, 0, 64, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 0, 8, 0, 1, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16, 0, 0, 1, 0,128, 0, 0, 0,120,254,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 8,128, 0, 0, 0, 4, 0,128, 0, 0, 0, 64, 0, 8, 0, 0, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 4, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 50,251,
|
||||
0, 0, 0, 0, 0, 2, 0, 0, 0, 0,128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 0, 0,176,250,
|
||||
0, 0, 0, 0, 2, 0, 0, 0, 0, 1, 0, 0, 0,128, 0, 0, 0, 0, 0, 0, 8, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16, 0, 2, 0, 0, 0,128, 0, 0, 0,128,128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 16,252,
|
||||
0, 0, 4,128, 0, 0, 0, 0, 0, 0, 8, 32, 5,160, 1, 0,128, 64, 0, 0, 2, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32,144, 48,128, 2, 4, 0, 2, 0, 0, 0,129, 72, 32, 8, 53,128, 34, 16, 2,128, 4, 0, 8, 0, 13,160, 72, 20, 4,144,253,
|
||||
0, 0, 0, 32, 0, 0, 0, 0, 0, 0, 98, 0, 4,130, 1, 0, 16, 4, 2, 0, 0, 0, 0, 96, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 4, 0, 0, 0, 0, 0, 8, 0, 4, 8, 0, 48, 0, 0, 1,128, 0, 0, 0, 0, 0, 12, 0, 0, 0, 0, 48,255,
|
||||
0, 0, 0, 16, 6, 0, 0, 0,192, 0, 56, 16, 7,104, 0, 12, 0, 0, 2, 0, 6, 0, 0, 0, 0, 0, 0, 0, 12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 0, 60, 0, 2, 0, 0, 0, 0, 0, 24, 0, 15,224, 0, 60, 0, 0,114, 0, 6, 0, 0,120, 0, 15, 0,128, 0, 8, 40,251,
|
||||
0, 0, 0, 1, 16, 8, 0, 0, 64, 0, 72, 1, 9, 32, 0, 4, 0, 16, 0, 0, 2, 0, 0, 0, 8, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 41, 4, 32, 4, 0, 0, 0, 0, 0, 8, 32, 13, 32, 32, 52, 0, 0, 16, 64, 2, 0, 0,104, 64, 13, 0, 0, 0, 2,192,254,
|
||||
0, 0,128, 0, 16, 0, 0, 0, 0, 35, 1, 0, 36,144,145, 48, 66, 0, 2, 0,152, 0, 0, 0, 2, 0, 0, 0,176, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 2, 0, 0, 0, 0, 0, 0, 2,138, 0,132, 0, 0, 22, 68, 64, 24, 17, 0, 0, 2, 64,128, 9, 48, 1, 8,248,
|
||||
0, 0, 44,144, 1, 2, 0, 0,192, 3,120, 16, 10,224, 1, 60,128, 1, 0, 0, 30, 4, 0, 24, 32, 0, 0, 0, 60, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 96, 64, 60,128, 5, 0, 0, 6, 0, 0,112, 16, 5,100, 0, 8,136, 5,176, 0, 30, 0, 0,120, 64, 3,104,129, 44, 32,240,253,
|
||||
0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 32, 16, 4,128, 1, 48, 0, 0, 0, 0, 24, 0, 0, 0, 32, 0, 0, 0, 48, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 4, 0, 0, 0, 0, 6,192, 64, 24, 0, 0, 0, 64, 0, 0, 0, 48, 0, 56,249,
|
||||
0, 0, 0, 16, 16, 0, 0, 0, 0, 3, 64, 0, 9,144, 65, 48, 0, 16, 2, 0, 24, 0, 0, 0, 4, 0, 0, 0, 48, 0, 0, 0, 0, 58, 0, 0, 0, 0, 0, 0, 0, 30, 0, 0, 0,128, 9, 48, 0, 4, 0, 0, 0, 0, 0, 96, 0, 72, 8, 4, 1, 0, 22, 72, 8, 24, 0, 0, 96, 4, 1, 0, 8, 49, 33, 80,249,
|
||||
160, 5, 4,128, 0,208, 16, 0, 0, 0, 8, 12, 65, 32, 0, 0, 0, 32, 20, 0, 2, 0, 3, 12, 0, 0, 32, 8, 0, 0, 0, 0, 0, 34, 0, 0, 0, 2, 0, 0, 0, 12, 0, 0, 0,161, 1, 48,128, 0,208, 0,128, 72,147, 8, 0, 72,128, 1,148, 16, 22, 24, 2,128, 4, 0, 0, 2, 65,162, 72, 48, 0,236,250,
|
||||
0, 65, 0, 32, 0,128, 0, 0, 0, 0, 98, 0, 0, 8, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 1, 32, 0, 0, 0, 2, 0, 0, 0, 12, 0, 0, 0, 0, 0, 0, 0, 6, 0, 1, 32, 6,192,128, 0, 0, 2, 0, 0, 4, 8, 0, 1, 0, 0, 0,128, 0, 0, 0, 0, 32, 8,128, 1, 0, 32,152,250,
|
||||
224, 65, 0, 16, 0,241, 0, 0,192, 0,120, 16, 12, 96, 0, 12,128, 7,192, 0, 6,192, 3, 58, 0, 0, 0, 0, 12, 0, 0, 0, 0, 24, 0, 0, 0, 8, 0, 0, 0, 10, 0, 0, 0, 4, 0, 60,160, 1,192,128, 6, 0,131,120, 0, 15,224,129, 0,144, 7,242, 0, 6, 0, 0, 24, 0, 3,128, 0, 60, 0, 32,250,
|
||||
168, 9, 0, 1, 32,208, 0, 1, 64, 0, 8, 4,132, 34, 0, 4,128, 6,192, 0, 2, 64, 8, 8, 18, 0, 0, 32, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 16, 6,130, 22,130, 8, 2, 0, 19,104, 68, 13, 32, 4, 0,128, 16, 16, 64, 2, 0, 0, 8, 0, 65,129, 1, 6, 4, 11,255,
|
||||
128, 17,144, 0, 6,192,136, 0, 0, 11, 33, 20, 8,130, 5, 50, 33, 6, 4,128, 24, 0, 0, 0, 65, 0, 0,136, 48, 16, 0, 0, 0, 48, 0, 0, 0, 0, 0, 0, 0, 20, 0, 0, 0,128, 8, 0, 0, 6,194,136, 24, 0, 3, 0,128,138, 0, 0, 48, 2, 0,128, 64, 24, 33, 0, 96, 66, 0,136,133, 0, 0,193,253,
|
||||
224, 1, 13,144, 1,242, 0, 0,192, 3, 88, 0, 15,224, 1, 60,128, 7, 48, 0, 30,196, 3, 24, 0, 0, 96, 0, 60, 0, 0, 0, 0, 32, 0, 40, 0, 0, 0, 0, 0, 0, 0, 22, 0, 96, 65, 60,128, 7,240, 0, 30,200, 3,121, 0, 5,228, 1, 44, 32, 7,112, 0, 30, 0, 0,120, 0, 3, 96, 1, 60, 0,116,252,
|
||||
132, 1, 1, 0, 0,196, 0, 0, 0, 3, 32, 0, 8,128, 1, 48, 0, 0, 0, 0, 24, 0, 0, 0, 64, 0, 0, 0, 48, 0, 0, 0, 0, 8, 0, 48, 0, 0, 0, 0, 0, 12, 0, 20, 0, 0,128, 0, 0, 0,194, 64, 24, 0, 3, 0, 0, 4, 2, 0, 0, 0, 0,192, 64, 24, 0, 0, 96, 0, 0,128, 0, 0, 0, 58,250,
|
||||
128, 1, 0, 16, 32,192,130, 0, 0, 3, 64, 16, 44,130, 1, 48, 0, 32, 1, 20, 24, 0, 3, 8, 2, 0,128,144, 48, 0, 0, 0, 0, 0, 0, 40, 0, 0, 0, 0, 0, 8, 0, 6, 0, 0, 8, 48, 0, 64,192, 4, 24, 0, 3, 97,128, 72,160, 1, 0, 33, 6,128, 8, 24, 0, 0, 96, 0, 1,144, 69, 48, 0,104,249,
|
||||
32, 0, 20,128, 0, 4, 0, 0, 64, 3, 8, 8, 0, 4, 16, 52, 0, 38, 20, 0, 2, 0, 0, 0, 68, 64, 40, 0, 4, 0, 0, 0, 0, 24, 0, 40, 0, 0, 0, 0, 0, 16, 0, 20, 0,160, 17,176,128, 6, 0, 0, 10, 65, 0, 8, 0, 72,160, 4, 20,145, 66, 16, 2, 10, 16, 0, 0, 0, 13,160,136, 52, 2,240,253,
|
||||
0, 0, 0, 32, 0, 0, 0, 0, 0, 3, 96, 0, 0, 0, 64, 0, 0, 6, 0, 0, 0, 0, 0, 0, 0, 12, 0, 0, 0, 0, 0, 0, 0, 16, 0, 26, 0, 0, 0, 0, 0, 0, 0, 2, 0,128, 65, 0, 32, 0, 0, 0, 16, 8, 0, 0, 0, 4, 8, 1, 1, 0, 0, 1,128, 16, 0, 0, 0, 0, 12, 0, 1, 0, 8, 8,253,
|
||||
224, 1, 0, 16, 2, 4, 0, 0,192, 3,120, 0, 3, 96, 0, 60,136, 1, 48, 0, 24, 0, 0, 24, 16, 15,100, 0, 48, 0, 0, 0, 0, 8, 0, 18, 0, 0, 0, 0, 0, 4, 0, 18, 0, 96, 0, 60,128, 1, 2, 0, 14, 0, 3,120, 0, 15,224, 0, 0, 16, 0, 50, 0, 14, 0, 0, 0, 0, 15,224, 0, 16, 32,208,253,
|
||||
164, 1, 0, 1, 16, 0, 0, 0, 64, 3, 8, 20, 1, 32, 0,132,128, 0, 16, 0,128, 2, 0, 8, 0, 65, 32,128,128, 16, 0, 0, 0, 0, 0, 18, 0, 0, 0, 0, 0, 4, 0, 2, 0, 32, 72, 4,160, 0, 0, 0, 18, 0, 80,104, 65, 13, 32, 1, 0, 0, 0, 16, 64, 18, 0, 0, 0, 0, 13, 32, 1, 32, 1,202,253,
|
||||
140, 9,128, 0, 16, 0, 0, 0, 0, 16, 36, 20, 12,136, 5,128, 0, 6,192, 2, 0, 0, 0, 0, 32, 32, 0, 16, 48, 34, 0, 0, 0, 8, 0, 18, 0, 0, 0, 0, 0, 16, 0, 22, 0,128, 72, 0, 0, 32, 8, 0, 8, 0,131, 0,128,138,128, 0, 48, 6, 70, 0, 64, 8, 0, 0, 0, 0, 12,128, 0, 0, 0,216,251,
|
||||
224,129, 12,144, 1, 2, 0, 0,192, 0, 88, 0, 15,224, 1, 13,144, 6,240, 64, 6, 4, 0, 24, 0, 3, 68, 64, 12, 0, 0, 0, 0, 8, 0, 56, 0, 0, 0, 0, 0, 0, 0, 12, 0,228, 1, 60,128, 1, 0, 0, 22,192, 0,120, 0, 5,100, 1, 44,128, 5, 52, 0, 22, 0, 0, 0, 0, 14, 96, 1, 60, 32, 72,255,
|
||||
136, 1, 1, 0, 0, 0, 0, 0, 0, 0, 32, 0, 12,128, 1, 48, 8, 0,192, 0, 0, 0, 0, 0, 0, 12,128, 1, 49, 0, 0, 0, 0, 0, 0, 10, 0, 16, 0, 0, 0, 0, 0, 22, 0,128, 64, 0, 0, 0, 2, 0, 8, 0, 3, 0, 64, 4,130, 0, 0, 0, 6, 0, 64, 8, 0, 0, 0, 0, 12,128, 0, 0, 8,169,253,
|
||||
128, 1, 0, 16, 32, 2, 0, 0, 0, 0, 64, 17, 12,128, 1, 48, 1, 0,192, 0,128, 8, 0, 96, 68, 12, 36, 16, 48, 5, 0, 0, 0, 0, 0, 56, 0, 2, 0, 0, 0, 0, 0, 28, 0,130, 5, 52, 0, 16, 0, 0, 18, 0, 67, 96, 2, 8, 0, 1, 0, 33, 22,136, 8, 18, 0, 0, 0, 0, 12, 0, 1, 48, 2,248,249,
|
||||
32, 0, 4,130, 32, 0, 0, 2, 64, 0,104, 4, 0, 36, 0, 0, 0, 32, 20, 0, 2, 0, 3,108, 0, 0, 32, 0, 4, 0, 0, 0, 0, 0, 0, 34, 0, 32, 0, 0, 0, 0, 0, 18, 0,164, 1,176,128, 0, 16, 0,128, 8, 11, 8, 0, 72,160, 1,164, 0, 22, 24, 2, 0, 64, 32, 9, 1, 1,160, 4, 4, 0, 64,254,
|
||||
0, 0, 0, 8, 0, 4, 0, 24, 0, 0, 64, 16, 0, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 96, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 34, 0, 0, 0, 0, 0, 0, 0, 2, 0, 16, 0, 0, 32, 4, 4, 0, 0, 0, 0, 2, 0, 4,136, 1, 48, 32, 0, 0,128, 0, 0, 0, 0, 32, 0, 0, 64, 0, 0,224,252,
|
||||
96, 0, 12, 16, 0, 0, 0, 0,192, 0, 96, 0, 3, 96, 0, 12,128, 1, 48, 0, 6,192, 3, 96, 0, 0, 96, 0, 12, 0, 0, 0, 0, 0, 0, 32, 0, 18, 0, 0, 0, 0, 0, 22, 0,225, 1, 60,144, 1,194, 0, 6,192, 3,120, 0, 15, 96, 0, 32,136, 7, 48, 0, 0, 0, 0, 24, 32, 3, 0,128, 12, 0,192,250,
|
||||
36, 0, 4, 0,132, 0, 0, 0, 66, 0, 96, 18, 1, 32, 0, 4,128, 22, 24, 0, 2, 64, 8, 98, 0, 0, 32, 0, 6, 0, 0, 0, 0, 0, 0, 18, 0, 0, 0, 0, 0, 0, 0, 26, 0, 32, 80, 4,130, 16, 0, 20, 2, 64, 8,108, 64, 13, 32, 0, 48,129,128, 16, 64, 0, 0, 32, 12, 0, 1, 0, 0, 4, 0,202,255,
|
||||
140, 17, 0, 65, 32, 2, 0, 0, 17, 11, 97, 4,140,128, 17, 48, 2, 6,192, 2, 24, 2, 0, 0, 4, 0, 0, 32, 48, 0, 0, 0, 0, 0, 0, 48, 0, 4, 0, 0, 0, 0, 0, 4, 0, 2,128, 0, 0, 32,200, 0, 24, 3, 0, 0,128,138,128,137, 0, 9, 0, 0, 64, 0, 0, 32, 0,130, 44,128, 1, 49, 64,120,252,
|
||||
224, 1, 45,128, 1, 0, 0, 6,192, 3,120, 64, 15,232, 1, 61,144, 0,240,128, 30,192, 3, 24, 16, 0, 96, 0, 60, 16, 0, 0, 0, 0, 0, 18, 0, 2, 0, 0, 0, 0, 0, 10, 0,193, 1, 60,128, 1, 48,128, 30,192, 3,120, 0, 5,228, 1, 12, 0, 7, 48, 0, 0,192, 2, 89, 0, 14, 98, 1, 60, 0,112,252,
|
||||
136, 1, 0, 16, 0, 0, 0, 0, 4, 3, 96, 32, 12,128, 1, 48, 0, 0,192, 0, 24, 0, 0, 0, 0, 0, 0, 0, 48, 0, 0, 0, 0, 0, 0, 56, 0, 8, 0, 0, 0, 0, 0, 16, 0,132, 65, 0, 0, 0,194, 0, 24, 0, 0, 0, 64, 4,130, 1, 48, 0, 0, 64, 64, 0, 0, 0, 0, 0, 12, 0, 0, 48, 0,105,249,
|
||||
128, 1,128, 0, 64, 2, 0, 0, 0, 3, 96, 4, 12,128, 1, 48, 0, 6,208, 0, 24, 0, 3, 0, 0, 0,128,137, 48, 0, 0, 0, 0, 0, 0, 16, 0, 10, 0, 0, 0, 0, 0, 26, 0, 4, 16, 52, 0, 0,192,136, 24, 64, 3, 96, 0, 40,160, 73, 16, 34, 6, 64, 8, 0, 0, 8, 1,129, 12, 0, 8, 49, 0,232,248,
|
||||
128, 17,133,136, 32, 0, 0, 0, 0, 0,104, 0, 37, 32, 0, 0, 0, 32, 20, 0, 2, 80, 0, 8, 1, 0, 32, 0, 48, 33, 0, 0, 0, 0, 0, 50, 0, 0, 0, 0, 0, 0, 0, 24, 0, 32, 0, 52, 2, 16, 17, 0, 0, 0, 35, 10, 0,141,168, 17, 20,160, 18, 81, 2, 66, 68, 0, 96, 1, 1,160, 4, 5, 0,252,249,
|
||||
128, 1, 0, 0, 0, 1, 0, 0, 0, 0, 2, 0, 8, 8, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16, 0, 8, 0, 0, 0, 0, 0, 10, 0, 0, 0, 0, 8, 6, 0, 0, 0, 0, 3, 0, 0, 8, 0, 64, 32, 0, 0,128,128, 0, 0, 0, 2, 64, 12, 0, 1, 0, 0,232,250,
|
||||
96, 0, 12,144, 1, 0, 0, 0,192, 0, 96, 0, 4, 96, 0, 12,128, 1, 50, 0, 0,192, 0, 0, 0, 0, 96, 0, 12, 0, 0, 0, 0, 0, 0, 16, 0, 2, 0, 0, 0, 0, 0, 8, 0,228, 1, 16,128, 1,192, 0, 0,192, 0, 24, 0, 12,132,128, 16, 0, 0,178, 0, 6, 8, 0,121, 32, 0,224, 0, 12, 0,200,250,
|
||||
36, 0, 4,128, 0, 1, 0, 0, 64, 0, 96, 18, 8, 32, 0, 4,128, 6, 16, 0,136, 66, 0, 0,130, 0, 32, 0, 54, 16, 2, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0,160, 1, 32,144, 0, 1, 20, 0, 64, 0, 8, 0, 72, 0, 9, 32, 0, 0, 16, 64, 2, 0, 18, 8, 1, 64, 34, 1, 4, 0, 3,255,
|
||||
12, 72, 0, 65, 16, 4, 0, 0, 0, 11, 98, 34, 4,128, 1, 48, 1, 6,192, 4, 0, 1, 19, 2, 1, 0, 0, 32, 0, 16, 0, 0, 0, 0, 0, 32, 0, 6, 0, 0, 0, 0, 0, 6, 0,131,129, 0, 0, 22,192, 8, 0, 0, 3, 0, 8, 8, 0, 0, 16, 0, 6, 0, 64,128, 32, 8, 0, 0,128,128, 0, 48, 17,205,251,
|
||||
96, 0, 44, 0, 1, 0, 0, 0,192, 3,120, 0, 11,224, 65, 60,160, 0,240, 32, 6,196, 3, 88, 64, 0, 96, 0, 12, 0, 1, 0, 0, 0, 0, 10, 0,128, 0, 0, 0, 0, 0, 30, 0,192, 1, 60, 32, 1, 52, 64, 0, 64, 3, 24, 0, 9,224, 1, 45,128, 5,180, 0, 22,192, 0,121, 0, 3,104, 1, 60, 0, 16,250,
|
||||
136, 1, 0, 16, 0, 0, 0, 0, 0, 3, 96, 0, 4,128, 1, 48, 0, 0,192, 0, 0, 0, 3, 0, 32, 0,128, 1, 48, 0, 2, 0, 0, 0, 0, 40, 0, 0, 1, 0, 0, 0, 0, 4, 0, 0, 64, 0, 32, 6,192, 0, 0, 0, 0, 96, 32, 8, 0,128, 16, 0, 6,192, 64, 0, 0, 0, 0, 0, 0,128, 0, 48, 0,162,253,
|
||||
128,137,128,128, 36, 1, 0, 0, 0, 3, 96, 64, 8,128, 1, 48, 0, 6,208, 0, 0, 69, 3, 16, 1, 0, 0,136, 48, 32, 0, 0, 0, 58, 0, 8, 0, 0, 0, 0, 0, 30, 0, 30, 0, 0, 16, 48, 1, 22,193, 66, 0, 0, 0, 96, 4, 8,128, 1, 32, 0, 22, 72, 8, 64, 32, 0,105, 0,128, 4, 1, 48, 0,184,255,
|
||||
160, 1, 4,128, 18, 1, 0, 0, 0, 0, 8, 0, 44, 32, 0, 52, 1, 32, 20, 0, 26, 0, 3, 12, 0, 0, 32, 0, 0,128, 4, 0, 0, 0, 0, 8, 0, 64, 2, 0, 0, 0, 0, 28, 0, 32, 0, 52,128, 0, 16, 0,128, 72, 18, 8, 0, 44,160, 48, 52, 0, 22, 24, 2, 2, 64,144, 96, 68, 13,128, 1, 52, 0, 8,251,
|
||||
128, 1, 0, 32, 4, 0, 0, 0, 0, 0, 2, 0, 12, 4, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 40, 0, 0, 0, 0, 0, 16, 0, 18, 0,128,129, 0, 8, 0, 4, 0, 0, 0, 0, 1, 0, 0, 8, 1, 0, 0, 0, 0,128, 0, 16, 0, 0, 0, 0, 0, 0, 49, 0, 24,248,
|
||||
224, 1, 0,144, 3, 1, 0, 0,192, 0, 96, 0, 3,224, 1, 48,128, 1, 48, 0, 30,196, 3, 1, 0, 0, 0, 0, 12, 0, 1, 0, 0, 58, 0, 56, 0,128, 0, 0, 0, 30, 0, 0, 0,128,129, 16,128, 1,194, 0, 6,192, 3, 26, 32, 15,224, 0, 48,128, 7,112, 0, 0,192, 0, 25, 0, 0,224, 1, 0, 0,184,251,
|
||||
36,128, 0,129, 36, 0, 0, 0, 64, 0, 96, 0, 1,160, 1, 48,137, 70, 24, 0, 66, 64, 32, 0,129, 0, 0, 0, 6,128, 0, 0, 0, 58, 0, 2, 0, 72, 0, 0, 0, 30, 0, 30, 0,128, 5, 32,192, 20, 0, 20, 2, 64, 10, 8, 2, 1, 33, 1,128,136, 64,148, 64,128, 96, 0, 8, 32, 64, 34, 16, 2, 0, 58,251,
|
||||
12, 68,128, 0, 66, 1, 0, 0, 0, 3, 98, 34, 32,130, 69,128, 64, 6,192, 36, 24, 5, 0, 0, 66, 0, 0, 32, 48, 2, 2, 0, 0, 58, 0, 32, 0, 2, 1, 0, 0, 30, 0, 20, 0, 4, 9, 0, 0, 32,200, 66, 24,136, 0, 96, 20, 0,128, 0, 0, 16, 0, 0, 64, 64, 0, 16, 4, 33, 0, 0, 0, 0, 0, 80,251,
|
||||
96, 0, 12,144, 5, 0, 0, 0,192, 3,120, 0, 3,224, 1, 44,128, 0,240, 0, 30,192, 3,120, 0, 0, 96, 0, 60, 32, 2, 0, 0, 58, 0, 2, 0, 12, 1, 0, 0, 30, 0, 14, 0,228, 64, 60,160, 1, 48, 0, 30, 64, 3, 24, 0, 15, 96, 1, 60, 0, 7, 48, 0, 6,200, 2, 24, 0, 3,200, 1, 12, 32,248,248,
|
||||
8, 0, 17, 0, 6, 0, 0, 0, 0, 3, 96, 0, 12, 0, 0, 16, 16, 0,192, 0, 0, 0, 0, 0, 0, 0,128, 1, 48, 0, 0, 0, 0, 58, 0, 32, 0, 0, 0, 0, 0, 30, 0, 4, 0,129,129, 0, 32, 0,194, 0, 24, 0, 0, 96, 16, 0,128, 0, 48, 0, 0,192, 64, 0, 8, 0, 1, 32, 0, 4, 0, 0, 8,177,248,
|
||||
160, 9, 0,144, 64, 1, 0, 0, 0, 3, 96, 64, 76, 4, 4, 34, 1, 6,208, 0, 2, 8, 3, 0,132, 0, 0,136, 48, 0, 2, 0, 0, 58, 0, 0, 0, 0, 1, 0, 0, 30, 0, 30, 0,194, 9, 48, 1, 4,192, 2, 25, 0, 3, 96, 2, 13, 0, 1, 48, 33, 6,128, 8, 80, 0, 8, 8, 2, 0,160, 1, 0, 2, 64,254,
|
||||
160, 32, 4,128, 0, 4, 0, 2, 0, 0, 8, 0, 1, 32, 16,134, 64, 32, 20, 0, 2, 0, 3, 12, 0, 1,160, 8, 0,161, 0, 0, 0, 58, 0, 34, 0, 74, 0, 0, 0, 30, 0, 28, 0,168, 5, 0, 34, 16, 1, 0, 2, 0,146, 0,129, 44,160, 1, 53,128, 0,212, 2, 64, 64, 0, 0, 2, 1,161, 17, 54, 0, 4,255,
|
||||
128, 1, 0, 8, 2, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 58, 0, 0, 0, 0, 0, 0, 0, 30, 0, 14, 0,128, 1, 1, 0, 6, 0, 0, 0, 0, 1, 8, 0, 0,136, 1, 0, 0, 2, 0,128, 0, 16, 0, 0, 32, 8,128, 0, 48, 0,208,255,
|
||||
224, 0, 13, 16, 0, 4, 0, 6,192, 0, 0, 0, 3, 96, 0, 49,136, 1, 52, 0, 0,192, 3, 0, 0, 15, 0, 0, 60,128, 1, 0, 0, 58, 0, 0, 0,192, 0, 0, 0, 30, 0, 12, 0, 8, 1, 60,128, 1, 0, 0, 6, 0, 1, 24, 0, 15,136, 0, 48, 0, 0,112, 0, 6, 0, 0, 24, 0, 0,128, 65, 48, 0,192,253,
|
||||
36, 8, 4, 0, 16, 0, 0, 2, 64, 0, 0, 16, 1, 32, 8, 16,130, 22, 16, 0, 0, 64, 64, 0,132, 13, 0, 32, 52, 0, 0, 0, 0, 58, 0, 40, 0, 4, 0, 0, 0, 30, 0, 2, 0,128, 0, 53,138, 0, 1, 0, 2, 0, 2, 8, 32, 33, 0, 4, 2, 8, 0, 18, 64, 2, 0, 64, 8, 0, 64,136, 16, 48, 0, 11,254,
|
||||
12, 80, 0, 65, 16, 0, 0, 24, 3, 19,100, 16, 12, 0,128, 32, 1, 6,192, 34,152, 4, 0, 0, 66, 44, 0,136, 48, 16, 0, 0, 0, 58, 0, 48, 0, 8, 0, 0, 0, 30, 0, 16, 0,128, 9, 0, 65, 6, 1, 0, 24, 33, 2, 0, 4, 0,128, 9, 2, 2, 64, 8, 64, 0, 1, 3, 96,132, 36, 8,133, 0, 1,225,253,
|
||||
96, 1, 44,128, 1, 2, 0, 30,192, 3, 24, 0, 15,104, 1, 60,144, 0,240, 0, 30,192, 3, 24, 0, 15,104, 0, 60, 0, 0, 0, 0, 58, 0, 10, 0, 0, 0, 0, 0, 30, 0, 26, 0,224, 65, 60, 0, 1, 0, 0, 30, 0, 1,112, 16, 15,224, 1, 60,144, 1,240, 0, 4,200, 0,122, 0, 15,224, 1, 12, 8,140,249,
|
||||
136, 65, 0, 16, 0, 0, 0, 24, 0, 3, 0, 0, 12, 0,128, 32, 0, 0,192, 0, 24, 0, 0, 96, 0, 12, 0, 0, 0, 0, 0, 0, 0, 58, 0, 40, 0, 0, 0, 0, 0, 30, 0, 16, 0,128,129, 0, 16, 6, 0, 0, 24, 0, 1, 0, 0, 0,128, 1, 48, 0, 0,194, 64, 24, 8, 0, 96, 0, 0,132, 1, 0, 0, 66,250,
|
||||
32, 5,128, 0, 32, 2, 0, 24, 0, 3, 0, 17, 12, 0, 4, 48, 8, 6,208, 0, 28, 0, 3, 16,129, 76, 16,144, 0, 16, 0, 0, 0, 0, 0, 10, 0, 0, 0, 0, 0, 0, 0, 10, 0, 0, 8, 48, 0, 22, 1, 0, 24, 0, 2, 96, 0, 13,128,137, 48, 33, 33, 0, 8,152, 0, 0, 98, 0, 12,128, 69, 0, 0, 0,252,
|
||||
32, 0,132, 0, 32, 4, 0, 0, 64, 0, 8, 0, 76,168, 1, 4, 0, 4,212, 0, 2, 0, 3, 12, 0, 73,160, 64, 52, 0, 0, 0, 0, 0, 0, 40, 0, 0, 0, 0, 0, 0, 0, 0, 0,160, 16, 50,162, 6, 0, 0, 26, 0, 34, 2,129, 44, 32,137, 4,128, 0, 24, 2, 26, 64, 1, 96, 1, 13,160, 1, 0, 10,176,250,
|
||||
0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 96, 0, 12,128, 1, 0, 0, 0,192, 0, 0, 8, 0, 0, 0, 4, 4, 1, 48, 0, 0, 0, 0, 0, 0, 8, 0, 2, 0, 0, 0, 0, 0, 26, 0, 1, 1, 48, 0, 6, 0, 0, 0, 0, 1, 8, 0, 0, 8, 0, 0, 0, 2, 0,128, 0, 0, 0, 2, 64, 12, 0, 0, 0, 0,208,250,
|
||||
224, 1, 12,144, 1, 0, 0, 0,192, 3, 0, 0, 3,128, 1, 48, 32, 4,240, 0, 8,192, 3, 97, 0, 11,224, 0, 0, 0, 0, 0, 0, 0, 0, 42, 0, 16, 0, 0, 0, 0, 0, 24, 0,136, 0, 60, 0, 6, 0, 0, 0,192, 3, 24, 0, 15,132,129, 12, 0, 0,176, 0, 24, 0, 1,121, 32, 15,128, 1, 12, 0,176,250,
|
||||
168, 1, 4,128, 16, 1, 0, 0, 64,163, 0, 64, 1,128, 1, 48, 0, 32,209, 0,128, 68, 8, 0,130, 5, 32,129, 0, 0, 4, 0, 0, 0, 0, 8, 0, 16, 2, 0, 0, 0, 0, 10, 0, 8, 1,132, 8, 6, 0, 0, 88, 96, 3, 8, 32, 33,128, 1, 4, 0, 0, 20, 64, 0, 16, 18, 8, 2, 13, 0, 72, 4, 0, 66,251,
|
||||
128, 17, 0, 65, 32, 0, 0, 0, 0, 8, 0, 0, 0, 2, 72, 0, 64, 0, 0, 4,144, 8, 0, 0, 33, 8,128, 80, 48, 16, 2, 0, 0, 0, 0, 8, 0, 24, 1, 0, 0, 0, 0, 8, 0,140, 0, 0, 8, 0, 0, 0, 24,130, 2, 0, 1, 0, 0, 80, 48, 16, 16, 4, 64, 64, 0, 32, 0, 0, 64, 0, 8,177, 0,112,249,
|
||||
224, 1, 45,128, 1, 4, 0, 0,192, 3, 26, 16, 3, 96, 0, 60, 0, 2, 48, 64, 6,192, 3, 24, 0, 6, 96, 1, 60, 0, 5, 0, 0, 0, 0, 32, 0,144, 2, 0, 0, 0, 0, 18, 0,104, 1, 12,128, 1, 1, 0, 30, 64, 1,114, 16, 15,224, 0, 60,128, 1,112, 0, 30,200, 0,121, 0, 3,232, 1, 60, 32, 24,248,
|
||||
132, 1, 0, 16, 0, 0, 0, 0, 0, 3, 0, 32, 12, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 8,128, 1, 49,128, 4, 0, 0, 0, 0, 48, 0, 88, 2, 0, 0, 0, 0, 0, 0,140, 0, 0, 0, 6, 1, 0, 24, 0, 1, 0, 0, 0, 0, 0, 48, 0, 0,192, 64, 24, 0, 0, 0, 0, 0,128, 1, 48, 0,113,250,
|
||||
128, 81,128, 0, 22, 4, 0, 0, 0,139, 0, 4, 76, 4, 0, 48, 0, 2, 0, 0, 0, 9, 3, 0, 65, 4, 32, 16, 48, 16, 4, 0, 0, 58, 0, 2, 0, 8, 2, 0, 0, 30, 0, 26, 0, 4, 1, 48, 66, 6, 0, 0, 0, 32,162, 96, 0, 13, 0, 8, 49, 0, 32, 4, 8,152, 16, 8,105, 0, 1,128, 9, 49, 0,224,255,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 0, 0, 0, 0, 32, 0, 0, 2, 0, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 16, 0, 0, 0, 18, 0, 0, 1, 0, 0, 0, 0, 0, 16, 0, 0, 0, 0, 8, 0, 1, 0, 0, 20,252,
|
||||
0, 0, 4, 0, 0, 16, 0, 2, 64, 0, 8, 0, 1, 32, 0, 4,128, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 4, 0, 0, 0, 0, 0, 0, 2, 0, 2, 0, 0, 0, 0, 0, 10, 0, 33, 0, 8,128, 0, 16, 0, 2,128, 0, 8, 0, 2, 0, 0, 4,128, 0, 16, 0, 2, 64, 0, 16, 0, 0, 0, 0, 4, 0,168,251,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,152,255,
|
||||
36, 32, 4,128,160, 16, 0, 2, 64, 0, 8, 0, 1, 33, 0, 4,128, 0, 16, 4, 66, 96, 8, 9, 0, 1, 32, 40, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 26, 0, 32, 0, 4,128, 0, 16, 0, 2, 64, 0, 8, 0, 1, 32, 0, 4,128, 0, 16, 0, 2, 64, 0, 8, 0, 1, 32, 0, 4, 0,235,250,
|
||||
12, 0, 0, 0, 64, 2, 0, 0, 0, 0, 0, 0, 64, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 8, 68, 0, 0, 0, 0, 0, 0, 0, 34, 0, 0, 0, 0, 0, 0, 0, 24, 0, 0, 8, 1, 0, 32, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 66, 16, 0, 0, 0, 2, 0, 0, 0,128, 1, 80, 0, 0,173,252,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 10, 0, 0, 0, 0, 0, 0, 17, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 96,255,
|
||||
8, 1, 32, 0, 0,130, 0, 0, 0, 2, 0, 0, 8, 0, 1, 32, 0, 4,128, 0, 0, 0, 0, 0, 0, 8, 0, 1, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 1, 32, 0, 4, 0, 0, 16, 0, 2, 64, 0, 8, 0, 0, 32, 0, 4,128, 0, 16, 0, 2, 64, 0, 0, 0, 0, 32, 0, 74,250,
|
||||
32, 0, 4,128, 16, 16, 0, 66, 72, 0, 8, 68, 0, 32, 0, 4,128, 0, 16, 0, 66, 72, 32, 9, 0, 0, 32, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 4,128, 0, 16, 0, 2, 64, 0, 8, 0, 1, 32, 8, 6, 0, 0, 16, 0, 2, 64, 0, 8, 0, 64, 2, 8, 6, 0,224,255,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,129, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32,128, 0,200,248,
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||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 64, 0, 0, 0, 0, 0,128, 0, 0, 0, 88,253,
|
||||
0, 0, 0,128, 0, 1, 0, 2, 0, 0, 0, 0, 0, 0,128, 0, 0, 0, 0, 0, 0, 0, 0, 8, 8, 0, 32, 64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 4, 0,160, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,144,248,
|
||||
0, 0, 0, 0, 0, 17, 0, 0, 0, 0, 0, 0, 0, 4, 0,128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 0, 64, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 72,254,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 0, 0, 0, 0, 0, 16, 0, 0, 0, 32, 0, 0, 0, 0, 0, 4, 0, 0, 0,192,252,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0,128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,144,255,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 64, 0, 1, 0, 0, 64, 0, 8, 4,129, 0, 0, 0,128, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 0,128, 0, 16, 4, 2, 0, 16, 4, 1, 1, 0, 4, 0, 0, 8, 16, 4, 0, 1, 0, 0,216,251,
|
||||
0, 1, 0, 8, 0,128, 0, 0, 0, 0, 0, 32, 0,136, 0, 16, 8, 0, 2, 32, 0, 0, 0, 0, 0, 4, 32, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0, 64, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 16, 0,176,255,
|
||||
32, 0, 0, 32, 0, 16, 0, 0,135, 0,192, 64, 90,105,131, 4, 32, 0,164,129, 4,140,129,193, 0, 1,112,128,160, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 48, 24, 0, 0, 0, 0, 80, 16, 1, 1, 32, 2, 4, 0, 9,144, 1, 66, 32, 12, 0, 80, 16, 32, 2, 64, 0, 5, 0, 8,250,
|
||||
0, 0, 48, 11, 4, 0, 64,145, 0, 74, 0, 24, 4,130, 65, 0, 1, 68, 10, 28, 0,128,152, 32, 0, 0,132, 32, 32, 80, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 34,128, 16, 16, 8, 0, 16, 5, 0, 12, 10, 8,176, 10,194, 16, 0, 48, 64,148, 64, 64, 37,138, 72, 0,132, 56,255,
|
||||
0, 0, 16, 8, 0, 0, 0, 0, 0, 0, 0, 32, 1, 34, 0, 1, 0, 0, 0, 0, 0, 0,128, 32, 0, 0,128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 1, 2, 0, 16, 8, 1, 0, 0, 0, 0, 64, 0, 0, 4,132, 64, 0, 0,232,253,
|
||||
0, 0, 32, 0, 4, 0, 0, 16, 0,130, 0, 64, 0,128, 0, 0, 0, 2, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 17, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 32, 0, 0, 0, 0, 0, 4, 0, 0, 8, 0, 0, 1, 0, 8, 0, 0, 64, 0, 0, 0, 0, 0,144, 96,252,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 2, 0, 64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 0,168,248,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16, 0,136,252,
|
||||
0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0,128, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 2, 0, 0, 0, 0, 0, 1, 0, 64, 0, 0, 0, 0, 0, 0, 0, 32,232,255,
|
||||
0, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 0, 0, 0, 2,128, 0, 0, 0, 0, 0, 0, 8, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,208,254,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 2, 8, 0, 0, 0, 0, 16, 0, 0, 0, 0, 1, 0,160,255,
|
||||
0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,160, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16, 0, 18, 16, 32, 64, 0, 0, 0, 0, 0,128, 0, 16, 0, 0, 0, 0, 8, 0, 1, 0, 0, 4,128, 0, 16,224,250,
|
||||
0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 64, 32, 1, 0, 0, 0, 0, 0, 0, 16, 0, 0, 0, 8, 0, 4, 0, 0, 0, 32, 0, 0, 0, 2, 0, 0, 8, 0, 0, 0, 0, 0, 64, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 8, 1, 0, 0,144, 0, 32, 0, 32, 0, 4, 0, 0, 24,255,
|
||||
18, 0, 0, 64, 0, 0, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 64, 0, 0, 0, 2, 0, 0, 2, 0, 0, 32, 0, 4,192, 0, 0, 0, 0, 0,192,253,
|
||||
0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 8, 0, 0, 0, 1, 0, 0, 0, 0,208,253,
|
||||
0, 4, 0, 0,128, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 8, 0,251,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 0, 0, 0, 4, 0, 0,128, 0, 0, 0, 0, 0, 0,128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 0, 0, 16, 0, 0, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0,128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 24,251,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,168,251,
|
||||
32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 84,255,
|
||||
32, 0, 8, 0, 0, 0, 0, 0,128, 0, 0, 0, 0, 64, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0,128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 4, 0, 0, 4,128, 0, 16, 0, 0, 0, 0, 2, 0,128,249,
|
||||
0,128, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0,128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,254,
|
||||
0, 0, 0, 0, 0, 0, 0, 16, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 32, 16, 0, 2, 0, 0, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,129, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,112,250,
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||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 32, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,152,253,
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||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,248,253,
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||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0, 0, 0, 0,152,251,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 0, 0,192, 0, 0, 0,192, 0, 0, 0, 96, 0, 0, 0,192, 0, 0, 64, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16,251,
|
||||
0, 0, 0, 0,128, 0, 0, 0, 0, 0, 0, 0, 2, 2, 0, 0, 64, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16, 16, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0,128, 0, 0, 0,152,254,
|
||||
0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 32, 0, 40, 0, 0, 64, 0, 0,128, 0, 2, 0, 0, 0, 0, 0, 2, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 64, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,144,252,
|
||||
0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16, 0, 8, 0, 16, 0, 0, 0, 8, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 64, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 8, 0, 1, 0,128,112,254,
|
||||
0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 4, 0, 0,128, 0, 0, 0, 2, 2, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 9, 0, 0, 0, 0, 0,136,255,
|
||||
142, 64, 16, 8, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 16, 0, 0, 0, 0, 16, 4,128, 32, 0, 0, 0, 64, 16, 0, 0, 0, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 0, 32, 0, 8, 0,128, 32, 0, 0, 2, 0, 8, 8, 1, 1, 0, 8, 4, 0, 2, 16, 0, 0, 64, 16,128, 84,254,
|
||||
0, 0, 0, 0, 1, 0, 0, 8, 0, 0, 0, 0, 4, 0, 0, 0, 8, 2, 65, 32, 0, 8, 0, 8, 16, 0,128, 0, 1, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 2, 0, 0,128, 64, 4, 8, 0, 1, 0, 0, 0, 0, 0, 0, 0, 4, 64, 16, 0, 0, 0, 0, 0, 0, 1, 0, 0, 4, 0, 0, 0, 0,210,249,
|
||||
64,128,104,214, 0,128, 25, 2, 11,138, 0, 10, 1, 0, 0, 8,168, 0, 84,128, 4, 31, 1, 25, 64, 0, 32,176, 11, 32, 0, 0, 0, 0, 0,128, 0, 0, 0, 0, 0, 4, 2, 64, 0, 32, 3, 5, 32, 0,164, 21, 12, 32, 1, 17, 0, 0, 12, 0, 13, 16, 1, 66, 32, 52, 72, 0, 33, 44,129,129,128, 24, 0, 40,253,
|
||||
128, 66, 0, 20, 3, 33, 41, 0, 3, 1, 0, 14,132, 21, 32,144, 43, 0, 96,100,129, 41, 18, 0, 1, 10,128,198,128, 88, 0, 0, 0, 0, 4, 64, 32, 0, 0, 0, 0, 0, 0, 0, 16, 64, 53, 32, 0, 64, 10, 24, 0, 12,137, 37, 64, 0,128, 1, 0, 5, 68, 90, 40, 16, 4, 65, 32,160, 1, 1, 77, 16, 12,160,250,
|
||||
128, 64, 0, 0, 2, 1, 32, 0, 0, 1, 0, 0, 2, 0, 0, 4, 16, 0, 64, 32, 0, 0, 0, 0, 0, 0,128,128, 0, 16, 0, 0, 0, 0, 4, 64, 32, 0, 0, 0, 0, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 4,130, 32, 0, 0, 32, 0, 0, 0, 0, 32, 32, 0, 2, 1, 32, 0, 0, 0, 64, 16, 32,208,255,
|
||||
0, 0, 0, 16, 0, 0, 0, 0, 4, 0, 0, 16, 0, 2, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 64, 16, 0, 0, 0, 32, 0, 0, 0, 0, 0, 0,128, 0, 0, 8, 4, 0, 0, 8, 0,128, 0, 0, 0,130, 0, 0, 8, 88,253,
|
||||
0, 1, 16, 0, 0, 0, 0, 0, 0, 9, 0, 0, 0,128, 0, 0, 0, 16, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 0, 0, 0, 0, 0, 2, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 32, 1, 0,128, 0, 0, 0, 0, 0, 8,252,
|
||||
2, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 4, 0, 0, 1, 0, 0, 16, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 2, 0, 0, 0, 8, 0, 32, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 32, 0,128,112,250,
|
||||
16, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 16, 0, 32, 0, 0, 0, 0, 0, 0, 0, 2, 0, 2, 0, 0, 0, 0, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,108,252,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 8, 0, 0, 0, 8, 0,128, 0, 0, 0, 6, 0, 0, 32, 0, 0, 0, 0, 0, 0, 64, 16, 0, 0, 0, 4, 0,136,249,
|
||||
8, 0, 64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 8, 2, 0, 0, 0, 0, 0, 0, 0, 16, 0, 0, 16, 0, 0, 32, 0, 0, 0, 0, 0, 0, 0, 16, 0, 0, 0, 16, 0, 0,128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 0, 0, 64, 0, 0, 4, 0, 8, 0, 4, 0, 16, 0, 0, 0, 0,136,162,254,
|
||||
0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 64, 32, 0, 0,128, 0, 0, 16, 0, 16, 0, 32, 0, 16, 64, 0, 0, 8, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32,251,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 4, 0, 0, 0,128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,184,248,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 0, 16, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 4, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0,200,251,
|
||||
0, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 48, 32, 0, 64, 0, 0, 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 0, 0, 0, 32, 0, 0, 64, 16, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0, 32,252,
|
||||
0, 0, 0,128, 1, 0,128, 64, 0, 0, 0, 0, 0, 0, 64, 0, 0,128, 0, 0, 0, 0, 0, 16, 0, 0, 33, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 8, 0, 1, 64, 32, 0, 0, 0, 0, 0, 3, 72, 0, 0, 0,176,252,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 0, 8,128, 0, 0, 0, 0, 0,128, 0, 0, 0, 0, 0, 0, 98,255,
|
||||
0, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 4, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16, 0, 2, 0, 0, 0, 0, 0, 0, 0,112,254,
|
||||
32, 0, 2,128, 0,208, 0, 0, 0, 67, 8,130, 0,128, 5,176,128, 0, 0, 8, 0, 73, 10, 98, 4, 1,144, 17, 48, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 4, 0, 0, 16, 8, 2, 0, 67, 40, 4,129, 0, 0, 4,128, 0, 0, 64, 0, 0, 35, 8, 4, 13, 32, 0, 0, 17,176,250,
|
||||
0, 0, 0, 0, 0,192, 0, 0, 0, 0, 0, 0, 0, 0, 64, 48, 16, 0, 0, 64, 0, 0, 0, 96, 32, 0,128,129, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 0, 0, 0, 64, 32, 0, 8, 0, 0, 0, 0, 2, 0, 0, 0, 0, 1, 64, 12, 0, 0, 0, 0,248,255,
|
||||
128, 1, 0,128, 1,192, 0, 0,192, 3, 1, 16, 0,224, 1, 13, 0, 6, 48, 0, 6, 0, 3, 25, 32, 3, 96, 0, 12, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 60, 0, 0, 0, 0, 0,192, 3, 58, 0, 4, 0, 0, 48,128, 5,244, 0, 0,192, 0, 34, 0, 12, 0, 0, 13, 0, 56,251,
|
||||
128,133, 0,128, 0,192, 0, 0, 64, 8, 0, 1, 0, 32, 0, 4, 0,160, 16, 0, 2, 0, 19,104, 1, 33, 36, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128,137, 4, 4, 0, 0, 2, 1, 64, 32, 72, 0, 32, 4, 0, 48,144, 4, 16, 20, 0, 64, 0, 0,128, 12,128, 5, 4, 0, 40,253,
|
||||
0, 72, 0, 0, 6, 0, 8, 0, 0, 0, 0, 18, 0, 0, 0, 48, 0, 70,200, 24, 24, 1, 16, 96, 0, 32, 2, 80, 0, 65, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 48,176, 16, 0,192, 72,128, 16, 0, 32, 0, 64, 0, 0, 0, 34, 70,193, 0, 1, 0, 32, 1, 2,128, 0, 8,177, 64, 16,252,
|
||||
224, 0, 0,128, 7, 52, 32, 0,128, 3, 24, 0, 0,224, 1, 48,128, 7,224, 0, 28,196, 1, 1, 16, 7, 64, 0, 60, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 96, 0, 60, 0, 0,112, 0, 6,128, 3, 88, 0, 3, 4, 0, 12,128, 3, 48, 0, 0,192, 3, 24, 32, 3,226, 1, 60, 0, 64,249,
|
||||
128, 65, 0, 0, 6, 0, 0, 0, 64, 0, 0, 32, 0, 0, 0, 0, 0, 0,192, 0, 24, 0, 1, 96, 0, 0,128, 65, 48, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 24, 64, 0, 32, 0, 0, 0, 0, 0, 32, 4,192, 0, 0, 0, 3, 1, 0, 0,128, 1, 49, 0, 80,249,
|
||||
128, 1, 0,128, 6, 0, 0, 0, 0, 3, 64, 2, 0,128, 1, 0, 0, 70,194, 0, 24, 0, 16, 97, 0, 65,129, 17, 48, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16, 53, 32, 0, 0, 72, 88, 96, 3, 72, 0, 32, 16, 0, 48, 1, 70,200, 8, 1, 0, 19, 0,129, 0,128, 9, 52, 0, 0,255,
|
||||
32, 0, 0,130, 0, 16, 0, 74, 4, 67, 8, 0, 69,162, 4,128, 0,192, 0, 8, 0, 73, 3, 0, 4, 1, 16, 16, 0, 17, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 33, 16, 4, 0, 0, 80, 4, 2, 64, 0, 8, 0,129, 0, 0, 0,144, 0, 16, 0, 0, 0, 0, 40, 0,128, 16, 0, 0, 2, 84,253,
|
||||
0, 0, 48, 16, 0, 0, 0, 16, 0, 0, 0, 0, 8, 0, 1, 1, 16, 0, 0, 64, 0, 0, 3, 0, 32, 0, 0,128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 12, 0, 0, 0, 0, 0, 0, 0, 6,128, 0, 0, 0,128, 32, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 2, 0, 0, 0, 0, 64, 16, 0, 0, 0, 0, 32,144,252,
|
||||
128, 1, 61,144, 1, 48, 0, 8,192, 3, 24, 0, 4,128, 0, 44,128, 1, 48, 0, 6, 0, 0, 88, 32, 7, 98, 0, 12, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0,228, 0, 60, 0, 0,240, 0, 0, 0, 0, 0, 0, 4, 4, 0, 60,136, 5,244, 0, 0, 0, 0,120, 0, 3, 0, 0, 12, 8, 32,249,
|
||||
8, 4,180,128, 0, 16, 0,144, 96, 64, 8, 0, 72, 16, 1, 52,133, 22, 20, 0, 2, 0, 0, 40, 1, 33, 32, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 16, 6, 65, 0,144, 72, 24, 5, 0, 0, 0,128, 0, 0, 4,129, 4, 16, 36, 0, 0, 0, 72, 36, 1, 0, 0, 4, 2,219,248,
|
||||
128, 1, 48, 32,198,192, 8,137, 4, 0, 96, 2, 36,128, 0, 40, 6, 16,192, 0, 88, 4, 19, 50, 0, 32,128, 5, 48, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 69,176, 32, 0,192, 34,128, 8, 8,100, 32, 64, 0, 0, 48, 0, 38,193, 0, 1, 0, 0, 96, 20, 76, 2, 0, 0, 1, 33,254,
|
||||
96, 64, 56,128, 7,240, 0, 22,128, 3,112, 64, 11, 98, 1, 16, 0, 7,226, 32, 28,192, 3, 64, 0, 3,196, 65, 56, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,224, 0, 60, 0, 0,240, 0, 6,192, 0,120, 0, 3, 4, 0, 12,160, 3,240, 0, 0, 0, 0,120, 0, 14, 0, 0, 12, 32,140,248,
|
||||
132, 65, 48, 0, 6,192, 0, 24, 72, 0, 96, 0, 12,132, 0, 36, 0, 6,194, 0, 24, 0, 3, 80, 0, 0,128, 1, 52, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0,192, 0, 24, 8, 3, 1, 16, 0, 0, 0, 48, 0, 4, 0, 0, 0, 0, 0, 96, 64, 12, 0, 0, 0, 8,218,252,
|
||||
128, 5, 0,136, 6,192, 0,144, 0, 3,104, 0, 72, 0, 1, 16, 0, 6,192, 0, 24, 0,147, 32, 0, 65,129, 1, 48, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 41, 52, 32, 0,192, 8,153, 0, 19, 0, 0, 32, 16, 0, 52, 65, 6,212, 66, 0, 0, 0, 96, 4, 12, 0, 0,176, 0,104,250,
|
||||
128, 1, 0,128, 0, 16, 0, 2, 0, 67, 8, 0, 1,160, 1, 32, 2,192, 0, 8, 26, 64, 0, 0, 4, 9, 16, 16, 48, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 9, 4, 0, 0, 80, 36, 2, 0, 67, 40,129,133, 0, 0, 0, 16, 0, 16, 0, 0, 64, 0, 8, 4,140, 32, 0, 0, 17,104,249,
|
||||
0,128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 1, 48, 16, 0, 0, 64, 24, 0, 0, 0, 32, 0, 0,128, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0,128, 0, 0, 0, 0, 64, 0, 8, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 4,128, 0, 0,152,255,
|
||||
224, 1, 0,128, 1,192,128, 24,192, 3, 24, 0, 12,128, 1, 48,128, 7, 48, 0, 30, 0, 3, 88, 32, 3, 98, 0, 12, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 60, 0, 0,240, 0, 0,192, 3, 56, 0, 15, 0, 0, 60, 8, 0,240, 32, 0,192, 3, 34, 0, 3,104, 1, 13, 0, 96,253,
|
||||
164, 69, 0,128, 0, 0, 2,128, 66, 32, 10, 0, 64,136, 1, 16,137, 6, 16, 0, 26, 0, 16, 44, 1, 33, 32, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 4, 64, 0,144, 72, 0, 64, 32, 76, 0,137, 4, 0, 4, 1, 0, 16, 4, 0, 64, 32, 0, 8, 65, 32, 1, 4, 0,178,248,
|
||||
12, 0, 0, 0, 22,192, 66, 88, 8, 0, 96, 4, 76, 8, 8, 48, 0, 6,196, 8, 0, 4, 35, 48, 0, 32,128, 73, 0, 64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 50, 0, 0,192, 0, 24, 8, 0, 32, 0, 76, 2, 0, 48, 65, 0,192, 68, 0, 0, 11, 1, 2, 0,128, 69, 48, 4,160,248,
|
||||
192, 1, 1,128, 7, 52, 0, 30,128, 3,112, 32, 15, 96, 0, 17, 0, 7,224, 32, 6,192, 3, 66, 0, 3,196, 1, 60, 0, 0, 0, 0, 0, 0, 0, 0, 12, 0, 0, 0, 0, 0, 0, 0, 98, 0, 60, 32, 0,240, 32, 30,128, 3, 88, 0, 15, 0, 0, 12, 0, 0,240, 0, 0,192, 3, 24, 32, 15,232, 0, 60, 0,112,251,
|
||||
8,128, 0, 0, 6,192, 64, 0, 0, 0, 96, 0, 0, 0, 0, 32, 0, 6,192, 0, 0, 0, 0, 80, 0, 0,128, 1, 48, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8,128, 0, 0, 0,192, 0, 0, 64, 0, 32, 0, 12, 4, 0, 48, 16, 0, 0, 0, 0, 0, 0, 0, 0, 12, 4,129, 48, 0,161,250,
|
||||
0, 4, 0,128, 6,192, 4, 24, 9, 3,104, 0,140, 4, 0, 48, 0, 22,196, 0, 0, 0, 35, 33, 0, 65,129, 1, 48, 2, 0, 0, 0, 0, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0,136, 8,180, 16, 0,192,130, 0, 69, 3, 72, 0, 12, 0, 0, 52, 2, 0,208, 66, 0, 0, 35, 4,129, 76,128, 9, 52, 0,136,253,
|
||||
32, 0, 4, 1, 32,194, 0, 2, 96, 3, 8, 0, 13,128, 5,144,128, 32,194, 0, 24, 64, 0, 0, 4,140, 0, 48, 52, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16, 4, 0, 0, 16, 8, 24, 73, 32, 98, 68, 5, 0, 0, 0,144, 0, 16, 0, 2, 64, 32, 9, 0, 64, 36, 0, 0, 2, 88,249,
|
||||
0, 0, 0, 16, 0, 0,128, 0, 0, 3, 0, 0, 0, 0, 64, 32, 16, 6, 0,128, 0, 16, 0, 1, 32, 0, 8, 0, 48, 0, 0, 0, 0, 0, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 8, 0, 1, 0, 0, 0,128, 0, 0, 0, 0, 0, 8, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0,128, 0, 32,208,251,
|
||||
128, 1, 1,128, 1, 48, 64, 24, 8, 3, 24, 0, 12,224, 1, 60, 8, 2, 50, 64, 6, 8, 3, 57, 0, 15,228, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,224, 1, 60, 0, 0, 64, 64, 30,192, 0,120, 32, 15, 0, 0, 60, 8, 0,244, 32, 30, 16, 0, 88, 64, 3, 96, 1, 61, 8,232,252,
|
||||
4, 4,128,160, 0, 16, 8,152, 0, 3, 8, 0, 32, 48,136,180, 0, 32, 16, 2, 2, 1, 19, 72, 0,129,160, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,160, 1, 4, 4, 0, 0, 4, 2, 69, 16, 9, 4,137, 4, 0, 4, 1, 22, 16, 4, 2, 1, 64, 72, 0, 1, 32, 1, 4, 0, 26,248,
|
||||
140,137, 0, 4, 6, 0, 8, 64, 0, 8, 96,132, 64, 0, 0, 40, 2, 70, 4, 2, 0, 33, 8, 48, 33, 0,128, 1, 49, 1, 0, 0, 0, 0, 0, 0, 0, 6, 0, 0, 0, 0, 0, 0, 0, 3, 4,177, 16, 0, 0, 4, 0, 32,128, 0, 0, 44, 2, 0, 48, 6,192,192, 68, 24, 8, 0,100, 18, 76,144, 81, 0, 16,208,254,
|
||||
96, 0, 12, 0, 7,241,128, 14,196, 0,121, 0, 3,228, 1, 16,144, 1,240, 64, 30,192,129, 64, 0, 14,192, 1, 60, 16, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 0, 0, 96, 0, 60, 0, 0, 48, 64, 4,192, 0,112, 0, 15, 0, 0, 12,128, 7,240, 0, 30,192, 0, 56, 0, 15,224, 0, 8, 0, 80,251,
|
||||
136, 1, 1, 32, 6,192,128, 24, 4, 0, 96, 0, 12, 8, 0, 24, 0, 6,192,128, 24, 16,131, 64, 0, 0,160,129, 48, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 24, 8, 2, 10, 0, 12, 4, 0, 48, 0, 6, 0, 0, 0, 0, 0, 64, 32, 12, 0, 1, 0, 0, 89,248,
|
||||
128, 9, 32, 2, 6,192, 8, 24, 0, 0, 96, 0, 12,128, 1, 32, 0, 36,200, 8, 24, 1, 35, 32, 0, 12,128, 9,176, 64, 0, 0, 0, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 34, 72,180, 16, 0, 0, 2, 89, 0, 8, 96, 0, 76, 0, 0, 52, 64,166,208,128, 24, 16, 18,106, 0, 12,128, 33, 0, 34,144,248,
|
||||
32, 0, 0, 66, 32, 2, 0, 2, 64, 3, 8, 0, 13,129, 5, 32, 33,192, 0, 8, 0, 73, 32, 2, 4,140, 0, 16, 52, 1, 0, 0, 0, 0, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 8, 16, 4,128, 0, 16, 8, 2, 3, 67, 96, 68,129, 0, 0, 0,144, 0, 16, 0, 0, 0, 35, 8, 0,128, 48, 0, 4, 16, 28,252,
|
||||
0, 0, 0, 0, 0, 0, 32, 0, 0, 3, 0, 0, 12, 0, 64, 48, 0, 0, 0, 64, 0, 0, 3, 0, 32, 0, 8,128, 16, 32, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0,128, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0,152,251,
|
||||
128, 1, 12,128, 1, 48, 0, 24, 0,131, 24, 0, 0,224, 1, 32,160, 1, 48, 0, 6, 0, 1, 89, 32, 15, 96, 0, 48, 32, 0, 0, 0, 0, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0,232, 1, 60, 0, 6, 66, 0, 8,192, 3,120, 0, 0, 0, 0, 60, 8, 0,244, 0, 0,192, 0, 0, 64, 3, 0, 0, 49, 0,240,255,
|
||||
4, 16, 5,128, 0,208,130, 64, 8, 19, 8, 0,128, 34, 8,178,128, 0, 16, 0, 2, 0, 16, 40, 1, 65, 36, 0,176, 0, 3, 0, 0, 0, 0, 0, 0,128, 1, 0, 0, 0, 0, 0, 0,161, 1, 4, 65, 64, 0, 64, 0, 97, 64, 8, 66, 32, 16, 0, 4, 1, 22, 16, 36, 0, 64,136, 96, 1, 65,132, 5, 32, 66, 3,251,
|
||||
140, 17, 50, 1, 22, 0,128, 88, 32, 3, 96, 2, 0, 16, 0, 48, 0, 70,194, 34, 24, 0, 35, 48, 0, 0,128, 9, 49, 8, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 4,132,176, 32,134, 0, 4,128, 0, 0, 0, 0, 12, 16, 0, 48, 1, 32,194, 0, 1, 0, 96, 0, 34, 32, 4, 0,162, 16,193,248,
|
||||
224, 1, 60, 8, 7,225, 0, 30,192, 3,121, 32, 15,224, 1, 16, 0, 7,224, 0, 28,196, 0, 65, 0, 14,192, 1, 60, 0, 4, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 96, 0, 60,128, 1, 48, 64, 6,136, 3,112, 0, 7, 0, 0, 12,160, 7,240, 0, 0,192, 3,120, 0, 14,224, 1, 12, 0,204,255,
|
||||
8, 0, 48, 0, 6,192, 0, 0, 0, 0, 98, 0, 4, 4, 0, 48, 0, 6,192, 0, 24, 0, 3, 80, 0, 0,128, 1, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 6, 2, 0, 0, 0, 0, 8, 0, 0, 0, 0, 48, 32, 6, 4, 0, 0, 0, 3, 97, 0, 0,136, 1, 0, 0, 34,248,
|
||||
128,145, 48, 0, 6,192, 66, 24, 9, 11,104, 0, 72,128, 1, 16, 0, 6,192, 0, 24, 0, 18, 33, 0, 12,128, 1, 48, 4, 4, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 32, 72,180, 16, 22, 0, 2, 65, 96, 3, 96, 0,128, 4, 0, 52, 2, 70,208,128, 0, 0, 19, 96, 33, 0,128, 1, 1, 65,160,249,
|
||||
32, 0, 48, 0, 38, 18, 0, 26, 64, 11, 8, 0, 1,128, 17, 54,128, 0, 8, 8, 0, 9, 11, 0, 4,133, 0, 48, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 4, 0, 0, 16, 8, 24, 1, 0, 96, 68,129, 32,128, 0,144, 0, 16, 0, 2, 0, 35, 40, 1, 64, 36, 0, 4, 0,200,252,
|
||||
0, 0, 0, 32, 0, 0, 0, 24, 16, 3, 2, 0, 0, 0, 0, 48, 0, 0, 0, 64, 0, 0, 0, 1, 32, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 0, 16, 0, 0, 0, 0, 8, 0, 0, 0, 0, 2, 0, 0, 0, 0, 65, 16, 0, 0, 0, 0, 0, 56,255,
|
||||
96, 0, 12,128, 7,193,128, 0, 0, 3, 24, 0, 0,100, 0, 0, 0, 6, 50, 0, 6,192, 3, 88, 32, 0,104, 0, 12,128, 1, 0, 0, 0, 0, 0, 0,200, 0, 0, 0, 0, 0, 0, 0, 0, 0, 60, 0, 0, 0, 0, 30, 8, 0,120, 32, 0, 0, 0, 60,136, 5,244, 64, 0,192,128,120, 0, 3, 0, 0, 1, 0,120,255,
|
||||
36, 0, 4,132, 6, 0, 2,128, 8, 35, 9, 0, 64, 32, 32, 0, 0, 38, 16, 0, 2, 64,128, 40, 1, 0, 32, 0,132, 64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 64, 0, 0, 2, 67, 0, 0, 8, 1, 32, 16,132, 4,129, 4, 16, 2, 0, 64, 0, 72, 36, 1,128, 5, 0, 4,170,255,
|
||||
140,145,128, 0,128,192, 0, 1, 32, 3, 96, 34, 64, 0, 8, 50, 2, 0,192, 32, 24, 5,136, 48, 0,128,132, 17,129, 0, 4, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0,128, 48, 0, 0,192,132, 0, 0, 0, 0, 0, 12, 1, 4,176, 32, 6,194, 4,152, 0, 0,100, 16, 76, 8, 16, 2, 0,160,253,
|
||||
224, 1, 60, 16, 1, 48, 0, 30,192, 2,122, 0, 3,228, 1, 60,136, 3,225, 0, 28,128, 3, 64, 0, 3,192, 1, 60, 16, 1, 0, 0, 0, 0, 0, 0,128, 0, 0, 0, 0, 0, 0, 0,112, 0, 60, 32, 0,112, 0, 28, 0, 0,112, 0, 7, 96, 0, 13,128, 3,240,128, 30,208, 3,120, 0, 15,224, 1, 12, 32,176,249,
|
||||
136, 1, 48, 16, 6,192, 0, 8, 8, 3, 97, 0, 0,128,129, 48, 0, 6,192, 0, 24, 0, 0, 81, 0, 0,160, 1, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0,128, 1, 0, 0, 0, 0, 0, 2, 0, 0, 8, 0, 0, 0, 0, 48, 0, 4, 0, 0, 0, 16, 3, 97, 32, 12,128,129, 0, 32, 97,248,
|
||||
160, 1, 48, 1, 32,193, 66,144, 0, 3,104, 0, 76,176, 9, 48, 66, 70,193, 0, 24, 0, 8, 32, 0,128,136, 1, 0, 18, 4, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0,192, 17, 53, 32, 0, 0, 72, 24, 0, 0, 96, 0,128, 4, 17,182, 32, 22,216, 66, 0, 0, 19, 96, 4, 12,128, 1,176, 0,248,251,
|
||||
32, 16, 5,129, 16, 0, 0, 2, 1, 67, 8, 0, 1,128, 17, 54, 0,192, 0, 8, 0, 73, 8, 2, 4, 12, 0, 16, 4,128, 0, 0, 0, 0, 0, 0, 0, 82, 0, 0, 0, 0, 0, 0, 0, 37, 0, 36, 34, 0, 16, 8,138, 68, 0, 96, 36,129, 0, 0, 0,144, 0, 16, 0, 0, 64, 0, 8, 4, 0, 32, 0, 4, 0,188,255,
|
||||
128, 1, 0, 16, 0, 1, 32, 24, 8, 0, 64, 16, 0, 0, 0, 0, 0, 0, 0, 64, 0, 0, 3, 0, 32, 0, 8,128, 0,128, 0, 0, 0, 0, 0, 0, 0, 68, 0, 0, 0, 0, 0, 0, 0, 6, 0, 16, 0, 0, 0,128, 16, 0, 3, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 0, 0, 0, 0,192,248,
|
||||
128, 0, 12, 0, 0, 48, 0, 8,200, 3, 1, 0, 12,104, 0, 61,136, 1, 48, 0, 6, 0, 3, 89, 32, 3,104, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 16, 1, 0, 0, 0, 0, 0, 0, 0,128, 44, 0, 0, 0, 0, 30, 0, 3,122, 16, 4, 8, 0, 60, 8, 0,244, 64, 0,192, 3, 0, 0, 0, 0, 0, 49, 0,208,254,
|
||||
4,132,132, 32, 0,209,130,128, 64, 32, 0, 64, 32, 32, 16, 4,129, 22, 20, 0, 2, 0, 18, 40, 1, 33, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 10, 4, 20, 0, 0, 0, 2, 19, 9, 3, 8, 0,128, 0, 0, 4, 1, 22, 16, 2, 0, 64, 8, 2,129, 0,128, 5, 0, 66, 43,251,
|
||||
140, 9, 2, 4, 64, 4, 4,152, 16, 0, 0, 1, 44, 0, 4, 2, 0, 64,192, 36, 24, 1, 19, 48, 0, 32,128, 17, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 4, 33, 0, 0,192,136, 24, 4, 3, 2,128, 64, 0, 0,176, 16, 0,200, 4, 0, 0, 19, 96, 64, 0, 0, 4, 0, 64,165,252,
|
||||
96, 0, 12,128, 1,224, 64, 6,128, 3, 24, 64, 3,232, 1, 12, 16, 7,228, 0, 28,200, 0, 65, 0, 15,200, 65, 12, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 96, 0, 24, 0, 0,112, 0, 30,192, 3, 16, 0, 3, 4, 0, 12,128, 7,240,128, 0,192, 3, 58, 0, 0,224,129, 12, 0,128,249,
|
||||
136, 1, 0, 32, 0,192, 64, 24, 64, 0, 0, 0, 12,136,129, 48, 0, 6,192, 0, 24, 0, 3, 80, 0, 12,136, 1, 48, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 24, 0, 3, 96, 0, 0, 0, 0, 48, 0, 6, 2, 0, 0, 0, 0, 0, 0, 0,128, 1, 0, 0, 2,253,
|
||||
0, 9, 34, 2, 36,193, 4,144, 32, 3, 16,130, 76,160, 9,180, 16, 38,194, 0, 24, 0, 19, 33, 0,141,128, 1,176, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,192, 33, 16, 0, 0, 0, 72, 26, 32, 35, 97, 8, 32, 16, 0,180, 16, 6,208,128, 0, 0, 35, 4, 36, 0,128,145, 8, 4, 96,251,
|
||||
32, 16, 4, 0, 32, 2, 0, 2, 64, 3, 9, 1, 1,128, 5, 52, 0,192, 0, 8, 64, 64, 9, 2, 4, 12, 0, 48, 48, 66, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 48, 2, 0, 16, 0, 2, 67, 16,100, 36,133, 2, 0, 20,160, 0, 0, 64, 0, 64, 0, 8, 4, 64, 36, 0, 4, 0, 16,254,
|
||||
0,128, 0, 0, 0, 0, 32, 0, 0, 2, 0, 16, 0, 0, 64, 0, 0, 0, 0, 64, 0, 8, 0, 32, 32, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 4, 0, 0, 16, 0, 0, 0, 0, 0, 1, 0, 0, 8, 0, 0, 32, 0, 0, 2, 0, 0, 0, 0, 0, 64, 0, 0,128, 0, 0,240,253,
|
||||
0, 0, 13,128, 1, 48, 0, 24, 16, 3, 2, 64, 12,232, 1, 12,136, 1, 48, 0, 30, 0, 3, 25, 0, 3,228, 1, 12, 8, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 0, 0, 1, 0, 12, 0, 0, 0, 0, 0, 0, 2,122, 16, 15, 0, 0, 28,128, 5,244, 0, 0,192, 3, 0, 0, 3, 96, 1, 1, 0,160,249,
|
||||
4, 4, 4,146, 0, 16, 0, 64, 0, 3, 0, 2, 32, 32, 8, 53,129, 0, 16, 0, 26, 0, 18, 40, 10, 65,160, 1, 4, 2, 4, 0, 0, 0, 0, 0, 0, 16, 2, 0, 0, 0, 0, 0, 0, 8, 8, 6, 17, 0, 0, 0, 64, 32, 32, 8, 2,137, 4, 0, 36,128, 4, 16, 20, 0, 64, 8, 2,129, 1, 32, 1, 0, 8, 66,250,
|
||||
12,129, 0, 4, 70,192, 2, 24, 1, 19, 36, 4,140, 0, 0, 0, 1, 6,192, 2, 88, 16, 16, 48, 0,128,129, 17, 1, 1, 2, 0, 0, 0, 0, 0, 0, 24, 1, 0, 0, 0, 0, 0, 0, 12,136,128, 0, 0, 0, 0, 88, 0, 17, 1,128, 44, 0, 0, 16, 0, 38,192, 68, 0, 0, 19, 96, 1, 44,128, 1, 0, 0,192,248,
|
||||
96, 0, 12, 0, 7,225, 64, 6,196, 3, 24, 16, 3,226, 1, 60, 32, 7,226, 32, 28,192, 2, 65, 0, 15,192, 1, 56, 32, 4, 0, 0, 0, 0, 0, 0, 16, 2, 0, 0, 0, 0, 0, 0,104, 0, 60, 32, 0, 48, 64, 14,208, 0, 16, 0, 15, 8, 0, 44,128, 3, 49, 0, 0,192, 3, 58, 32, 15,226, 64, 12, 32, 56,248,
|
||||
136, 65, 0, 0, 6,192, 0, 24, 16,131, 0, 0, 12, 0, 0, 0, 32, 6,192, 0, 24, 0, 1, 32, 0, 12,168,129, 0,128, 6, 0, 0, 0, 0, 0, 0, 88, 3, 0, 0, 0, 0, 0, 0, 12, 0, 48, 32, 0,192, 0, 0, 0, 0, 96, 0, 12, 0, 0, 16, 0, 4,192, 0, 0, 0, 0, 0, 0, 12, 0, 1, 48, 16, 73,252,
|
||||
128, 9,176, 32, 6,192, 0, 24, 0, 11, 0, 33, 44,132, 1, 48, 1, 6,192, 0, 26, 9, 16, 65, 0,141,128, 9,176, 32, 4, 0, 0, 0, 0, 0, 0, 8, 2, 0, 0, 0, 0, 0, 0,132, 9, 53, 2, 0,192,128, 0, 9, 18, 98, 68, 12, 1, 0, 32, 0, 22,194, 16, 0, 0, 3, 2, 36, 12,128, 5,129, 0,200,248,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 1, 32, 2, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 4, 2, 10, 4, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 1, 32, 64, 4, 0, 0, 0, 0, 0, 0,128, 0, 0, 0, 0, 64, 0, 0, 0, 0, 32, 0, 84,251,
|
||||
0, 0, 4, 0, 0, 16, 0, 2, 64, 0, 2, 0, 1, 0, 0, 4,160, 0, 16, 0, 0, 64, 0, 8, 0, 0, 32, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 65, 0, 0,128, 0, 16, 0, 2, 4, 0, 10, 16, 1, 32, 0, 0,128, 0, 0, 0, 2, 64, 0, 8, 0, 1, 32, 0, 0, 0,176,248,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16,128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16,254,
|
||||
36, 0, 5,128, 0, 20, 0, 2, 0, 0, 8, 20, 1, 32, 0, 4,128, 0, 16, 0, 66, 64, 0, 8, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 4,128, 0, 16, 0, 0, 0, 0, 0, 0, 1, 32, 0, 4,137, 0, 16, 0, 2, 64, 0, 8, 0, 1, 32, 0, 4, 0,251,248,
|
||||
12,128, 0, 65, 16, 8, 2, 1, 0, 32, 4, 20, 0, 0, 0, 0, 66, 16, 8, 64, 0, 8, 32, 4, 0, 64, 0,136, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16, 0, 0, 0, 0, 8, 32, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 16, 0, 0, 0, 53,252,
|
||||
0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 8, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 4, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 0, 16, 0, 0, 0,128, 0, 0, 1, 32, 0, 4,128, 0, 0, 0, 0, 0, 0, 8, 0, 0, 32, 0, 8, 0, 82,251,
|
||||
8, 0, 33, 0, 4,128, 0, 0, 0, 0, 66, 0, 0, 0, 0, 32, 0, 4,128, 0, 16, 0, 2, 64, 0, 0, 0, 1, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 64, 0, 16, 0, 1, 64, 0, 8, 0, 0, 16, 4, 0, 64, 16, 0, 2, 0, 32, 8, 0, 1, 0, 0,218,251,
|
||||
0, 16, 4, 0, 0, 0, 0, 2, 0, 16, 8, 0, 1, 32, 64, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0,128,192, 0, 16, 2,128, 0, 8, 0, 2, 1, 32, 0, 4,128, 0, 16, 0, 2, 64, 0, 8, 1, 0, 32, 0, 16, 0, 0,252,
|
||||
128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 32, 0, 0, 0, 16, 0, 0, 0, 16, 0, 32, 0, 4, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16, 4, 56,254,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 20, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 0, 0, 0, 0, 0, 0, 0, 0, 65, 32, 0, 0, 0, 0, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,104,252,
|
||||
0, 0, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,144, 0, 0, 0, 16, 0, 0, 0, 0, 0, 34, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 1, 32, 0, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 0, 0, 0, 0, 0, 48,249,
|
||||
0, 0, 0, 64, 18, 0, 0, 64,128,128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16, 0, 0, 8, 32, 0, 0, 4, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,116,254,
|
||||
0, 0, 4, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 8, 0, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 88,248,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 64, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 40,252,
|
||||
128, 0, 0, 0, 0, 65, 32, 8, 16, 0, 0, 0, 0, 33, 0, 0, 8, 0,132, 0, 8, 0, 0, 0, 0, 4, 2, 64, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 0, 0, 0, 1, 0, 0, 0,132, 0, 0, 0, 0, 0, 0, 16, 8, 0, 1, 32, 0, 0, 0, 0, 0, 0, 0, 0, 1, 8,192,250,
|
||||
0, 0, 0, 0, 0,128, 0, 4, 8,128, 0, 64, 0, 8, 0, 0, 0, 1, 0, 0, 0, 0, 0, 32, 16, 8, 0, 0, 32, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 16, 8, 2, 0, 0, 0, 64, 0, 32, 0, 0, 0, 1, 0, 0, 0, 64, 0, 0, 0, 1, 0, 0, 0,130, 64, 0, 0, 40,251,
|
||||
64, 0, 0, 14,180,178, 66, 86, 24, 80,194, 64, 0, 76, 40, 96,150, 20, 34, 0, 4, 32, 0, 8, 64,107, 5,133,172, 37, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 51, 5,160, 13, 0, 0, 80,203, 80,200, 10, 40, 32, 0, 8, 16, 0, 18, 64,128, 66,224, 64, 1, 0, 40,128,161, 16, 72,249,
|
||||
32, 1, 32, 41,148, 17, 42, 88, 5, 3, 34, 16,128, 35, 65, 16, 36, 0, 91, 0, 18, 8, 33,138, 79,249, 54, 52, 16, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 0, 17, 4, 16,128, 16, 98, 3, 96, 0, 1,168, 20, 0, 16, 8, 4,129, 16,168, 0, 8, 64, 65, 4, 8, 1, 32, 8, 32,252,
|
||||
6, 0, 0, 8, 0, 1, 32, 8, 4, 1, 32, 16, 0, 2, 64, 16, 0, 0,132, 0, 0, 0, 1, 0, 0, 0, 2, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16, 8, 0, 1, 0, 8, 0, 0, 0, 0, 4, 0, 0, 0,136, 88,253,
|
||||
0, 1, 32, 0, 4, 4, 0, 16, 0, 2, 0, 0, 0, 65, 0, 0, 8, 0, 0, 0, 8, 0, 0, 0, 16, 4, 0, 64, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 16, 32, 0, 4,128, 0, 0, 4, 0, 0, 0, 0, 2, 64, 32, 0, 0, 0, 32, 0, 0,128, 0, 16, 0,196,248,
|
||||
0, 0, 0, 0, 0, 0, 0, 36, 64, 1, 0, 0, 2, 0, 0, 0, 0, 1, 0, 0, 0,128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 16, 0, 0, 64, 0, 0, 0, 0, 0, 0, 0,128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32,136,249,
|
||||
0,129, 0, 0, 0, 0, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0,128, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 2, 0, 0, 0, 1, 0, 0, 0, 1, 0,128, 0, 16, 0, 0, 0, 0, 0, 0, 1, 32, 0, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 16, 24,250,
|
||||
0, 0, 32, 0, 0, 0, 0, 0,128, 0, 0, 0, 32, 0, 0, 0, 0, 0, 0, 0, 32, 0, 64, 2, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 0, 0, 0, 0, 4, 0, 8, 16, 0, 32, 0, 0,160,254,
|
||||
0, 0, 0, 16, 0, 0, 64, 0, 0, 8, 64, 16, 0, 0, 0, 65, 0, 0, 0, 64, 0, 8, 0, 0, 0, 0, 4, 0, 0, 16, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 80,254,
|
||||
2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 8, 0, 0, 64, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 16, 0, 0, 0, 0, 4, 0, 1, 0, 0, 0, 0, 0, 8,128,120,249,
|
||||
8, 4, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 0, 0, 0, 0, 0, 0, 0, 64, 0, 16, 0, 64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,186,254,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0,128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0, 8, 0, 0, 16, 0, 0, 0, 0, 8, 0, 0, 32, 0, 0, 0, 2, 0, 0, 80, 0, 0, 8, 88,255,
|
||||
94, 0, 0, 0, 0, 0, 0, 0, 64, 0, 0, 0, 0, 0, 32, 2, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 0, 16, 0, 0, 0, 32, 0, 0, 0, 8, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0, 2, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128,138,253,
|
||||
0,128, 0, 0, 0,130,128, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 16, 0, 1, 0, 2, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 64, 0, 0, 0, 0, 0, 8, 0, 0, 32, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0,255,
|
||||
0, 0, 2,128, 0, 0, 0, 0, 0, 0, 0, 0, 8, 4, 2, 0, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 24,255,
|
||||
0, 0, 0, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,112,255,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0,128, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 16, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 64, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16, 0, 0, 0, 88,253,
|
||||
0, 34, 0, 0, 0, 0, 16, 0, 2, 0, 0, 32, 0, 1, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,160, 0, 16, 0, 0, 0, 0, 0, 64, 10, 40, 0, 0, 64, 0,196, 0, 0, 8, 0, 0, 0,128, 0, 0, 0, 0, 0, 4, 0,232,253,
|
||||
0, 2, 0, 0, 0,129, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 0, 0, 20, 0, 0, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 80,252,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 56,253,
|
||||
0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 8, 0, 0, 0, 4, 16, 0, 0, 0, 0,128, 0, 9, 0, 0, 36, 0, 0, 64,253,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,152,251,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0,128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,136,250,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 0, 2, 8, 0, 0,128, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0,128, 0, 64,160,249,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 16, 0,128, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0,128,152,254,
|
||||
0, 64, 0, 0, 0, 0, 0, 8, 0, 2, 16, 0, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 64, 64, 0, 8, 0, 1, 0, 0, 0, 0, 1, 0,106,249,
|
||||
128, 0, 4, 4, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 4, 8, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 32, 0, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 0, 0, 0, 0,232,253,
|
||||
0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 0, 8, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 4, 0, 0,128, 0, 0, 0, 2, 0, 0, 0, 0, 80,252,
|
||||
0, 0, 0, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 4, 0, 0, 0, 16, 0, 2, 0, 0, 0, 0, 1, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 0, 0, 32, 1, 0, 0, 0, 0, 0, 0, 0, 32, 8, 2, 0, 0, 65, 0, 0, 0, 0, 32, 0, 1, 0, 0, 96,250,
|
||||
40, 32, 0, 8, 2, 1, 0, 0, 0,129, 16, 16, 0, 0,129, 0, 0, 0, 64, 0, 0, 0, 65, 0, 16, 0, 0, 0, 16, 8, 0, 0, 0, 4, 0, 64, 0, 0, 0, 0, 0, 0, 2, 32, 16,128, 64, 8, 0, 2, 0, 64, 0, 4, 2, 0, 0, 4, 8, 0, 16, 8, 0, 0, 0, 0,130, 0, 0, 0, 0, 34, 0, 0, 0,164,255,
|
||||
0, 0, 16, 0, 1, 32, 0, 0, 8, 0, 2, 0, 0,128, 0, 1, 32, 0, 0, 0, 0, 4, 0, 0, 0, 2, 64, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 64, 0, 0, 8, 0, 1, 16, 8, 0, 1, 0, 16, 0, 0, 0, 0, 0, 2, 65, 32, 0, 0,130, 0, 16, 0, 1, 64, 0, 32, 2,253,
|
||||
64,168, 4,144,161,146, 22, 48,179, 10, 19, 32, 4,224,128,161, 32, 20, 41, 0, 0,144, 0, 65, 43,169, 35, 0, 12, 24, 0, 0, 0, 16, 0,128, 0, 0, 0, 0, 0, 0, 5, 64, 24, 96,128,168, 96, 1, 4,192, 2,200, 80, 0, 76, 2, 4, 3, 8,144, 12, 20,128,128,202, 0, 2, 64,128, 77, 0, 1, 32,240,254,
|
||||
160, 57, 33,137, 2,149,144, 20, 8, 1,144, 8, 0, 33, 5,113,166, 4,211, 1, 16, 0,193,104, 81,137, 42, 64, 16, 91, 0, 0, 0, 0, 2, 0, 48, 0, 0, 0, 0, 8, 0, 32, 0, 64, 6, 4, 48,148, 64, 0,192, 0,114,192, 80, 50, 0, 32, 16, 8,130, 64, 48,136, 17, 18, 34, 8, 4,131, 33, 0, 6,232,254,
|
||||
128, 0, 0, 16,130, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0, 16, 0, 0, 65, 0, 0, 0,129, 32, 16, 0, 2, 0, 17, 32, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 64, 0, 0, 0, 0, 0, 16, 0, 0, 0, 16, 8, 2, 64, 32, 4, 0, 0, 16, 0, 4,130, 0, 0, 0,104,250,
|
||||
64,128, 16, 0, 0, 64, 16, 2, 0, 0, 0, 16, 0, 66, 0, 8, 8, 2, 32, 0, 4, 0, 0, 18, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 4, 0, 32, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 1, 4, 0, 0,128,128, 32, 0, 0, 0, 64, 0, 0, 0, 1, 16, 0, 0, 1, 0, 16, 0, 65, 64, 0, 8,168,252,
|
||||
64, 0, 64, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 12, 0, 0,128, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 0, 0, 0, 0, 8, 64, 0, 0, 0, 68,128, 1, 16, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 0, 0, 0, 32, 0, 0, 0,160,252,
|
||||
2, 32, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 32, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0,128, 0, 0, 32, 1, 16, 0, 4, 0, 16, 0,128, 0, 8, 0, 0, 0, 8, 0, 0, 0, 64, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 12, 64, 0,128,136,254,
|
||||
4, 0,144, 0, 0, 8, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 10, 0, 0, 0, 0, 32, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 64, 65, 2, 0, 0, 4, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 33, 0, 0, 4, 0, 0,233,250,
|
||||
0, 0, 0, 0, 0, 0, 0, 34, 0, 0, 1, 0, 0, 1, 0, 0, 64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32,128, 2, 0, 0, 72, 4, 0, 0, 0, 32, 0, 0,128, 0, 8,128, 0, 0, 0, 0,132, 0, 0, 64, 2, 0, 0, 56,249,
|
||||
0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 16, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 80,253,
|
||||
0, 0, 0, 0, 0, 2,128, 16, 0, 0, 0, 64, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 16, 0, 0, 4, 0,120,250,
|
||||
0, 1, 0, 0, 0, 0, 0, 16, 0, 0, 0, 0, 8, 0, 0, 0, 0, 4, 16, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 2, 0, 0, 0, 1, 2, 0, 0, 1, 0, 0, 0, 0, 0,128, 0, 16, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 4, 0, 0, 0, 0,112,255,
|
||||
0, 0, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 32,250,
|
||||
0, 4, 0, 0, 0, 0, 0, 0, 0, 64, 0, 0, 0, 16, 64, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16, 68, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 16,144,248,
|
||||
0, 0, 0, 0, 0, 0, 32, 0, 2, 4, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 36, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 3, 0, 0, 0, 0, 16, 0, 0, 2, 64, 64, 0, 4, 0, 0, 16, 0,184,250,
|
||||
0, 0, 1,128, 0, 0, 2, 0, 16, 0,192, 0, 0, 8, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,184,248,
|
||||
0, 0, 32, 0, 0, 0, 0, 0, 8, 0, 32, 0, 0, 0, 0, 0, 0, 0,128, 0, 0, 16, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,128, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 1, 0, 0, 4, 0, 0, 0,128, 0, 16, 0, 0, 0, 0, 0, 0,232,251,
|
||||
0, 0, 4,128, 0, 0, 0, 2, 64,160, 8, 4, 1, 32, 0, 52, 0, 38,192, 16,128, 64, 0, 0, 2, 76,160, 8, 16, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 1, 1, 10, 32, 4, 0, 0, 64, 0, 41, 18,129, 36, 0,180,128, 32, 16, 0, 0, 0, 0, 0, 0, 13,160,144, 0, 34, 40,255,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 0, 2, 0, 24, 16, 0, 0, 64, 12, 4, 0, 33, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 1, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 0, 0,128, 48, 32, 0, 4, 0, 0, 0, 0, 0, 0, 8, 4, 0, 0, 0, 80,250,
|
||||
0, 0, 48, 0, 0, 0, 0, 6, 0, 0, 26, 64, 0,228, 1, 0,128, 7,240, 0, 6,192, 3, 88, 0, 3, 96, 0, 44, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128,129, 60,128, 7, 0, 0, 0, 0, 0, 32, 32, 8, 4, 0, 49, 0, 0,192, 0, 0, 0, 0, 0, 0, 12,224, 1, 13, 0,224,252,
|
||||
0, 0, 0, 17, 0, 2, 0, 2, 0, 17, 40, 0, 76,160, 1, 0,133, 32, 20, 68,130, 66, 32, 44, 0, 1, 32, 0, 22, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 9, 4,132,128, 0, 0, 0, 0, 32, 65, 1, 36, 0, 0, 48, 18,160, 0,128, 0, 0, 0, 0, 0, 72, 48, 1, 4, 0,232,251,
|
||||
0, 0, 48, 2, 32, 0, 0, 24, 0, 0, 64, 36, 12,136, 17, 0, 16, 0, 0, 0,152, 0, 16, 48, 1,128, 16, 48,152, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 73,176, 0, 22, 2, 0, 0, 0, 32, 34, 34, 36, 2, 0, 49, 32, 64,192, 16, 0, 0, 0, 0, 0, 68, 0, 1,176, 0, 96,252,
|
||||
0, 0, 60,144, 1, 4, 0, 30,200, 0, 26, 0, 15,192, 65, 60, 0, 7,224, 0, 26,136, 0, 73, 64, 2, 96, 1, 32, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,224, 1, 12,144, 1, 0, 0, 0,192, 0, 88, 0, 3, 96, 0, 60,128, 5,242, 0, 0, 0, 0, 0, 0, 15, 34, 1, 60, 16,192,254,
|
||||
0, 0, 0, 32, 6, 0, 0, 0, 0, 2, 1, 64, 12,128, 1, 48, 32, 0, 0, 0, 0, 0, 0, 65, 32, 0,128, 65, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 1, 48, 16, 6, 2, 0, 0, 0, 0, 97, 32, 12, 0, 0, 49, 8, 0, 2,128, 0, 0, 0, 0, 0, 12,128, 0, 48, 0, 56,254,
|
||||
0, 0, 48, 2,128, 0, 0, 0, 32, 17, 0, 1,140,130, 73, 48, 1, 6,192, 0, 24, 64, 32, 32, 4, 33,132, 17, 16, 34, 0, 0, 0, 0, 0, 82, 67, 1, 0, 0, 0, 32, 32, 18, 18,128, 69, 48, 0, 38, 0, 0, 0, 0, 10, 64, 0, 68, 16, 5, 16, 0, 32,192, 8, 0, 0, 0, 0, 0, 76,161, 0, 48, 0,168,251,
|
||||
32, 0, 0,128, 0, 16, 0, 2, 64, 32, 0, 0,129,164, 1, 4, 0, 38,208, 0, 10, 64, 0, 0, 2,129, 36, 0, 0, 4, 0, 0, 0, 0, 0, 82, 67, 3, 0, 0, 0, 32, 32, 16, 16,161, 4, 0, 10, 32, 4, 0, 2, 64, 32, 1, 0,128, 32, 0,176,192, 0, 0, 0, 0, 0, 0, 8, 0, 0,160, 0, 52, 0, 20,250,
|
||||
0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 2, 0, 0,128, 1, 0, 0, 0,194, 0, 16, 4, 0, 0, 64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 82, 66, 12, 0, 0, 0, 32, 32, 18, 18, 6, 0, 1, 0, 0, 0, 0, 24, 0, 0, 0, 0, 0, 8, 64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 48, 0,120,249,
|
||||
128, 1, 0,128, 1,244, 0, 6, 0, 0, 0, 0, 0,224, 1, 0,160, 7,242, 0, 16, 0, 0, 88, 0, 7,226, 1, 45, 0, 0, 0, 0, 0, 0, 82, 66, 8, 0, 0, 0, 32, 32, 16, 16, 4, 0, 13,128, 7, 0, 0, 0, 4, 2, 1, 0, 3, 0, 0, 60, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,224, 1, 1, 0,104,255,
|
||||
136, 1, 0,128, 32,208, 0, 2, 0, 16, 1, 0, 0,161, 1, 48,129, 16,208, 0, 72, 4, 0, 40, 0,137, 32, 4, 20, 0, 0, 0, 0, 0, 0, 82, 67, 1, 0, 0, 0, 32, 32, 2, 2, 0, 4, 52,132,128, 0, 0,128, 0, 8, 0, 0, 45, 2, 16, 6, 34, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 9, 0, 0,163,253,
|
||||
128, 69, 0, 0, 32, 8, 16, 24, 0, 2, 0, 0, 0, 0, 16, 0, 65, 0, 0, 8, 0, 0, 16, 48, 1, 0,136, 73,152, 0, 0, 0, 0, 0, 0, 82, 67, 1, 0, 0, 0, 32, 32, 0, 0, 0, 16, 1, 0, 70, 0, 0, 0, 9, 98, 0, 0, 64, 16, 32, 0, 0, 16, 4, 0, 0, 0, 0, 96, 2, 0, 0, 1, 0, 0,137,254,
|
||||
224, 1, 0,128, 1, 32, 0, 30,196,128, 0, 0, 11, 72, 64, 60, 0, 7, 32,128, 18,192, 0, 74, 64, 15,224, 1, 32, 32, 0, 0, 0, 0, 0, 82, 66, 0, 0, 0, 0, 32, 32, 2, 2, 96, 0, 60,160, 1, 2, 0, 6,192, 0, 0, 0, 15, 96, 0, 60,128, 1, 0, 0, 0, 0, 0,120, 32, 0, 32, 1, 12, 16, 66,253,
|
||||
4,128, 0, 0, 2, 2, 0, 24, 0, 3, 0, 0, 0,128, 1, 48, 0, 0, 16, 0, 0, 0, 3, 64, 32, 0,128, 1, 32, 0, 0, 0, 0, 0, 0, 82, 66, 0, 0, 0, 0, 32, 32, 0, 0, 0, 0, 48, 16, 6, 0, 0, 0, 0, 2, 0, 0, 12,132,128, 0, 0, 6, 0, 0, 0, 0, 0, 0, 0, 0,128, 0, 0, 32,170,253,
|
||||
0, 16, 0,128, 32, 0, 16, 24, 0, 8, 2, 0, 0,132, 73, 48, 16, 6, 16, 0, 16, 0, 3, 33, 2, 12,144, 1,146, 64, 0, 0, 0, 0, 0, 18, 3, 1, 0, 0, 0, 32, 32, 18, 18, 0,132, 48, 0, 70, 4, 0,128, 16, 17, 4, 0, 76, 0, 16, 48, 0, 6, 4, 0, 0, 0, 0, 0, 17, 0,160, 0, 0, 1,156,251,
|
||||
32, 0, 4,144, 66, 82, 2, 26, 64, 0, 8, 0, 1, 32, 0,177, 32,128, 16, 0,128, 0, 3, 0, 2,129, 32,128, 0, 4, 0, 0, 0, 0, 0, 18, 3, 1, 0, 0, 0, 32, 32, 16, 16,160, 1, 52, 32, 32, 4, 0, 2, 81, 0, 8, 17, 5, 8, 8,177,192, 6, 0, 0, 0, 0, 32,106, 0, 13,160, 4, 53, 0, 88,253,
|
||||
0, 0, 0, 0, 4,192, 64, 24, 0, 0, 0, 0, 0, 0, 0, 0, 0, 6,192, 0, 0, 16, 3, 2, 64, 8, 8, 0, 0, 0, 0, 0, 0, 0, 0, 18, 2, 0, 0, 0, 0, 32, 32, 18, 18,128, 1, 48, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 6, 0, 0, 0, 0, 0, 96, 0, 0, 0, 0, 48, 0,216,249,
|
||||
128, 1, 32,128, 3,192, 64, 24, 4,128, 0, 0, 0, 0,128, 60,128, 1, 0, 0, 22,192, 0, 88, 0, 0,224,128, 44, 0, 0, 0, 0, 0, 0, 18, 2, 0, 0, 0, 0, 32, 32, 16, 16,128, 1, 33,128, 1, 0, 0, 8,192, 0, 0, 0, 4, 96, 0, 60, 0, 6, 0, 0, 0,192, 0,120, 0, 12,226,129, 48, 32,184,254,
|
||||
132, 1, 0,161, 4,192, 2, 0, 1, 3, 0, 0,128, 8, 9,132,136, 38, 2,128, 10, 64, 0, 40, 0, 76, 36, 17, 20, 0, 0, 0, 0, 2, 1, 18, 3, 1, 0, 0, 0, 38, 32, 2, 2,128, 17, 48,133,134, 0, 0,128, 96, 0, 0, 36, 8,160, 33, 4, 4, 6, 0, 0, 0, 64, 0,104, 0, 64, 32, 5,176, 0,130,250,
|
||||
140, 81,160, 64, 2,192, 0, 0, 0, 16, 1, 64, 64,130, 17, 2, 64, 6, 0, 24, 76, 0, 8, 48, 1, 4, 4, 72,152, 0, 0, 0, 0, 2, 1, 18, 3, 1, 0, 0, 0, 36, 32, 0, 0,128, 5, 50, 2, 16, 8, 0,128, 8,139, 0, 1, 4, 0, 4, 0, 0, 32, 8, 0, 0, 0, 99, 96, 0, 0, 1, 1, 48, 16,104,251,
|
||||
224, 1, 12, 0, 5,240,128, 6,208, 3, 24, 0, 3, 96, 0, 8, 0, 1, 48, 0, 18,208,128, 72, 64, 3,224, 1, 32, 32, 0, 0, 0, 2, 0, 18, 2, 12, 0, 0, 0, 38, 32, 2, 2,234, 1, 28,160, 7, 0, 0, 6,128, 3, 24, 64, 11,224,129, 60,128, 1, 0, 0, 0,192, 3,112, 0, 15, 32, 1, 12, 0, 80,252,
|
||||
8, 0, 32, 16, 2,192, 32, 0, 0, 3, 98, 16, 12,132, 0, 48, 32, 6, 0, 0, 16, 8, 0, 64, 0, 12, 0, 0, 32, 16, 0, 0, 0, 2, 0, 18, 2, 0, 0, 0, 0, 36, 32, 0, 0,128, 1, 48, 0, 6, 0, 0, 0, 0, 3, 0, 32, 4,128, 1, 0, 0, 6, 0, 0, 0, 0, 3, 96, 0, 0,128, 0, 48, 0,137,248,
|
||||
0,132,144, 0, 4,192, 2, 24, 9, 35, 96, 1, 0, 0,128, 48, 2, 0, 0, 66, 8, 0,160, 32, 34, 76,144, 1, 18, 1, 0, 0, 0, 18, 0, 8, 2, 0, 0, 0, 0,181, 32, 4, 3, 0, 0, 17, 4, 70, 2, 0, 64, 72, 3, 64, 1, 8,160, 1, 49, 0, 70, 1, 0, 0, 0, 3, 96, 0,128,162, 0, 48, 65,240,248,
|
||||
160, 49, 52,128, 6, 16, 0, 2, 64,139, 8, 4, 33, 36, 0, 4, 0, 38, 16, 8,128, 64, 0, 0, 2, 45,160,144, 0, 4, 0, 0, 0, 18, 0, 8, 2, 34, 0, 0, 0,165, 32, 4, 0, 48, 0, 0, 10, 0, 0, 0, 2, 64, 33, 8, 0,128, 32, 4, 52,128, 6, 16, 72, 26, 0, 32,106, 0, 44,168, 0, 2, 65, 20,248,
|
||||
0, 0, 48, 0, 6, 0, 0, 0, 0, 3, 0, 32, 0, 0, 0, 0, 0, 0, 66, 64, 0, 16, 0, 0, 64, 8, 8, 0, 0, 0, 0, 0, 0, 18, 0, 8, 2, 0, 0, 0, 0,180, 32, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,130, 0, 0, 0, 8, 0, 49, 0, 6, 0, 0, 24, 0, 0, 96, 0, 12, 0, 0, 0, 0,200,250,
|
||||
128, 1, 49, 0, 6,240, 0, 0, 0, 3, 26, 64, 3,132, 1, 12,128, 7, 0,128, 22, 0, 0, 88, 0, 0,224, 0, 44, 0, 0, 0, 0, 18, 0, 8, 86, 9, 0, 0, 0,164, 32, 4, 83,100, 0, 12, 0, 0, 0, 0, 6, 4, 1, 1, 0, 3, 96,128, 60,128, 7,128,128, 30,192, 0, 24, 0, 15,224, 1, 12, 16,240,255,
|
||||
136, 5, 48, 0, 6,208, 0, 0, 0, 3, 40, 0,129, 0, 40, 4,132,128, 0, 0, 10, 0, 0, 40, 0, 76, 36, 0, 22, 0, 0, 0, 0, 18, 0, 8, 2, 2, 0, 0, 0, 53, 32, 4, 3, 32, 0, 52, 4, 0, 0, 0, 2, 0, 10, 96, 32, 45,162, 8, 52,128, 6, 0, 0, 26, 64, 0, 8, 0, 13, 32,145, 52, 0,115,251,
|
||||
0,128, 48, 0, 22, 0, 2, 1, 17, 32, 0, 36, 32,128, 17, 0, 1, 0, 0, 0, 77, 0, 19, 48, 1, 68, 16, 72,152, 0, 0, 0, 0, 18, 0, 8, 2, 33, 0, 0, 0, 37, 32, 4, 0, 9, 0, 1, 34, 0, 0, 0, 64, 4, 33, 2,130, 64, 0, 9, 0, 66, 16,128, 66, 0, 16, 19, 98, 0, 0, 4, 1,128, 0,141,255,
|
||||
96, 0, 60,160, 7, 33, 0, 6,192, 3, 25, 0, 7, 98, 0, 57, 16, 7, 48, 0, 18,208, 3, 74, 64, 15, 96, 0, 32, 32, 0, 0, 0,246, 0, 8, 2, 0, 0, 0, 0,140, 32, 4, 18, 64, 0, 60, 0, 0, 0, 0, 6,192, 2, 24, 0, 15, 68, 64, 8, 0, 1, 49, 0, 6,192, 3,104, 0, 2, 32, 1, 8, 8,136,249,
|
||||
132, 0, 0, 0, 0, 17, 0, 24, 0, 2, 1, 64, 0,128,129, 4, 0, 0,128, 0, 16, 16, 0, 66, 32, 12,128, 65, 32, 16, 0, 0, 0,214, 0, 8, 2, 4, 0, 0, 0,140, 32, 4, 0,130, 1, 48, 0, 0, 0, 0, 0, 16, 3, 1, 0, 12, 0, 1, 0, 0, 0,128, 0, 0, 0, 3, 0, 0, 0,128, 0, 0, 0, 90,249,
|
||||
0,137, 0, 18, 0, 0, 16, 88,136, 1, 0, 1, 64,132, 1, 4, 32, 6, 0,136, 72, 0, 16, 32, 1, 76,144, 1,144, 0, 0, 0, 0,246, 0, 8, 2, 0, 0, 0, 0, 12, 32, 4, 3,130, 1, 50, 16, 0, 0, 0, 26, 1, 2, 96,128, 12, 1, 64, 4, 0, 0, 64, 16, 0, 0, 3, 8, 0, 0,160, 0, 0, 8, 24,255,
|
||||
32, 0, 52,130, 22,208, 0, 2, 72, 35, 9, 0, 1, 32, 0, 4, 0, 22,216, 72,128, 64, 3, 0, 2, 13,160, 8, 0, 4, 0, 0, 0,214, 0, 8, 2, 16, 0, 0, 0, 12, 32, 4, 3, 40,144, 0,138, 0, 0, 0, 26, 64, 8, 40, 36,140,160, 1,176,192, 0, 80, 4, 0, 0, 32, 42, 36, 64,164,128, 52, 0,140,254,
|
||||
0, 0, 48, 32, 6,194, 0, 0, 0, 3, 0, 0, 0, 0, 0, 0, 0, 0,128, 0, 0, 16, 3, 0, 64, 12, 0,129, 0, 0, 0, 0, 0,246, 0, 8, 2, 8, 0, 0, 0, 4, 32, 4, 3, 4, 0, 0, 0, 0, 0, 0, 24, 0, 0, 2, 0, 0,136, 1, 0, 0, 0,132, 32, 0, 0, 0, 32, 0, 0, 0, 0, 48, 0,152,251,
|
||||
0, 0, 28, 0, 6,192, 0, 6, 0, 3,120, 32, 0, 96, 0, 48,128, 7,194, 0, 22, 0, 3, 88, 0, 12,128, 0, 44, 0, 0, 0, 0,214, 0, 8, 2, 2, 0, 0, 0, 4, 32, 4, 3,129, 0, 12,128, 7, 0, 0, 24, 0, 0, 97, 32, 3, 8, 0, 60,144, 1, 68,128, 0,192, 0, 88, 64, 3,224, 1, 60, 0, 16,249,
|
||||
8, 0, 4, 64, 2,200, 0, 2, 17, 1,105, 2, 0, 33, 16, 50,128, 16,192, 72, 10, 0, 3, 40, 0, 76, 4,133, 20, 0, 3, 0, 0,118, 0, 8, 2,144, 1, 0, 0, 12, 32, 4, 3, 0, 64, 52,132, 32, 8, 0, 24, 0, 32, 0, 1, 1, 0, 0, 4,129, 32,128, 0, 0, 64, 0, 72, 4,129, 36,129, 52, 0, 27,250,
|
||||
0, 0, 0, 32, 4,200, 8, 16, 3, 9, 0,129,128, 0, 0,128, 16, 0,192, 0, 76, 0, 11, 48, 1, 12,129, 0,154, 0, 0, 0, 0, 86, 0, 8, 2, 0, 0, 0, 0, 12, 32, 4, 3, 2, 16,128, 0, 70, 0, 0, 0, 0, 32, 66,130, 0, 16,144, 0, 0, 32, 66, 2, 0, 0, 19, 0, 0, 32, 0, 1, 0, 2,205,253,
|
||||
96,128, 44,128, 7,240, 32, 30,192,131,120, 0, 15,100, 64, 12,128, 7,240, 32, 18,208, 3, 73, 64, 15, 96, 1, 32, 32, 0, 0, 0,118, 0, 8, 2, 36, 0, 0, 0, 4, 32, 4, 3,240,129, 60,144, 7, 2, 0, 6,200, 0, 88, 0, 15, 96, 0, 60,128, 3,176, 64, 0,192, 3, 41, 0, 14, 40, 1, 12, 32,208,252,
|
||||
132, 1, 0, 8, 4, 4, 0, 24, 0, 0, 0, 0, 0,128, 1, 0, 0, 0,192, 64, 16, 0, 0, 64, 32, 12, 0, 0, 32,160, 8, 0, 0, 86, 0, 8, 2, 64, 4, 0, 0, 4, 32, 4, 3, 1, 0, 48, 0, 0, 0, 0, 0, 0, 2, 64, 0, 12, 0, 0, 0, 0, 0,196, 64, 0, 0, 3, 64, 0, 13,136, 0, 0, 0,130,254,
|
||||
128, 33, 36, 0, 38, 0, 66, 64, 32, 35, 1, 68, 64, 40, 64, 0, 34, 6,192, 4, 8, 16,144, 32, 0, 64, 16,137,144, 0, 0, 0, 0, 0, 0, 82, 67, 5, 0, 0, 0, 32, 32, 82, 82,133, 17, 49, 64, 32, 4, 0, 0, 0, 8, 97, 34, 44, 2, 8, 50,128, 0,128, 0, 0, 0, 3,104, 0, 13,160, 0, 0, 0, 64,248,
|
||||
144, 9, 4,128, 6,208, 72,146, 0, 19, 8, 65, 33, 36, 8,132, 0, 22,216, 0,128, 0, 0, 0, 2,133,168, 16, 0, 4, 2, 0, 0, 6, 0, 82, 67, 9, 1, 0, 0,245, 32, 80, 80, 32, 0, 0, 10, 32,212, 0, 2, 64, 0, 0, 0, 1, 0, 8,177,192, 64, 16, 0, 0, 0, 32, 40, 1, 13, 32, 5, 0, 34,148,252,
|
||||
0,128, 0, 0, 6, 64, 0, 8, 8, 0, 2, 0, 0, 0,128, 0, 8, 0,192, 0, 0, 16, 0, 2, 64, 0, 0,128, 0,128, 0, 0, 0, 6, 0, 82, 66, 80, 0, 0, 0,117, 32, 82, 82, 8, 0, 0, 0, 0,192, 0, 0, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 2, 32, 12, 0,128, 0, 0,200,251,
|
||||
96, 0, 12, 0, 6,193, 0, 24,200,131, 24, 32, 3, 0, 1, 0,144, 7,192, 64, 22,192, 0, 88, 0, 7, 96, 0, 44, 0, 4, 0, 0, 70, 0, 82, 66, 2, 2, 0, 0,229, 32, 80, 80, 0,128, 12,128, 1,192, 0, 0,192, 0, 24, 64, 12, 96, 0, 60,144, 1,192, 0, 0,192, 3,120, 0, 0, 96,129, 12, 0,224,248,
|
||||
36, 64, 4, 0, 38,192, 72, 8, 64, 8, 8, 0, 73,132,128, 32,128,128,192, 0, 10, 64,163, 40, 0, 1, 48, 0, 22, 0, 0, 0, 0, 0, 0, 82, 67, 1, 0, 0, 0, 32, 32, 66, 66, 0, 0, 52,132,134, 0, 64,128, 96, 0, 8, 2, 64,164, 33,132,128, 32, 1, 72, 0, 64, 32, 76, 34, 0, 32, 16, 4, 0, 99,254,
|
||||
4,132, 48, 0, 6,128,136,128, 16, 0, 4, 4, 64, 0, 4, 48, 0, 0, 0, 0, 76, 0, 11, 48, 1, 0, 8, 4,152, 0, 1, 0, 0, 0, 0, 82, 67,137, 0, 0, 0, 32, 32, 64, 64, 17, 8, 0, 17, 16,194,130, 64, 0,144, 0,132, 76, 0, 4, 2, 0, 0,200, 36, 0, 0, 19, 64, 0, 64, 80, 4, 48, 0,125,253,
|
||||
192, 1, 56,160, 7,114, 0, 6,128, 0, 24, 32, 3,104,129, 12,136, 7,240, 32, 18,208,128, 72, 64, 3, 96, 1, 33, 32, 0, 0, 0, 0, 0, 82, 66, 10, 0, 0, 0, 32, 32, 66, 66,102, 0, 61,128, 7,240, 0, 30,200, 0, 16, 0, 15,232, 1, 60, 0, 1, 48, 0, 0,192, 0, 74, 0, 3,160, 1, 61, 32, 40,252,
|
||||
132, 1, 48, 0, 0,193,128, 0, 0, 3, 2, 64, 0, 2, 65, 16, 0, 0,192, 0, 16, 16,128, 64, 0, 12,128, 65, 32, 0, 4, 0, 0, 0, 0, 82, 66, 0, 2, 0, 0, 32, 36, 64, 64, 0, 0, 48, 32, 6, 0, 0, 0, 8, 3, 96, 0, 0,136, 1, 0,128, 0,192, 64, 0, 0, 3, 32, 0, 0, 0, 0, 48, 0, 34,253,
|
||||
128, 41, 48, 0, 70,192, 4, 16, 72, 11, 64, 0, 0,128, 1, 0, 33, 6,192, 72, 8, 0, 8, 32, 8,140,130, 17, 16, 65, 2, 0, 0, 18, 1, 18, 3, 19, 1, 0, 0, 54, 32, 82, 82,128, 65, 48, 0, 70, 4, 66, 0, 1, 3, 2, 68, 76,160,133, 48,128, 20,194, 4, 0, 0, 19, 42, 0, 0,132, 41, 48, 0, 72,250,
|
||||
0, 8, 4,128, 6,208, 0, 2, 0, 16, 12, 0,129,164, 4,180,128, 36, 82, 66,128, 64, 0, 0, 2, 1, 32, 0, 33,132, 0, 0, 0, 18, 1, 18, 3, 65, 0, 0, 0, 38, 32, 80, 80, 36, 0, 52,128, 0, 0, 0, 2, 66, 0, 8, 36, 1, 32, 0, 4,137, 0, 16, 0, 0, 4, 0, 40, 8, 13, 0, 8, 21, 9,228,253,
|
||||
0, 0, 1, 0, 6,192, 0, 0, 0, 0, 96, 0, 0, 0, 65, 48, 8, 2,192, 0, 0, 16, 0, 0, 64, 0, 0, 1, 0, 0, 0, 0, 0, 66, 1, 18, 2, 0, 0, 0, 0,118, 32, 82, 82, 8, 0, 48, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 12, 0, 0, 32, 0, 16,254,
|
||||
224, 1, 12,128, 7,192, 0, 0,200, 0, 0, 0, 4,128, 0, 48, 0, 0,192, 32, 22, 0, 3, 88, 0, 12, 0, 0, 44, 0, 1, 0, 0, 2, 1, 18, 2,144, 0, 0, 0,118, 32, 80, 80,225, 1, 48, 0, 6, 1, 0, 6, 8, 0, 64, 32, 0, 8, 0, 0, 8, 0,193, 0, 6, 8, 0,120, 64, 12, 98, 0, 16, 0, 56,253,
|
||||
172,129, 4,128, 6,192, 0, 64, 64, 0, 0, 33, 0, 1,129,176, 16, 0, 2, 2, 10, 0, 16, 44, 0, 64, 2,136, 4, 16, 0, 0, 0, 66, 1, 18, 3, 1, 0, 0, 0,102, 32, 66, 66, 33, 0, 50, 0, 64, 0, 0, 2, 0, 35, 33, 1, 76,128, 9,129, 0, 64, 0, 72, 2, 0, 0, 72, 1, 32,160, 17, 34, 0, 3,250,
|
||||
4, 32,176, 8, 32,192, 4, 1, 17, 11, 1, 65, 0,128, 4, 48, 0, 4,196, 2, 77, 0, 19, 49, 1, 32,132, 16,153, 0, 0, 0, 0, 66, 3, 18, 3, 5, 0, 0, 0,100, 32, 64, 64, 16, 68,128, 0,134, 0, 0, 0, 0, 3, 32, 1,128,129, 9,128, 0, 6,193, 32, 0, 17, 0, 64, 0, 12, 1, 16, 18, 0,185,248,
|
||||
224, 1, 56, 0, 1,242, 0, 30,192, 3, 24, 0, 3,104,129, 12,160, 1,176, 0, 18,208, 3, 72, 64, 15, 96, 0, 32, 32, 0, 0, 0, 66, 0, 18, 2, 0, 0, 0, 0,102, 32, 98, 66, 64, 0, 12,136, 7, 0, 0, 6,208,131, 24, 64, 15, 96, 64, 12,136, 7, 48, 0, 4, 0, 0, 72, 0, 15,224, 1, 44, 0,242,250,
|
||||
0, 0, 48,128, 0, 0, 0, 0, 0, 3, 0, 32, 0,128,129, 32, 16, 0, 0, 32, 16, 16, 0, 64, 0, 0, 8, 0, 16, 0, 0, 0, 0, 66, 0, 18, 2, 0, 0, 0, 0,100, 32, 96, 64, 0, 0, 1, 0, 0, 0, 0, 0, 0, 3, 96, 32, 12,128, 1, 0, 0, 6,192, 0, 24, 8, 0, 32, 0, 0,128, 1, 16, 0,218,253,
|
||||
144, 69, 48,128, 0, 0, 66, 64, 8, 3, 0, 0, 0, 4, 9, 24, 0, 32, 8, 8,136, 0, 32, 33, 32,128,128, 9, 34, 33, 0, 0, 0, 0, 0, 2, 2, 0, 0, 0, 0, 32, 32, 0, 0, 32, 8, 0, 0, 22, 4, 0, 2, 32,163, 32, 2, 12, 4, 40, 16, 8, 64,194, 8, 65, 0, 0, 40, 0,128,130, 5, 34, 0,148,248,
|
||||
160, 1,148,128, 6,208, 0, 0, 80, 9, 12, 0, 33,164, 8, 53,146, 0,208, 0,128, 64, 16, 66, 2, 1, 33, 0, 4, 0, 0, 0, 0, 0, 0, 2, 2, 0, 0, 0, 0, 32, 32, 0, 0, 32, 0, 0,128, 66, 0, 0, 64, 64, 16, 8, 0, 1, 32, 8, 4,128, 6, 16, 72, 26, 0, 32, 42, 1, 32, 8, 0, 52, 1,120,253,
|
||||
0, 0, 32, 8, 6,192, 0, 0, 0, 2, 0, 0, 0, 0, 1, 48, 0, 0, 1, 0, 0, 16, 0, 0, 64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 2, 2, 0, 0, 0, 32, 32, 0, 0, 1, 0, 0, 0, 0, 4, 0, 0, 4, 0, 1, 0, 0, 0,129, 0, 0, 6, 0, 0, 24, 0, 0, 0, 64, 0, 0, 0, 48, 16, 96,253,
|
||||
0, 64, 16, 0, 0,192, 0, 6, 0, 1, 0, 0, 3,132, 0, 48, 0, 2, 1, 0, 22, 0, 3, 89, 0, 8,224, 1, 48, 0, 0, 0, 0, 0, 0, 2, 2, 16, 0, 0, 0, 32, 32, 32, 0,232, 1, 0, 0, 0, 2, 0, 6, 0, 2, 1, 0, 12, 0,129, 0, 0, 6,128,128, 6,192, 0,120, 64, 15, 2, 0, 48, 32,144,254,
|
||||
132, 17, 32, 33, 38,196, 0, 2, 4, 2, 0, 0,129, 0, 1, 16, 33, 68, 0, 32, 10, 0, 16, 8,129,128, 40, 0,129, 8, 4, 0, 0, 0, 0, 8, 2, 16, 2, 0, 0, 32, 32, 4, 0,168, 1, 0, 0, 64, 0, 0,154, 2, 9, 96, 36, 0,144, 5,128, 32, 6, 64, 0, 2, 64, 0, 72, 2, 65, 0, 0, 48, 1, 90,252,
|
||||
132,137, 16, 0, 22,194, 4, 64, 0, 1, 0, 2,128,128, 0, 16, 2, 66,192, 2, 76, 0, 16, 49, 1, 64,144, 73, 48, 17, 2, 0, 0, 0, 0, 8, 2, 24, 1, 0, 0, 32, 32, 4, 0, 12, 0, 0, 0, 64, 4, 0, 0, 33, 16, 97, 1, 12,128, 16, 0, 32,198, 64, 0,128, 0, 35, 65, 0, 12, 0, 0, 0, 66,128,248,
|
||||
96, 0, 44,136, 7,240, 32, 4,208, 2, 24, 32, 3, 98, 1, 60,136, 5,244, 32, 18,208, 3, 72, 64, 3,224, 1, 60, 0, 4, 0, 0, 0, 0, 2, 2, 16, 2, 0, 0, 32, 32, 0, 0, 72, 64, 0,128, 1, 0, 0, 4,192, 2,120, 16, 15, 98,129, 12,128, 7, 48, 32, 6,208, 3, 72, 0, 14, 8, 0, 12, 0,216,249,
|
||||
0, 0, 48, 16, 0, 0, 0, 0, 0, 1, 96, 16, 0,128, 0, 0, 0, 0,196, 0, 16, 8, 1, 32, 0, 0,132, 1, 0,160, 6, 0, 0, 0, 0, 2, 2, 88, 3, 0, 0, 32, 32, 0, 0, 12,128, 0, 0, 0, 0, 0, 0, 0, 2, 96, 16, 0,128, 1, 0, 0, 0,193, 0, 24, 0, 3, 32, 0, 0, 4, 0, 32, 8, 57,255,
|
||||
128, 5, 34, 1, 64, 1, 66, 24, 5, 2, 96, 4,136, 8, 1, 48, 9, 70,192, 40, 8, 1, 34, 65, 66, 64,128, 1, 50, 1, 4, 0, 0, 0, 0, 8, 2, 8, 2, 0, 0, 32, 32, 4, 0, 4, 16, 0, 0, 16, 2, 0, 0, 4, 3, 97, 0, 44,136, 17, 49, 18, 16, 64,132, 24, 8, 3, 40, 0, 44, 0, 0, 0, 0,112,250,
|
||||
0, 0, 32, 0, 68, 0, 32, 0, 0, 0, 0, 0, 0, 0, 1,128, 0, 0,128, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 4, 0, 0, 0, 0, 8, 2, 0, 2, 0, 0, 32, 32, 4, 0, 0, 1, 0, 0, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 1, 32, 0, 4, 0, 0, 0, 0, 0, 0, 0, 40, 16, 0, 0, 0, 12,250,
|
||||
32, 0, 4, 0, 0, 17, 0, 2, 0, 0, 8, 0, 1, 0, 0, 12,160, 0, 0, 0, 2,192, 0, 8, 0, 0, 32, 0, 4, 0, 0, 0, 0, 0, 0, 8, 2, 2, 0, 0, 0, 32, 32, 4, 0, 33, 0, 4,128, 0, 16, 0, 0, 0, 0, 8, 0, 1, 0, 0, 0, 0, 0, 18, 0, 2, 64, 0, 8, 0, 0, 32, 0, 4, 0, 72,254,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 2, 0, 0, 0, 0, 32, 32, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 24,249,
|
||||
44, 0, 4,128, 0, 0, 0, 2, 64, 64, 8, 0, 1, 32, 0, 0,128, 0, 80, 0, 2, 64, 0, 8, 0, 1, 32, 0, 4, 0, 0, 0, 0, 0, 0, 8, 2, 0, 0, 0, 0, 32, 32, 4, 0, 32, 0, 4,128, 0, 16, 0, 2, 64, 32, 8, 0, 1, 32, 0, 4, 0, 0, 16, 0, 2, 64, 0, 8, 68, 0, 32, 16, 5, 0, 27,253,
|
||||
4, 16, 2, 0, 66, 4, 36, 0, 0, 32, 4, 0, 0, 0, 4, 1, 66, 64, 8, 8, 1, 0,144, 0, 0, 32, 16, 0, 0, 1, 0, 0, 0, 0, 0, 8, 2, 0, 0, 0, 0, 32, 32, 4, 0, 0, 8, 0, 0, 0, 0, 0,128, 0, 32, 4, 68, 0, 0, 16, 2, 0, 64, 2, 0,128, 16, 0, 0, 4,128, 16, 0,128, 64,237,248,
|
||||
0, 0, 0,128, 0, 48, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0,128, 0, 16, 0, 0, 0, 0, 0, 0, 1, 32, 0, 0, 16, 0, 0, 0, 0, 0, 8, 2, 0, 0, 0, 0, 32, 32, 4, 0, 0,128, 0, 0, 0, 16, 0, 2, 8, 0, 0, 0, 0, 0, 0, 4, 0, 0, 16, 0, 0, 0, 0, 8, 64, 0, 0, 0, 0, 0,154,253,
|
||||
4, 1, 32, 0, 0, 0, 0, 16, 0, 2, 64, 0, 8, 0, 0, 0, 16, 0, 4, 0, 16, 0, 2, 64, 0, 8, 0, 1, 32, 0, 0, 0, 0, 0, 0, 8, 2, 0, 0, 0, 0, 33, 4, 4, 0, 0, 1, 32, 0, 4, 0, 0, 0, 0, 2, 64, 0, 8, 0, 64, 0, 0, 0, 1, 0, 16, 0, 2, 0, 0, 0, 0, 1, 32, 0,210,248,
|
||||
0, 0, 20, 0, 0, 0, 0, 10, 0, 0, 8, 0, 1, 32,136, 0, 2, 32, 0, 32, 2, 0, 0, 8, 0, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4,128, 0, 16, 0, 0, 17, 0, 0, 0, 1, 0, 16, 20,138, 0, 16, 0, 0, 64, 0, 0, 8,128, 40, 0, 0, 0,160,251,
|
||||
128, 0, 8, 0, 0, 4, 0, 0, 0, 64, 0, 0, 0, 64, 0, 16, 0, 2, 16, 0, 0, 0, 0, 0, 0, 0, 0, 4, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 0, 2, 0, 0,200,249,
|
||||
0, 0, 0, 0, 0, 16, 0, 0,128,128, 4, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,144, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 0, 16, 0, 2, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,144,249,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 4, 4, 32, 0,128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0, 0, 0,248,253,
|
||||
0, 0, 64, 0, 0, 0, 64, 0, 2, 4, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 0, 0, 0, 0, 0, 0, 0, 0,192, 0, 8, 0, 0, 0, 0, 0, 0,128, 0, 0, 48, 0, 1, 0,116,249,
|
||||
0, 0, 0, 0, 8, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 72, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0,128, 0, 64, 0, 0, 64, 0, 0, 0, 0, 0, 16, 0, 0, 0, 0,152,254,
|
||||
0, 2, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0,128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 0, 0, 0, 16, 0, 0, 0, 16, 56,255,
|
||||
0, 32, 0, 0, 2, 16, 0, 2, 0, 0, 10, 0, 1, 2, 0, 4,160, 0, 64, 32, 0, 4,128, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 64, 0, 0, 0, 0, 0, 2, 16, 0, 32, 16, 1, 32, 0, 0, 32, 0, 0, 32, 4, 0, 1, 1, 0, 2, 2, 0, 0,136,121,252,
|
||||
0, 0, 0, 8, 0,128, 0, 0, 8, 1, 64, 0, 0, 8, 65, 0, 0, 2, 32, 0, 8, 0, 1, 32, 16, 0,130, 64, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 9,128, 0, 0, 64, 8, 0, 0, 0, 0, 2, 0, 0, 16, 8, 0, 0, 64, 0, 8, 0, 2, 0, 4, 0, 0, 8, 0, 40,255,
|
||||
0,128, 96, 32, 13, 48, 24, 12, 80, 0, 25, 0, 66, 61, 0, 9,144, 13, 48, 64, 50, 72, 96, 9, 74, 2, 40, 0, 1, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64,176, 21,136, 2, 1,128, 6, 8, 10, 48, 32,131, 65, 3, 4, 48, 2, 0,192, 4,144, 0, 3, 0, 3, 4, 45,100, 16,240,255,
|
||||
128, 1, 48, 8, 84,209, 0, 24, 2,195, 64, 24,152, 37, 56, 20, 4, 4,129, 6,152, 2,214, 72, 82, 88,129, 33, 32, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 80, 21, 14,128, 11, 0, 72, 0, 8, 32, 85, 1,130, 64,164, 82, 1, 0, 0, 8, 0, 1, 8, 16, 5, 34, 0, 17, 0,192,254,
|
||||
128, 0, 16, 4, 0, 65, 0, 16, 0, 1, 2, 32, 0, 0, 0, 16, 0, 0, 2, 0, 8, 0, 0, 2, 64, 0, 32, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 0, 5, 32, 0, 4, 0, 4, 0, 0, 32, 64, 0, 40, 32, 0, 0, 0, 0, 0, 8, 0, 1, 0, 16, 4, 8, 0, 16, 0, 49,249,
|
||||
0, 1, 32, 0, 4, 16, 0, 16, 8,130, 32, 64, 4, 2, 64, 0,160, 0, 16, 0, 4, 8,129, 32, 0, 4,130, 64, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128,173,255,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 18, 0, 0, 0,160, 16, 32, 0, 0, 0, 0,128, 0, 0, 0, 0, 0, 32, 0, 2, 0, 0, 8,128, 0, 0, 0, 1, 0, 0, 2, 0, 64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 88,251,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 8, 32, 0, 0, 0, 2, 0, 0, 0,128, 16, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 0, 0, 0, 80,255,
|
||||
0, 0, 16, 0, 16, 16, 2, 0, 0, 0, 0, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 2, 0, 2, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 4,128, 0, 0, 0, 0, 0, 4, 0, 16, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0,128,253,
|
||||
16, 0, 0, 0, 8, 2, 2, 0, 0, 0, 0, 0, 2, 0, 0, 4, 0, 2, 0, 0, 0, 0, 0, 20, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 64, 0, 0, 4, 0, 0, 64, 0, 2, 32, 36,250,
|
||||
2, 2, 0,128, 0, 0, 0, 1, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 64, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 64, 0, 0, 0, 8, 8, 0, 8, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128,144,253,
|
||||
0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 1, 0,128,128, 0, 0, 0,128, 32, 0, 0, 1, 0, 0, 0, 0, 0, 2, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 0, 0, 0, 32, 0, 0, 0, 0, 8,255,
|
||||
68, 0, 0, 0, 0, 0, 0, 4,128, 0, 16, 0, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0, 4, 0, 0, 0, 24, 0, 1, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 8, 0, 0, 0, 32, 0, 0, 0, 0, 0, 25, 0, 0, 80, 73,251,
|
||||
4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0,128, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128,134,253,
|
||||
0, 0,128, 0, 0, 0, 0, 0, 0,128, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0,162, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 1, 0, 0, 0, 0, 4, 64,252,
|
||||
0, 0, 0, 0, 20, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,192, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 8, 2, 0, 0, 0, 0, 0, 8, 0, 0, 4, 0, 0,128,251,
|
||||
0, 0, 0, 0, 1, 64, 0, 0, 0, 0, 0, 0, 32, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 0, 0, 0, 0, 0, 3, 0, 0, 0, 0, 16, 0, 0, 0, 0, 4, 0, 0, 34, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 80,249,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64,128, 0, 0, 0, 0, 0, 0,128, 0, 16, 0,128, 0, 0,128, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,224,252,
|
||||
0, 0, 34, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 0, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0, 0, 1, 16, 0, 0, 0,128, 0, 0, 16,128, 0, 0, 0, 64, 0, 0, 32, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0,128, 0, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0,160, 0,120,253,
|
||||
0, 0, 0, 32, 0, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 8, 0, 0, 0, 0, 1, 0, 0, 6, 0, 0, 64, 0, 0, 0, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0, 8, 0, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 72,254,
|
||||
0, 0, 0, 0, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0,128, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 0, 0,128, 0, 0, 0, 64, 0, 0, 1, 0, 0, 0, 0, 0, 0, 72,249,
|
||||
0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 64, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16, 0, 0, 34, 32, 0,192,248,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 1, 0, 0, 0, 0, 0, 0, 0, 64, 0, 0, 0, 0, 0, 32,168,255,
|
||||
0, 0, 1, 0, 1,128, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 32, 0,132,128, 0, 4, 2, 0, 16, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 64, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0,172,255,
|
||||
0, 64, 0, 64, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 0, 0, 16, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 88,249,
|
||||
16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 16,128, 0, 0, 0, 0, 0, 0, 4, 0, 0, 0, 0, 56,254,
|
||||
0, 0, 0, 0, 0, 0, 0, 32, 0, 4, 4, 0, 0, 0, 2, 0, 0, 0, 0,128, 0, 0, 0, 16, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 16, 0,128, 68, 0, 0, 80,248,
|
||||
0, 0, 0, 16, 0, 0, 0, 0, 4, 64, 16, 0, 16, 0, 0, 16, 16, 0, 16, 1, 0, 0, 0, 0, 0, 32, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 64, 0, 1, 0, 0, 0, 0,160,248,
|
||||
0, 0, 0, 0, 0, 0, 0, 2, 32, 2, 0,128, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0,128, 0,128, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 12, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 2, 0, 16, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 56,252,
|
||||
0, 1, 0, 0, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 64, 0, 0, 40,252,
|
||||
72, 0, 33, 4, 2, 20,128, 2, 80, 0, 0, 0, 0, 0, 64, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,129, 64, 0, 16, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 0, 0, 16, 0, 0, 17, 0, 0, 0, 0, 0, 16, 1, 8, 64, 1, 0, 1, 1,128, 0, 0, 0, 8, 80,128, 0, 0, 0, 1, 0, 0,128, 60,248,
|
||||
0, 0, 16, 8, 0,128, 16, 8, 2, 1, 0, 0, 0, 0, 0, 1,160, 0, 0, 32, 0, 4,129, 0, 0, 4, 2,128, 16, 8, 0, 0, 0, 0, 4, 64, 0, 0, 0, 0, 0, 4, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 32, 4, 36, 0, 8, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 32, 0, 0, 0,188,249,
|
||||
64,128, 12, 53, 13, 58,192, 7,251,128, 0, 0, 4, 0,176,105,165, 20,128,130, 80, 80, 0,226, 0, 5, 76,128, 5, 48, 0, 0, 0, 6, 20, 64,144, 0, 0, 0, 0, 4, 0, 8, 88, 0,128, 24, 5, 2, 0, 0, 80,136, 7, 18, 96, 3,106,128, 20, 0, 3, 65, 0, 5,136, 1, 9, 0, 64,165, 40, 0, 5, 72,252,
|
||||
128, 32,160, 94,146, 67, 64, 16, 76,144, 0, 20,164, 67, 64, 1,132,132,193, 16, 64, 67,248,160, 13,252,129, 39,132, 4, 0, 0, 0, 24, 2,128, 32, 0, 0, 0, 0, 8, 3, 96, 0,128, 81, 17, 10, 4, 10, 16,100,132,206, 80, 8, 6, 22, 33,177,138, 64, 10, 64, 24, 4,137, 18, 65,146, 40, 82, 0, 1,120,255,
|
||||
32, 0, 0,144, 0,129, 0, 0, 8, 0, 1, 16, 4, 8, 32, 0, 0, 0, 18, 0, 0, 0,128, 32, 0, 8, 32, 0, 0, 0, 0, 0, 0, 8, 0, 0, 32, 0, 0, 0, 0, 0, 2, 32, 0, 32, 0, 5, 8, 0, 0, 0, 0, 2, 0, 1, 0, 2, 4, 0, 4, 8, 0, 0, 0, 2, 16, 65, 0, 0, 0, 0, 64, 0, 0,224,253,
|
||||
0, 64, 16, 8, 0, 4, 0, 8, 0, 0, 0, 0, 0, 2, 0, 0,136, 0, 65, 32, 0, 4, 64, 0, 16, 4,130, 64, 0, 8, 0, 0, 0, 8, 4, 64, 0, 0, 0, 0, 0, 4, 2, 32, 0,128, 0, 0, 0, 2, 0, 32, 0, 0, 1, 18, 64, 0, 32, 0, 17, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0,216,248,
|
||||
0, 33, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0,128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,192, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 64, 0, 0, 0, 0, 0, 16, 0, 0, 0, 32, 2, 0, 0, 0, 1, 5, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,248,254,
|
||||
0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 64, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, 0, 20, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 0, 0, 16, 0, 0, 0, 8, 8, 0, 0, 0, 0, 1, 0, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16,253,
|
||||
40, 0, 0, 0, 6, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 8, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 32, 0, 4,128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 1, 0, 0,194,248,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 32, 2,128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 64, 16, 0, 0,128, 0, 0, 0,120,253,
|
||||
16, 0, 0, 0, 0, 0, 0, 16, 0, 0, 65, 1, 0, 0, 1, 64, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 64, 0, 1, 0, 33,128, 0, 0,128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,152,252,
|
||||
0, 0, 0, 0, 0, 4, 0, 32, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 1, 0, 0, 32, 0, 0, 0, 32, 0, 0, 0, 16, 0, 0, 0, 0, 1, 0, 0, 0,128, 0, 1, 0, 0, 0, 0, 0, 64, 0, 2, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 64, 0,168,254,
|
||||
8, 0, 0, 0, 0, 1, 0, 0, 4, 0, 0, 16, 0, 0, 0, 32, 16, 0, 2, 0, 64, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 16, 0, 4, 0, 0, 0, 64, 0, 0, 0,128, 0, 0, 0, 64, 32, 0,128,104,253,
|
||||
32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 0, 0, 2, 0, 1, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 16, 0, 2, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 0, 8, 0, 0, 0, 0, 0,136, 0,224,250,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 64, 0,128, 0, 4, 0, 0, 0, 0, 0, 0, 1, 0, 8, 0, 32, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 8, 0, 2, 0, 1, 0, 72,253,
|
||||
128, 0, 0, 0, 0, 0, 0, 80, 8, 1, 0, 1, 0, 0, 0, 0, 8, 0, 0, 2, 0, 0, 0, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 0, 0, 8, 0, 0, 0, 1, 0, 64,242,255,
|
||||
0, 0, 64, 0, 0,128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 8, 0, 48, 0, 8, 0, 0, 34, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 2, 32, 0,136, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,104,252,
|
||||
2, 0, 0, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 64, 0, 64, 0, 0, 0, 0, 0, 0, 0, 0, 16, 0, 0, 0, 16, 2, 0, 0, 8, 0, 0, 0, 8,128, 0, 1, 0, 0, 6, 0, 0, 24, 16, 3, 32, 0, 0, 0, 4, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 88,253,
|
||||
32, 0,128, 64, 38,208, 0, 0, 33, 32, 8, 0,140,161, 1, 4, 0, 16, 80, 8, 0, 64, 3, 0, 2, 1,160,136,180, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 52, 0, 0, 16, 0, 82, 64, 32, 10, 0, 0,160, 1, 20,146, 34,210, 72, 0, 0, 0, 40, 33, 1, 32,132, 0, 0,208,253,
|
||||
0, 0, 48, 0, 0,194, 0, 0, 0, 3, 2, 0, 12,128, 1, 0, 0, 0,196,128, 0, 0, 0, 0, 32, 0, 0, 1, 48, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 1, 48, 0, 0, 0, 0, 0, 4, 0, 96, 0, 0,128, 1, 32, 0, 4,192, 0, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0, 64,251,
|
||||
128, 1, 60,128, 7,193, 0, 6,192, 3,120, 0, 3, 0, 0, 0,128, 1, 0, 0, 0,192, 0,121, 0, 3,224, 0, 60, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 96, 0, 60, 0, 0, 48, 0, 0, 4, 1, 24, 0, 0,224, 1, 28,128, 3, 0, 32, 0, 0, 0, 56, 0, 3,128,128, 0, 0, 16,252,
|
||||
128, 1, 4,137, 70,192, 0, 2, 64,144,104, 0, 1, 0, 0, 48,160, 0,192, 16, 0, 64, 32,104, 0, 1, 32, 1, 52, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 68, 4, 64, 0, 16, 0, 64, 0,162, 8, 10, 0,160, 1, 36,128, 4,192, 8, 0, 0, 0, 72, 0, 1, 0, 8, 0, 0, 16,254,
|
||||
128, 33, 0, 0, 16, 8, 8,152, 16, 16, 97, 16, 0,136, 49, 0, 64,198,192, 8, 1, 0, 16, 96, 0,128,128, 0, 48, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 48, 18, 0,192, 4, 0, 33, 96, 96, 0, 0, 0, 48, 16, 0, 2,192, 2, 0, 0, 0, 32, 0,140,130, 5, 1, 0,160,254,
|
||||
224, 1, 52,160, 7, 48, 64, 30, 64, 3,120, 0, 2,224, 1, 60,128, 7,240, 0, 0,128, 3,121, 16, 3, 98, 1, 60, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 60, 0, 0,240,128, 6,192, 3,112, 16, 0, 64, 0, 44,128, 5,240, 64, 0, 0, 0, 88, 0, 15,224, 1, 0, 0,184,249,
|
||||
128, 1, 48, 0, 0, 2, 0, 24, 0, 3, 0, 0, 0,128, 1, 48, 0, 6,192, 64, 0, 0, 3, 2, 0, 12,128, 0, 48, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 48, 32, 0,192, 0, 0, 0, 0, 96, 32, 0, 0, 0, 16, 0, 2,128, 0, 0, 0, 0, 32, 0, 12, 0, 0, 0, 0,248,254,
|
||||
128,129, 0,128, 0, 0, 0, 24, 0, 0, 0, 18, 32,132,133, 48, 4, 6, 64, 4, 0, 64, 11, 0,132, 12, 4, 1, 36, 4, 0, 0, 0,116,116,116,116, 0, 0, 0, 0, 27, 27, 27, 27, 0, 16,176, 0, 0,208, 0, 64, 32, 16, 98, 0, 0, 0, 0, 36, 0, 4, 96, 16, 0, 0, 0, 72, 0, 12, 0, 5, 2, 0,208,252,
|
||||
160, 1,148, 16, 0, 16, 8,128, 64, 33,108, 0,128, 1, 0, 20,145, 0, 0, 0, 10, 1, 3, 1, 0, 64,164, 8, 22, 9, 0, 0, 0, 84, 0,116,116, 34, 0, 0, 0, 8, 0, 27, 27, 17,136, 4,128, 2, 88, 64, 2, 97, 0, 8, 0, 0,160, 73, 0,128, 34,210, 24, 74, 64, 0, 40, 68, 1,128, 33, 0, 33,212,250,
|
||||
128, 1, 0, 0, 0, 0,128, 0, 8, 0, 96, 0, 12, 0, 0, 32, 0, 0, 0, 0, 24, 16, 3, 0, 0, 12, 0, 1, 32, 0, 0, 0, 0, 84, 96,116,116, 12, 0, 0, 0, 9, 10, 27, 27, 6, 0, 48, 0, 4,128, 0, 0, 0, 0, 96, 0, 0,128, 1, 0, 0, 4,192, 0, 16, 8, 0, 64, 0, 0,128, 1, 0, 0,160,254,
|
||||
0, 0, 48, 0, 0, 48, 64, 6, 0, 3,120, 0, 15, 0, 0, 28, 0, 0, 0, 0, 0,192, 0, 0, 0, 15,224, 0, 16, 0, 0, 0, 0,116, 52,116,116, 8, 0, 0, 0, 9, 18, 27, 27,100, 0, 60,128, 3,112, 0, 0,192, 0, 25, 0, 0,128, 1, 0,128, 3, 64, 0, 14,192, 0, 56, 0, 15, 96, 0, 12, 0, 32,254,
|
||||
8, 0,160, 16, 0, 16, 8, 2, 0, 10,106, 0, 45, 4, 0, 36, 0, 0, 0, 0, 24, 66, 0, 0, 0, 45, 36, 1, 32, 0, 0, 0, 0, 84, 84,116,116, 0, 0, 0, 0, 11, 3, 27, 27, 32, 0, 52,192, 4,144, 0, 72, 96, 35, 8, 10, 0,128, 73, 0,128, 4,192, 66, 18, 64, 0, 72, 0, 13, 32, 0, 52, 66,187,249,
|
||||
128, 33, 32, 0, 0, 0, 0,152, 8, 2, 0, 65, 64, 8, 0, 16, 0, 22, 2, 0,152, 0, 19, 0, 0, 64,144, 0, 16, 0, 0, 0, 0,116, 96,116,116, 0, 0, 0, 0, 10, 11, 27, 27,128, 9, 49, 18, 2, 64, 0, 64, 4, 0, 96, 4, 0, 0, 65, 0, 0, 2, 64, 8, 9, 0, 3, 32, 0, 64,128, 1, 0, 1, 45,253,
|
||||
224, 1, 36, 0, 0, 48,128, 30, 64, 2, 16, 0, 2, 0, 0, 44,128, 7, 0, 0, 30,196,131, 0, 0, 2, 96, 1, 44, 0, 0, 0, 0,116, 84,116,116, 0, 0, 0, 0, 27, 2, 27, 27,224, 1, 60,128, 5,176, 0, 6,192, 3,113, 16, 0, 96, 0, 0,128, 5,240, 0, 22,192, 3, 89, 0, 3,130, 1, 60, 32, 98,252,
|
||||
132, 1, 16, 0, 0, 0, 0, 24, 0, 1, 0, 0, 0, 0, 0, 16, 0, 0, 0, 0, 24, 0,131, 0, 0, 0,132, 0, 16, 0, 0, 0, 0,116,116,116,116, 0, 0, 0, 0, 27, 27, 27, 27,128, 1, 48, 32, 2, 64, 0, 0, 0, 3, 97, 0, 0,128, 1, 0, 0, 2, 64, 0, 8, 0, 3, 32, 0, 0, 2, 0, 48, 0, 42,253,
|
||||
128,129, 16, 0, 0,144, 68, 24, 0, 1, 8, 0,140, 4, 0, 32, 0, 16, 1, 0, 8, 8, 3, 0, 0, 12, 0, 1, 32, 0, 0, 0, 0,116,100,116,116, 0, 0, 0, 0, 27, 19, 27, 27,128, 1,176,128, 4,128, 0, 64, 4, 11, 96, 34, 0, 0,137, 0,128, 4,128, 40, 18, 0, 3, 72, 0,129, 0, 0, 48, 17, 64,248,
|
||||
176,137, 20,192, 0,192, 0,128, 64, 9, 9, 0,141,128, 1, 48,129, 0, 0, 0,128, 0, 3, 1, 1, 64,164, 17, 52, 0, 0, 0, 0, 20, 36,116,116, 0, 0, 0, 0, 24, 10, 27, 27,160, 72, 4,128, 66, 82,136, 0, 68, 0, 0, 0, 0, 32, 72,148,160, 34, 80, 0, 2, 69, 0, 40, 64, 64,164,137, 0, 0,184,249,
|
||||
0, 0, 0, 0, 0,192, 32, 0, 8, 0, 96, 0, 0,132, 65, 0, 16, 0, 0, 0, 0, 8, 3, 0, 64, 12,128,129, 48, 0, 0, 0, 0, 52, 68,116,116, 0, 0, 0, 0, 24, 9, 27, 27, 0, 0, 0, 0, 4,128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 4,130, 64, 8, 0, 0, 64, 0, 0, 0, 0, 0, 0, 72,251,
|
||||
128, 65, 48,128, 1, 48, 0, 6, 0, 3, 24, 0, 15,224, 1, 60,128, 1, 2, 0, 6,192, 0, 24, 0, 15, 0, 1, 48, 0, 0, 0, 0, 48, 68,116,116, 0, 0, 0, 0, 24, 8, 27, 27,224, 1, 12,128, 3,112, 0, 6,192, 0, 0, 0, 0,128, 0, 28,128, 3,112, 0, 22, 0, 3, 56, 0, 3, 96, 0, 0, 0,200,250,
|
||||
12, 4, 32,133, 0, 16, 0, 2, 0, 2, 9, 34,129,162, 1, 52,138, 64, 0, 0, 2, 64, 0, 8, 0, 45,132,136, 48, 10, 0, 0, 0, 20,116,116,116, 0, 0, 0, 0, 26, 0, 27, 27, 32, 68, 52,137, 4,144, 0, 2, 64, 3, 2, 0, 0, 0, 16, 37,192, 4,144, 0,130, 32,128, 72, 0, 1,160, 65, 0, 0,130,255,
|
||||
132, 17, 32, 0, 6, 0, 4, 25, 17, 2, 0, 2, 64, 0, 4,128, 0, 32, 0, 0, 24, 8,139, 96,128, 32,128, 1, 0, 0, 0, 0, 0, 52, 4,116,116, 0, 0, 0, 0, 26, 24, 27, 27,128, 9, 0, 18, 2, 64, 0, 88, 4, 0, 2, 0, 0,128, 33, 16, 4, 2, 64, 0, 0, 9, 3, 36, 0, 76, 80, 48, 0, 0,200,253,
|
||||
224, 1, 37,128, 7, 34, 0, 30, 64, 2, 24, 64, 11,104,128, 60,160, 1, 4, 0, 30,192, 3,120, 0, 2,232, 1, 61, 16, 0, 0, 0,116, 4,116,116, 32, 0, 0, 0, 11, 9, 27, 27,229, 1, 61,128, 5,176, 0, 30,192, 3, 0, 0, 0,224, 1, 44,128, 5,176, 0, 14,192, 3, 88, 0, 15,160, 1, 0, 0, 16,255,
|
||||
4, 1, 16, 0, 6, 0, 0, 24, 0, 1, 0, 64, 8,128, 1, 0, 0, 0, 4, 0, 24, 0,131, 96, 0, 0, 0,128, 0, 0, 0, 0, 0,116, 16,116,116, 2, 0, 0, 0, 27, 3, 27, 27,128, 65, 48, 0, 2, 64, 0, 24, 0, 3, 1, 0, 0, 0, 64, 0, 0, 2, 64, 0, 16, 4,128, 32, 0, 12, 64, 0, 0, 0, 41,253,
|
||||
128, 73, 16, 0, 6, 0, 32, 24, 0, 1, 8, 0, 76,130, 5, 6,137, 70, 0, 0, 24, 0, 3, 96, 0,140,196, 5, 0, 66, 0, 0, 0, 52,116,116,116, 16, 0, 0, 0, 2, 27, 27, 27,136, 9, 52,146, 4,128, 0, 24, 0, 11, 0, 0, 0, 0, 9, 48, 17, 4,128, 0,128, 0, 11, 72, 0, 12,128, 1, 0, 0,224,252,
|
||||
160,137, 20,160, 0, 0, 0, 0, 64, 1,106, 0,128, 1, 16, 0,129, 0,208, 0,128, 0, 3,105, 0,141,160,133, 20, 2, 0, 0, 0, 48,116,116,116, 0, 0, 0, 0, 26, 27, 27, 27, 0,136, 4,128, 70, 80, 0, 26, 64, 0,104, 0,129, 33, 72, 52,162, 22, 81, 2, 0, 64, 0,104, 1,133, 0, 32, 0, 0, 28,252,
|
||||
0, 0, 0, 0, 6,192, 32, 0, 0, 0, 96, 0, 12, 0, 0, 1, 16, 0,192, 0, 0, 8, 3, 96, 0, 0,132, 1, 32, 16, 0, 0, 0, 80,116,116,116, 12, 0, 0, 0, 11, 27, 27, 27, 4, 0, 0, 0, 6,130, 64, 24, 0, 0, 96, 0, 4, 0, 0, 0, 0, 6,128,128, 0, 0, 0, 96, 16, 12, 4, 0, 0, 0, 96,255,
|
||||
128, 65, 48,128, 1,244, 0, 0, 0, 3, 25, 0, 15, 96, 0, 60,128, 1, 0, 32, 6,192, 0, 0, 16, 15,128, 0, 28, 0, 0, 0, 0, 16, 16,116,116, 0, 0, 0, 0, 26, 2, 27, 27, 97, 0, 12, 0, 0,112, 0, 24,200, 0,120, 0, 11,128,128, 60, 32, 0,116, 0, 0, 0,131, 0, 0, 3, 96, 1, 0, 0, 0,249,
|
||||
8, 4,160,160, 0,208, 32, 0, 0, 18, 8, 0, 45, 36, 0, 52,128, 0, 0, 0, 2, 64, 0, 0, 4, 33,130, 9, 37, 0, 0, 0, 0,112, 32,116,116, 12, 0, 0, 0, 9, 26, 27, 27, 33, 0, 52, 8, 22,145, 0, 88, 64, 0,104, 0, 65, 16, 4, 4, 1, 38,144, 0, 0, 0, 3, 96, 16, 1,168, 0, 0, 0,107,253,
|
||||
128, 17, 32, 0, 32, 8, 8, 1, 0, 2, 96, 0, 0,128, 9,128, 32, 70, 8, 0, 88, 32, 11, 1, 0, 64,128, 16, 16, 0, 0, 0, 0, 16,116,116,116, 0, 0, 0, 0, 24, 27, 27, 27,136, 9,130, 32, 22, 64, 0, 24, 2, 67, 96, 0, 32,144, 5, 0, 4, 22, 64, 0, 0, 0,136, 96, 1,128,192, 0, 0, 0,169,254,
|
||||
224, 1, 37,128, 1, 32, 0, 0, 64, 2,104, 0, 2,232, 1, 13,128, 7,240, 64, 30,192, 3,120, 32, 11,232, 1, 45, 0, 0, 0, 0, 52, 80,116,116, 4, 0, 0, 0, 10, 2, 27, 27,226, 1, 60,128, 7,178, 0, 6,192, 3,112, 0, 7,224,129, 60,128, 7,178, 0, 0,192, 3,120, 32, 3, 2, 1, 0, 0,226,250,
|
||||
132, 0, 16, 0, 0, 0, 64, 0, 0, 1, 0, 0, 0,128, 1, 0, 0, 6, 0, 0, 24, 0,131, 0, 64, 8,128, 0, 17, 0, 0, 0, 0,116,116,116,116, 8, 0, 0, 0, 27, 27, 27, 27,132, 1, 48, 0, 4, 64, 0, 24, 16, 3,104, 0, 8, 0, 64, 16, 0, 4, 64, 0, 0, 0, 0, 65, 0, 0, 2, 1, 0, 0, 58,252,
|
||||
128, 73, 16,128, 16,194, 0, 0, 0, 1, 0, 0, 76,132, 1, 4,137, 6,192,132, 24, 0, 3, 96, 1, 12, 2, 9, 32, 0, 0, 0, 0, 20,116,116,116, 4, 0, 0, 0, 2, 27, 27, 27,130, 1, 52, 18,131,128, 0, 24, 65, 3,104, 0, 32, 4, 9, 32, 17,131,128, 0, 0, 0, 35, 48, 8,128,128, 0, 0, 0,164,255,
|
||||
176, 1, 20, 1, 38,208, 2, 26, 64, 17,104, 64,140,129, 1, 48, 1, 16, 0, 4, 10, 1, 3, 9, 12,141,162, 33, 20, 0, 0, 0, 0,112, 4,116,116, 16, 0, 0, 0, 10, 8, 27, 27,168, 72, 52,128,198,208, 4, 2, 64, 0, 8, 0, 0,160, 1, 36,145,198, 80, 4, 0, 64, 0,104, 12, 13, 0, 32, 4, 0,164,251,
|
||||
128, 1, 0, 16, 0, 2, 64, 24, 0, 0, 1, 0, 12,128, 65, 0, 16, 0, 4, 64, 24, 16, 3, 0, 0, 12,128, 1, 32, 8, 0, 0, 0,112,116,116,116, 0, 0, 0, 0, 11, 27, 27, 27, 0, 0, 48, 0, 6,192, 32, 0, 0, 0, 96, 0, 0,128, 1, 48, 0, 6,128, 64, 0, 0, 0, 96, 0, 12, 0, 0, 0, 0,152,251,
|
||||
0, 0, 48,144, 7,240, 0, 0, 4, 3, 24, 0, 15,224, 1, 60,136, 1, 48, 0, 0,192, 0, 0, 0, 15, 0, 0, 16, 0, 0, 0, 0, 80,116,116,116, 16, 0, 0, 0, 10, 27, 27, 27,232, 64, 60, 16, 2, 0, 32, 0,200, 0, 24, 0, 0, 0, 0, 48, 16, 2,112, 0, 0,192, 0, 32, 0, 3, 96, 1, 12, 0,232,255,
|
||||
12, 32, 32,129, 6, 24, 40, 0, 0, 18,106, 20, 65,164, 1,180,128, 0, 16, 0, 24, 66, 0, 64, 64, 13,129, 73, 32,128, 2, 0, 0,112,116,116,116, 84, 1, 0, 0, 8, 27, 27, 27,170, 8, 52, 0, 22,194, 0, 64, 64, 35, 9, 10, 0, 0, 0,176, 0, 22,146, 0, 0, 64, 0, 96, 33, 1,160, 0,132, 16, 35,250,
|
||||
4, 0, 32, 0, 0, 8, 4, 0, 0, 2, 16, 65, 32, 8, 4, 0, 65, 22,196, 4, 88, 0, 35, 96, 20, 12,128, 5, 16, 0, 0, 0, 0, 80,116,116,116, 0, 0, 0, 0, 8, 27, 27, 27, 0, 8,176, 32, 66,200,130, 24, 2, 16, 98, 18, 0, 0, 68, 48, 16, 18, 64, 0, 0, 0, 19, 32, 65, 64,192, 0, 0, 2,137,251,
|
||||
224,129, 36,128, 7,176,128, 30, 72, 2, 96, 0, 2, 96,128, 60,128, 7,240,128, 30,196,131,120, 0, 3,232,129, 44, 0, 4, 0, 0, 80,116,116,116, 0, 2, 0, 0, 9, 27, 27, 27, 96, 0, 61,128, 7,240, 0, 6,192, 3,112, 0, 0, 96, 0, 28,128, 7,180, 0, 0,192, 3,122, 0, 3, 2, 1, 60, 32,162,250,
|
||||
4, 0, 17, 0, 0,130, 0, 0, 0, 1, 0, 32, 0,128, 1, 0, 0, 6,192, 0, 24, 16,131, 96, 0, 4, 4, 1, 16, 0, 0, 0, 0,116,116,116,116, 0, 0, 0, 0, 27, 27, 27, 27, 0, 0, 0, 0, 2,128, 0, 24, 0, 3, 97, 64, 0, 0, 0, 48, 0, 2, 64, 0, 0, 0, 3, 32, 0, 0, 0, 1, 0, 16,178,252,
|
||||
128, 9, 16,128, 0,192, 34, 24, 17, 1,104, 1, 44,132, 69, 4, 9, 6,192, 0,136, 0, 3, 96, 18, 40,192, 32, 32, 0, 3, 0, 0, 4,116,116,116,128, 1, 0, 0, 10, 27, 27, 27, 0, 68, 48, 64, 4, 97, 16, 24, 8, 11, 96, 2, 0, 0, 72, 8, 33, 4,129, 0, 0, 0, 3, 64, 18, 1,130, 0, 0, 2,148,248,
|
||||
32, 9, 20,134, 64, 16, 0, 0, 97, 97, 8, 0,141, 0, 16, 48, 1, 16, 0, 2, 10, 1, 3, 1, 1, 13,160, 49, 36, 34, 0, 0, 0, 48,116,116,116, 0, 0, 0, 0, 11, 27, 27, 27, 0,136, 52,128, 2,210, 24, 0, 68, 0, 8, 0, 13,164, 1,180,144, 66,208, 32, 2, 96, 0, 40, 33, 65, 2, 32, 4, 6, 52,250,
|
||||
128,128, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 4, 0, 1, 16, 0, 4,128, 24, 16, 3, 0, 64, 12,128, 1, 48, 0, 3, 0, 0, 16,112,116,116,138, 1, 0, 0, 11, 0, 27, 27, 0, 0, 48, 0, 4,192, 0, 0, 0, 0, 96, 0, 0,128, 1, 48, 0, 4,196, 0, 8, 0, 0, 64, 0, 0, 0, 0, 16, 0, 80,249,
|
||||
0, 1, 48,128, 1, 50, 0, 6, 0, 3, 88, 0, 15, 98, 0, 60,136, 1, 48, 0, 0,192, 0, 24, 0, 15,128, 0, 48, 0, 0, 0, 0, 48,116,116,116, 0, 0, 0, 0, 8, 27, 27, 27, 96, 0, 60,128, 3, 64,128, 6,192, 0, 24, 0, 15,228, 1, 16,128, 3, 0, 0, 6,196, 0, 56, 0, 0, 96, 1, 44, 0,144,249,
|
||||
136, 0, 32,160, 64, 16, 0, 2, 0, 18, 41, 0,129, 32, 0, 52,128, 0, 16, 0, 24, 66, 0, 8, 0, 13,129,133, 48, 33, 1, 0, 0, 48,116,116,116,130, 0, 0, 0, 9, 1, 27, 27, 33, 0, 52,192, 4,192, 2, 2, 64, 11, 10, 10, 1,160, 1, 48,161, 4,192, 8, 19, 64, 0, 72, 0, 0,162, 0, 4, 65,251,252,
|
||||
0, 1, 32, 0, 0, 0, 2,152, 32, 2, 48, 0, 64,128, 5, 0, 33, 70,196,128, 24, 5,147, 96,130, 0,128, 64, 48, 4, 2, 0, 0, 16, 20,116,116, 8, 1, 0, 0, 9, 10, 27, 27,132, 5, 48, 18, 2, 64, 72, 88, 32, 32, 97, 17, 0, 1, 4, 16, 2, 2,192, 2, 8, 2, 35, 33, 0, 0,208, 0,128, 16,225,249,
|
||||
224, 0, 36,128, 1, 52, 32, 30, 64, 2, 72, 0, 11,232, 1, 61,128, 7,240, 0, 30,192, 3,120, 0, 15,232, 1, 28, 0, 1, 0, 0,116, 16,116,116,128, 0, 0, 0, 27, 8, 27, 27,224, 1, 13,128, 5,240, 0, 30,192, 3,112, 0, 15, 64, 0, 61,144, 5,240, 64, 6,192, 3, 88, 0, 11, 0, 1, 28, 0, 50,251,
|
||||
4, 1, 16, 0, 0,192, 0, 24, 0, 1, 64, 0, 8,128, 1, 0, 0, 6,192, 0, 24, 0,131, 96, 0, 12,132, 0, 48, 0, 4, 0, 0,116, 32,116,116, 0, 2, 0, 0, 27, 11, 27, 27,128, 1, 48, 32, 2, 64, 0, 24, 0, 3, 97, 0, 4, 0, 0, 16, 0, 2,128, 0, 16, 4, 3, 32, 0, 0, 0, 1, 32, 0,186,248,
|
||||
128, 0, 16, 0, 36,194, 66, 24, 0, 1, 32, 0, 12,130, 1, 4, 9, 6,192, 0, 72, 16, 3, 96, 0, 44, 0, 65, 8, 4, 0, 0, 0,116,116,116,116, 0, 0, 0, 0, 27, 27, 27, 27,128, 1,176,128, 4,128, 34, 24, 0, 11, 96,128, 72, 4, 0,160,136, 4, 96, 16,128, 64, 3, 64, 0, 64,130, 0, 0, 16, 52,255,
|
||||
176,137,148,160, 0, 16, 0, 10, 65, 9, 10, 0, 1,128, 1, 48,129, 32, 20, 24,128, 0, 3,105, 12, 1, 32, 0, 52, 0, 4, 0, 0, 48,116,116,116, 0, 2, 0, 0, 10, 27, 27, 27, 0,136, 4,128, 2, 88, 8, 26, 64, 0, 8, 0, 1,160, 73, 52,130, 66,208, 24, 2, 64, 0, 40, 64, 12, 0, 33, 0, 0,156,250,
|
||||
0, 0, 0, 0, 0, 0, 0, 24, 16, 0, 0, 0, 0,128, 65, 0, 16, 0, 0, 0, 0, 8, 3, 32, 0, 0, 0, 0, 48, 32, 5, 0, 0, 16, 20,116,116,132, 2, 0, 0, 10, 3, 27, 27, 6, 0, 48, 0, 4,128,128, 24, 0, 0, 96, 0, 0,128, 1, 48, 32, 4,196, 0, 0, 0, 0, 64, 0, 12, 4, 0, 0, 0, 16,253,
|
||||
128, 65, 48,144, 1, 48, 0, 0, 0, 3, 90, 0, 3,224, 1, 60,136, 1, 0, 0, 6,192, 0, 32, 0, 3, 0, 0, 16, 0, 0, 0, 0, 52, 52,116,116, 16, 0, 0, 0, 11, 16, 27, 27, 96, 0, 60,144, 3,112, 0, 24,200, 0, 24, 0, 0,128, 65, 16,128, 3, 64, 0, 6,192, 0, 56, 0, 3, 96, 65, 0, 0,160,252,
|
||||
12, 4, 32,130, 0, 16, 0, 24, 2, 34, 40, 0, 1,160, 1, 52,129, 64,132,128, 2, 64, 0, 0, 64, 1, 0, 0, 48, 4, 0, 0, 0,116,116,116,116, 0, 0, 0, 0, 27, 27, 27, 27, 32, 0, 52,128, 4,144, 0, 88, 64, 0, 8, 10, 0,128, 5, 32,132, 4,192, 66, 2, 64, 0, 72, 0, 1, 32, 8, 0, 0,219,255,
|
||||
132, 17, 32, 0, 6,192,130, 24, 1, 2, 48, 0,128, 0, 4, 0, 0, 32,194, 32, 24, 9,131, 64, 1,140,128, 5,144, 64, 0, 0, 0, 16, 52,116,116, 0, 0, 0, 0, 8, 0, 27, 27,131, 17,177, 32, 2, 64, 0, 0, 2, 19,100, 20, 44, 4, 65, 16, 0, 2, 64, 8, 24, 0, 3, 34, 0, 76,192, 0, 0, 0,205,253,
|
||||
224, 1, 37,128, 7,244, 0, 30, 68, 2, 72, 0, 3, 98,128, 60,160, 1,240, 0, 30,192, 3, 56, 32, 15,232, 65, 60, 0, 0, 0, 0, 36,116,116,116, 0, 0, 0, 0, 11, 27, 27, 27,224, 1, 60,128, 5,176, 0, 6,192, 3,112, 0, 15, 96, 0, 44,160, 5,240, 64, 30,200, 3, 88, 0, 15, 8, 1, 0, 0,202,248,
|
||||
4, 1, 16, 0, 6,192, 0, 24, 4, 1, 64, 0, 12,128, 65, 0, 0, 0,192, 32, 24, 0,131, 0, 0, 12,128, 1, 16, 16, 0, 0, 0,116,116,116,116, 0, 0, 0, 0, 27, 27, 27, 27,128, 1, 48, 0, 2, 64, 0, 0, 0, 3, 96, 0, 0,128, 1, 16, 16, 2, 64, 0, 0, 0, 3, 32, 0, 12,132, 0, 0, 0,170,250,
|
||||
128, 65, 16, 0, 6,192, 0, 72, 0, 1, 32, 0, 12,132, 17, 4,137,164,192, 8, 24, 0, 3, 0, 17, 13,128, 1, 32, 1, 0, 0, 0,116,116,116,116, 0, 0, 0, 0, 27, 27, 27, 27,128, 1, 48, 64, 4,128, 0, 24, 97, 3, 96, 68, 0, 16,129,176, 0, 4,128, 34, 0, 2, 3, 64, 0, 12, 0, 1, 0, 0,168,249,
|
||||
176,137, 16,194, 0,208, 0, 10, 1, 9, 72, 0, 1, 0, 16, 48, 1, 64,208, 24, 26, 0, 3, 1,132, 1,160, 4, 6, 0, 0, 0, 0, 48, 84,116,116, 0, 0, 0, 0, 0, 3, 27, 27, 32, 72, 52,128, 2,210, 0, 26, 64,163, 8, 0, 13, 32, 0, 4,128, 2, 82, 16, 2, 67, 0, 40, 68, 64, 4, 32, 4, 0,208,255,
|
||||
0, 0, 0, 0, 0,192, 0, 24, 16, 0, 1, 0, 0, 0, 0, 1, 16, 0, 68, 0, 24, 0, 3, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 32, 52,116,116, 0, 0, 0, 0, 10, 8, 27, 27, 8, 1, 0, 0, 4,192, 32, 24, 0, 3, 96, 0, 12, 0, 0, 0, 0, 4,128, 0, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0, 24,255,
|
||||
128, 65, 16,128, 7,192, 0, 0, 0, 1, 88, 0, 3, 96, 0, 60,128, 7, 64, 0, 0,196, 0, 24, 0, 3,224, 0, 0, 0, 0, 0, 0, 96, 52,116,116, 6, 0, 0, 0, 3, 1, 27, 27, 97, 64, 60,128, 3,192, 64, 24, 0, 3, 24, 0, 0, 96, 0, 1,128, 3,112, 0, 6, 0,131, 56, 0, 3,224, 1, 12, 0, 96,248,
|
||||
12, 4, 0,194, 6,192, 0, 24, 2, 32, 12, 18, 1, 32, 0,180,136, 6, 0,128, 0, 65, 0, 8, 0, 1, 32, 1, 0, 0, 4, 0, 0, 4, 20,116,116, 16, 2, 0, 0, 16, 11, 27, 27,168, 9, 52,192, 4, 0, 8, 24, 0, 8, 9, 10, 0, 32, 4, 0,128, 4,144, 0, 2, 9, 35, 72, 0, 1,160, 1, 4, 0,170,253,
|
||||
132, 17, 0, 0, 6, 0, 40, 88, 0, 0, 48, 0, 0,128, 17, 2, 66, 6,129,132, 0, 0, 11, 96, 33, 44,130, 0,176, 8, 2, 0, 0, 68, 16,116,116, 16, 1, 0, 0, 0, 16, 27, 27, 8, 8, 48, 18, 2, 64, 0, 0, 33, 97, 96, 16, 64,128,145, 48, 9, 2, 64, 0, 0, 0,136, 32, 0,140,129, 65, 48, 16, 48,250,
|
||||
224, 1, 33,128, 7, 50, 0, 30, 4, 2, 72, 0, 3,226, 1, 60,128, 7,112, 0, 30,200,131,120, 0, 15, 96, 1, 60, 0, 5, 0, 0, 4,116,116,116,144, 2, 0, 0, 0, 2, 27, 27,104, 0, 61,128, 5,176,128, 6,192, 2,112, 0, 3,100, 0, 60,128, 5,176, 0, 22,200, 3, 88, 0, 15,192, 1, 60, 0,200,252,
|
||||
132, 0, 0, 0, 6, 0, 0, 24, 0, 0, 32, 0, 12,128, 1, 0, 0, 0, 0, 32, 0, 16,131, 96, 0, 12,128, 0, 48,128, 4, 0, 0,116,116,116,116, 88, 2, 0, 0, 27, 27, 27, 27, 12, 0, 48, 32, 2,192, 64, 0, 0, 3, 96, 64, 0, 0, 0, 49, 0, 2, 64, 0, 8, 8, 0, 32, 0, 12, 0, 64, 48, 0,217,251,
|
||||
128, 65, 32, 0, 6, 4, 0,136, 4, 2, 64, 0, 12,132, 1, 4, 9, 64, 8, 2, 88, 0, 3, 96, 0, 12, 0, 1, 48, 0, 4, 0, 0,116,116,116,116, 8, 2, 0, 0, 27, 27, 27, 27, 4, 68,176, 0, 4,192, 2, 0, 0, 19, 98, 1, 64, 40, 0, 48, 0, 4,128, 0, 0, 1, 3, 65, 0, 12, 0, 0, 48, 0,184,253,
|
||||
0, 0, 0, 0, 4, 0, 0, 0, 0, 0, 64, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 32, 0, 4, 0, 0, 32, 20,116,116, 0, 2, 0, 0, 3, 9, 27, 27, 0, 0, 0, 0, 4,128, 0, 0, 0, 2, 0, 68, 0, 0, 1, 0, 0, 4, 0, 0, 16, 0, 2, 64, 0, 0, 0, 0, 0, 0, 4,254,
|
||||
32, 0, 4, 0, 0, 0, 0, 2, 64, 0, 0, 0, 1, 32, 0, 0, 0, 0, 16, 0, 2, 0, 0, 8, 0, 0, 32, 0, 0, 0, 0, 0, 0, 32, 20,116,116, 2, 0, 0, 0, 2, 8, 27, 27, 33, 0, 0,128, 0, 0, 0, 2, 0, 0, 0, 0, 1, 0, 0, 0,128, 0, 16, 0, 2, 0, 0, 8, 0, 0, 32, 0, 4, 0, 32,251,
|
||||
0, 0, 0, 0, 0, 0,128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 96, 52,116,116, 0, 0, 0, 0, 2, 9, 27, 27, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8,249,
|
||||
40, 0, 4,128, 0, 16, 2, 2, 64, 0, 8, 0, 1, 32, 0, 4,128, 0, 18, 0, 2, 64, 0, 8, 0, 65, 32, 0, 4, 0, 0, 0, 0, 32,116, 68,116, 0, 0, 0, 0, 18, 8, 1, 27, 32, 0, 4,162, 0, 16, 0, 2, 64, 0, 8,130, 1, 32, 0, 4,193, 0, 16, 0, 2, 64, 0, 8, 0, 65, 34, 0, 4, 0,211,249,
|
||||
0, 0, 0, 0, 0, 0, 2, 1, 0, 0, 0,132, 32, 16, 0, 0, 0, 0, 0, 0, 0, 0, 32, 4, 0, 32, 8, 0, 0, 0, 0, 0, 0,116, 84,116, 52, 0, 0, 0, 0, 27, 10, 27, 11, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 0, 0,221,250,
|
||||
32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 0, 4,116,116, 16, 0, 0, 0, 0, 1, 3, 27, 8, 0, 0, 1, 0, 0, 16, 0, 0, 0, 0, 0, 16, 0, 0, 0, 1, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0,128, 0, 0,218,255,
|
||||
4, 0, 0, 32, 0,128, 0, 0, 0, 0, 2, 0, 8, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 64, 8, 0, 1, 0, 0, 0, 0, 0,116,116,116, 52, 0, 0, 0, 0, 27, 27, 27, 27, 0, 1, 0, 16, 0,128, 0, 0, 0, 0, 64, 0, 8, 0, 0, 33, 0, 0,128, 0, 16, 0, 0, 2, 0, 8, 0, 1, 32, 0,170,248,
|
||||
32, 0, 4,128, 0, 18, 0, 66, 72, 0, 8, 33, 1, 32, 0, 4,133, 16, 18, 66, 66, 72, 8, 9, 0, 1, 32, 0, 4, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0,132,128,160, 16, 0, 66, 72, 32, 2, 0, 1, 0, 4, 4,128,160, 16, 0, 2, 64, 8, 8, 10, 1, 0, 0, 4, 0,152,249,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 8, 64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 0, 0, 80,254,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 4, 0, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0,136,250,
|
||||
0, 0, 0, 36, 0, 2, 64, 0, 0, 65, 0, 0, 1, 0, 0, 0, 16,128, 0, 0, 0, 0, 0, 0, 64, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0,128, 0, 0, 16, 0, 0, 0, 0, 0, 32, 0, 32,120,248,
|
||||
0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 64, 0, 0, 0, 64, 0, 0, 0, 0,128, 0, 0, 0, 0, 0, 4, 0, 2, 0, 64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 16,128, 1, 0, 0,240,253,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 4, 0, 1, 0,128,128, 0, 0, 2,128, 0, 0, 0, 0, 4, 1, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,120,252,
|
||||
8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 4, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,181,252,
|
||||
0, 0, 16, 8, 2, 0, 32, 8, 4,129, 32, 0, 1, 0, 1, 0, 8, 2, 1, 0, 0, 8, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 8,128, 0, 0, 16, 0,128, 64, 64, 0, 68, 64, 0, 0, 2, 2, 0, 2, 0, 65, 0, 0, 4, 0, 0, 0, 0,200,248,
|
||||
0, 0, 0, 32, 0, 1, 64, 0, 0, 0, 0, 0, 4, 66, 64, 0, 0, 0, 64, 0, 8, 80, 0, 18, 32, 0, 8, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 16, 0, 1, 64, 0, 0, 4, 1, 8, 16, 0, 0, 0, 16, 8, 0, 1, 32, 0, 0, 0, 0, 0, 0, 32, 64, 0, 8, 8,253,
|
||||
0, 48, 8, 48, 1, 4,192, 4,136, 0, 17, 0, 3,104, 0, 1, 16,193, 18, 32, 2,216, 80, 10, 64,104, 9, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 13,144, 0, 18, 0, 4, 83, 0, 25, 96, 0, 68,128,100, 32, 1,134,153, 4,128, 0, 1, 0, 2, 32, 5, 3, 32, 0,253,
|
||||
128, 81, 16, 14, 68,129, 0,168, 4,150, 96, 16, 72,130, 32, 32, 40,128, 32, 2, 24, 40,131,144, 8, 60, 1, 48, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 0, 48, 9,192, 0, 2, 16, 2, 64, 0, 24, 1, 1, 11,144, 15, 4,129, 0, 40, 4, 33, 66, 16, 4,130,129, 32, 13, 48,254,
|
||||
128, 64, 16, 8, 0, 1, 0, 8, 8,128, 32, 32, 0,136, 0, 0, 8, 0, 0, 0, 8, 0,129, 0, 0, 1, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 0, 8, 4, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 4, 4, 0, 2, 0, 8, 68, 0, 0, 8, 1,130, 0, 0, 16,105,250,
|
||||
66, 0, 0, 16, 2, 32, 0, 0, 0, 1, 8, 0, 1, 0, 0, 9, 0, 0, 1, 0, 2, 0, 2, 0, 32, 4, 8, 64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16, 0, 0, 1, 0, 8, 4,128, 0, 16, 0,132, 0, 0, 8, 2, 32, 0, 0, 0, 0, 32, 0, 0, 0, 1, 32,136, 72,254,
|
||||
0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 4,128, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0, 8, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 40,253,
|
||||
0, 0, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 1, 0, 0, 0, 0, 0,184,253,
|
||||
0, 0,128, 16, 0, 0, 0, 0, 0, 8, 0, 8, 0, 0, 64, 4, 0, 0, 0, 2, 0, 32, 64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0,128, 0, 64, 0, 0, 0, 0, 16, 0, 0, 1, 0, 0, 0, 2, 8, 0, 0, 0, 0, 0, 24,253,
|
||||
128, 0, 4, 0, 1, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 32, 4, 16, 0, 0, 0,128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0,248,
|
||||
0, 0, 0, 0, 0, 4, 0, 0,128, 0, 1, 1, 0, 0,128, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,168,252,
|
||||
16, 0, 0, 0, 16, 0, 0, 1, 16, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 32, 0, 0, 4, 0, 2, 0, 0, 8, 0, 0, 0, 0, 1, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 20,254,
|
||||
0,128, 8, 64, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 0, 16, 0, 0, 64, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128,255,
|
||||
0, 0,128, 0, 0, 0,128, 16, 0, 8, 0, 0, 0, 4, 4, 16, 48, 4,128, 0, 16, 0, 2, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128,116,255,
|
||||
0, 1, 0, 0, 0, 0, 0, 3, 0, 0, 0, 0, 0, 16, 0, 0, 0, 2, 48, 0, 2, 0, 0, 8, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 16, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 16, 0, 56,249,
|
||||
0, 0, 0, 8, 2, 64, 0, 64, 2, 0, 0, 0, 8, 0, 0, 0, 0, 0, 4, 0, 4, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 96, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,104,255,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 0, 0,128, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 16, 0, 0, 0, 0,144,254,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 10, 0, 0, 0, 0, 0, 0, 0, 16, 0, 0, 0, 64, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 48, 0, 56,251,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 56,251,
|
||||
2, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 8, 0, 0, 0, 1, 1, 0, 0, 0, 2, 0, 0, 0, 0, 0,128, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0,128, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 64,128, 0,250,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,152,255,
|
||||
0, 0, 0, 16, 0, 0, 0, 0, 0,128,128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 4, 80,255,
|
||||
0, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0,112,255,
|
||||
12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,226,251,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 32, 0, 0, 0, 16, 0, 0, 1, 0, 0, 0, 0,128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 4, 0, 0, 16, 0,248,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 5, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0, 8, 0, 4,128, 0, 0, 0, 0, 64, 0, 0, 0, 0, 0,128,192,251,
|
||||
0, 0, 4, 0, 8, 0, 1, 0, 72, 0, 0, 0, 0, 1, 0, 0,132, 8, 0, 64, 4, 8, 0, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0,136, 0, 4, 8, 80,252,
|
||||
0, 0, 0, 0, 0, 4, 0, 8, 32, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,129, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,224,250,
|
||||
0, 4, 0, 0, 0, 0, 32, 0, 0, 0, 0, 16, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2,128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 4, 32, 0, 1, 2, 0, 0, 0,116,251,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,248,255,
|
||||
128, 0, 16, 8, 4, 0, 16, 8, 0,129, 8, 0, 4, 0, 0, 16, 8, 0, 0, 0, 0, 68, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16,128, 64, 32, 8, 2,128,128, 0,128, 0, 0, 0, 0,128, 64, 0, 0, 0, 0, 0, 0, 16, 0, 8, 16, 0, 34, 64, 16,136,164,253,
|
||||
12, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0,128, 0, 8, 32, 0, 1, 32, 8, 16, 1, 0, 0, 1, 2, 0, 0, 32, 0, 0, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 1, 0, 0, 0, 64, 32, 8, 4,128, 32, 16, 4, 2,128, 0, 0, 2, 0, 0, 0, 0, 0, 0, 8, 0, 0, 1, 8, 0, 66,255,
|
||||
64, 40, 8,144,161, 0, 64, 4,128, 0, 17, 16, 2, 32, 3, 12, 48, 0, 4,128, 2,216, 80, 0, 32,129,137, 0, 0, 32, 0, 0, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0, 2, 0, 8, 96,128, 8, 16, 1, 48,192, 2,144, 0, 10, 64, 1, 72,128, 17,128, 0, 0, 0, 0, 8,128, 16, 96, 0,100,128, 12, 16,224,249,
|
||||
0, 84,160, 14, 38,129, 16, 64, 70,140, 0, 16, 9,136, 97,160, 4, 34, 64,157,144, 2,145, 32, 2, 68, 64, 34, 80, 0, 0, 0, 0, 0, 4,128, 16, 0, 0, 0, 0, 8, 0, 64, 0,128,126, 0, 11,128, 32, 2, 16, 68, 64,192, 13,224,131, 0, 8, 8,196, 0, 0, 8, 21,241, 32, 14,196, 53, 67,128, 84,216,248,
|
||||
0, 64, 0, 8, 2, 1, 0, 0, 4,128, 0, 64, 0, 32, 64, 0, 0, 2, 64, 0, 0, 0,129, 32, 0, 4, 0, 0, 16, 0, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 64, 0, 8, 0, 0, 0, 0, 16, 0, 0, 0, 0,129, 0, 0, 32, 0, 0, 0, 8, 16,129, 32, 0, 4, 0, 64, 0, 0, 96,248,
|
||||
0, 0, 8, 32, 4, 64, 32, 0, 2, 0, 0, 0, 2, 0, 1, 5, 4, 0, 0,128, 8, 16, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 0, 0, 64, 32, 0, 0, 0, 0, 4, 0, 32, 0, 0,128, 0, 0, 0, 1, 0, 4, 0,128, 32, 16, 0, 2, 0, 0, 0, 2, 1, 0, 0, 0, 64, 0, 16, 0,130, 0, 0, 16,208,251,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 1, 4, 32, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 64,248,
|
||||
34, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 32, 0, 0, 1, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 16, 68,128, 0, 0, 8, 0, 0, 0, 0, 32, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0,128,160,252,
|
||||
32, 0, 0, 0, 0, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 96, 0, 0, 32, 0, 0, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 64, 0, 0, 2, 0, 0, 0, 16, 0,128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128,248,
|
||||
16, 0, 0, 64, 0, 32, 0, 0, 0, 0, 5, 64, 0, 0, 0, 0, 0,128, 8, 0, 0, 0, 0, 2,128, 2, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,128, 0, 0, 0, 32, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 28,254,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 8, 8, 0, 0, 12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,138,252,
|
||||
0, 0, 0, 0, 8, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4,128, 0, 0, 1, 0, 0, 4, 0,128, 0,128, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 0, 0, 64, 0, 0, 0, 0, 1, 16, 64, 0, 64, 16, 0, 0, 0, 0,128, 0, 0, 0, 2, 32, 0, 0, 0,224,252,
|
||||
0, 0, 16, 0, 0, 8, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 56,252,
|
||||
0, 0, 0, 0, 0, 2, 64, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16, 0, 0, 0, 72,255,
|
||||
0, 0, 32, 0, 0, 0, 16, 0, 0, 2, 0, 0, 16, 0, 0, 2, 0, 0, 0, 32, 0, 0, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 1, 0, 2, 0, 32, 0, 0, 0, 0, 0, 2, 0, 64, 0, 0, 0, 32, 0, 66, 0,168,254,
|
||||
0, 0, 0, 0, 0,128, 0, 0, 0, 68, 0, 0, 0, 0, 0, 1, 8, 16, 0, 16, 0, 0, 0, 0, 0, 0,130, 0, 0, 0,128, 0, 0, 0, 2, 0, 0, 0, 64, 0, 0, 0, 1, 0, 0,128, 4, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 8, 0, 2, 0, 0, 0, 0, 0, 4, 0, 0, 0, 0, 4, 0, 0, 0, 0, 72,255,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0,128, 0, 16, 0, 32, 0, 8, 0, 16, 0, 0, 0, 0,128, 0, 16, 0, 0, 0,128, 8, 0, 0, 0, 0, 0, 0,176,255,
|
||||
0, 2, 48, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 0, 1, 32, 0, 0,128, 0, 0, 16, 0, 0, 0, 16, 0, 0, 64, 0, 16, 0, 0, 8, 0, 0, 32, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0,128, 0, 0, 64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8,253,
|
||||
32, 0, 0, 0, 64,196, 2, 26, 64, 0, 0, 4, 0, 32, 0, 4,128, 0, 16, 0, 10, 16, 0, 8, 0, 0,160, 1, 4, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 16, 0,210, 0, 0, 0, 16, 0, 4, 5, 16, 0, 20, 2, 16, 0, 0, 10, 2, 8, 0, 4, 1,160, 8, 0, 18,144,249,
|
||||
128,128, 0, 0, 0,192, 64, 24, 0, 0, 96, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0,128, 1, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0,128, 0, 0, 0, 2, 64, 8, 0, 0, 32, 32, 0, 2, 0, 0, 0,128, 0, 64, 0, 0, 0, 1, 0, 88,250,
|
||||
0,128, 0,128, 1,242, 0, 24, 0, 3,121, 32, 0, 0, 0, 12, 0, 6,192, 0, 22,192, 0, 24, 0, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,224,129, 60,136, 1,240, 64, 0,192, 3,122, 0, 7, 0, 0, 28,128, 1, 0, 0, 24,200, 0, 24, 0, 3,128, 65, 12, 0,176,249,
|
||||
0, 0, 0,128, 70,208, 0, 24, 0, 19,104, 0, 0, 0, 0, 4, 0, 22, 2, 64, 26, 66, 0, 8, 0, 0, 0, 80, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 4,132,128, 0, 16, 0, 0, 64, 32,104, 0, 9, 0, 0, 36,128, 0, 0, 0,144, 64, 0, 8, 0, 1, 0, 1, 4, 0,120,249,
|
||||
0, 4, 0, 0,128, 0, 0, 64, 32, 16, 96, 16, 0, 0, 4, 48, 18, 32,192, 72, 0, 9, 3, 98, 0, 0, 0, 80, 48, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 9,177, 0, 64, 0, 16, 0, 0,139, 96, 0, 4, 0, 0, 16, 0, 6, 1, 0, 16, 0, 3, 96, 20, 76, 2, 1,176, 16, 56,253,
|
||||
96, 0, 1,128, 7, 32, 32, 6,192, 3,113, 0, 0, 96, 0, 61,128, 7,242, 0, 28,192, 3,120, 32, 0,224, 1, 52, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 60,144, 1,242, 0, 0,192, 3,112, 16, 11, 0, 0, 44, 0, 7, 0, 0, 18,128, 3,113, 0, 15, 32, 1, 60, 0,232,252,
|
||||
0, 0, 0, 0, 6, 4, 0, 0, 0,128, 96, 0, 0,128,129, 48, 0, 0, 0, 32, 24, 0, 3, 96, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,160, 1, 0, 0, 6, 65, 0, 0, 0, 0, 0, 0, 4, 0, 0, 16, 0, 6, 0, 0, 8, 0, 3, 96, 0, 12,128, 0, 48, 0, 72,252,
|
||||
0, 40, 0,128, 70, 0, 0, 0, 0, 11, 0, 18, 0,128, 17, 52, 0, 70,193, 2,128, 4, 3, 96, 0, 0,128, 9, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128,133, 48, 16, 70,128, 0, 1, 64, 3, 1, 66, 9, 0, 0, 32, 0, 6, 0, 0, 8, 0, 3, 96, 0, 13,128, 0, 48, 0,192,250,
|
||||
160, 1, 0,128, 0, 0, 2, 0, 72, 0, 8, 64,128, 34, 0, 4,128, 0,208, 34, 2, 16, 0,104, 0, 33, 34, 80, 4, 8, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 1, 80, 0, 16, 64,212, 2, 2, 0, 16, 8, 0,128, 40, 0, 20, 2, 16, 0, 0, 10, 33, 8, 0, 4, 0,160, 16, 54, 0, 68,255,
|
||||
128,129, 0, 0, 0, 0, 64, 26, 0, 0, 0, 0, 0, 0, 0, 48, 0, 6,192, 0, 0, 0, 0, 96, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 12, 0, 0, 0, 0, 0, 0, 0, 6, 0, 0, 0, 0, 0, 64, 0, 0, 0, 2, 0, 0, 0, 0, 32, 16, 0, 2, 0, 0, 0,128, 0, 64, 0, 0, 0, 48, 0,152,251,
|
||||
128, 1, 0, 0, 6, 48, 0, 30, 0, 3, 24, 0, 15, 96, 0, 12, 0, 6, 68, 0, 8, 0, 0,120, 0, 0, 8, 1, 44, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0,100, 0, 60,136, 7,240, 0, 0,192, 3, 24, 0, 15,100, 64, 28,128, 1, 0, 0, 24,192, 0, 24, 0, 0,128, 65, 48, 0, 24,249,
|
||||
8, 81, 0, 0, 16, 18, 0, 2, 4, 16, 10,132, 13, 32, 0, 52, 8, 32,192,128, 0, 2, 0,104, 0, 72,128,132, 20, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 4,128, 16, 18, 68, 0, 64, 32,105, 10, 33,160, 9, 36,128, 0, 0, 0, 16, 66, 0, 8, 0, 0, 0, 9, 48, 0, 59,249,
|
||||
128, 17, 0, 0,198,192, 2, 25, 0, 67, 0, 2, 76,128, 5, 50, 8, 32, 0, 2, 0, 0, 0, 96, 0,128, 2, 64, 8, 10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 1, 48, 0, 22, 2, 16, 24, 32,163, 0, 17, 44, 16, 0, 16, 0, 22, 1, 0, 16, 0, 19, 97, 16, 0, 0, 1, 0, 66, 57,248,
|
||||
224,129, 0,128, 1,224, 0, 0,192, 3, 24, 64, 15,226, 1, 8,128, 1, 52, 64, 22, 4, 0,112, 0, 3, 96, 0, 48, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,192,129, 60, 8, 1,240, 0, 30,192, 3,120, 0, 2,224, 1, 45, 0, 7, 0, 0, 18,128, 3,112, 0, 0, 32, 1, 12, 0,114,254,
|
||||
132, 1, 0, 0, 6,192, 0, 0, 0, 0, 0, 64, 0,128, 1, 48, 0, 6, 66, 0, 0, 4, 0, 96, 0, 8,128, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 1, 0, 0, 6, 64, 0, 24, 0, 0, 96, 32, 12,136, 1, 16, 0, 6, 0, 0, 8, 0, 3, 96, 0, 0,128, 0, 0, 0, 82,248,
|
||||
128, 9, 1, 0, 6,200, 0,152, 4, 35, 65, 4, 0,130, 1,176, 8, 22,192, 16,128, 0, 0,104, 0, 32, 8, 80, 48, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 1, 48, 16, 22,132, 0, 25, 64, 3, 97, 4, 76,128, 17, 33, 0, 6, 0, 0, 8, 0, 3, 96, 0, 0,128, 0, 0, 0,220,254,
|
||||
48, 0, 0,128, 0, 16, 0, 66, 72, 35, 97, 4,140,130, 1, 52,128, 0,192, 68,130, 32, 0, 8, 0, 1, 8, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 80, 0, 34, 64, 4,136, 90, 8, 16, 0, 66,128, 40, 0, 20, 32, 16, 0, 0, 10, 64, 3, 0, 4, 0,164, 0, 4, 0,248,251,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 96, 16, 0,128,129, 0, 0, 0, 0, 0, 16, 0, 0, 0, 0, 12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 24, 0, 0, 2, 0, 0, 0, 0, 32, 0, 0, 2, 0, 0, 16, 3, 0, 64, 0, 0, 0, 1, 0, 24,253,
|
||||
0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 24, 0, 15,224, 1, 12, 0, 6,240, 0, 14, 0, 0, 24, 0, 4, 4, 0, 48, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 96, 0, 12,128, 1, 48, 0, 30,208, 3, 26, 0, 3, 0, 0, 28,128, 1, 0, 0, 24, 8, 3, 24, 0, 15,136,129, 12, 0, 56,251,
|
||||
12, 0, 0, 0, 0, 0, 16, 16, 0,144, 8, 0, 33,162, 1, 52, 8,128, 16,136, 66, 4, 0, 8, 0,140, 0, 0, 48, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 4,128, 0, 16, 0,154, 64, 16, 8, 0, 1, 0, 0, 36,128, 0, 0, 0, 80, 0, 3, 8, 0,129, 0, 9, 4, 0, 82,251,
|
||||
4, 8, 0, 0, 22, 0, 66, 16, 0, 0, 96, 0,128, 0,128, 0, 8, 6, 8, 0, 88, 16, 0, 96, 0, 12, 2, 0, 48, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 1, 1, 17, 16,196,132, 8, 17, 3, 96, 64, 64, 16,136, 16, 0, 70, 1, 0, 16, 0, 0, 96, 17, 44, 2, 1, 48, 2, 64,250,
|
||||
96,128, 0,128, 7, 52, 0, 10,192, 3, 97, 0, 14, 66, 0, 56,128, 7,240, 0, 24, 0, 0,120, 16, 3, 0, 0, 52, 0, 0, 0, 0, 0, 0, 0, 0, 12, 0, 0, 0, 0, 0, 0, 0,194, 1, 8, 0, 1,240, 0, 22,192,131,112, 0, 2, 96, 0, 44, 0, 7, 0, 0, 18,192, 0,114, 0, 15, 32, 1, 60, 32, 88,250,
|
||||
132, 1, 0, 0, 0,196, 0, 8, 0, 1, 2, 0, 12, 0, 0, 48, 0, 0, 0, 0, 24, 0, 0, 96, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,132, 1, 48, 16, 6,192, 0, 8, 16, 0, 96, 0, 12,132, 1, 16, 0, 6, 0, 0, 8, 0, 0, 96, 0, 0,128, 0, 48, 0, 73,253,
|
||||
128,133, 0, 0, 32, 0,136, 16, 0, 18, 0, 0,128, 34, 0,176, 8, 70,194, 0, 24, 0, 0, 96, 0, 44, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0,136, 1,176, 0, 22,194, 0, 90, 64, 3, 97, 0, 44,128,137, 32, 0, 6, 0, 0, 8, 0, 0, 96, 0, 44,144, 0, 52, 0,160,249,
|
||||
160, 1, 0,128, 0, 0, 2, 2, 80, 35, 40, 1,140, 34, 0, 4,128, 0,208, 0,130, 0, 0, 8, 0, 1,128,137,132, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 80, 0, 34, 64,148, 4, 88, 0, 16, 0, 66, 1, 32, 0, 20, 32, 16,144, 36, 10, 0, 8, 0, 4, 1,160, 0, 0, 18,116,251,
|
||||
128, 1, 0, 0, 0, 0, 64, 0, 0, 3, 98, 16, 12, 0, 0, 48, 0, 0,192, 0, 0, 16, 0, 0, 0, 12, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,192, 64, 24, 4, 0, 2, 0, 0, 0, 0, 32, 0, 6, 2, 0, 0, 8,128, 96, 64, 0, 0,128, 0, 0,152,250,
|
||||
128,129, 0, 0, 0, 50, 0, 8, 0, 3, 88, 32, 15,128, 1, 0, 0, 6,240, 0, 8, 0, 0, 0, 64, 12,226, 1, 17, 0, 0, 0, 0, 0, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0,104, 0, 12,128, 1, 0, 64, 6,200, 3, 24, 0, 3, 96, 64, 28,128, 7, 0, 32, 24,196, 0,120, 0, 3,128, 1, 12, 0, 88,254,
|
||||
136, 1, 0, 0, 0, 16, 0, 16, 0, 19,108, 0, 13, 0, 68, 0, 4, 6,208, 0, 16, 33, 0, 0, 0, 44, 32, 16, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 4,128, 0,192, 2, 90, 64, 0, 10, 0, 1,160, 9, 36,128, 64, 1, 2, 16, 64, 0, 8, 20, 1, 0, 5, 5, 0,243,252,
|
||||
0, 4, 0, 0, 32,192,136, 16, 0, 1, 64, 0, 64, 0, 48,128, 0, 64,200, 0, 0, 0, 0, 0, 2, 0, 4, 0, 48, 0, 0, 0, 0, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0,130, 1, 0, 6, 0,200, 4,129, 0, 35, 96, 0, 12, 0, 4, 17, 0, 6, 0, 40, 16, 0, 11, 96, 0,140, 0, 1,176, 8,101,250,
|
||||
224, 1, 1,128, 1,228, 0, 10,192, 3, 41, 0, 3, 98, 0, 60,144, 1,224, 0, 10, 0, 0,120, 64, 3,224, 1, 52, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,197, 1, 9, 0, 1,112, 0, 28,208,131,112, 32, 15,226, 1, 44, 0, 0, 48, 0, 18,128, 3, 1, 0, 15, 36, 1, 60, 0,202,249,
|
||||
132, 1, 0, 0, 6,192, 0, 8, 0,131, 64, 0, 0, 0, 0, 48, 0, 0,196, 0, 0, 0, 0, 96, 64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0,128, 1, 48, 16, 6,192, 0, 0, 0, 0, 96, 0, 12,128,129, 16, 0, 0, 0, 32, 8, 0, 3, 0, 0, 12,128, 0, 48, 0,210,251,
|
||||
128, 41, 0, 0, 64,194, 0, 16, 0, 35, 32, 0, 0, 0, 40, 48, 34, 16,208, 0, 16, 0, 0, 96, 1, 32,136, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,134, 1,176, 0, 22,226,136,130, 66, 3, 97, 0, 12,128, 9, 36, 0, 6, 0, 4, 8, 0, 3, 96, 0, 12,128, 0, 48, 0, 80,251,
|
||||
48, 0, 0,128, 6,208, 68, 66, 64, 3, 0, 4, 69,128, 9, 52,128, 70,212, 0,130, 96, 2, 12, 0, 41,176, 8, 36, 2, 0, 0, 0, 0, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0,144, 0,208, 66, 64, 0, 16, 8, 0,128, 40, 0, 20, 4, 16, 16, 40, 10, 1, 8, 0, 4, 0,164, 8, 5, 0,240,253,
|
||||
128, 1, 0, 0, 6,192, 0, 0, 8, 3, 0, 16, 8,136, 65, 48, 0, 6,192, 0, 0, 0, 1, 0, 0, 8,128, 64, 0, 16, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 0, 0, 16, 0, 1, 0, 0,192, 0, 0, 4, 0, 2, 0, 0, 0, 0, 32, 0, 0, 2, 0, 0, 16,128, 0, 64, 0, 0, 0, 0, 0,216,252,
|
||||
96, 0, 0, 0, 0, 64, 0, 8, 0, 3, 58, 0, 4,224, 1, 60, 0, 0, 0, 0, 22, 0, 1, 96, 0, 4,128, 64, 44, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0,225,129, 60,136, 1, 64, 0, 30,200, 3, 24, 0, 3, 96, 64, 28,128, 5,240, 32, 24,196, 0, 88, 0, 15,128, 1, 0, 0, 32,255,
|
||||
44, 16, 2, 0, 0, 0,130, 16, 0, 35, 72, 0, 8,160, 1, 52, 8, 32, 1, 0, 10, 0, 11, 1, 17, 40, 8, 8, 4,145, 8, 0, 0, 0, 0, 0, 0, 64, 4, 0, 0, 0, 0, 0, 0, 42, 4, 4,129, 0,192,136, 66, 64, 8,106, 10, 1,160, 9, 36,128, 2,208, 4,144, 64, 0, 40, 0, 65, 8, 41, 0, 0,130,249,
|
||||
132, 1, 0, 0, 32,200, 8, 16, 0, 19, 48, 36, 4,128, 1, 48, 8, 0, 0, 64, 68, 0, 16, 1, 65, 4,136, 80, 8, 9, 0, 0, 0, 0, 0, 0, 0, 6, 0, 0, 0, 0, 0, 0, 0,128, 5, 48, 2, 22, 64, 24, 24, 8, 19, 0, 1,128, 1,144, 16, 0, 3, 0, 34, 16, 0, 35, 49, 0, 44, 0, 1, 0, 17,216,249,
|
||||
224, 1, 1,128, 1,176, 64, 10,192, 3, 65, 0, 11,192, 1, 56,128, 7, 50, 0, 16,208, 0,120, 0, 1, 96, 0, 48, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 61,136, 7,241, 0, 4,192,131,120, 16, 2,224, 1, 44, 0, 4,160, 0, 18,128, 3, 64, 0, 15, 34, 1, 12, 0, 0,251,
|
||||
4, 0, 0, 0, 0, 0, 0, 8, 0, 3, 66, 0, 4,128, 1, 52, 0, 2, 4, 0, 0, 0, 0, 1, 64, 4, 0, 0, 0,160, 4, 0, 0, 0, 0, 0, 0, 64, 2, 0, 0, 0, 0, 0, 0,162, 1, 0, 0, 6, 64, 0, 24, 0, 0, 96, 64, 12,132, 1, 17, 0, 4, 64, 32, 8, 0, 3, 64, 0, 0,128, 0, 48, 32,177,250,
|
||||
0,128, 0, 0, 0,196, 72, 16, 0, 16, 32, 0, 8,160, 1,132, 8, 68, 0, 40, 8, 0, 8, 96, 0, 0, 0,132,176, 0, 2, 0, 0, 0, 0, 0, 0, 2, 1, 0, 0, 0, 0, 0, 0,130,129, 48,144, 6,128, 32, 26, 96, 3, 97, 1, 44,128, 1, 32, 0, 2, 64, 8, 8, 0, 3, 32, 0, 44,144, 0,176, 0, 8,255,
|
||||
32, 4, 0,128, 0, 0, 2, 2, 67, 19, 0, 4, 1,160, 1, 4,128, 0,192, 68,130, 96, 0, 8, 0,129, 32, 0, 0,128, 0, 0, 0, 0, 0, 0, 0, 72, 0, 0, 0, 0, 0, 0, 0, 8, 8, 4,128, 0, 0,136, 74, 0, 16, 0, 66,129, 32, 0, 20,132, 2, 88, 40, 72, 0, 8, 40,128, 0,132, 16, 49, 2, 96,251,
|
||||
0, 64, 0, 0, 0, 0, 64, 0, 0, 3, 2, 16, 12,128, 1, 48, 0, 6, 0, 0, 0, 0, 0, 96, 0, 0, 2, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0,136, 0, 0, 0, 0, 0, 0, 0, 6, 0, 1, 0, 0, 0, 0, 16, 8, 0, 2, 0, 0, 8, 0, 32, 0, 0, 0, 0, 0, 8,128, 0, 0, 0, 0, 0, 0, 8,208,253,
|
||||
224, 0, 0, 0, 0, 48, 0, 8, 0, 2, 88, 32, 0,128, 1, 0, 16, 0,240, 0, 22, 0, 3, 0, 32, 11, 0, 64, 0, 0, 2, 0, 0, 0, 0, 0, 0, 2, 1, 0, 0, 0, 0, 0, 0,224,129, 12,128, 1, 48, 0, 8,208, 3, 24, 0, 4, 96, 64, 28, 0, 6,112, 32, 8,192, 0, 96, 0, 15,128, 0, 12, 32,200,250,
|
||||
36, 16, 2, 0, 0, 16, 0, 16, 0, 10, 44, 0, 0,129, 1, 0, 2, 16, 24, 2, 11, 0, 80, 0, 1, 5, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 10, 0, 0, 0, 0, 0, 0, 0, 41, 4, 4,128, 0, 16, 0,144, 64, 16, 9, 0,136,162, 9, 36, 0, 4, 17, 4, 0, 81, 0, 64, 17,129, 16,132, 4, 1,242,250,
|
||||
4, 0, 0, 0, 32,192, 0, 16, 0, 32, 48, 0, 64, 4, 4, 0, 65, 64, 2, 0, 4, 17, 35, 4, 64, 66,128, 9, 0, 0, 1, 0, 0, 0, 0, 0, 0,128, 0, 0, 0, 0, 0, 0, 0,128, 1,178, 0, 38,192, 68, 0, 17,147, 96, 1, 64, 0, 32, 16, 0, 4,192, 34, 0, 0, 35, 66, 0,140, 2, 0,128, 0,160,255,
|
||||
96, 0, 1,128, 1,226, 64, 10,192, 0, 65, 0, 15, 96, 0, 61,128, 7,240, 0, 16,192, 0,120, 0, 12, 98, 64, 0,128, 0, 0, 0, 0, 0, 0, 0, 72, 0, 0, 0, 0, 0, 0, 0, 65, 0, 60,136, 7,241, 0, 6,192, 3,112, 32, 15,232, 1, 44,128, 4, 96, 0, 16,128, 3, 72, 0, 15, 0, 1, 60, 32,112,249,
|
||||
4, 64, 0, 0, 6,192, 0, 8, 0, 1, 80, 0, 12,128,129, 48, 0, 6, 0, 0, 0, 0, 3, 96, 0, 0, 0, 64, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0,168,129, 48, 0, 6,192, 0, 0, 16, 0, 96, 0, 0,128, 1, 17, 0, 2, 64, 32, 0, 0, 3, 32, 0, 0, 0, 0, 48, 8,145,253,
|
||||
0, 8, 0, 0, 38,194, 0, 16, 0, 9, 33, 0, 76,132, 17, 48, 34, 70,196, 0, 8, 0, 35,100, 68, 12, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 20, 0, 0, 0, 0, 0, 0, 0,128, 1, 52,128, 6,192, 0, 80, 64, 3, 97, 0, 64,136, 17, 36, 0, 2, 64, 8, 16, 0, 3, 32, 0, 44, 16, 1, 48, 2, 24,250,
|
||||
48, 0, 37,130, 4, 0, 2, 2, 73, 0, 0, 4, 1,160, 1, 4,128, 0,192, 68,130, 8, 0, 8, 0, 1,128,137, 4, 0, 2, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 49, 0, 4, 0, 64,212, 0, 24, 0, 16, 8, 0,128,168, 1, 20,144, 66, 20, 0,128, 16, 8, 40, 68, 0, 4, 16, 48, 4, 92,249,
|
||||
0, 0, 16, 32, 2, 4, 64, 0, 0, 0, 0, 16, 0,128, 1, 48, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 48, 0, 0, 0, 0, 0, 0, 0, 0, 20, 0, 0, 0, 0, 0, 0, 0, 4, 0, 0, 0, 0,192, 0, 0, 16, 0, 2, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 0,128, 0, 0, 0, 0, 0, 49, 0, 96,250,
|
||||
96, 0, 32, 0, 4, 48, 0, 8, 0, 3, 90, 32, 3,128, 1, 0, 32, 0,240, 64, 8, 0, 0, 96, 0, 12,224,129, 0, 16, 2, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 96, 0, 12,128, 7,240, 0, 30,200,131, 24, 0, 3,224, 1, 28, 0, 6,240, 0, 6,192, 0, 96, 0, 15, 96, 0, 12, 0, 48,252,
|
||||
44, 16, 18, 0, 2, 16, 0, 16, 0, 8, 40, 0, 1,128, 1, 0, 1, 0, 16, 2, 16, 33, 0, 96, 0, 12, 32, 4, 48, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 40, 0, 4,128, 16,210, 0,130, 64, 16,104, 10, 1, 32, 4, 37, 0, 20,209, 0, 2, 64, 0, 64, 18,129, 36, 0, 4, 0, 27,254,
|
||||
4, 0, 32, 0, 4,192, 4, 17, 0, 11, 48, 0, 64,128, 9, 0, 33, 16, 4, 0, 0, 0, 0, 0,132, 12, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0,129, 17, 49, 1, 38,194, 0, 0, 0, 11, 0, 2, 0, 4, 64, 16, 0, 4,192, 32,152, 0, 99, 64, 0,140,132, 1,176, 32,173,248,
|
||||
96, 0, 29,128, 3,224, 0, 10,192, 0, 66, 0, 3,232,129, 60,128, 1,240, 0, 10, 0, 0, 24, 0, 13,224, 1, 12, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,224, 1, 60, 8, 1,224, 0, 30,192, 3,121, 16, 2, 96, 0, 44,128, 4,224, 0, 28,132, 3, 72, 0, 15,192, 65, 60, 0, 50,250,
|
||||
16, 0, 32, 0, 4,192, 0, 8, 0, 3, 81, 0, 12, 0, 0, 48, 0, 6, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 48, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 1, 48, 0, 6,192, 0, 0, 0, 0, 96, 32, 12,132, 1, 16, 0, 2, 0, 32, 24, 0, 3, 32, 0, 0,128, 1, 48, 32,226,249,
|
||||
32,133, 16, 0, 2,192, 0, 16, 0, 35, 32, 0,140, 4, 8, 50, 34, 70,196, 0, 16, 0, 0, 0,129, 0,128, 1,128, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 1, 52, 0, 38,212, 0, 24, 64, 3, 97, 2, 44,128, 33, 32, 0, 2, 0, 0, 24, 0, 3, 32, 0, 44,144, 1, 48, 0,176,253,
|
||||
32, 0, 5, 0, 0, 2, 2,136, 72, 9, 0, 4, 1,160, 1, 4,128, 34,193, 68, 18, 1, 0, 8, 0, 65,132,137, 4, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,160, 1, 4, 0, 0,210, 0, 2, 64, 0, 0, 66, 37, 34, 0, 0,128, 34, 18, 40,128, 16, 8, 40, 34, 1, 0, 16, 0, 18,232,255,
|
||||
0, 0, 0, 0, 0, 0, 64, 0, 0,130, 32, 16, 0,128, 1, 0, 0, 4, 0, 0, 0, 4, 0, 96, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,192, 0, 0, 0, 0, 0, 0, 12, 0, 0, 0, 0, 0,192, 0, 0, 0,128, 0, 0, 0, 0, 0, 1, 0, 88,254,
|
||||
0, 0, 0,128, 1,240, 0, 8, 0, 1, 24, 0, 12, 0, 0, 60, 0, 2,240, 0, 22, 0, 0, 0, 0, 4,224, 1, 32, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 0, 0,228, 1, 13,128, 7,241, 0, 24,192, 3,120, 0, 12, 96, 0, 0, 0, 6, 48, 32, 6,192, 0, 96, 0, 3, 96, 0, 12, 0, 72,248,
|
||||
8, 72, 0,128, 0,208, 0, 0, 33, 18, 41, 18, 12, 0, 0, 4, 8, 36, 18,130,130, 4, 0, 0, 66, 8, 32, 32,128, 8, 4, 0, 0, 0, 0, 0, 0, 16, 2, 0, 0, 0, 0, 0, 0, 40, 4, 4,128, 16,208, 0, 24, 64, 3,104, 0, 72, 40, 0, 0, 0, 36,209, 4, 2, 64, 0, 64, 16, 1, 32, 0, 4, 0,218,251,
|
||||
0, 16, 48, 17, 70,192, 0, 0, 0, 33, 48, 0, 76, 0, 4, 50, 8, 18, 0, 0, 4, 2, 0, 0, 2, 12, 0, 0, 0, 2, 2, 0, 0, 0, 0, 0, 0, 24, 1, 0, 0, 0, 0, 0, 0, 12, 32, 48, 18, 6, 0, 40, 88, 0, 3, 97, 0,140,144, 9, 0, 0, 4,192, 34,152, 4, 67, 64, 0, 76,128, 17,176, 8, 24,249,
|
||||
96,128, 60, 0, 7,226, 32, 16,192,130, 64, 0, 15,104, 0, 56,128, 5,241, 0, 24, 0, 0,120, 32, 13,224, 1, 12, 8, 4, 0, 0, 0, 0, 0, 0, 16, 2, 0, 0, 0, 0, 0, 0,104, 0, 60,128, 7, 49, 0, 30,208, 3,112, 64, 11,224,129, 0,128, 4, 32, 0, 28,128, 3, 72, 0, 15,200, 65, 60, 0,248,248,
|
||||
4, 0, 0, 0, 6, 0, 32, 0, 0, 3, 34, 0, 0,128, 1, 48, 0, 6, 4, 0, 0, 0, 0, 96, 0, 0, 0, 0, 32,128, 6, 0, 0, 0, 0, 0, 0, 88, 3, 0, 0, 0, 0, 0, 0,140, 1, 48, 0, 0, 0, 0, 0, 4, 0, 1, 16, 4,128, 1, 0, 0, 2, 64, 32, 24, 0, 3, 32, 0, 12,128, 1, 48, 0,225,250,
|
||||
0, 17, 1, 34, 6, 0, 4, 16, 0, 18, 64, 0,128,130, 65,176, 8, 68,192, 0, 24, 0, 0, 96, 68, 0,128, 1,128, 32, 4, 0, 0, 0, 0, 0, 0, 8, 2, 0, 0, 0, 0, 0, 0,132,145, 52, 0, 6, 2, 0, 0, 0, 32, 0, 2,136,136, 1, 0, 0, 2, 0, 8, 24, 0, 3, 32, 0, 12,128, 1, 48, 0,200,249,
|
||||
16, 0, 0, 0, 4, 0, 0, 0, 17, 0, 0, 0, 0, 0, 1, 32, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 48, 0, 0, 0, 0, 0, 16, 0, 2, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,172,251,
|
||||
0, 0, 4, 0, 0, 16, 0, 2, 64, 0, 8, 0, 1, 0, 0, 0,144, 0, 16, 0, 2, 64, 0, 0, 0, 1, 32, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 33, 0, 4,128, 0, 0, 0, 0, 0, 0, 8, 0, 0, 32, 0, 4,128, 0, 16, 0, 2, 64, 0, 8, 0, 0, 32, 0, 4, 0,200,252,
|
||||
4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,232,251,
|
||||
40, 16, 5,128, 0, 16, 0, 2, 64, 0, 8, 0, 1, 32, 0, 0,128, 0, 16,132, 2, 64, 0, 8, 0, 1, 32, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4,192, 0, 16,130, 2, 64, 0, 8, 0,129, 36, 0, 4,128, 0, 16, 0, 2, 64, 0, 8, 0,129, 40, 0, 4, 34, 3,249,
|
||||
8, 0, 0, 0, 16, 4, 2, 0, 1, 0, 0, 0, 0, 0, 80, 0, 0, 0, 0, 0, 65, 8, 0, 0, 18, 32, 4, 0,128, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,136,128, 32,192, 0, 32, 0, 3, 0, 0, 36, 32, 8, 0, 0, 0, 64, 2, 2, 0, 9, 32, 4, 36, 0, 0,144, 0, 0,145,248,
|
||||
0, 0, 4, 0, 0, 0, 32, 0, 80, 0, 0, 64, 0, 8, 0, 0,136, 0, 16, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,202,248,
|
||||
4, 1, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 8, 0, 0, 0, 32, 0, 0,128, 0, 0, 2, 0, 0, 0, 8, 0, 1, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 32, 0, 4,128, 0, 0, 16, 0, 65, 0, 8, 0, 1, 0, 0, 4, 0, 0, 16, 0, 0, 64, 0, 8, 0, 1, 32, 0, 50,250,
|
||||
32, 0, 4, 0, 32, 8, 4, 1, 81, 0, 8, 0, 1, 0,132, 0,128, 0, 0, 4, 0, 72, 0, 0, 65,128, 32, 8, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 0,128, 64, 0, 8, 0, 0, 32, 0, 4,146, 0, 0, 66, 2, 0, 32, 10, 0, 1, 32, 0, 4, 0, 20,253,
|
||||
0, 1, 0, 16, 4, 0, 0, 0, 32, 0, 4, 0, 8, 0, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 2,144, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 4, 0, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16, 0, 0, 0, 0,208,250,
|
||||
0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 2, 16, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,184,255,
|
||||
0, 4, 0, 0,128, 0, 1, 9,128, 0, 0, 1, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,176,254,
|
||||
0, 2, 2, 0, 0, 0, 0, 8, 0, 0, 0,128, 4, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,130, 0, 0, 0, 64, 0, 0, 0, 0, 0, 8, 0, 0, 64, 0, 0, 4, 0, 0, 0, 18, 1, 0, 0, 0, 32, 0, 1, 0,100,255,
|
||||
0, 0, 0, 0, 0, 64, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 8, 0, 0, 0, 0, 4, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0,128, 0, 16, 0,128, 0, 0, 8, 0, 0, 16, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 0, 0, 80,254,
|
||||
2, 0, 0, 0, 0, 0, 0, 0, 0, 66, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 64, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0,128, 0, 0, 0, 0, 0, 0, 0, 16, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 0, 0, 0, 0, 0, 0, 0, 0,168,254,
|
||||
0, 0, 8, 0, 2, 68, 32, 0, 2, 1, 16, 16, 4, 0, 1, 1, 0, 2, 2,128, 0, 0, 0, 32, 0, 0, 2, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 0, 0, 0, 32, 0, 0, 0, 64, 16, 0, 2, 17,128, 8, 4, 0, 9, 16, 4, 2,128, 16, 8,201,254,
|
||||
0, 1, 0, 0, 1,129, 0, 0, 0, 0, 1, 0, 8, 8, 0, 0, 0, 0, 64, 32, 4, 0, 1, 0, 0, 0, 1, 0, 4, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 16, 0, 0, 0, 0, 0, 2, 1, 64, 0, 0, 0, 0, 32, 0, 4, 0, 0, 0, 0,128, 32, 0, 2, 64, 0, 0, 0,136,249,
|
||||
32, 0, 8,128, 1, 54, 64, 0,136, 0, 18, 48, 43,200,131, 0, 0,193, 18,192, 2, 68, 0, 16, 0, 0, 12, 40, 4, 48, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 5, 0,160, 32, 0, 0, 80, 0, 24, 0, 4, 0,133, 12,133, 1, 34, 64, 4, 8, 0, 27, 32, 3, 36,181, 8, 16, 80,249,
|
||||
0, 65, 32, 4, 6,196, 48, 16, 6,235, 72,188,133, 10, 23, 81,142,154,192, 32,144, 4,110, 96, 1, 72,128, 0, 33, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32,196, 42,160, 68, 0, 4, 16,160, 32, 64, 28, 41, 56, 36, 9, 6, 97, 0, 40, 4,128, 32, 24, 36, 33,119,128, 10,176,250,
|
||||
0, 64, 0, 0, 2, 64, 32, 0, 4,129, 0, 16, 4, 2, 0, 16, 8, 2, 32, 32, 0, 16, 0, 16, 0, 0,128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 64, 0, 0, 0,128, 32, 0, 2, 0, 0, 0, 16, 2, 17, 0, 8, 4,128, 16, 16, 4, 0,128, 0, 8, 40,253,
|
||||
72, 0, 32, 16, 4, 16,128, 16, 8, 2, 33, 64, 0,128, 0, 0, 32, 0, 17, 0, 2, 0,129, 32, 0, 1, 0, 0, 16, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 4, 1, 64, 8, 0, 4, 0, 0, 0, 0, 0, 0, 64, 0, 65, 64, 0, 0,109,248,
|
||||
0, 0, 0, 0, 1, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 32, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 64, 0, 64, 0, 0, 1, 0, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,200,255,
|
||||
0, 0, 0, 0, 0,128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0,128, 0, 0, 0, 0, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0, 0, 0, 4, 0, 0, 0, 0, 16, 16, 0, 0, 0, 0, 0, 12, 0, 0, 0, 0, 0, 0, 0, 0, 4, 0, 0, 2, 0, 0, 0, 0,144,248,
|
||||
0, 2, 0, 0, 0, 0, 0, 64, 0, 0, 2, 0, 0, 0, 0, 4, 0, 0, 32, 0, 32, 0, 0, 0, 1, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 0, 2, 0, 0, 0, 64, 0, 0, 0, 0, 16,136,255,
|
||||
0, 0, 0, 0, 0, 0, 2, 0, 0, 1, 0, 0, 0, 32, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 1, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0,128, 0, 16, 32, 0, 0, 0, 64,192, 0, 32, 0,128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64,249,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 96, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,240,250,
|
||||
0, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,128, 0, 0, 0, 0, 2, 0, 0, 0,128, 16, 0, 0, 0, 0, 0, 0, 1, 0, 0, 4, 0, 0, 16, 0, 0, 64, 4, 0, 32,232,249,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 16, 0, 0, 4, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 0, 0, 0, 8, 8, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,152,252,
|
||||
16, 0, 0, 0, 2, 0, 0, 0, 64, 0, 0, 0, 0, 0, 1,128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16, 32, 0, 0, 0,128, 0, 0, 0, 0, 1, 0, 0, 0, 64, 0, 0,216,250,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0,128, 0, 0, 1, 0, 0, 0, 0,128, 0, 0, 0, 0, 1, 64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 64, 96, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 80,249,
|
||||
0, 0, 0, 0,128, 8, 0, 0, 0, 0, 17, 0, 0, 0, 0, 0, 0, 4, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0,192, 0, 0, 0, 16, 0, 0, 0, 64, 0, 0, 1, 0, 1, 0, 16, 0, 8,255,
|
||||
8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 2, 0, 0, 0,128, 0, 0, 0, 0, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8,253,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 64, 0, 0, 0,128, 0, 2, 0, 0, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0,128, 0, 0,248,251,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 1, 0, 0, 0, 1, 0, 0, 0, 64, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4,240,255,
|
||||
0, 1, 0, 0, 0, 0, 0, 0,128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,254,
|
||||
0, 0, 0, 0, 0, 18, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0,128, 0, 16,252,
|
||||
0, 0, 0, 0, 8, 0, 0, 64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 2, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 33, 0, 0, 16,254,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 16, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 1, 0, 0, 0, 0,128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0,184,253,
|
||||
64, 0, 0, 0, 0, 1, 32, 0, 0, 0, 0, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 2, 0, 0, 8, 2, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 56,248,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 0, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0,114,249,
|
||||
16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0, 0,128, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,160,251,
|
||||
0, 0, 0, 0, 24, 0, 0, 2, 0, 0, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0, 64, 0, 0, 0,128, 32, 0, 0,128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 64, 0, 0, 0, 8, 0, 0, 0, 0, 0,252,
|
||||
0, 0, 0,128, 0, 64, 0, 1, 0,128, 0, 0, 0,128, 0, 0, 4, 0, 32, 0, 68, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0,128, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 32, 0, 0, 32, 0, 0, 4, 2, 0, 0,240,248,
|
||||
0, 64, 0, 8, 0, 1, 0, 0, 0, 0, 0, 16, 0, 2, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0, 64, 0, 8, 0, 0, 0,128, 4, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 18, 0, 0,136,248,248,
|
||||
0,128, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0,253,
|
||||
0, 0, 0, 16, 0, 65, 32, 0, 0, 2, 0, 0, 0, 0, 0, 32, 8, 2,129, 0, 8, 0, 0, 64, 16, 0,136, 32, 16, 8, 0, 0, 0, 8, 4, 64, 0, 0, 0, 0, 0, 4, 2, 0, 0,128, 0, 0, 0, 0, 0, 0, 8,128, 0, 0, 0, 4, 2, 64, 16, 0, 0, 17,128, 16, 16,129, 0, 16, 0,136, 64, 0, 0, 13,249,
|
||||
26, 64, 0, 0, 0,128, 16, 0, 8, 0, 32, 0, 4, 2, 0, 16, 32, 0, 64, 32, 0, 2, 1, 17, 0, 1, 0, 0, 0, 0, 0, 0, 0, 8, 4, 64, 64, 0, 0, 0, 0, 0, 2, 32, 16, 0, 0, 32, 8, 2, 0, 0, 2, 0,128, 0, 0, 0,128, 0, 0, 0,132, 0, 0, 0, 0, 0, 0, 0, 0, 68,128, 4, 16, 56,252,
|
||||
0, 3,161, 16, 20, 50,192, 0,144, 1,200, 0, 41, 8, 40, 12, 48,161, 50,128, 4, 84, 0, 26, 32, 1, 68,168, 8, 22, 0, 0, 0, 24, 6,192, 32, 0, 0, 0, 0, 8, 3, 32, 16, 64, 40, 4,160, 0,128, 26,134,130, 0, 66, 17,170, 53,240, 8,128, 0, 38, 64, 52,136, 6, 1, 32, 0,108,128, 21, 37, 0,254,
|
||||
0,160, 34, 14, 2, 65, 32, 34, 4,231,160, 80, 56,129, 97, 4, 4, 98, 65, 4,144, 2, 14, 66, 10, 0, 1,129,146, 8, 0, 0, 0, 8, 4, 0, 32, 0, 0, 0, 0, 4, 1, 96, 8,160, 0, 1, 8,130, 0, 16, 16, 0, 48, 69, 24, 1,164, 8, 69, 32,132, 65, 16, 2, 5,225,168, 16, 4,130, 0, 16, 12,144,255,
|
||||
0, 0, 0, 4, 2, 65, 32, 0, 4,129, 32, 16, 0, 32, 64, 0, 0, 2, 65, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 4, 0, 0, 0, 4, 8, 0, 32, 0, 0, 0, 0, 4, 0, 16, 0, 64, 0, 0, 32, 2, 0, 0, 0, 0, 0, 0, 8, 0,128, 0, 0, 0, 0, 20, 0, 0, 4, 1, 66, 32, 8,132, 0, 16, 16,144,250,
|
||||
0, 0, 17, 8, 0, 0, 0, 0,128, 0, 1, 0, 4,130, 0, 1, 8, 0, 0, 0, 16, 4, 1, 32, 16, 0, 66, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 32, 16, 0, 0, 0, 0, 0, 2, 32, 8, 0, 0, 32, 16, 0, 0, 0, 0, 0, 1, 2, 16, 0, 0,128, 0, 0, 0, 0, 0, 0, 8,152,248,
|
||||
0, 0, 0, 0, 0, 0, 32, 0, 0, 8, 0, 0, 0, 0, 0, 0, 8, 0, 5, 0, 0, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0,132, 0, 0, 0, 2, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,152,253,
|
||||
2, 64, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 16, 0, 0, 0, 0,128,128, 0, 0, 0, 0, 0, 16, 0, 0, 0, 32, 0, 4, 0, 0, 8, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 48,252,
|
||||
4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 8, 0, 8, 0, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 16, 0, 73,251,
|
||||
32, 0, 0, 0, 0, 0, 0, 4, 32, 0, 0, 8, 0, 0, 0, 0, 64, 17, 0, 0, 0, 0, 1,128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16, 2, 0, 0, 0, 0, 0, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0,208,255,
|
||||
10, 0, 0, 0, 0,132,128, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 32, 0, 4, 0, 0, 0, 0, 0, 0, 1, 2, 0, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 0,128, 0, 0, 0, 0, 0, 0,128, 10,251,
|
||||
8, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 64,128, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0,240,249,
|
||||
0, 0, 0,128, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 4, 8, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,248,251,
|
||||
2, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 64, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 1, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 0,200,248,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 32, 0,162, 0, 0, 0, 0, 0, 2, 0, 2, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 36, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0,128, 0, 0,184,249,
|
||||
0, 0, 0, 0, 0, 0, 1, 16, 0, 0, 0, 32, 0, 4, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 32, 0, 0, 0, 64, 0, 0, 0, 40, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 2, 0, 0, 16, 0, 0, 0,216,248,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0, 2, 2, 0, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,248,253,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 4, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0, 0, 32, 0, 1, 0, 32, 1, 0, 0, 0,128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 8,104,248,
|
||||
0, 64, 4, 0, 0, 0, 0, 64, 0, 8, 2, 65, 33, 0,104, 0, 8, 0, 4, 0, 0, 0, 0, 8, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 4, 16,128, 16, 16, 0,200, 64, 0, 32, 1, 36,128, 4,132, 0, 16, 17, 2, 0, 0,128, 64, 0, 4, 0, 0,132, 0, 48,255,
|
||||
0, 1, 32, 0,129,192, 0, 18, 0, 2, 64, 1, 8, 0, 33, 32, 0, 0,192, 0, 24, 0,128, 64, 0, 8, 32, 1, 32, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 4, 0, 0, 20, 2, 2, 64, 0, 8, 0, 0, 32, 0, 4,128, 0, 16, 26, 2, 72, 8, 8, 0, 65, 0, 0, 96,249,
|
||||
0, 0, 0, 0, 0, 0, 0, 16, 0, 2,128, 0, 8, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 0, 0, 16, 2, 0, 64, 0, 8, 0, 0, 32, 0, 4,128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 48,255,
|
||||
0, 2, 0, 0, 0, 0, 1, 4,128, 0, 0, 0, 2, 0,130, 64, 0, 0, 0, 1, 32, 0, 0,128, 0, 16, 0, 2, 64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 1, 0, 0, 4,136, 0, 16, 0, 2, 0, 0, 8, 0, 1, 32, 0, 32, 1, 4,128, 0, 0, 0, 0, 8, 0, 32,251,
|
||||
0, 20,192, 2,120, 0, 10, 40, 1, 37, 0, 5,148, 0, 84,128, 2, 88, 0, 10, 64, 1, 44, 0, 5,160, 0, 20,128, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 22,128, 2, 74,128, 11, 40, 5, 36,160, 4,148, 0, 22, 80, 2, 74, 64, 9,192, 0, 40, 0, 7,176, 0, 22, 64, 2, 8,252,
|
||||
160, 12,144, 1, 50, 97, 6,216, 0, 27, 48, 3,108,160,108,148, 1, 50, 80, 6,202, 0, 25, 40, 3,102,192, 12,152, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,192, 8,152, 1, 54, 64, 6,216, 70, 26, 96, 3,108,128, 12,176, 1, 54,192, 6,202,140, 25, 40, 19,100,128, 12,176, 1,168,253,
|
||||
255,255
|
||||
BIN
src/altera/acex/STREAM.303
Normal file
BIN
src/altera/acex/STREAM.303
Normal file
Binary file not shown.
BIN
src/altera/acex/STREAM.304
Normal file
BIN
src/altera/acex/STREAM.304
Normal file
Binary file not shown.
BIN
src/altera/acex/STREAM.BIN
Normal file
BIN
src/altera/acex/STREAM.BIN
Normal file
Binary file not shown.
BIN
src/altera/acex/STREAM.GS
Normal file
BIN
src/altera/acex/STREAM.GS
Normal file
Binary file not shown.
29
src/altera/acex/clean.cmd
Normal file
29
src/altera/acex/clean.cmd
Normal file
@ -0,0 +1,29 @@
|
||||
@echo off
|
||||
|
||||
del *.txt
|
||||
del *.bak
|
||||
del *.cnf
|
||||
del *.db?
|
||||
|
||||
del *.hif
|
||||
del *.mmf
|
||||
del *.mtf
|
||||
del *.mtb
|
||||
del *.hex
|
||||
del *.ndb
|
||||
del *.pin
|
||||
del *.pof
|
||||
del *.snf
|
||||
del *.fit
|
||||
|
||||
del *.SCF
|
||||
del *.ACF
|
||||
del *.TDF
|
||||
del *.INC
|
||||
del *.MIF
|
||||
|
||||
del *.log
|
||||
del *.rpt
|
||||
del *.sof
|
||||
del *.ttf
|
||||
del *.bin
|
||||
28
src/altera/acex/clean_vs.cmd
Normal file
28
src/altera/acex/clean_vs.cmd
Normal file
@ -0,0 +1,28 @@
|
||||
@echo off
|
||||
|
||||
del *.txt
|
||||
del *.bak
|
||||
del *.cnf
|
||||
del *.db?
|
||||
|
||||
del *.hif
|
||||
del *.mmf
|
||||
del *.mtf
|
||||
del *.mtb
|
||||
del *.hex
|
||||
del *.ndb
|
||||
del *.pin
|
||||
del *.pof
|
||||
del *.snf
|
||||
del *.fit
|
||||
|
||||
del *.SCF
|
||||
del *.ACF
|
||||
del *.TDF
|
||||
del *.INC
|
||||
del *.MIF
|
||||
|
||||
del *.log
|
||||
del *.rpt
|
||||
del *.sof
|
||||
del *.bin
|
||||
4
src/altera/acex/compile.log
Normal file
4
src/altera/acex/compile.log
Normal file
@ -0,0 +1,4 @@
|
||||
06.07.2022 05:20: [1/2] ALTERA ACEX-K30 STREAM
|
||||
transform ttf-file to binary
|
||||
Copyright (c) 2021 Sprinter Team
|
||||
transform done.
|
||||
568
src/altera/acex/k30/ACCELER.ACF
Normal file
568
src/altera/acex/k30/ACCELER.ACF
Normal file
@ -0,0 +1,568 @@
|
||||
--
|
||||
-- Copyright (C) 1988-2000 Altera Corporation
|
||||
-- Any megafunction design, and related net list (encrypted or decrypted),
|
||||
-- support information, device programming or simulation file, and any other
|
||||
-- associated documentation or information provided by Altera or a partner
|
||||
-- under Altera's Megafunction Partnership Program may be used only to
|
||||
-- program PLD devices (but not masked PLD devices) from Altera. Any other
|
||||
-- use of such megafunction design, net list, support information, device
|
||||
-- programming or simulation file, or any other related documentation or
|
||||
-- information is prohibited for any other purpose, including, but not
|
||||
-- limited to modification, reverse engineering, de-compiling, or use with
|
||||
-- any other silicon devices, unless such use is explicitly licensed under
|
||||
-- a separate agreement with Altera or a megafunction partner. Title to
|
||||
-- the intellectual property, including patents, copyrights, trademarks,
|
||||
-- trade secrets, or maskworks, embodied in any such megafunction design,
|
||||
-- net list, support information, device programming or simulation file, or
|
||||
-- any other related documentation or information provided by Altera or a
|
||||
-- megafunction partner, remains with Altera, the megafunction partner, or
|
||||
-- their respective licensors. No other licenses, including any licenses
|
||||
-- needed under any third party's intellectual property, are provided herein.
|
||||
--
|
||||
CHIP acceler
|
||||
BEGIN
|
||||
DEVICE = EP1K30QC208-3;
|
||||
END;
|
||||
|
||||
DEFAULT_DEVICES
|
||||
BEGIN
|
||||
AUTO_DEVICE = EP1K100FC484-1;
|
||||
AUTO_DEVICE = EP1K100FC256-1;
|
||||
AUTO_DEVICE = EP1K100QC208-1;
|
||||
AUTO_DEVICE = EP1K50FC484-1;
|
||||
AUTO_DEVICE = EP1K50FC256-1;
|
||||
AUTO_DEVICE = EP1K50QC208-1;
|
||||
AUTO_DEVICE = EP1K50TC144-1;
|
||||
AUTO_DEVICE = EP1K30FC256-1;
|
||||
AUTO_DEVICE = EP1K30QC208-1;
|
||||
AUTO_DEVICE = EP1K30TC144-1;
|
||||
ASK_BEFORE_ADDING_EXTRA_DEVICES = ON;
|
||||
END;
|
||||
|
||||
TIMING_POINT
|
||||
BEGIN
|
||||
DEVICE_FOR_TIMING_SYNTHESIS = EP1K30QC208-3;
|
||||
FREQUENCY = 200MHz;
|
||||
MAINTAIN_STABLE_SYNTHESIS = OFF;
|
||||
CUT_ALL_CLEAR_PRESET = ON;
|
||||
CUT_ALL_BIDIR = ON;
|
||||
END;
|
||||
|
||||
IGNORED_ASSIGNMENTS
|
||||
BEGIN
|
||||
FIT_IGNORE_TIMING = OFF;
|
||||
DEMOTE_SPECIFIC_LCELL_ASSIGNMENTS_TO_LAB_ASSIGNMENTS = OFF;
|
||||
IGNORE_LOCAL_ROUTING_ASSIGNMENTS = OFF;
|
||||
IGNORE_DEVICE_ASSIGNMENTS = OFF;
|
||||
IGNORE_LC_ASSIGNMENTS = OFF;
|
||||
IGNORE_PIN_ASSIGNMENTS = OFF;
|
||||
IGNORE_CHIP_ASSIGNMENTS = OFF;
|
||||
IGNORE_TIMING_ASSIGNMENTS = OFF;
|
||||
IGNORE_LOGIC_OPTION_ASSIGNMENTS = OFF;
|
||||
IGNORE_CLIQUE_ASSIGNMENTS = OFF;
|
||||
END;
|
||||
|
||||
GLOBAL_PROJECT_DEVICE_OPTIONS
|
||||
BEGIN
|
||||
MAX7000B_ENABLE_VREFB = OFF;
|
||||
MAX7000B_ENABLE_VREFA = OFF;
|
||||
MAX7000B_VCCIO_IOBANK2 = 3.3V;
|
||||
MAX7000B_VCCIO_IOBANK1 = 3.3V;
|
||||
CONFIG_EPROM_PULLUP_RESISTOR = ON;
|
||||
CONFIG_EPROM_USER_CODE = FFFFFFFF;
|
||||
FLEX_CONFIGURATION_EPROM = AUTO;
|
||||
MAX7000AE_ENABLE_JTAG = ON;
|
||||
MAX7000AE_USER_CODE = FFFFFFFF;
|
||||
FLEX6000_USE_LOW_VOLTAGE_CONFIGURATION_EPROM = OFF;
|
||||
FLEX10KA_USE_LOW_VOLTAGE_CONFIGURATION_EPROM = ON;
|
||||
FLEX10K_USE_LOW_VOLTAGE_CONFIGURATION_EPROM = OFF;
|
||||
FLEX6000_ENABLE_JTAG = OFF;
|
||||
CONFIG_SCHEME_FLEX_6000 = PASSIVE_SERIAL;
|
||||
MULTIVOLT_IO = OFF;
|
||||
MAX7000S_ENABLE_JTAG = ON;
|
||||
FLEX10K_ENABLE_LOCK_OUTPUT = OFF;
|
||||
MAX7000S_USER_CODE = FFFF;
|
||||
CONFIG_SCHEME_10K = PASSIVE_SERIAL;
|
||||
FLEX10K_JTAG_USER_CODE = 7F;
|
||||
ENABLE_INIT_DONE_OUTPUT = OFF;
|
||||
ENABLE_CHIP_WIDE_OE = OFF;
|
||||
ENABLE_CHIP_WIDE_RESET = OFF;
|
||||
nCEO = UNRESERVED;
|
||||
CLKUSR = UNRESERVED;
|
||||
ADD17 = UNRESERVED;
|
||||
ADD16 = UNRESERVED;
|
||||
ADD15 = UNRESERVED;
|
||||
ADD14 = UNRESERVED;
|
||||
ADD13 = UNRESERVED;
|
||||
ADD0_TO_ADD12 = UNRESERVED;
|
||||
SDOUT = RESERVED_DRIVES_OUT;
|
||||
RDCLK = UNRESERVED;
|
||||
RDYnBUSY = UNRESERVED;
|
||||
nWS_nRS_nCS_CS = UNRESERVED;
|
||||
DATA1_TO_DATA7 = UNRESERVED;
|
||||
DATA0 = RESERVED_TRI_STATED;
|
||||
FLEX8000_ENABLE_JTAG = OFF;
|
||||
CONFIG_SCHEME = ACTIVE_SERIAL;
|
||||
DISABLE_TIME_OUT = OFF;
|
||||
ENABLE_DCLK_OUTPUT = OFF;
|
||||
RELEASE_CLEARS = OFF;
|
||||
AUTO_RESTART = OFF;
|
||||
USER_CLOCK = OFF;
|
||||
SECURITY_BIT = OFF;
|
||||
RESERVED_PINS_PERCENT = 0;
|
||||
RESERVED_LCELLS_PERCENT = 0;
|
||||
END;
|
||||
|
||||
GLOBAL_PROJECT_SYNTHESIS_ASSIGNMENT_OPTIONS
|
||||
BEGIN
|
||||
STYLE = FAST;
|
||||
DEVICE_FAMILY = ACEX1K;
|
||||
MULTI_LEVEL_SYNTHESIS_MAX9000 = ON;
|
||||
AUTO_IMPLEMENT_IN_EAB = OFF;
|
||||
AUTO_OPEN_DRAIN_PINS = ON;
|
||||
ONE_HOT_STATE_MACHINE_ENCODING = OFF;
|
||||
AUTO_REGISTER_PACKING = OFF;
|
||||
AUTO_FAST_IO = OFF;
|
||||
AUTO_GLOBAL_OE = ON;
|
||||
AUTO_GLOBAL_PRESET = ON;
|
||||
AUTO_GLOBAL_CLEAR = ON;
|
||||
AUTO_GLOBAL_CLOCK = ON;
|
||||
MULTI_LEVEL_SYNTHESIS_MAX5000_7000 = OFF;
|
||||
OPTIMIZE_FOR_SPEED = 5;
|
||||
END;
|
||||
|
||||
COMPILER_PROCESSING_CONFIGURATION
|
||||
BEGIN
|
||||
USE_QUARTUS_FITTER = ON;
|
||||
PRESERVE_ALL_NODE_NAME_SYNONYMS = OFF;
|
||||
FITTER_SETTINGS = NORMAL;
|
||||
SMART_RECOMPILE = OFF;
|
||||
GENERATE_AHDL_TDO_FILE = OFF;
|
||||
RPT_FILE_USER_ASSIGNMENTS = ON;
|
||||
RPT_FILE_LCELL_INTERCONNECT = ON;
|
||||
RPT_FILE_HIERARCHY = ON;
|
||||
RPT_FILE_EQUATIONS = ON;
|
||||
LINKED_SNF_EXTRACTOR = OFF;
|
||||
OPTIMIZE_TIMING_SNF = OFF;
|
||||
TIMING_SNF_EXTRACTOR = ON;
|
||||
FUNCTIONAL_SNF_EXTRACTOR = OFF;
|
||||
DESIGN_DOCTOR_RULES = EPLD;
|
||||
DESIGN_DOCTOR = OFF;
|
||||
END;
|
||||
|
||||
COMPILER_INTERFACES_CONFIGURATION
|
||||
BEGIN
|
||||
NETLIST_OUTPUT_TIME_SCALE = 0.1ns;
|
||||
EDIF_INPUT_SHOW_LMF_MAPPING_MESSAGES = OFF;
|
||||
EDIF_BUS_DELIMITERS = [];
|
||||
EDIF_FLATTEN_BUS = OFF;
|
||||
EDIF_OUTPUT_FORCE_0NS_DELAYS = OFF;
|
||||
EDIF_OUTPUT_INCLUDE_SPECIAL_PRIM = OFF;
|
||||
EDIF_OUTPUT_MAP_ILLEGAL_CHAR = OFF;
|
||||
EDIF_OUTPUT_DELAY_CONSTRUCTS = EDO_FILE;
|
||||
EDIF_OUTPUT_USE_EDC = OFF;
|
||||
EDIF_INPUT_USE_LMF2 = OFF;
|
||||
EDIF_INPUT_USE_LMF1 = OFF;
|
||||
EDIF_OUTPUT_GND = GND;
|
||||
EDIF_OUTPUT_VCC = VCC;
|
||||
EDIF_INPUT_GND = GND;
|
||||
EDIF_INPUT_VCC = VCC;
|
||||
EDIF_OUTPUT_EDC_FILE = *.edc;
|
||||
EDIF_INPUT_LMF2 = *.lmf;
|
||||
EDIF_INPUT_LMF1 = *.lmf;
|
||||
VHDL_GENERATE_CONFIGURATION_DECLARATION = OFF;
|
||||
VHDL_OUTPUT_DELAY_CONSTRUCTS = VHO_FILE;
|
||||
VERILOG_OUTPUT_DELAY_CONSTRUCTS = VO_FILE;
|
||||
VHDL_FLATTEN_BUS = OFF;
|
||||
VERILOG_FLATTEN_BUS = OFF;
|
||||
EDIF_TRUNCATE_HIERARCHY_PATH = OFF;
|
||||
VHDL_TRUNCATE_HIERARCHY_PATH = OFF;
|
||||
VERILOG_TRUNCATE_HIERARCHY_PATH = OFF;
|
||||
VERILOG_OUTPUT_MAP_ILLEGAL_CHAR = OFF;
|
||||
VHDL_WRITER_VERSION = VHDL87;
|
||||
VHDL_READER_VERSION = VHDL87;
|
||||
SYNOPSYS_MAPPING_EFFORT = MEDIUM;
|
||||
SYNOPSYS_BOUNDARY_OPTIMIZATION = OFF;
|
||||
SYNOPSYS_HIERARCHICAL_COMPILATION = ON;
|
||||
SYNOPSYS_DESIGNWARE = OFF;
|
||||
SYNOPSYS_COMPILER = DESIGN;
|
||||
USE_SYNOPSYS_SYNTHESIS = OFF;
|
||||
VHDL_NETLIST_WRITER = OFF;
|
||||
VERILOG_NETLIST_WRITER = OFF;
|
||||
XNF_GENERATE_AHDL_TDX_FILE = ON;
|
||||
XNF_TRANSLATE_INTERNAL_NODE_NAMES = ON;
|
||||
XNF_EMULATE_TRI_STATE_BUSES = INTERNAL_LOGIC;
|
||||
EDIF_OUTPUT_VERSION = 200;
|
||||
EDIF_NETLIST_WRITER = OFF;
|
||||
END;
|
||||
|
||||
CUSTOM_DESIGN_DOCTOR_RULES
|
||||
BEGIN
|
||||
MASTER_RESET = OFF;
|
||||
EXPANDER_NETWORKS = ON;
|
||||
RACE_CONDITIONS = ON;
|
||||
DELAY_CHAINS = ON;
|
||||
ASYNCHRONOUS_INPUTS = ON;
|
||||
PRESET_CLEAR_NETWORKS = ON;
|
||||
STATIC_HAZARDS_AFTER_SYNTHESIS = OFF;
|
||||
STATIC_HAZARDS_BEFORE_SYNTHESIS = ON;
|
||||
MULTI_CLOCK_NETWORKS = ON;
|
||||
MULTI_LEVEL_CLOCKS = ON;
|
||||
GATED_CLOCKS = ON;
|
||||
RIPPLE_CLOCKS = ON;
|
||||
END;
|
||||
|
||||
SIMULATOR_CONFIGURATION
|
||||
BEGIN
|
||||
END_TIME = 5.0us;
|
||||
BIDIR_PIN = STRONG;
|
||||
START_TIME = 0.0ns;
|
||||
GLITCH_TIME = 0.0ns;
|
||||
GLITCH = OFF;
|
||||
OSCILLATION_TIME = 0.0ns;
|
||||
OSCILLATION = OFF;
|
||||
CHECK_OUTPUTS = OFF;
|
||||
SETUP_HOLD = OFF;
|
||||
USE_DEVICE = OFF;
|
||||
END;
|
||||
|
||||
TIMING_ANALYZER_CONFIGURATION
|
||||
BEGIN
|
||||
ANALYSIS_MODE = REGISTERED_PERFORMANCE;
|
||||
CUT_OFF_RAM_REGISTERED_WE_PATHS = OFF;
|
||||
LIST_PATH_FREQUENCY = 10MHz;
|
||||
LIST_PATH_COUNT = 10;
|
||||
REGISTERED_PERFORMANCE_OPTIONS = NUMBER_OF_PATHS;
|
||||
INCLUDE_PATHS_LESS_THAN_VALUE = 214.7483647ms;
|
||||
INCLUDE_PATHS_LESS_THAN = OFF;
|
||||
INCLUDE_PATHS_GREATER_THAN_VALUE = 0.0ns;
|
||||
INCLUDE_PATHS_GREATER_THAN = OFF;
|
||||
DELAY_MATRIX_OPTIONS = SHOW_ALL_PATHS;
|
||||
CELL_WIDTH = 18;
|
||||
LIST_ONLY_LONGEST_PATH = ON;
|
||||
CUT_OFF_CLEAR_AND_PRESET_PATHS = ON;
|
||||
CUT_OFF_IO_PIN_FEEDBACK = ON;
|
||||
AUTO_RECALCULATE = OFF;
|
||||
END;
|
||||
|
||||
OTHER_CONFIGURATION
|
||||
BEGIN
|
||||
LAST_MAXPLUS2_VERSION = 10.0;
|
||||
ROW_PINS_LCELL_INSERT = ON;
|
||||
CARRY_OUT_PINS_LCELL_INSERT = OFF;
|
||||
NORMAL_LCELL_INSERT = ON;
|
||||
EXPLICIT_FAMILY = 1;
|
||||
FLEX_10K_52_COLUMNS = 40;
|
||||
DEFAULT_9K_EXP_PER_LCELL = 1/2;
|
||||
LOCAL_INTERCONNECT_PER_LAB_PERCENT = 100;
|
||||
LCELLS_PER_ROW_PERCENT = 100;
|
||||
FAN_IN_PER_LCELL_PERCENT = 100;
|
||||
EXP_PER_LCELL_PERCENT = 100;
|
||||
ROW_PINS_PERCENT = 50;
|
||||
ORIGINAL_MAXPLUS2_VERSION = 9.6;
|
||||
COMPILER_DATA = "1,1,0,1,0,0,0,1,1,1,1,0,1,1,1";
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE NORMAL.MAX5000
|
||||
BEGIN
|
||||
REGISTER_OPTIMIZATION = ON;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
RESYNTHESIZE_NETWORK = ON;
|
||||
MULTI_LEVEL_FACTORING = ON;
|
||||
SUBFACTOR_EXTRACTION = ON;
|
||||
REFACTORIZATION = ON;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = ON;
|
||||
REDUCE_LOGIC = ON;
|
||||
DECOMPOSE_GATES = ON;
|
||||
SOFT_BUFFER_INSERTION = ON;
|
||||
FAST_IO = OFF;
|
||||
IGNORE_SOFT_BUFFERS = OFF;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
TURBO_BIT = OFF;
|
||||
XOR_SYNTHESIS = ON;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
MINIMIZATION = FULL;
|
||||
CARRY_CHAIN_LENGTH = -1;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN_LENGTH = -1;
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE NORMAL.MAX7000
|
||||
BEGIN
|
||||
REGISTER_OPTIMIZATION = ON;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
RESYNTHESIZE_NETWORK = ON;
|
||||
MULTI_LEVEL_FACTORING = ON;
|
||||
SUBFACTOR_EXTRACTION = ON;
|
||||
REFACTORIZATION = ON;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = ON;
|
||||
REDUCE_LOGIC = ON;
|
||||
DECOMPOSE_GATES = ON;
|
||||
SOFT_BUFFER_INSERTION = ON;
|
||||
FAST_IO = OFF;
|
||||
IGNORE_SOFT_BUFFERS = OFF;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
TURBO_BIT = ON;
|
||||
XOR_SYNTHESIS = ON;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
MINIMIZATION = FULL;
|
||||
CARRY_CHAIN_LENGTH = -1;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN_LENGTH = -1;
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE NORMAL.CLASSIC
|
||||
BEGIN
|
||||
REGISTER_OPTIMIZATION = OFF;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
RESYNTHESIZE_NETWORK = ON;
|
||||
MULTI_LEVEL_FACTORING = OFF;
|
||||
SUBFACTOR_EXTRACTION = OFF;
|
||||
REFACTORIZATION = OFF;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = OFF;
|
||||
REDUCE_LOGIC = OFF;
|
||||
DECOMPOSE_GATES = ON;
|
||||
SOFT_BUFFER_INSERTION = ON;
|
||||
FAST_IO = OFF;
|
||||
IGNORE_SOFT_BUFFERS = OFF;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
TURBO_BIT = ON;
|
||||
XOR_SYNTHESIS = OFF;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
MINIMIZATION = FULL;
|
||||
CARRY_CHAIN_LENGTH = -1;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN_LENGTH = -1;
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE NORMAL.FLEX8000
|
||||
BEGIN
|
||||
REGISTER_OPTIMIZATION = ON;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
RESYNTHESIZE_NETWORK = ON;
|
||||
MULTI_LEVEL_FACTORING = ON;
|
||||
SUBFACTOR_EXTRACTION = ON;
|
||||
REFACTORIZATION = ON;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = ON;
|
||||
REDUCE_LOGIC = ON;
|
||||
DECOMPOSE_GATES = ON;
|
||||
SOFT_BUFFER_INSERTION = ON;
|
||||
IGNORE_SOFT_BUFFERS = ON;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
TURBO_BIT = OFF;
|
||||
XOR_SYNTHESIS = OFF;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
MINIMIZATION = FULL;
|
||||
CARRY_CHAIN_LENGTH = 32;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN_LENGTH = 2;
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE FAST.MAX5000
|
||||
BEGIN
|
||||
REGISTER_OPTIMIZATION = ON;
|
||||
RESYNTHESIZE_NETWORK = ON;
|
||||
MULTI_LEVEL_FACTORING = ON;
|
||||
SUBFACTOR_EXTRACTION = OFF;
|
||||
REFACTORIZATION = OFF;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = ON;
|
||||
REDUCE_LOGIC = ON;
|
||||
DECOMPOSE_GATES = ON;
|
||||
SOFT_BUFFER_INSERTION = ON;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
MINIMIZATION = FULL;
|
||||
FAST_IO = OFF;
|
||||
IGNORE_SOFT_BUFFERS = OFF;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
TURBO_BIT = OFF;
|
||||
XOR_SYNTHESIS = ON;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE FAST.MAX7000
|
||||
BEGIN
|
||||
REGISTER_OPTIMIZATION = ON;
|
||||
RESYNTHESIZE_NETWORK = ON;
|
||||
MULTI_LEVEL_FACTORING = ON;
|
||||
SUBFACTOR_EXTRACTION = OFF;
|
||||
REFACTORIZATION = OFF;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = ON;
|
||||
REDUCE_LOGIC = ON;
|
||||
DECOMPOSE_GATES = ON;
|
||||
SOFT_BUFFER_INSERTION = ON;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
MINIMIZATION = FULL;
|
||||
FAST_IO = OFF;
|
||||
IGNORE_SOFT_BUFFERS = OFF;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
PARALLEL_EXPANDERS = ON;
|
||||
TURBO_BIT = ON;
|
||||
XOR_SYNTHESIS = ON;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE FAST.CLASSIC
|
||||
BEGIN
|
||||
REGISTER_OPTIMIZATION = OFF;
|
||||
RESYNTHESIZE_NETWORK = ON;
|
||||
MULTI_LEVEL_FACTORING = OFF;
|
||||
SUBFACTOR_EXTRACTION = OFF;
|
||||
REFACTORIZATION = OFF;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = OFF;
|
||||
REDUCE_LOGIC = OFF;
|
||||
DECOMPOSE_GATES = ON;
|
||||
SOFT_BUFFER_INSERTION = ON;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
MINIMIZATION = FULL;
|
||||
FAST_IO = OFF;
|
||||
IGNORE_SOFT_BUFFERS = OFF;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
TURBO_BIT = ON;
|
||||
XOR_SYNTHESIS = OFF;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE FAST.FLEX8000
|
||||
BEGIN
|
||||
CARRY_CHAIN_LENGTH = 32;
|
||||
CASCADE_CHAIN_LENGTH = 2;
|
||||
REGISTER_OPTIMIZATION = ON;
|
||||
RESYNTHESIZE_NETWORK = ON;
|
||||
MULTI_LEVEL_FACTORING = ON;
|
||||
SUBFACTOR_EXTRACTION = OFF;
|
||||
REFACTORIZATION = OFF;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = ON;
|
||||
REDUCE_LOGIC = ON;
|
||||
DECOMPOSE_GATES = ON;
|
||||
SOFT_BUFFER_INSERTION = ON;
|
||||
CARRY_CHAIN = AUTO;
|
||||
CASCADE_CHAIN = AUTO;
|
||||
MINIMIZATION = FULL;
|
||||
IGNORE_SOFT_BUFFERS = ON;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
TURBO_BIT = OFF;
|
||||
XOR_SYNTHESIS = OFF;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE WYSIWYG.MAX5000
|
||||
BEGIN
|
||||
REGISTER_OPTIMIZATION = OFF;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
RESYNTHESIZE_NETWORK = OFF;
|
||||
MULTI_LEVEL_FACTORING = OFF;
|
||||
SUBFACTOR_EXTRACTION = OFF;
|
||||
REFACTORIZATION = OFF;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = OFF;
|
||||
REDUCE_LOGIC = OFF;
|
||||
DECOMPOSE_GATES = OFF;
|
||||
SOFT_BUFFER_INSERTION = OFF;
|
||||
FAST_IO = OFF;
|
||||
IGNORE_SOFT_BUFFERS = OFF;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
TURBO_BIT = OFF;
|
||||
XOR_SYNTHESIS = OFF;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
MINIMIZATION = PARTIAL;
|
||||
CARRY_CHAIN_LENGTH = -1;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN_LENGTH = -1;
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE WYSIWYG.MAX7000
|
||||
BEGIN
|
||||
REGISTER_OPTIMIZATION = OFF;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
RESYNTHESIZE_NETWORK = OFF;
|
||||
MULTI_LEVEL_FACTORING = OFF;
|
||||
SUBFACTOR_EXTRACTION = OFF;
|
||||
REFACTORIZATION = OFF;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = OFF;
|
||||
REDUCE_LOGIC = OFF;
|
||||
DECOMPOSE_GATES = OFF;
|
||||
SOFT_BUFFER_INSERTION = OFF;
|
||||
FAST_IO = OFF;
|
||||
IGNORE_SOFT_BUFFERS = OFF;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
TURBO_BIT = ON;
|
||||
XOR_SYNTHESIS = OFF;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
MINIMIZATION = PARTIAL;
|
||||
CARRY_CHAIN_LENGTH = -1;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN_LENGTH = -1;
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE WYSIWYG.CLASSIC
|
||||
BEGIN
|
||||
REGISTER_OPTIMIZATION = OFF;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
RESYNTHESIZE_NETWORK = ON;
|
||||
MULTI_LEVEL_FACTORING = OFF;
|
||||
SUBFACTOR_EXTRACTION = OFF;
|
||||
REFACTORIZATION = OFF;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = OFF;
|
||||
REDUCE_LOGIC = OFF;
|
||||
DECOMPOSE_GATES = ON;
|
||||
SOFT_BUFFER_INSERTION = OFF;
|
||||
FAST_IO = OFF;
|
||||
IGNORE_SOFT_BUFFERS = OFF;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
TURBO_BIT = ON;
|
||||
XOR_SYNTHESIS = OFF;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
MINIMIZATION = PARTIAL;
|
||||
CARRY_CHAIN_LENGTH = -1;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN_LENGTH = -1;
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE WYSIWYG.FLEX8000
|
||||
BEGIN
|
||||
REGISTER_OPTIMIZATION = OFF;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
RESYNTHESIZE_NETWORK = OFF;
|
||||
MULTI_LEVEL_FACTORING = OFF;
|
||||
SUBFACTOR_EXTRACTION = OFF;
|
||||
REFACTORIZATION = OFF;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = OFF;
|
||||
REDUCE_LOGIC = OFF;
|
||||
DECOMPOSE_GATES = OFF;
|
||||
SOFT_BUFFER_INSERTION = ON;
|
||||
IGNORE_SOFT_BUFFERS = ON;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
TURBO_BIT = OFF;
|
||||
XOR_SYNTHESIS = OFF;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
MINIMIZATION = PARTIAL;
|
||||
CARRY_CHAIN_LENGTH = 32;
|
||||
CARRY_CHAIN = MANUAL;
|
||||
CASCADE_CHAIN_LENGTH = 2;
|
||||
CASCADE_CHAIN = MANUAL;
|
||||
END;
|
||||
|
||||
26
src/altera/acex/k30/ACCELER.INC
Normal file
26
src/altera/acex/k30/ACCELER.INC
Normal file
@ -0,0 +1,26 @@
|
||||
-- Copyright (C) 1988-2000 Altera Corporation
|
||||
-- Any megafunction design, and related net list (encrypted or decrypted),
|
||||
-- support information, device programming or simulation file, and any other
|
||||
-- associated documentation or information provided by Altera or a partner
|
||||
-- under Altera's Megafunction Partnership Program may be used only to
|
||||
-- program PLD devices (but not masked PLD devices) from Altera. Any other
|
||||
-- use of such megafunction design, net list, support information, device
|
||||
-- programming or simulation file, or any other related documentation or
|
||||
-- information is prohibited for any other purpose, including, but not
|
||||
-- limited to modification, reverse engineering, de-compiling, or use with
|
||||
-- any other silicon devices, unless such use is explicitly licensed under
|
||||
-- a separate agreement with Altera or a megafunction partner. Title to
|
||||
-- the intellectual property, including patents, copyrights, trademarks,
|
||||
-- trade secrets, or maskworks, embodied in any such megafunction design,
|
||||
-- net list, support information, device programming or simulation file, or
|
||||
-- any other related documentation or information provided by Altera or a
|
||||
-- megafunction partner, remains with Altera, the megafunction partner, or
|
||||
-- their respective licensors. No other licenses, including any licenses
|
||||
-- needed under any third party's intellectual property, are provided herein.
|
||||
|
||||
-- MAX+plus II Include File
|
||||
-- Version 10.0 9/14/2000
|
||||
-- Created: Fri Jan 25 12:59:19 2002
|
||||
|
||||
FUNCTION acceler (clk42, /reset, ct[2..0], ras, cas, clk_z80, mc_end, mc_begin, mc_type, mc_write, ai[15..0], di[7..0], /io, /rd, /wr, /mr, /rf, /m1, /iom, dcp[7..0], mdi[15..0], acc_ena, hddr[7..0], hdd_flip)
|
||||
RETURNS (continue, ao[15..0], do[7..0], mdo[15..0], md[7..0], g_line[7..0], glisser, acc_on, double_cas, acc_dir[7..0]);
|
||||
BIN
src/altera/acex/k30/ACCELER.SCF
Normal file
BIN
src/altera/acex/k30/ACCELER.SCF
Normal file
Binary file not shown.
374
src/altera/acex/k30/ACCELER.TDF
Normal file
374
src/altera/acex/k30/ACCELER.TDF
Normal file
@ -0,0 +1,374 @@
|
||||
|
||||
TITLE "ACCELERATOR";
|
||||
|
||||
INCLUDE "lpm_ram_dp";
|
||||
|
||||
SUBDESIGN acceler
|
||||
(
|
||||
CLK42 : INPUT;
|
||||
/RESET : INPUT;
|
||||
CT[2..0] : INPUT;
|
||||
|
||||
RAS : INPUT;
|
||||
CAS : INPUT;
|
||||
CLK_Z80 : INPUT;
|
||||
|
||||
CONTINUE : OUTPUT;
|
||||
|
||||
MC_END : INPUT;
|
||||
MC_BEGIN : INPUT;
|
||||
MC_TYPE : INPUT;
|
||||
MC_WRITE : INPUT;
|
||||
-- MCA[1..0] : INPUT;
|
||||
|
||||
AI[15..0] : INPUT;
|
||||
DI[7..0] : INPUT;
|
||||
|
||||
AO[15..0] : OUTPUT;
|
||||
DO[7..0] : OUTPUT;
|
||||
|
||||
/IO : INPUT;
|
||||
/RD : INPUT;
|
||||
/WR : INPUT;
|
||||
/MR : INPUT;
|
||||
/RF : INPUT;
|
||||
/M1 : INPUT;
|
||||
/IOM : INPUT;
|
||||
|
||||
DCP[7..0] : INPUT;
|
||||
|
||||
MDI[15..0] : INPUT;
|
||||
MDO[15..0] : OUTPUT;
|
||||
MD[7..0] : OUTPUT;
|
||||
|
||||
G_LINE[7..0]: OUTPUT;
|
||||
|
||||
GLISSER : OUTPUT;
|
||||
|
||||
ACC_ON : OUTPUT;
|
||||
|
||||
ACC_ENA : INPUT;
|
||||
|
||||
DOUBLE_CAS : OUTPUT;
|
||||
|
||||
HDDR[7..0] : INPUT;
|
||||
HDD_FLIP : INPUT;
|
||||
|
||||
ACC_DIR[7..0] : OUTPUT;
|
||||
|
||||
)
|
||||
VARIABLE
|
||||
|
||||
RAM : LPM_RAM_DP WITH (LPM_WIDTH=16,LPM_WIDTHAD=8);
|
||||
|
||||
DO[7..0] : DFFE;
|
||||
MDO[15..0] : DFFE;
|
||||
|
||||
PRF_CMD : DFFE;
|
||||
ED_CMD : DFFE;
|
||||
CB_CMD : DFFE;
|
||||
ID_CMD : DFFE;
|
||||
IN_OUT_CMD : DFFE;
|
||||
|
||||
CORRECT_1F : NODE;
|
||||
|
||||
ACC_BLK : DFF;
|
||||
|
||||
RETI : DFFE;
|
||||
RETN : DFFE;
|
||||
|
||||
AA[15..0] : DFFE;
|
||||
|
||||
RGACC[7..0] : DFFE;
|
||||
AGR[7..0] : DFFE;
|
||||
ACC_CNT[7..0] : DFFE;
|
||||
|
||||
START_ACC : NODE;
|
||||
ACC_END : DFFE;
|
||||
FN_ACC[2..0]: DFFE;
|
||||
ACC_MODE[3..0] : DFFE;
|
||||
|
||||
MD[7..0] : LCELL;
|
||||
XMD[7..0] : DFF;
|
||||
XMDH[7..0] : DFF;
|
||||
|
||||
ACC_DIR[7..0] : LCELL;
|
||||
|
||||
/M1M : NODE;
|
||||
|
||||
ACC_GO : NODE;
|
||||
ACC_GO_1 : NODE;
|
||||
|
||||
RAM_WR : NODE;
|
||||
|
||||
STATE_EI : DFFE;
|
||||
|
||||
-- HDDR[7..0] : DFFE;
|
||||
|
||||
XAGR[7..0] : DFFE;
|
||||
AAGR[9..0] : DFFE;
|
||||
XCNT[7..0] : DFFE;
|
||||
ALT_ACC : NODE;
|
||||
|
||||
RAM_ADR[7..0] : NODE;
|
||||
ACC_C : NODE;
|
||||
WR_C7 : NODE;
|
||||
|
||||
XCNT_AGR[15..0] : NODE;
|
||||
|
||||
MDOX[7..0] : DFF;
|
||||
MDOY[7..0] : DFF;
|
||||
|
||||
GLISS_R : DFF;
|
||||
|
||||
ACC_TIME : NODE;
|
||||
|
||||
BEGIN
|
||||
|
||||
ACC_ON = ACC_DIR0;
|
||||
|
||||
/M1M = DFF(!/M1,CLK_Z80,/RESET,);
|
||||
|
||||
PRF_CMD.clk = /MR;
|
||||
PRF_CMD.ena = /M1M;
|
||||
PRF_CMD.d = (DI[] == B"11XX1XX1") &
|
||||
((DI[] == B"XX00X01X") or -- CB
|
||||
(DI[] == B"XX01X10X") or -- DD
|
||||
(DI[] == B"XX10X10X") or -- ED
|
||||
(DI[] == B"XX11X10X")); -- FD
|
||||
|
||||
-- === interrupt === 0 - disable; 1 - enable
|
||||
|
||||
STATE_EI.clk = /MR;
|
||||
STATE_EI.ena = /M1M & !PRF_CMD & (DI[] == B"1111X011");
|
||||
STATE_EI.d = DI3;
|
||||
|
||||
-- RETI comand
|
||||
|
||||
ED_CMD.clk = /MR;
|
||||
ED_CMD.ena = /M1M;
|
||||
ED_CMD.d = (DI[] == H"ED");
|
||||
|
||||
RETI.clk = /MR;
|
||||
RETI.ena = /M1M;
|
||||
RETI.d = ED_CMD & (DI[] == H"4D");
|
||||
|
||||
-- "1" on the RETI triger is the end of interupt sycle.
|
||||
|
||||
RETN.clk = /MR;
|
||||
RETN.ena = /M1M;
|
||||
RETN.d = ED_CMD & (DI[] == H"45");
|
||||
|
||||
-- The end of NMI sycle.
|
||||
|
||||
ACC_BLK.clk = /M1;
|
||||
ACC_BLK.d = DFF(((/IO & ACC_BLK) or (!ACC_BLK & RETI)),CLK_Z80,,);
|
||||
ACC_BLK.prn = /RESET & ACC_MODE3;
|
||||
|
||||
CB_CMD.clk = /MR;
|
||||
ID_CMD.clk = /MR;
|
||||
CB_CMD.ena = /M1M;
|
||||
ID_CMD.ena = /M1M;
|
||||
|
||||
CB_CMD.d = (DI[] == H"CB");
|
||||
ID_CMD.d = (DI[] == B"11X11101");
|
||||
|
||||
IN_OUT_CMD.clk = /MR;
|
||||
IN_OUT_CMD.ena = /M1M;
|
||||
IN_OUT_CMD.d = (DI[] == B"1101X011") & !PRF_CMD; -- D3/DB
|
||||
IN_OUT_CMD.clrn = /IO;
|
||||
|
||||
CORRECT_1F = LCELL(IN_OUT_CMD & (DO[] == H"1F") & !/MR & !/RD);
|
||||
DO[4..3].clrn = !CORRECT_1F;
|
||||
|
||||
ACC_GO = DFFE((CAS or START_ACC),CLK42,,(!/MR & /M1),CT1);
|
||||
ACC_GO_1 = DFF(ACC_GO,CLK42,,);
|
||||
|
||||
-- == accelerator number ==
|
||||
|
||||
RGACC[].clk = /MR;
|
||||
RGACC[].ena = DFF((/M1 & /RF & ACC_DIR3),CLK_Z80,,);
|
||||
RGACC[].d = DI[];
|
||||
|
||||
-- == accelerator grafic line ==
|
||||
|
||||
AGR[].clk = CLK42;
|
||||
AGR[].ena = !DFF((/IOM or /WR or !DFF((DCP[] == B"1100X100"),CLK42,,)),CLK42,,) or
|
||||
!(!ACC_DIR4 or ACC_GO or !ACC_GO_1);
|
||||
|
||||
CASE DFF(START_ACC,CLK42,,) IS
|
||||
WHEN 0 => AGR[].d = AGR[] + 1;
|
||||
WHEN 1 => AGR[].d = DI[];
|
||||
END CASE;
|
||||
|
||||
AGR[].clrn = /RESET;
|
||||
|
||||
G_LINE[] = AGR[];
|
||||
|
||||
-- == accelerator counter ==
|
||||
|
||||
ACC_C = (!ACC_GO & DFF(((CT0 & !/RD) or (CT1 & !/WR)),CLK42,,));
|
||||
ACC_CNT[].clk = CLK42;
|
||||
-- ACC_CNT[].ena = START_ACC or (ACC_C & ACC_DIR2);
|
||||
ACC_CNT[].ena = LCELL(START_ACC or (ACC_C & ACC_DIR2));
|
||||
|
||||
CASE DFF(START_ACC,CLK42,,) IS
|
||||
WHEN 1 => ACC_CNT[].d = RGACC[];
|
||||
WHEN 0 => ACC_CNT[].d = ACC_CNT[] - 1;
|
||||
END CASE;
|
||||
|
||||
WR_C7 = DFF((/IOM or DFF(!/IOM,CLK42,,) or /WR or DFF(!(DCP[] == B"1100X111"),CLK42,,)),CLK42,,);
|
||||
ALT_ACC = DFF(VCC,WR_C7,/RESET,);
|
||||
|
||||
(AAGR[].ena,XCNT[].ena,XAGR[].ena) = LCELL(!WR_C7 or (ACC_DIR1 & ACC_C));
|
||||
(AAGR[].clk,XCNT[].clk,XAGR[].clk) = CLK42;
|
||||
|
||||
XCNT_AGR[15..0] = (XCNT[],XAGR[]) + (B"000000",AAGR[]);
|
||||
|
||||
CASE !DFF(START_ACC,CLK42,,) IS
|
||||
WHEN 1 => AAGR[].d = AAGR[];
|
||||
(XCNT[].d,XAGR[].d) = XCNT_AGR[15..0];
|
||||
WHEN 0 => AAGR[].d = (AI9,AI8,DI[]);
|
||||
(XCNT[].d,XAGR[].d) = (B"00",AI[15..10],B"00000000");
|
||||
END CASE;
|
||||
|
||||
-- == accelerator dir ==
|
||||
|
||||
START_ACC = LCELL(LCELL(/MR or !/M1 or !/RF or !ACC_BLK) or (!ACC_DIR0 or MC_TYPE));
|
||||
|
||||
DOUBLE_CAS= LCELL(ACC_DIR6 & !START_ACC);
|
||||
|
||||
ACC_END.clk = CLK42;
|
||||
ACC_END.ena = !ACC_GO & ACC_GO_1;
|
||||
ACC_END.prn = /M1;
|
||||
ACC_END.d = (ACC_CNT[] == 1) or !ACC_DIR2;
|
||||
|
||||
CONTINUE = ACC_END;
|
||||
|
||||
CASE ACC_MODE[2..0] IS
|
||||
WHEN 0 => ACC_DIR[] = B"00000000"; % LD B,B %
|
||||
WHEN 1 => ACC_DIR[] = B"00100101"; % LD C,C % % fill by constant %
|
||||
WHEN 2 => ACC_DIR[] = B"00001001"; % LD D,D % % load count accelerator %
|
||||
WHEN 3 => ACC_DIR[] = B"00010101"; % LD E,E % % fill by constant VERTICAL %
|
||||
WHEN 4 => ACC_DIR[] = B"01000001"; % LD H,H % % duble byte fn %
|
||||
WHEN 5 => ACC_DIR[] = B"00100111"; % LD L,L % % copy line %
|
||||
WHEN 6 => ACC_DIR[] = B"00000000"; % HALT %
|
||||
WHEN 7 => ACC_DIR[] = B"00010111"; % LD A,A % % copy line VERTICAL %
|
||||
END CASE;
|
||||
|
||||
-- == accelerator mode ==
|
||||
|
||||
ACC_MODE[].clk = /MR;
|
||||
ACC_MODE[].ena = DFF((!/M1 & !PRF_CMD &
|
||||
LCELL((DI[] == B"XXX00X00") or
|
||||
(DI[] == B"XXX01X01") or
|
||||
(DI[] == B"XXX10X10") or
|
||||
(DI[] == B"XXX11X11")) &
|
||||
LCELL((DI[] == B"010XX0XX") or
|
||||
(DI[] == B"011XX1XX"))),CLK_Z80,,);
|
||||
ACC_MODE[].d = (VCC,DI[2..0]);
|
||||
ACC_MODE[2..0].clrn = /RESET & ACC_ENA;
|
||||
ACC_MODE[3].clrn = /RESET & !DFF(ACC_MODE3,CLK_Z80,,);
|
||||
|
||||
-- == accelerator datas ==
|
||||
|
||||
CASE DFFE(AA0,CLK42,,,(CT2 & CT1)) IS
|
||||
WHEN 0 => MD[] = MDI[7..0];
|
||||
-- GLISSER = DFF((MDO[7..0] == H"FF"),CLK42,,);
|
||||
WHEN 1 => MD[] = MDI[15..8];
|
||||
-- GLISSER = DFF((MDO[15..8] == H"FF"),CLK42,,);
|
||||
END CASE;
|
||||
|
||||
GLISS_R.clk = CLK42;
|
||||
CASE ACC_DIR1 IS
|
||||
WHEN 0 => GLISS_R = LCELL(DI[] == H"FF");
|
||||
WHEN 1 => GLISS_R = LCELL(RAM.q[7..4] == H"F") & LCELL(RAM.q[3..0] == H"F");
|
||||
END CASE;
|
||||
GLISSER = GLISS_R;
|
||||
|
||||
-- MDO[].clk = !CLK42;
|
||||
MDO[].clk = CLK42;
|
||||
|
||||
MDO[].ena = CAS;
|
||||
|
||||
MDOX[].clk = CLK42;
|
||||
MDOY[].clk = CLK42;
|
||||
|
||||
CASE LCELL(MC_END & HDD_FLIP) IS
|
||||
WHEN 0 => MDOX[7..0] = DI[];
|
||||
WHEN 1 => MDOX[7..0] = HDDR[];
|
||||
END CASE;
|
||||
|
||||
CASE ACC_DIR6 IS
|
||||
WHEN 0 => MDOY[7..0] = DI[];
|
||||
WHEN 1 => MDOY[7..0] = HDDR[];
|
||||
END CASE;
|
||||
|
||||
CASE LCELL(/IO & ACC_DIR1) IS
|
||||
WHEN 0 => MDO[].d = (MDOY[],MDOX[]);
|
||||
WHEN 1 => MDO[].d = (RAM.q[7..0],RAM.q[7..0]);
|
||||
END CASE;
|
||||
|
||||
DO[].clk = DFF(MC_END,!CLK42,,);
|
||||
-- DO[].clk = !CLK42;
|
||||
DO[].ena = VCC;
|
||||
-- DO[].ena = DFF(!MC_END,CLK42,,);
|
||||
DO[].d = MD[];
|
||||
|
||||
-- == accelerator functions ==
|
||||
|
||||
FN_ACC[].clk = /MR;
|
||||
FN_ACC[].ena = /M1M;
|
||||
FN_ACC[].d = LCELL(DI7 & !DI6 & !PRF_CMD) & !(DI[5..3]);
|
||||
|
||||
XMDH[].clk = !CLK42;
|
||||
XMDH[] = MDI[15..8];
|
||||
|
||||
XMD[].clk = !CLK42;
|
||||
CASE FN_ACC[1..0] IS
|
||||
WHEN 0 =>
|
||||
XMD[] = MD[]; % BE %
|
||||
WHEN 1 =>
|
||||
XMD[] = MD[] or RAM.q[7..0]; % B6 %
|
||||
WHEN 2 =>
|
||||
XMD[] = MD[] xor RAM.q[7..0]; % AE %
|
||||
WHEN 3 =>
|
||||
XMD[] = MD[] & RAM.q[7..0]; % A6 %
|
||||
END CASE;
|
||||
|
||||
CASE ALT_ACC IS
|
||||
WHEN 0 => RAM_ADR[] = ACC_CNT[];
|
||||
WHEN 1 => RAM_ADR[] = XCNT[];
|
||||
END CASE;
|
||||
|
||||
ACC_TIME = LCELL((!ACC_END or !DFFE(ACC_END,CLK42,,,(CT1 & CT2))));
|
||||
|
||||
-- RAM_WR = DFF((!/RD & (!ACC_GO & CT0) & ACC_TIME),CLK42,,);
|
||||
RAM_WR = DFF((!/RD & (!ACC_GO & CT0) & ACC_DIR1),CLK42,,);
|
||||
|
||||
RAM.wren = RAM_WR;
|
||||
RAM.data[] = (XMD[],XMD[]);
|
||||
-- RAM.wraddress[] = ACC_CNT[];
|
||||
RAM.wraddress[] = RAM_ADR[];
|
||||
RAM.wrclock = CLK42;
|
||||
RAM.wrclken = VCC;
|
||||
RAM.rden = VCC;
|
||||
-- RAM.rdaddress[] = ACC_CNT[];
|
||||
RAM.rdaddress[] = RAM_ADR[];
|
||||
RAM.rdclock = CLK42;
|
||||
RAM.rdclken = VCC;
|
||||
|
||||
AA[].clk = CLK42;
|
||||
-- AA[].ena = START_ACC or (ACC_DIR5 & !ACC_GO & ACC_GO_1);
|
||||
AA[].ena = LCELL(START_ACC or (ACC_DIR5 & !(CAS or START_ACC) & (ACC_GO or (ACC_GO_1 & ACC_DIR6))));
|
||||
|
||||
CASE DFF(START_ACC,CLK42,,) IS
|
||||
WHEN 1 => AA[].d = AI[];
|
||||
-- WHEN 0 => AA[].d = AA[] + (B"00000000000000",ACC_DIR6,!ACC_DIR6);
|
||||
WHEN 0 => AA[].d = AA[] + 1;
|
||||
END CASE;
|
||||
|
||||
AO[] = (AA[15..0]);
|
||||
|
||||
END;
|
||||
|
||||
578
src/altera/acex/k30/AY.ACF
Normal file
578
src/altera/acex/k30/AY.ACF
Normal file
@ -0,0 +1,578 @@
|
||||
--
|
||||
-- Copyright (C) 1988-2000 Altera Corporation
|
||||
-- Any megafunction design, and related net list (encrypted or decrypted),
|
||||
-- support information, device programming or simulation file, and any other
|
||||
-- associated documentation or information provided by Altera or a partner
|
||||
-- under Altera's Megafunction Partnership Program may be used only to
|
||||
-- program PLD devices (but not masked PLD devices) from Altera. Any other
|
||||
-- use of such megafunction design, net list, support information, device
|
||||
-- programming or simulation file, or any other related documentation or
|
||||
-- information is prohibited for any other purpose, including, but not
|
||||
-- limited to modification, reverse engineering, de-compiling, or use with
|
||||
-- any other silicon devices, unless such use is explicitly licensed under
|
||||
-- a separate agreement with Altera or a megafunction partner. Title to
|
||||
-- the intellectual property, including patents, copyrights, trademarks,
|
||||
-- trade secrets, or maskworks, embodied in any such megafunction design,
|
||||
-- net list, support information, device programming or simulation file, or
|
||||
-- any other related documentation or information provided by Altera or a
|
||||
-- megafunction partner, remains with Altera, the megafunction partner, or
|
||||
-- their respective licensors. No other licenses, including any licenses
|
||||
-- needed under any third party's intellectual property, are provided herein.
|
||||
--
|
||||
CHIP ay
|
||||
BEGIN
|
||||
DEVICE = EP1K30QC208-3;
|
||||
END;
|
||||
|
||||
DEFAULT_DEVICES
|
||||
BEGIN
|
||||
AUTO_DEVICE = EP1K100FC484-1;
|
||||
AUTO_DEVICE = EP1K100FC256-1;
|
||||
AUTO_DEVICE = EP1K100QC208-1;
|
||||
AUTO_DEVICE = EP1K50FC484-1;
|
||||
AUTO_DEVICE = EP1K50FC256-1;
|
||||
AUTO_DEVICE = EP1K50QC208-1;
|
||||
AUTO_DEVICE = EP1K50TC144-1;
|
||||
AUTO_DEVICE = EP1K30FC256-1;
|
||||
AUTO_DEVICE = EP1K30QC208-1;
|
||||
AUTO_DEVICE = EP1K30TC144-1;
|
||||
AUTO_DEVICE = EP1K10FC256-1;
|
||||
AUTO_DEVICE = EP1K10QC208-1;
|
||||
AUTO_DEVICE = EP1K10TC144-1;
|
||||
AUTO_DEVICE = EP1K10TC100-1;
|
||||
ASK_BEFORE_ADDING_EXTRA_DEVICES = ON;
|
||||
END;
|
||||
|
||||
TIMING_POINT
|
||||
BEGIN
|
||||
DEVICE_FOR_TIMING_SYNTHESIS = EP1K30QC208-3;
|
||||
FREQUENCY = 100MHz;
|
||||
MAINTAIN_STABLE_SYNTHESIS = OFF;
|
||||
CUT_ALL_CLEAR_PRESET = ON;
|
||||
CUT_ALL_BIDIR = ON;
|
||||
END;
|
||||
|
||||
IGNORED_ASSIGNMENTS
|
||||
BEGIN
|
||||
FIT_IGNORE_TIMING = ON;
|
||||
DEMOTE_SPECIFIC_LCELL_ASSIGNMENTS_TO_LAB_ASSIGNMENTS = OFF;
|
||||
IGNORE_LOCAL_ROUTING_ASSIGNMENTS = OFF;
|
||||
IGNORE_DEVICE_ASSIGNMENTS = OFF;
|
||||
IGNORE_LC_ASSIGNMENTS = OFF;
|
||||
IGNORE_PIN_ASSIGNMENTS = OFF;
|
||||
IGNORE_CHIP_ASSIGNMENTS = OFF;
|
||||
IGNORE_TIMING_ASSIGNMENTS = OFF;
|
||||
IGNORE_LOGIC_OPTION_ASSIGNMENTS = OFF;
|
||||
IGNORE_CLIQUE_ASSIGNMENTS = OFF;
|
||||
END;
|
||||
|
||||
GLOBAL_PROJECT_DEVICE_OPTIONS
|
||||
BEGIN
|
||||
MAX7000B_ENABLE_VREFB = OFF;
|
||||
MAX7000B_ENABLE_VREFA = OFF;
|
||||
MAX7000B_VCCIO_IOBANK2 = 3.3V;
|
||||
MAX7000B_VCCIO_IOBANK1 = 3.3V;
|
||||
CONFIG_EPROM_PULLUP_RESISTOR = ON;
|
||||
CONFIG_EPROM_USER_CODE = FFFFFFFF;
|
||||
FLEX_CONFIGURATION_EPROM = AUTO;
|
||||
MAX7000AE_ENABLE_JTAG = ON;
|
||||
MAX7000AE_USER_CODE = FFFFFFFF;
|
||||
FLEX6000_USE_LOW_VOLTAGE_CONFIGURATION_EPROM = OFF;
|
||||
FLEX10KA_USE_LOW_VOLTAGE_CONFIGURATION_EPROM = ON;
|
||||
FLEX10K_USE_LOW_VOLTAGE_CONFIGURATION_EPROM = OFF;
|
||||
FLEX6000_ENABLE_JTAG = OFF;
|
||||
CONFIG_SCHEME_FLEX_6000 = PASSIVE_SERIAL;
|
||||
MULTIVOLT_IO = OFF;
|
||||
MAX7000S_ENABLE_JTAG = ON;
|
||||
FLEX10K_ENABLE_LOCK_OUTPUT = OFF;
|
||||
MAX7000S_USER_CODE = FFFF;
|
||||
CONFIG_SCHEME_10K = PASSIVE_SERIAL;
|
||||
FLEX10K_JTAG_USER_CODE = 7F;
|
||||
ENABLE_INIT_DONE_OUTPUT = OFF;
|
||||
ENABLE_CHIP_WIDE_OE = OFF;
|
||||
ENABLE_CHIP_WIDE_RESET = OFF;
|
||||
nCEO = UNRESERVED;
|
||||
CLKUSR = UNRESERVED;
|
||||
ADD17 = UNRESERVED;
|
||||
ADD16 = UNRESERVED;
|
||||
ADD15 = UNRESERVED;
|
||||
ADD14 = UNRESERVED;
|
||||
ADD13 = UNRESERVED;
|
||||
ADD0_TO_ADD12 = UNRESERVED;
|
||||
SDOUT = RESERVED_DRIVES_OUT;
|
||||
RDCLK = UNRESERVED;
|
||||
RDYnBUSY = UNRESERVED;
|
||||
nWS_nRS_nCS_CS = UNRESERVED;
|
||||
DATA1_TO_DATA7 = UNRESERVED;
|
||||
DATA0 = RESERVED_TRI_STATED;
|
||||
FLEX8000_ENABLE_JTAG = OFF;
|
||||
CONFIG_SCHEME = ACTIVE_SERIAL;
|
||||
DISABLE_TIME_OUT = OFF;
|
||||
ENABLE_DCLK_OUTPUT = OFF;
|
||||
RELEASE_CLEARS = OFF;
|
||||
AUTO_RESTART = OFF;
|
||||
USER_CLOCK = OFF;
|
||||
SECURITY_BIT = OFF;
|
||||
RESERVED_PINS_PERCENT = 0;
|
||||
RESERVED_LCELLS_PERCENT = 0;
|
||||
END;
|
||||
|
||||
GLOBAL_PROJECT_SYNTHESIS_ASSIGNMENT_OPTIONS
|
||||
BEGIN
|
||||
MULTI_LEVEL_SYNTHESIS_MAX9000 = ON;
|
||||
AUTO_IMPLEMENT_IN_EAB = OFF;
|
||||
AUTO_OPEN_DRAIN_PINS = ON;
|
||||
ONE_HOT_STATE_MACHINE_ENCODING = OFF;
|
||||
AUTO_REGISTER_PACKING = OFF;
|
||||
DEVICE_FAMILY = ACEX1K;
|
||||
STYLE = NORMAL;
|
||||
AUTO_FAST_IO = OFF;
|
||||
AUTO_GLOBAL_OE = ON;
|
||||
AUTO_GLOBAL_PRESET = ON;
|
||||
AUTO_GLOBAL_CLEAR = ON;
|
||||
AUTO_GLOBAL_CLOCK = ON;
|
||||
MULTI_LEVEL_SYNTHESIS_MAX5000_7000 = OFF;
|
||||
OPTIMIZE_FOR_SPEED = 5;
|
||||
END;
|
||||
|
||||
COMPILER_PROCESSING_CONFIGURATION
|
||||
BEGIN
|
||||
USE_QUARTUS_FITTER = ON;
|
||||
PRESERVE_ALL_NODE_NAME_SYNONYMS = OFF;
|
||||
FITTER_SETTINGS = NORMAL;
|
||||
SMART_RECOMPILE = OFF;
|
||||
GENERATE_AHDL_TDO_FILE = OFF;
|
||||
RPT_FILE_USER_ASSIGNMENTS = ON;
|
||||
RPT_FILE_LCELL_INTERCONNECT = ON;
|
||||
RPT_FILE_HIERARCHY = ON;
|
||||
RPT_FILE_EQUATIONS = ON;
|
||||
LINKED_SNF_EXTRACTOR = OFF;
|
||||
OPTIMIZE_TIMING_SNF = OFF;
|
||||
TIMING_SNF_EXTRACTOR = ON;
|
||||
FUNCTIONAL_SNF_EXTRACTOR = OFF;
|
||||
DESIGN_DOCTOR_RULES = EPLD;
|
||||
DESIGN_DOCTOR = OFF;
|
||||
END;
|
||||
|
||||
COMPILER_INTERFACES_CONFIGURATION
|
||||
BEGIN
|
||||
NETLIST_OUTPUT_TIME_SCALE = 0.1ns;
|
||||
EDIF_INPUT_SHOW_LMF_MAPPING_MESSAGES = OFF;
|
||||
EDIF_BUS_DELIMITERS = [];
|
||||
EDIF_FLATTEN_BUS = OFF;
|
||||
EDIF_OUTPUT_FORCE_0NS_DELAYS = OFF;
|
||||
EDIF_OUTPUT_INCLUDE_SPECIAL_PRIM = OFF;
|
||||
EDIF_OUTPUT_MAP_ILLEGAL_CHAR = OFF;
|
||||
EDIF_OUTPUT_DELAY_CONSTRUCTS = EDO_FILE;
|
||||
EDIF_OUTPUT_USE_EDC = OFF;
|
||||
EDIF_INPUT_USE_LMF2 = OFF;
|
||||
EDIF_INPUT_USE_LMF1 = OFF;
|
||||
EDIF_OUTPUT_GND = GND;
|
||||
EDIF_OUTPUT_VCC = VCC;
|
||||
EDIF_INPUT_GND = GND;
|
||||
EDIF_INPUT_VCC = VCC;
|
||||
EDIF_OUTPUT_EDC_FILE = *.edc;
|
||||
EDIF_INPUT_LMF2 = *.lmf;
|
||||
EDIF_INPUT_LMF1 = *.lmf;
|
||||
VHDL_GENERATE_CONFIGURATION_DECLARATION = OFF;
|
||||
VHDL_OUTPUT_DELAY_CONSTRUCTS = VHO_FILE;
|
||||
VERILOG_OUTPUT_DELAY_CONSTRUCTS = VO_FILE;
|
||||
VHDL_FLATTEN_BUS = OFF;
|
||||
VERILOG_FLATTEN_BUS = OFF;
|
||||
EDIF_TRUNCATE_HIERARCHY_PATH = OFF;
|
||||
VHDL_TRUNCATE_HIERARCHY_PATH = OFF;
|
||||
VERILOG_TRUNCATE_HIERARCHY_PATH = OFF;
|
||||
VERILOG_OUTPUT_MAP_ILLEGAL_CHAR = OFF;
|
||||
VHDL_WRITER_VERSION = VHDL93;
|
||||
VHDL_READER_VERSION = VHDL93;
|
||||
SYNOPSYS_MAPPING_EFFORT = MEDIUM;
|
||||
SYNOPSYS_BOUNDARY_OPTIMIZATION = OFF;
|
||||
SYNOPSYS_HIERARCHICAL_COMPILATION = ON;
|
||||
SYNOPSYS_DESIGNWARE = OFF;
|
||||
SYNOPSYS_COMPILER = DESIGN;
|
||||
USE_SYNOPSYS_SYNTHESIS = OFF;
|
||||
VHDL_NETLIST_WRITER = OFF;
|
||||
VERILOG_NETLIST_WRITER = OFF;
|
||||
XNF_GENERATE_AHDL_TDX_FILE = ON;
|
||||
XNF_TRANSLATE_INTERNAL_NODE_NAMES = ON;
|
||||
XNF_EMULATE_TRI_STATE_BUSES = INTERNAL_LOGIC;
|
||||
EDIF_OUTPUT_VERSION = 200;
|
||||
EDIF_NETLIST_WRITER = OFF;
|
||||
END;
|
||||
|
||||
CUSTOM_DESIGN_DOCTOR_RULES
|
||||
BEGIN
|
||||
MASTER_RESET = OFF;
|
||||
EXPANDER_NETWORKS = ON;
|
||||
RACE_CONDITIONS = ON;
|
||||
DELAY_CHAINS = ON;
|
||||
ASYNCHRONOUS_INPUTS = ON;
|
||||
PRESET_CLEAR_NETWORKS = ON;
|
||||
STATIC_HAZARDS_AFTER_SYNTHESIS = OFF;
|
||||
STATIC_HAZARDS_BEFORE_SYNTHESIS = ON;
|
||||
MULTI_CLOCK_NETWORKS = ON;
|
||||
MULTI_LEVEL_CLOCKS = ON;
|
||||
GATED_CLOCKS = ON;
|
||||
RIPPLE_CLOCKS = ON;
|
||||
END;
|
||||
|
||||
SIMULATOR_CONFIGURATION
|
||||
BEGIN
|
||||
BIDIR_PIN = STRONG;
|
||||
END_TIME = 0.0ns;
|
||||
START_TIME = 0.0ns;
|
||||
GLITCH_TIME = 0.0ns;
|
||||
GLITCH = OFF;
|
||||
OSCILLATION_TIME = 0.0ns;
|
||||
OSCILLATION = OFF;
|
||||
CHECK_OUTPUTS = OFF;
|
||||
SETUP_HOLD = OFF;
|
||||
USE_DEVICE = OFF;
|
||||
END;
|
||||
|
||||
TIMING_ANALYZER_CONFIGURATION
|
||||
BEGIN
|
||||
ANALYSIS_MODE = REGISTERED_PERFORMANCE;
|
||||
CUT_OFF_RAM_REGISTERED_WE_PATHS = OFF;
|
||||
LIST_PATH_FREQUENCY = 10MHz;
|
||||
LIST_PATH_COUNT = 10;
|
||||
REGISTERED_PERFORMANCE_OPTIONS = NUMBER_OF_PATHS;
|
||||
INCLUDE_PATHS_LESS_THAN_VALUE = 214.7483647ms;
|
||||
INCLUDE_PATHS_LESS_THAN = OFF;
|
||||
INCLUDE_PATHS_GREATER_THAN_VALUE = 0.0ns;
|
||||
INCLUDE_PATHS_GREATER_THAN = OFF;
|
||||
DELAY_MATRIX_OPTIONS = SHOW_ALL_PATHS;
|
||||
CELL_WIDTH = 18;
|
||||
LIST_ONLY_LONGEST_PATH = ON;
|
||||
CUT_OFF_CLEAR_AND_PRESET_PATHS = ON;
|
||||
CUT_OFF_IO_PIN_FEEDBACK = ON;
|
||||
AUTO_RECALCULATE = OFF;
|
||||
END;
|
||||
|
||||
OTHER_CONFIGURATION
|
||||
BEGIN
|
||||
ROW_PINS_LCELL_INSERT = ON;
|
||||
CARRY_OUT_PINS_LCELL_INSERT = OFF;
|
||||
NORMAL_LCELL_INSERT = ON;
|
||||
EXPLICIT_FAMILY = 1;
|
||||
LAST_MAXPLUS2_VERSION = 10.0;
|
||||
FLEX_10K_52_COLUMNS = 40;
|
||||
DEFAULT_9K_EXP_PER_LCELL = 1/2;
|
||||
LOCAL_INTERCONNECT_PER_LAB_PERCENT = 100;
|
||||
LCELLS_PER_ROW_PERCENT = 100;
|
||||
FAN_IN_PER_LCELL_PERCENT = 100;
|
||||
EXP_PER_LCELL_PERCENT = 100;
|
||||
ROW_PINS_PERCENT = 50;
|
||||
ORIGINAL_MAXPLUS2_VERSION = 10.0;
|
||||
COMPILER_DATA = "1,1,0,1,0,0,0,1,1,1,1,0,1,1,1";
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE NORMAL.MAX5000
|
||||
BEGIN
|
||||
REGISTER_OPTIMIZATION = ON;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
RESYNTHESIZE_NETWORK = ON;
|
||||
MULTI_LEVEL_FACTORING = ON;
|
||||
SUBFACTOR_EXTRACTION = ON;
|
||||
REFACTORIZATION = ON;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = ON;
|
||||
REDUCE_LOGIC = ON;
|
||||
DECOMPOSE_GATES = ON;
|
||||
SOFT_BUFFER_INSERTION = ON;
|
||||
FAST_IO = OFF;
|
||||
IGNORE_SOFT_BUFFERS = OFF;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
TURBO_BIT = OFF;
|
||||
XOR_SYNTHESIS = ON;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
MINIMIZATION = FULL;
|
||||
CARRY_CHAIN_LENGTH = -1;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN_LENGTH = -1;
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE NORMAL.MAX7000
|
||||
BEGIN
|
||||
REGISTER_OPTIMIZATION = ON;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
RESYNTHESIZE_NETWORK = ON;
|
||||
MULTI_LEVEL_FACTORING = ON;
|
||||
SUBFACTOR_EXTRACTION = ON;
|
||||
REFACTORIZATION = ON;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = ON;
|
||||
REDUCE_LOGIC = ON;
|
||||
DECOMPOSE_GATES = ON;
|
||||
SOFT_BUFFER_INSERTION = ON;
|
||||
FAST_IO = OFF;
|
||||
IGNORE_SOFT_BUFFERS = OFF;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
TURBO_BIT = ON;
|
||||
XOR_SYNTHESIS = ON;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
MINIMIZATION = FULL;
|
||||
CARRY_CHAIN_LENGTH = -1;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN_LENGTH = -1;
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE NORMAL.CLASSIC
|
||||
BEGIN
|
||||
REGISTER_OPTIMIZATION = OFF;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
RESYNTHESIZE_NETWORK = ON;
|
||||
MULTI_LEVEL_FACTORING = OFF;
|
||||
SUBFACTOR_EXTRACTION = OFF;
|
||||
REFACTORIZATION = OFF;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = OFF;
|
||||
REDUCE_LOGIC = OFF;
|
||||
DECOMPOSE_GATES = ON;
|
||||
SOFT_BUFFER_INSERTION = ON;
|
||||
FAST_IO = OFF;
|
||||
IGNORE_SOFT_BUFFERS = OFF;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
TURBO_BIT = ON;
|
||||
XOR_SYNTHESIS = OFF;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
MINIMIZATION = FULL;
|
||||
CARRY_CHAIN_LENGTH = -1;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN_LENGTH = -1;
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE NORMAL.FLEX8000
|
||||
BEGIN
|
||||
REGISTER_OPTIMIZATION = ON;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
RESYNTHESIZE_NETWORK = ON;
|
||||
MULTI_LEVEL_FACTORING = ON;
|
||||
SUBFACTOR_EXTRACTION = ON;
|
||||
REFACTORIZATION = ON;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = ON;
|
||||
REDUCE_LOGIC = ON;
|
||||
DECOMPOSE_GATES = ON;
|
||||
SOFT_BUFFER_INSERTION = ON;
|
||||
IGNORE_SOFT_BUFFERS = ON;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
TURBO_BIT = OFF;
|
||||
XOR_SYNTHESIS = OFF;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
MINIMIZATION = FULL;
|
||||
CARRY_CHAIN_LENGTH = 32;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN_LENGTH = 2;
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE FAST.MAX5000
|
||||
BEGIN
|
||||
REGISTER_OPTIMIZATION = ON;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
RESYNTHESIZE_NETWORK = ON;
|
||||
MULTI_LEVEL_FACTORING = ON;
|
||||
SUBFACTOR_EXTRACTION = OFF;
|
||||
REFACTORIZATION = OFF;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = ON;
|
||||
REDUCE_LOGIC = ON;
|
||||
DECOMPOSE_GATES = ON;
|
||||
SOFT_BUFFER_INSERTION = ON;
|
||||
FAST_IO = OFF;
|
||||
IGNORE_SOFT_BUFFERS = OFF;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
TURBO_BIT = OFF;
|
||||
XOR_SYNTHESIS = ON;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
MINIMIZATION = FULL;
|
||||
CARRY_CHAIN_LENGTH = -1;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN_LENGTH = -1;
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE FAST.MAX7000
|
||||
BEGIN
|
||||
REGISTER_OPTIMIZATION = ON;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
RESYNTHESIZE_NETWORK = ON;
|
||||
MULTI_LEVEL_FACTORING = ON;
|
||||
SUBFACTOR_EXTRACTION = OFF;
|
||||
REFACTORIZATION = OFF;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = ON;
|
||||
REDUCE_LOGIC = ON;
|
||||
DECOMPOSE_GATES = ON;
|
||||
SOFT_BUFFER_INSERTION = ON;
|
||||
FAST_IO = OFF;
|
||||
IGNORE_SOFT_BUFFERS = OFF;
|
||||
PARALLEL_EXPANDERS = ON;
|
||||
TURBO_BIT = ON;
|
||||
XOR_SYNTHESIS = ON;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
MINIMIZATION = FULL;
|
||||
CARRY_CHAIN_LENGTH = -1;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN_LENGTH = -1;
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE FAST.CLASSIC
|
||||
BEGIN
|
||||
REGISTER_OPTIMIZATION = OFF;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
RESYNTHESIZE_NETWORK = ON;
|
||||
MULTI_LEVEL_FACTORING = OFF;
|
||||
SUBFACTOR_EXTRACTION = OFF;
|
||||
REFACTORIZATION = OFF;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = OFF;
|
||||
REDUCE_LOGIC = OFF;
|
||||
DECOMPOSE_GATES = ON;
|
||||
SOFT_BUFFER_INSERTION = ON;
|
||||
FAST_IO = OFF;
|
||||
IGNORE_SOFT_BUFFERS = OFF;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
TURBO_BIT = ON;
|
||||
XOR_SYNTHESIS = OFF;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
MINIMIZATION = FULL;
|
||||
CARRY_CHAIN_LENGTH = -1;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN_LENGTH = -1;
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE FAST.FLEX8000
|
||||
BEGIN
|
||||
REGISTER_OPTIMIZATION = ON;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
RESYNTHESIZE_NETWORK = ON;
|
||||
MULTI_LEVEL_FACTORING = ON;
|
||||
SUBFACTOR_EXTRACTION = OFF;
|
||||
REFACTORIZATION = OFF;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = ON;
|
||||
REDUCE_LOGIC = ON;
|
||||
DECOMPOSE_GATES = ON;
|
||||
SOFT_BUFFER_INSERTION = ON;
|
||||
IGNORE_SOFT_BUFFERS = ON;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
TURBO_BIT = OFF;
|
||||
XOR_SYNTHESIS = OFF;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
MINIMIZATION = FULL;
|
||||
CARRY_CHAIN_LENGTH = 32;
|
||||
CARRY_CHAIN = AUTO;
|
||||
CASCADE_CHAIN_LENGTH = 2;
|
||||
CASCADE_CHAIN = AUTO;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE WYSIWYG.MAX5000
|
||||
BEGIN
|
||||
REGISTER_OPTIMIZATION = OFF;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
RESYNTHESIZE_NETWORK = OFF;
|
||||
MULTI_LEVEL_FACTORING = OFF;
|
||||
SUBFACTOR_EXTRACTION = OFF;
|
||||
REFACTORIZATION = OFF;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = OFF;
|
||||
REDUCE_LOGIC = OFF;
|
||||
DECOMPOSE_GATES = OFF;
|
||||
SOFT_BUFFER_INSERTION = OFF;
|
||||
FAST_IO = OFF;
|
||||
IGNORE_SOFT_BUFFERS = OFF;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
TURBO_BIT = OFF;
|
||||
XOR_SYNTHESIS = OFF;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
MINIMIZATION = PARTIAL;
|
||||
CARRY_CHAIN_LENGTH = -1;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN_LENGTH = -1;
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE WYSIWYG.MAX7000
|
||||
BEGIN
|
||||
REGISTER_OPTIMIZATION = OFF;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
RESYNTHESIZE_NETWORK = OFF;
|
||||
MULTI_LEVEL_FACTORING = OFF;
|
||||
SUBFACTOR_EXTRACTION = OFF;
|
||||
REFACTORIZATION = OFF;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = OFF;
|
||||
REDUCE_LOGIC = OFF;
|
||||
DECOMPOSE_GATES = OFF;
|
||||
SOFT_BUFFER_INSERTION = OFF;
|
||||
FAST_IO = OFF;
|
||||
IGNORE_SOFT_BUFFERS = OFF;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
TURBO_BIT = ON;
|
||||
XOR_SYNTHESIS = OFF;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
MINIMIZATION = PARTIAL;
|
||||
CARRY_CHAIN_LENGTH = -1;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN_LENGTH = -1;
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE WYSIWYG.CLASSIC
|
||||
BEGIN
|
||||
REGISTER_OPTIMIZATION = OFF;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
RESYNTHESIZE_NETWORK = ON;
|
||||
MULTI_LEVEL_FACTORING = OFF;
|
||||
SUBFACTOR_EXTRACTION = OFF;
|
||||
REFACTORIZATION = OFF;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = OFF;
|
||||
REDUCE_LOGIC = OFF;
|
||||
DECOMPOSE_GATES = ON;
|
||||
SOFT_BUFFER_INSERTION = OFF;
|
||||
FAST_IO = OFF;
|
||||
IGNORE_SOFT_BUFFERS = OFF;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
TURBO_BIT = ON;
|
||||
XOR_SYNTHESIS = OFF;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
MINIMIZATION = PARTIAL;
|
||||
CARRY_CHAIN_LENGTH = -1;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN_LENGTH = -1;
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE WYSIWYG.FLEX8000
|
||||
BEGIN
|
||||
REGISTER_OPTIMIZATION = OFF;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
RESYNTHESIZE_NETWORK = OFF;
|
||||
MULTI_LEVEL_FACTORING = OFF;
|
||||
SUBFACTOR_EXTRACTION = OFF;
|
||||
REFACTORIZATION = OFF;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = OFF;
|
||||
REDUCE_LOGIC = OFF;
|
||||
DECOMPOSE_GATES = OFF;
|
||||
SOFT_BUFFER_INSERTION = ON;
|
||||
IGNORE_SOFT_BUFFERS = ON;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
TURBO_BIT = OFF;
|
||||
XOR_SYNTHESIS = OFF;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
MINIMIZATION = PARTIAL;
|
||||
CARRY_CHAIN_LENGTH = 32;
|
||||
CARRY_CHAIN = MANUAL;
|
||||
CASCADE_CHAIN_LENGTH = 2;
|
||||
CASCADE_CHAIN = MANUAL;
|
||||
END;
|
||||
|
||||
26
src/altera/acex/k30/AY.INC
Normal file
26
src/altera/acex/k30/AY.INC
Normal file
@ -0,0 +1,26 @@
|
||||
-- Copyright (C) 1988-2000 Altera Corporation
|
||||
-- Any megafunction design, and related net list (encrypted or decrypted),
|
||||
-- support information, device programming or simulation file, and any other
|
||||
-- associated documentation or information provided by Altera or a partner
|
||||
-- under Altera's Megafunction Partnership Program may be used only to
|
||||
-- program PLD devices (but not masked PLD devices) from Altera. Any other
|
||||
-- use of such megafunction design, net list, support information, device
|
||||
-- programming or simulation file, or any other related documentation or
|
||||
-- information is prohibited for any other purpose, including, but not
|
||||
-- limited to modification, reverse engineering, de-compiling, or use with
|
||||
-- any other silicon devices, unless such use is explicitly licensed under
|
||||
-- a separate agreement with Altera or a megafunction partner. Title to
|
||||
-- the intellectual property, including patents, copyrights, trademarks,
|
||||
-- trade secrets, or maskworks, embodied in any such megafunction design,
|
||||
-- net list, support information, device programming or simulation file, or
|
||||
-- any other related documentation or information provided by Altera or a
|
||||
-- megafunction partner, remains with Altera, the megafunction partner, or
|
||||
-- their respective licensors. No other licenses, including any licenses
|
||||
-- needed under any third party's intellectual property, are provided herein.
|
||||
|
||||
-- MAX+plus II Include File
|
||||
-- Version 10.0 9/14/2000
|
||||
-- Created: Sat May 26 07:09:40 2001
|
||||
|
||||
FUNCTION ay (/reset, clk42, ay_t[8..0], ay_d_wr, ay_a_wr, d[7..0], beeper)
|
||||
RETURNS (do[7..0], ay_ch_a[3..0], ay_ch_b[3..0], ay_ch_c[3..0], ay_ch_l[9..0], ay_ch_r[9..0], ay_ch_val);
|
||||
154
src/altera/acex/k30/AY.MIF
Normal file
154
src/altera/acex/k30/AY.MIF
Normal file
@ -0,0 +1,154 @@
|
||||
DEPTH = 256; % Memory depth and width are required %
|
||||
WIDTH = 8; % Enter a decimal number %
|
||||
|
||||
ADDRESS_RADIX = HEX; % Address and value radixes are optional %
|
||||
DATA_RADIX = BIN; % Enter BIN, DEC, HEX, or OCT; unless %
|
||||
% otherwise specified, radixes = HEX %
|
||||
|
||||
-- Specify values for addresses, which can be single address or range
|
||||
|
||||
CONTENT
|
||||
BEGIN
|
||||
[0..7F] : 00000000;
|
||||
0 : 00000000 00000000
|
||||
00000000 00000000
|
||||
00000000 00000000
|
||||
00000000 11111111
|
||||
00000000 00000000
|
||||
00000000 00000000
|
||||
00000000 00000000
|
||||
00000000 00000000
|
||||
|
||||
11111111 11111111
|
||||
11111111 11111111
|
||||
11111111 11111111
|
||||
11111111 11111111
|
||||
11111111 11111111
|
||||
11111111 11111111
|
||||
11111111 00000001
|
||||
00000000 11111111
|
||||
;
|
||||
1E : 00000000;
|
||||
1F : 11111111;
|
||||
|
||||
30 : 00000000
|
||||
00000010
|
||||
00000011
|
||||
00000100
|
||||
00000110
|
||||
00001000
|
||||
00001011
|
||||
00010000
|
||||
00010110
|
||||
00100000
|
||||
00101101
|
||||
01000000
|
||||
01011010
|
||||
10000000
|
||||
10110100
|
||||
11111111;
|
||||
|
||||
[80..FF]: 00000000;
|
||||
|
||||
%
|
||||
000 - set CX, load & sub 1
|
||||
001 - load
|
||||
010 - save, if NZ,reset CX
|
||||
011 - bit_out
|
||||
100 - load & sub 1
|
||||
101 - load & sub C
|
||||
110 - if CX, save
|
||||
111 - read states /RESET, AY_F_RES
|
||||
%
|
||||
|
||||
80 :
|
||||
00010000 -- set C,CX load reg10 & sub C
|
||||
01010000 -- save reg10 & reset CX if NZ
|
||||
10110001 -- load reg11 & sub C
|
||||
01010001 -- save reg11 & reset CX if NZ
|
||||
|
||||
00100000 -- set C load reg00 & sub C
|
||||
11010000 -- save reg10 if CX
|
||||
00100001 -- load reg01 & sub C
|
||||
11010001 -- save reg11 if CX
|
||||
|
||||
00101000 -- load reg08
|
||||
01100001 -- set AY_OUT1
|
||||
|
||||
|
||||
00010010 -- set C,CX load reg12 & sub C
|
||||
01010010 -- save reg12 & reset CX if NZ
|
||||
10110011 -- load reg13 & sub C
|
||||
01010011 -- save reg13 & reset CX if NZ
|
||||
|
||||
00100010 -- set C load reg02 & sub C
|
||||
11010010 -- save reg12 if CX
|
||||
00100011 -- load reg03 & reset CX if NZ
|
||||
11010011 -- save reg13 if CX
|
||||
|
||||
00101001 -- load reg09
|
||||
01100010 -- set AY_OUT2
|
||||
|
||||
|
||||
00010100 -- set C,CX load reg14 & sub C
|
||||
01010100 -- save reg14 & reset CX if NZ
|
||||
10110101 -- load reg15 & sub C
|
||||
01010101 -- save reg15 & reset CX if NZ
|
||||
|
||||
00100100 -- set C load reg04 & sub C
|
||||
11010100 -- save reg14 if CX
|
||||
00100101 -- load reg05 & reset CX if NZ
|
||||
11010101 -- save reg15 if CX
|
||||
|
||||
00101010 -- load reg0A
|
||||
01100011 -- set AY_OUT3
|
||||
|
||||
|
||||
00010111 -- set C,CX load reg17 & dec 1
|
||||
01010111 -- save reg17 & reset CX if NZ
|
||||
00100110 -- load reg06 dec 1 ***********
|
||||
11010111 -- save reg17 if CX
|
||||
|
||||
01100100 -- set AY_SH
|
||||
00000000 -- NOP
|
||||
|
||||
00011000 -- set C,CX load reg18 & sub C
|
||||
01011000 -- save reg18 & reset CX if NZ
|
||||
10111001 -- load reg19 & sub C
|
||||
01011001 -- save reg19 & reset CX if NZ
|
||||
|
||||
00101011 -- load reg0B & sub 1
|
||||
11011000 -- save reg18 if CX
|
||||
00101100 -- load reg0C & sub C
|
||||
11011001 -- save reg19 if CX
|
||||
|
||||
01100101 -- set FORM_CLK
|
||||
|
||||
11100000 -- set CX = AY_F_RES
|
||||
|
||||
-- 00101011 -- load reg0B & sub 1
|
||||
-- 11011000 -- save reg18 if CX
|
||||
-- 00101100 -- load reg0C & sub C
|
||||
-- 11011001 -- save reg19 if CX
|
||||
|
||||
11100001 -- set CX = /RESET
|
||||
|
||||
00111111 -- load reg1F - FF ***********
|
||||
11000111 -- save reg07 if CX
|
||||
00111110 -- load reg1E - 00 ***********
|
||||
|
||||
11001101 -- save reg0D if CX
|
||||
11001000 -- save reg08 if CX
|
||||
11001001 -- save reg09 if CX
|
||||
11001010 -- save reg0a if CX
|
||||
|
||||
00100111 -- load reg07 ***********
|
||||
01100110 -- set keys_bits
|
||||
|
||||
00101101 -- load reg0D ***********
|
||||
01100111 -- set keys_bits SET-FORM-bits
|
||||
|
||||
-- 01100000 -- set AY_OUT_ALL
|
||||
|
||||
;
|
||||
END ;
|
||||
368
src/altera/acex/k30/AY.TDF
Normal file
368
src/altera/acex/k30/AY.TDF
Normal file
@ -0,0 +1,368 @@
|
||||
|
||||
TITLE "AY-3-8910";
|
||||
|
||||
include "lpm_ram_dq";
|
||||
include "lpm_add_sub";
|
||||
|
||||
SUBDESIGN ay
|
||||
(
|
||||
/RESET : INPUT;
|
||||
CLK42 : INPUT; -- â ªâë 42
|
||||
AY_T[8..0] : INPUT; -- ¢¥è¨© áç¥â稪 ⠪⮢
|
||||
|
||||
AY_D_WR : INPUT;
|
||||
AY_A_WR : INPUT;
|
||||
|
||||
D[7..0] : INPUT;
|
||||
DO[7..0] : OUTPUT;
|
||||
|
||||
AY_CH_A[3..0] : OUTPUT;
|
||||
AY_CH_B[3..0] : OUTPUT;
|
||||
AY_CH_C[3..0] : OUTPUT;
|
||||
|
||||
AY_CH_L[9..0] : OUTPUT;
|
||||
AY_CH_R[9..0] : OUTPUT;
|
||||
|
||||
AY_CH_VAL : OUTPUT; -- chanels data valid
|
||||
BEEPER : INPUT;
|
||||
|
||||
)
|
||||
VARIABLE
|
||||
|
||||
BD[7..0] : DFFE;
|
||||
BWR : DFFE;
|
||||
AWR : DFFE;
|
||||
|
||||
AY_DI[7..0] : NODE;
|
||||
AY_DO[7..0] : NODE;
|
||||
|
||||
AY_F_RES : NODE;
|
||||
AY_F_R1 : NODE;
|
||||
|
||||
AY_ADR[7..0] : DFF;
|
||||
AY_AAX[1..0] : DFF;
|
||||
|
||||
AY_X_[5..0] : DFFE;
|
||||
AY_GF[3..0] : DFFE;
|
||||
|
||||
AY_OUT[3..1] : DFFE;
|
||||
AY_OUTS[3..1] : NODE;
|
||||
|
||||
AY_CLK1 : NODE;
|
||||
AY_SH[16..0] : DFFE;
|
||||
AY_AA[3..0] : DFF;
|
||||
AY_SH_Q : NODE;
|
||||
|
||||
AY_ABLK : NODE;
|
||||
AY_BBLK : NODE;
|
||||
AY_AINV : NODE;
|
||||
AY_BINV : NODE;
|
||||
|
||||
AY_ADRX[7..0] : NODE;
|
||||
AY_CCC[8..0] : DFF;
|
||||
AY_AX[7..0] : NODE;
|
||||
AY_C : DFFE;
|
||||
AY_CX : DFFE;
|
||||
AY_CXX : DFFE;
|
||||
AY_WR : NODE;
|
||||
AY_VA[3..0] : DFFE;
|
||||
AY_VAR : DFFE;
|
||||
AY_VX : DFFE;
|
||||
|
||||
AY_DAT_WR : DFF;
|
||||
AY_DAT[7..0] : DFFE;
|
||||
|
||||
AY_DQ1[3..0] : DFFE;
|
||||
AY_DQ2[3..0] : DFFE;
|
||||
AY_DQ3[3..0] : DFFE;
|
||||
|
||||
AY_DQX[3..0] : DFFE;
|
||||
AY_OUTSX : NODE;
|
||||
AY_CH_MIX : DFF;
|
||||
|
||||
AY_AMP[3..0] : DFF;
|
||||
|
||||
AY_DD[7..0] : DFFE;
|
||||
|
||||
AY_CH_A[3..0] : DFF;
|
||||
AY_CH_B[3..0] : DFF;
|
||||
AY_CH_C[3..0] : DFF;
|
||||
|
||||
AY_CH_CS[8..0] : DFF;
|
||||
AY_CH_LX[10..0] : DFFE;
|
||||
AY_CH_RX[10..0] : DFFE;
|
||||
|
||||
-- AY_CH_L[9..0] : DFF;
|
||||
-- AY_CH_R[9..0] : DFF;
|
||||
|
||||
AY_CH_DIR[7..0] : DFFE;
|
||||
|
||||
AY_OUTS1X : NODE;
|
||||
AY_OUTS2X : NODE;
|
||||
AY_OUTS3X : NODE;
|
||||
|
||||
AY_OUTS1Y : NODE;
|
||||
-- AY_OUTS2Y : NODE;
|
||||
AY_OUTS3Y : NODE;
|
||||
|
||||
BEGIN
|
||||
|
||||
-- ====== AY8910 III version =========
|
||||
|
||||
BD[].clk = CLK42;
|
||||
AWR.clk = CLK42;
|
||||
BWR.clk = CLK42;
|
||||
|
||||
BD[].ena = AY_CCC1;
|
||||
BWR.ena = AY_CCC1;
|
||||
AWR.ena = AY_CCC1;
|
||||
|
||||
BD[7..5].clrn = !((AY_ADR[3..0] == B"00X1") or -- ch 1,2
|
||||
(AY_ADR[3..0] == B"0101") or -- ch 3
|
||||
(AY_ADR[3..0] == B"0110") -- ch shum
|
||||
);
|
||||
BD4.clrn = !((AY_ADR[3..0] == B"00X1") or -- ch 1,2
|
||||
(AY_ADR[3..0] == B"0101") -- ch 3
|
||||
);
|
||||
|
||||
BD[] = D[];
|
||||
|
||||
AWR = AY_A_WR;
|
||||
-- BWR = (AY_D_WR or !(AY_ADR[5..4] == 0));
|
||||
BWR = AY_D_WR;
|
||||
|
||||
AY_CH_DIR[].clk = AY_D_WR;
|
||||
AY_CH_DIR[].ena = (AY_ADR[] == B"XXX10000");
|
||||
AY_CH_DIR[].d = D[];
|
||||
AY_CH_DIR[].clrn= /RESET;
|
||||
|
||||
AY_CCC[].clk = CLK42;
|
||||
AY_CCC[8..0].d = AY_T[];
|
||||
|
||||
(AY_AAX[].clk,AY_ADR[].clk) = AY_A_WR;
|
||||
AY_ADR[].d = D[];
|
||||
|
||||
-- Write to 0D register
|
||||
AY_AAX0.d = (D[3..0] == B"1101");
|
||||
-- Write to AMP registers 08,09,0A
|
||||
AY_AAX1.d = (D[3..0] == B"1000") or (D[3..0] == B"1001") or (D[3..0] == B"1010");
|
||||
|
||||
-- reset signal for form generator
|
||||
-- AY_F_RES = DFF(VCC,DFF((!((AY_DO[7..5] == B"111") & AY_CCC1 & !AY_DO0) or AY_F_RES),CLK42,,),LCELL(!(AY_AAX0 or (AY_AAX1 & BD4)) or BWR),);
|
||||
|
||||
-- AY_F_R1 = DFF((!(AY_AAX0 or (AY_AAX1)) or BWR),CLK42,,);
|
||||
AY_F_R1 = DFF((!AY_AAX0 or BWR),CLK42,,);
|
||||
AY_F_RES = DFF(DFF(VCC,AY_CCC7,AY_F_R1,),AY_CCC7,AY_F_R1,);
|
||||
|
||||
AY_X_[].prn = VCC;
|
||||
|
||||
-- AY_GF[3..0].clrn = /RESET;
|
||||
-- AY_GF[3..0].clk = AY_D_WR;
|
||||
-- AY_GF[3..0].ena = AY_ADR[] == B"XXXX1101";
|
||||
-- AY_GF[3..0].d = D[3..0];
|
||||
|
||||
AY_DAT_WR.clk = CLK42;
|
||||
|
||||
CASE AY_CCC[1..0] IS
|
||||
WHEN B"00" =>
|
||||
AY_AX[] = (VCC,GND,AY_CCC[7..2]); -- CMD adress
|
||||
AY_WR = GND;
|
||||
AY_DI[] = AY_DAT[];
|
||||
|
||||
AY_DAT_WR = VCC;
|
||||
|
||||
WHEN B"01" =>
|
||||
AY_AX[] = (B"0000",AY_ADR[3..0]);
|
||||
AY_WR = !BWR;
|
||||
AY_DI[] = BD[];
|
||||
|
||||
AY_DAT_WR = VCC;
|
||||
|
||||
WHEN B"1X" =>
|
||||
AY_AX[] = (GND,GND,GND,AY_DO[4..0]);
|
||||
AY_DAT_WR = AY_DO6;
|
||||
AY_WR = !LCELL(!(AY_DO[7..5] == B"010") &
|
||||
!((AY_DO[7..5] == B"110") & AY_CXX));
|
||||
-- !((AY_DO[7..5] == B"110") & AY_CX));
|
||||
AY_DI[] = AY_DAT[];
|
||||
END CASE;
|
||||
|
||||
AY_DD[].clk = CLK42;
|
||||
AY_DD[].ena = !AY_CCC1 & !AY_CCC0;
|
||||
AY_DD[] = AY_DO[];
|
||||
|
||||
AY_DO[] = lpm_ram_dq(AY_DI[],AY_AX[],AY_WR,CLK42,CLK42)
|
||||
WITH (lpm_width=8,lpm_widthad=8,lpm_file="AY.MIF");
|
||||
|
||||
-- AY_CX.prn = !DFF((((AY_DO[7..5] == B"00X") & AY_CCC1) & (!AY_DO5 or AY_C)),CLK42,,);
|
||||
AY_CX.prn = !DFF(((AY_DO[7..5] == B"000") & AY_CCC1),CLK42,,);
|
||||
AY_CXX.prn = !DFF(((AY_DO[7..5] == B"000") & AY_CCC1),CLK42,,);
|
||||
AY_C.prn = VCC;
|
||||
|
||||
AY_CX.clk = CLK42;
|
||||
AY_CXX.clk = CLK42;
|
||||
(AY_CXX.ena,AY_CX.ena) = DFF((((AY_DO[7..5] == B"010") or (AY_DO[7..5] == B"111")) & AY_CCC1),CLK42,,);
|
||||
|
||||
IF DFF(((AY_DO[7..5] == B"010")),CLK42,,) THEN
|
||||
AY_CX = (LCELL(AY_DAT[] == 0) & AY_CX);
|
||||
-- AY_CXX = (LCELL(AY_DAT[] == 0) & AY_CXX);
|
||||
-- AY_CX = (LCELL(AY_DAT[] == 0) & AY_CX) or (AY_C & DFF(AY_DO0,CLK42,,));
|
||||
AY_CXX = (LCELL(AY_DAT[] == 0) & AY_CXX) or (AY_C & DFF(AY_DO0,CLK42,,));
|
||||
ELSE
|
||||
AY_CXX = DFF(((!/RESET & AY_DO0) or (!AY_F_RES & !AY_DO0)),CLK42,,);
|
||||
AY_CX = DFF(((!/RESET & AY_DO0) or (!AY_F_RES & !AY_DO0)),CLK42,,);
|
||||
END IF;
|
||||
|
||||
(AY_C.clk,AY_DAT[].clk) = CLK42;
|
||||
(AY_C.ena,AY_DAT[].ena) = !DFF(AY_DAT_WR,CLK42,,);
|
||||
(AY_C,AY_DAT[]) = (GND,AY_DO[]) - (B"00000000",DFF((DFF(!AY_DO5,CLK42,,) or (AY_C & DFF(AY_DO7,CLK42,,))),CLK42,,));
|
||||
|
||||
AY_OUT[].clk = CLK42;
|
||||
|
||||
AY_AMP[].clk = CLK42;
|
||||
AY_AMP[] = ((AY_DAT[3..0] or AY_DAT[4]) & (AY_AA[] or !AY_DAT[4]));
|
||||
|
||||
AY_DQ1[].clk = CLK42;
|
||||
AY_OUTS1 = DFF(((AY_DO[7..0] == B"011XX001") & AY_CCC1),CLK42,,);
|
||||
AY_OUT1.ena = AY_OUTS1;
|
||||
AY_OUT1 = AY_CX xor AY_OUT1;
|
||||
AY_DQ1[].ena = AY_OUTS1;
|
||||
AY_DQ1[] = AY_AMP[] & LCELL((AY_OUT1 or AY_X_0) & (AY_X_3 or AY_SH0));
|
||||
|
||||
AY_DQ2[].clk = CLK42;
|
||||
AY_OUTS2 = DFF(((AY_DO[7..0] == B"011XX010") & AY_CCC1),CLK42,,);
|
||||
AY_OUT2.ena = AY_OUTS2;
|
||||
AY_OUT2 = AY_CX xor AY_OUT2;
|
||||
AY_DQ2[].ena = AY_OUTS2;
|
||||
AY_DQ2[] = AY_AMP[] & LCELL((AY_OUT2 or AY_X_1) & (AY_X_4 or AY_SH0));
|
||||
|
||||
AY_DQ3[].clk = CLK42;
|
||||
AY_OUTS3 = DFF(((AY_DO[7..0] == B"011XX011") & AY_CCC1),CLK42,,);
|
||||
AY_OUT3.ena = AY_OUTS3;
|
||||
AY_OUT3 = AY_CX xor AY_OUT3;
|
||||
AY_DQ3[].ena = AY_OUTS3;
|
||||
AY_DQ3[] = AY_AMP[] & LCELL((AY_OUT3 or AY_X_2) & (AY_X_5 or AY_SH0));
|
||||
|
||||
AY_OUTSX = DFF((((AY_DO[7..0] == B"011XX01X") or
|
||||
(AY_DO[7..0] == B"011XX0X1")) & AY_CCC1),CLK42,,);
|
||||
AY_DQX[].clk = CLK42;
|
||||
AY_DQX[].ena = AY_OUTSX;
|
||||
AY_DQX[] = AY_AMP[] & AY_CH_MIX;
|
||||
|
||||
AY_DQX[].clrn = !AY_SH_Q;
|
||||
AY_DQX[].prn = (B"0010") or !DFF((AY_SH_Q & BEEPER),CLK42,,);
|
||||
|
||||
AY_CH_MIX.clk = CLK42;
|
||||
CASE AY_DO[1..0] IS
|
||||
WHEN 0,1 => AY_CH_MIX = LCELL((AY_OUT1 or AY_X_0) & (AY_X_3 or AY_SH0));
|
||||
WHEN 2 => AY_CH_MIX = LCELL((AY_OUT2 or AY_X_1) & (AY_X_4 or AY_SH0));
|
||||
WHEN 3 => AY_CH_MIX = LCELL((AY_OUT3 or AY_X_2) & (AY_X_5 or AY_SH0));
|
||||
END CASE;
|
||||
|
||||
AY_SH_Q = DFF(((AY_DO[7..0] == B"011XX100") & AY_CCC1),CLK42,,);
|
||||
|
||||
AY_SH[].clk = CLK42;
|
||||
AY_SH[].prn = /RESET;
|
||||
AY_SH[].ena = AY_SH_Q & AY_CXX;
|
||||
AY_SH[] = ((AY_SH3 xor AY_SH0),AY_SH[16..1]);
|
||||
|
||||
AY_VAR.clk = CLK42;
|
||||
AY_VX.clk = CLK42;
|
||||
AY_VA[].clk = CLK42;
|
||||
|
||||
(AY_VAR.clrn,AY_VA[].clrn) = AY_F_RES;
|
||||
AY_VX.clrn = AY_F_RES;
|
||||
|
||||
(AY_VX.ena,AY_VA[].ena,AY_VAR.ena) = DFF(((AY_DO[7..0] == B"011XX101") & AY_CCC1 & !AY_BBLK & AY_CX),CLK42,,);
|
||||
(AY_VX,AY_VA[],AY_VAR) = (AY_VX,AY_VA[],AY_VAR) + 1;
|
||||
|
||||
AY_X_[].clk = CLK42;
|
||||
AY_X_[].ena = DFF(((AY_DO[7..0] == B"011XX110") & AY_CCC1),CLK42,,);
|
||||
AY_X_[] = AY_DAT[5..0];
|
||||
|
||||
AY_GF[].clk = CLK42;
|
||||
AY_GF[].ena = DFF(((AY_DO[7..0] == B"011XX111") & AY_CCC1),CLK42,,);
|
||||
AY_GF[] = AY_DAT[3..0];
|
||||
|
||||
-- block count when 1-st period end
|
||||
AY_BBLK = DFF((AY_VX & (AY_GF0 or !AY_GF3)),CLK42,,); -- VA_COUNT_STOP
|
||||
|
||||
-- set ALL ZERO when 1-st period end
|
||||
AY_ABLK = DFF((!AY_GF3 & AY_VX),CLK42,,);
|
||||
|
||||
-- inverse 2-nd-s periods
|
||||
AY_BINV = DFF((AY_VX & ((AY_GF[] == B"1X10") or (AY_GF == B"1X01"))),CLK42,,);
|
||||
|
||||
-- inverse ALL
|
||||
AY_AINV = AY_GF2;
|
||||
|
||||
AY_AA[].clrn= VCC;
|
||||
AY_AA[].clk = CLK42;
|
||||
AY_AA[].d = (AY_VA[] xor AY_BINV xor !AY_AINV) & !AY_ABLK;
|
||||
|
||||
%
|
||||
AY_AA[].clrn= VCC;
|
||||
AY_AA[].prn = GND;
|
||||
AY_AA[].clk = CLK42;
|
||||
AY_AA[] = VCC;
|
||||
%
|
||||
|
||||
AY_CH_A[3..0].clk = AY_CCC7;
|
||||
AY_CH_B[3..0].clk = AY_CCC7;
|
||||
AY_CH_C[3..0].clk = AY_CCC7;
|
||||
|
||||
AY_CH_A[3..0] = AY_DQ1[3..0];
|
||||
AY_CH_B[3..0] = AY_DQ2[3..0];
|
||||
AY_CH_C[3..0] = AY_DQ3[3..0];
|
||||
|
||||
DO[7..0] = AY_DD[];
|
||||
|
||||
AY_CH_CS[].clk = CLK42;
|
||||
CASE AY_DQX[] IS
|
||||
WHEN 15 => AY_CH_CS[] = 360 ;
|
||||
WHEN 14 => AY_CH_CS[] = 255 ;
|
||||
WHEN 13 => AY_CH_CS[] = 180 ;
|
||||
WHEN 12 => AY_CH_CS[] = 127 ;
|
||||
WHEN 11 => AY_CH_CS[] = 90 ;
|
||||
WHEN 10 => AY_CH_CS[] = 64 ;
|
||||
WHEN 9 => AY_CH_CS[] = 45 ;
|
||||
WHEN 8 => AY_CH_CS[] = 32 ;
|
||||
WHEN 7 => AY_CH_CS[] = 22 ;
|
||||
WHEN 6 => AY_CH_CS[] = 16 ;
|
||||
WHEN 5 => AY_CH_CS[] = 11 ;
|
||||
WHEN 4 => AY_CH_CS[] = 8 ;
|
||||
WHEN 3 => AY_CH_CS[] = 6 ;
|
||||
WHEN 2 => AY_CH_CS[] = 4 ;
|
||||
WHEN 1 => AY_CH_CS[] = 2 ;
|
||||
WHEN 0 => AY_CH_CS[] = 0 ;
|
||||
END CASE;
|
||||
|
||||
AY_OUTS1X = DFF(AY_OUTS1,CLK42,,);
|
||||
AY_OUTS2X = DFF((AY_OUTS2 or AY_SH_Q),CLK42,,);
|
||||
AY_OUTS3X = DFF(AY_OUTS3,CLK42,,);
|
||||
|
||||
AY_OUTS1Y = DFF(AY_OUTS1 or AY_OUTS1X,CLK42,,);
|
||||
-- AY_OUTS2Y = DFF(AY_OUTS2 or AY_OUTS2X,CLK42,,);
|
||||
AY_OUTS3Y = DFF(AY_OUTS3 or AY_OUTS3X,CLK42,,);
|
||||
|
||||
(AY_CH_LX[].clrn,AY_CH_RX[].clrn) = !DFF((AY_CCC[7..2] == 0),CLK42,,);
|
||||
|
||||
(AY_CH_LX[],,) = LPM_ADD_SUB (,AY_CH_LX[],(B"00",AY_CH_CS[]),,,,)
|
||||
WITH(LPM_WIDTH=11,LPM_REPRESENTATION="UNSIGNED");
|
||||
(AY_CH_RX[],,) = LPM_ADD_SUB (,AY_CH_RX[],(B"00",AY_CH_CS[]),,,,)
|
||||
WITH (LPM_WIDTH=11,LPM_REPRESENTATION="UNSIGNED");
|
||||
|
||||
AY_CH_LX[].clk = CLK42;
|
||||
AY_CH_RX[].clk = CLK42;
|
||||
AY_CH_LX[].ena = DFF(DFF((AY_OUTS1 or AY_OUTS1Y or AY_OUTS2X or AY_OUTS2),CLK42,,),CLK42,,);
|
||||
AY_CH_RX[].ena = DFF(DFF((AY_OUTS3 or AY_OUTS3Y or AY_OUTS2X or AY_OUTS2),CLK42,,),CLK42,,);
|
||||
|
||||
AY_CH_VAL = DFF((AY_CCC[7..2] == B"111100"),CLK42,,);
|
||||
|
||||
-- AY_CH_L[].clk = AY_CH_VAL;
|
||||
-- AY_CH_R[].clk = AY_CH_VAL;
|
||||
AY_CH_L[] = AY_CH_LX[10..1];
|
||||
AY_CH_R[] = AY_CH_RX[10..1];
|
||||
|
||||
END;
|
||||
|
||||
568
src/altera/acex/k30/DCP.ACF
Normal file
568
src/altera/acex/k30/DCP.ACF
Normal file
@ -0,0 +1,568 @@
|
||||
--
|
||||
-- Copyright (C) 1988-2000 Altera Corporation
|
||||
-- Any megafunction design, and related net list (encrypted or decrypted),
|
||||
-- support information, device programming or simulation file, and any other
|
||||
-- associated documentation or information provided by Altera or a partner
|
||||
-- under Altera's Megafunction Partnership Program may be used only to
|
||||
-- program PLD devices (but not masked PLD devices) from Altera. Any other
|
||||
-- use of such megafunction design, net list, support information, device
|
||||
-- programming or simulation file, or any other related documentation or
|
||||
-- information is prohibited for any other purpose, including, but not
|
||||
-- limited to modification, reverse engineering, de-compiling, or use with
|
||||
-- any other silicon devices, unless such use is explicitly licensed under
|
||||
-- a separate agreement with Altera or a megafunction partner. Title to
|
||||
-- the intellectual property, including patents, copyrights, trademarks,
|
||||
-- trade secrets, or maskworks, embodied in any such megafunction design,
|
||||
-- net list, support information, device programming or simulation file, or
|
||||
-- any other related documentation or information provided by Altera or a
|
||||
-- megafunction partner, remains with Altera, the megafunction partner, or
|
||||
-- their respective licensors. No other licenses, including any licenses
|
||||
-- needed under any third party's intellectual property, are provided herein.
|
||||
--
|
||||
CHIP dcp
|
||||
BEGIN
|
||||
DEVICE = EP1K30FC256-3;
|
||||
END;
|
||||
|
||||
DEFAULT_DEVICES
|
||||
BEGIN
|
||||
AUTO_DEVICE = EP1K100FC484-1;
|
||||
AUTO_DEVICE = EP1K100FC256-1;
|
||||
AUTO_DEVICE = EP1K100QC208-1;
|
||||
AUTO_DEVICE = EP1K50FC484-1;
|
||||
AUTO_DEVICE = EP1K50FC256-1;
|
||||
AUTO_DEVICE = EP1K50QC208-1;
|
||||
AUTO_DEVICE = EP1K50TC144-1;
|
||||
AUTO_DEVICE = EP1K30FC256-1;
|
||||
AUTO_DEVICE = EP1K30QC208-1;
|
||||
AUTO_DEVICE = EP1K30TC144-1;
|
||||
ASK_BEFORE_ADDING_EXTRA_DEVICES = ON;
|
||||
END;
|
||||
|
||||
TIMING_POINT
|
||||
BEGIN
|
||||
DEVICE_FOR_TIMING_SYNTHESIS = EP1K30FC256-3;
|
||||
FREQUENCY = 200MHz;
|
||||
MAINTAIN_STABLE_SYNTHESIS = OFF;
|
||||
CUT_ALL_CLEAR_PRESET = ON;
|
||||
CUT_ALL_BIDIR = ON;
|
||||
END;
|
||||
|
||||
IGNORED_ASSIGNMENTS
|
||||
BEGIN
|
||||
FIT_IGNORE_TIMING = OFF;
|
||||
DEMOTE_SPECIFIC_LCELL_ASSIGNMENTS_TO_LAB_ASSIGNMENTS = OFF;
|
||||
IGNORE_LOCAL_ROUTING_ASSIGNMENTS = OFF;
|
||||
IGNORE_DEVICE_ASSIGNMENTS = OFF;
|
||||
IGNORE_LC_ASSIGNMENTS = OFF;
|
||||
IGNORE_PIN_ASSIGNMENTS = OFF;
|
||||
IGNORE_CHIP_ASSIGNMENTS = OFF;
|
||||
IGNORE_TIMING_ASSIGNMENTS = OFF;
|
||||
IGNORE_LOGIC_OPTION_ASSIGNMENTS = OFF;
|
||||
IGNORE_CLIQUE_ASSIGNMENTS = OFF;
|
||||
END;
|
||||
|
||||
GLOBAL_PROJECT_DEVICE_OPTIONS
|
||||
BEGIN
|
||||
MAX7000B_ENABLE_VREFB = OFF;
|
||||
MAX7000B_ENABLE_VREFA = OFF;
|
||||
MAX7000B_VCCIO_IOBANK2 = 3.3V;
|
||||
MAX7000B_VCCIO_IOBANK1 = 3.3V;
|
||||
CONFIG_EPROM_PULLUP_RESISTOR = ON;
|
||||
CONFIG_EPROM_USER_CODE = FFFFFFFF;
|
||||
FLEX_CONFIGURATION_EPROM = AUTO;
|
||||
MAX7000AE_ENABLE_JTAG = ON;
|
||||
MAX7000AE_USER_CODE = FFFFFFFF;
|
||||
FLEX6000_USE_LOW_VOLTAGE_CONFIGURATION_EPROM = OFF;
|
||||
FLEX10KA_USE_LOW_VOLTAGE_CONFIGURATION_EPROM = ON;
|
||||
FLEX10K_USE_LOW_VOLTAGE_CONFIGURATION_EPROM = OFF;
|
||||
FLEX6000_ENABLE_JTAG = OFF;
|
||||
CONFIG_SCHEME_FLEX_6000 = PASSIVE_SERIAL;
|
||||
MULTIVOLT_IO = OFF;
|
||||
MAX7000S_ENABLE_JTAG = ON;
|
||||
FLEX10K_ENABLE_LOCK_OUTPUT = OFF;
|
||||
MAX7000S_USER_CODE = FFFF;
|
||||
CONFIG_SCHEME_10K = PASSIVE_SERIAL;
|
||||
FLEX10K_JTAG_USER_CODE = 7F;
|
||||
ENABLE_INIT_DONE_OUTPUT = OFF;
|
||||
ENABLE_CHIP_WIDE_OE = OFF;
|
||||
ENABLE_CHIP_WIDE_RESET = OFF;
|
||||
nCEO = UNRESERVED;
|
||||
CLKUSR = UNRESERVED;
|
||||
ADD17 = UNRESERVED;
|
||||
ADD16 = UNRESERVED;
|
||||
ADD15 = UNRESERVED;
|
||||
ADD14 = UNRESERVED;
|
||||
ADD13 = UNRESERVED;
|
||||
ADD0_TO_ADD12 = UNRESERVED;
|
||||
SDOUT = RESERVED_DRIVES_OUT;
|
||||
RDCLK = UNRESERVED;
|
||||
RDYnBUSY = UNRESERVED;
|
||||
nWS_nRS_nCS_CS = UNRESERVED;
|
||||
DATA1_TO_DATA7 = UNRESERVED;
|
||||
DATA0 = RESERVED_TRI_STATED;
|
||||
FLEX8000_ENABLE_JTAG = OFF;
|
||||
CONFIG_SCHEME = ACTIVE_SERIAL;
|
||||
DISABLE_TIME_OUT = OFF;
|
||||
ENABLE_DCLK_OUTPUT = OFF;
|
||||
RELEASE_CLEARS = OFF;
|
||||
AUTO_RESTART = OFF;
|
||||
USER_CLOCK = OFF;
|
||||
SECURITY_BIT = OFF;
|
||||
RESERVED_PINS_PERCENT = 0;
|
||||
RESERVED_LCELLS_PERCENT = 0;
|
||||
END;
|
||||
|
||||
GLOBAL_PROJECT_SYNTHESIS_ASSIGNMENT_OPTIONS
|
||||
BEGIN
|
||||
STYLE = FAST;
|
||||
MULTI_LEVEL_SYNTHESIS_MAX9000 = ON;
|
||||
AUTO_IMPLEMENT_IN_EAB = OFF;
|
||||
AUTO_OPEN_DRAIN_PINS = ON;
|
||||
ONE_HOT_STATE_MACHINE_ENCODING = OFF;
|
||||
AUTO_REGISTER_PACKING = OFF;
|
||||
DEVICE_FAMILY = ACEX1K;
|
||||
AUTO_FAST_IO = OFF;
|
||||
AUTO_GLOBAL_OE = ON;
|
||||
AUTO_GLOBAL_PRESET = ON;
|
||||
AUTO_GLOBAL_CLEAR = ON;
|
||||
AUTO_GLOBAL_CLOCK = ON;
|
||||
MULTI_LEVEL_SYNTHESIS_MAX5000_7000 = OFF;
|
||||
OPTIMIZE_FOR_SPEED = 5;
|
||||
END;
|
||||
|
||||
COMPILER_PROCESSING_CONFIGURATION
|
||||
BEGIN
|
||||
USE_QUARTUS_FITTER = ON;
|
||||
PRESERVE_ALL_NODE_NAME_SYNONYMS = OFF;
|
||||
FITTER_SETTINGS = NORMAL;
|
||||
SMART_RECOMPILE = OFF;
|
||||
GENERATE_AHDL_TDO_FILE = OFF;
|
||||
RPT_FILE_USER_ASSIGNMENTS = ON;
|
||||
RPT_FILE_LCELL_INTERCONNECT = ON;
|
||||
RPT_FILE_HIERARCHY = ON;
|
||||
RPT_FILE_EQUATIONS = ON;
|
||||
LINKED_SNF_EXTRACTOR = OFF;
|
||||
OPTIMIZE_TIMING_SNF = OFF;
|
||||
TIMING_SNF_EXTRACTOR = ON;
|
||||
FUNCTIONAL_SNF_EXTRACTOR = OFF;
|
||||
DESIGN_DOCTOR_RULES = EPLD;
|
||||
DESIGN_DOCTOR = OFF;
|
||||
END;
|
||||
|
||||
COMPILER_INTERFACES_CONFIGURATION
|
||||
BEGIN
|
||||
NETLIST_OUTPUT_TIME_SCALE = 0.1ns;
|
||||
EDIF_INPUT_SHOW_LMF_MAPPING_MESSAGES = OFF;
|
||||
EDIF_BUS_DELIMITERS = [];
|
||||
EDIF_FLATTEN_BUS = OFF;
|
||||
EDIF_OUTPUT_FORCE_0NS_DELAYS = OFF;
|
||||
EDIF_OUTPUT_INCLUDE_SPECIAL_PRIM = OFF;
|
||||
EDIF_OUTPUT_MAP_ILLEGAL_CHAR = OFF;
|
||||
EDIF_OUTPUT_DELAY_CONSTRUCTS = EDO_FILE;
|
||||
EDIF_OUTPUT_USE_EDC = OFF;
|
||||
EDIF_INPUT_USE_LMF2 = OFF;
|
||||
EDIF_INPUT_USE_LMF1 = OFF;
|
||||
EDIF_OUTPUT_GND = GND;
|
||||
EDIF_OUTPUT_VCC = VCC;
|
||||
EDIF_INPUT_GND = GND;
|
||||
EDIF_INPUT_VCC = VCC;
|
||||
EDIF_OUTPUT_EDC_FILE = *.edc;
|
||||
EDIF_INPUT_LMF2 = *.lmf;
|
||||
EDIF_INPUT_LMF1 = *.lmf;
|
||||
VHDL_GENERATE_CONFIGURATION_DECLARATION = OFF;
|
||||
VHDL_OUTPUT_DELAY_CONSTRUCTS = VHO_FILE;
|
||||
VERILOG_OUTPUT_DELAY_CONSTRUCTS = VO_FILE;
|
||||
VHDL_FLATTEN_BUS = OFF;
|
||||
VERILOG_FLATTEN_BUS = OFF;
|
||||
EDIF_TRUNCATE_HIERARCHY_PATH = OFF;
|
||||
VHDL_TRUNCATE_HIERARCHY_PATH = OFF;
|
||||
VERILOG_TRUNCATE_HIERARCHY_PATH = OFF;
|
||||
VERILOG_OUTPUT_MAP_ILLEGAL_CHAR = OFF;
|
||||
VHDL_WRITER_VERSION = VHDL87;
|
||||
VHDL_READER_VERSION = VHDL87;
|
||||
SYNOPSYS_MAPPING_EFFORT = MEDIUM;
|
||||
SYNOPSYS_BOUNDARY_OPTIMIZATION = OFF;
|
||||
SYNOPSYS_HIERARCHICAL_COMPILATION = ON;
|
||||
SYNOPSYS_DESIGNWARE = OFF;
|
||||
SYNOPSYS_COMPILER = DESIGN;
|
||||
USE_SYNOPSYS_SYNTHESIS = OFF;
|
||||
VHDL_NETLIST_WRITER = OFF;
|
||||
VERILOG_NETLIST_WRITER = OFF;
|
||||
XNF_GENERATE_AHDL_TDX_FILE = ON;
|
||||
XNF_TRANSLATE_INTERNAL_NODE_NAMES = ON;
|
||||
XNF_EMULATE_TRI_STATE_BUSES = INTERNAL_LOGIC;
|
||||
EDIF_OUTPUT_VERSION = 200;
|
||||
EDIF_NETLIST_WRITER = OFF;
|
||||
END;
|
||||
|
||||
CUSTOM_DESIGN_DOCTOR_RULES
|
||||
BEGIN
|
||||
MASTER_RESET = OFF;
|
||||
EXPANDER_NETWORKS = ON;
|
||||
RACE_CONDITIONS = ON;
|
||||
DELAY_CHAINS = ON;
|
||||
ASYNCHRONOUS_INPUTS = ON;
|
||||
PRESET_CLEAR_NETWORKS = ON;
|
||||
STATIC_HAZARDS_AFTER_SYNTHESIS = OFF;
|
||||
STATIC_HAZARDS_BEFORE_SYNTHESIS = ON;
|
||||
MULTI_CLOCK_NETWORKS = ON;
|
||||
MULTI_LEVEL_CLOCKS = ON;
|
||||
GATED_CLOCKS = ON;
|
||||
RIPPLE_CLOCKS = ON;
|
||||
END;
|
||||
|
||||
SIMULATOR_CONFIGURATION
|
||||
BEGIN
|
||||
END_TIME = 5.0us;
|
||||
BIDIR_PIN = STRONG;
|
||||
START_TIME = 0.0ns;
|
||||
GLITCH_TIME = 0.0ns;
|
||||
GLITCH = OFF;
|
||||
OSCILLATION_TIME = 0.0ns;
|
||||
OSCILLATION = OFF;
|
||||
CHECK_OUTPUTS = OFF;
|
||||
SETUP_HOLD = OFF;
|
||||
USE_DEVICE = OFF;
|
||||
END;
|
||||
|
||||
TIMING_ANALYZER_CONFIGURATION
|
||||
BEGIN
|
||||
ANALYSIS_MODE = REGISTERED_PERFORMANCE;
|
||||
CUT_OFF_RAM_REGISTERED_WE_PATHS = OFF;
|
||||
LIST_PATH_FREQUENCY = 10MHz;
|
||||
LIST_PATH_COUNT = 10;
|
||||
REGISTERED_PERFORMANCE_OPTIONS = NUMBER_OF_PATHS;
|
||||
INCLUDE_PATHS_LESS_THAN_VALUE = 214.7483647ms;
|
||||
INCLUDE_PATHS_LESS_THAN = OFF;
|
||||
INCLUDE_PATHS_GREATER_THAN_VALUE = 0.0ns;
|
||||
INCLUDE_PATHS_GREATER_THAN = OFF;
|
||||
DELAY_MATRIX_OPTIONS = SHOW_ALL_PATHS;
|
||||
CELL_WIDTH = 18;
|
||||
LIST_ONLY_LONGEST_PATH = ON;
|
||||
CUT_OFF_CLEAR_AND_PRESET_PATHS = ON;
|
||||
CUT_OFF_IO_PIN_FEEDBACK = ON;
|
||||
AUTO_RECALCULATE = OFF;
|
||||
END;
|
||||
|
||||
OTHER_CONFIGURATION
|
||||
BEGIN
|
||||
LAST_MAXPLUS2_VERSION = 10.0;
|
||||
EXPLICIT_FAMILY = 1;
|
||||
ROW_PINS_LCELL_INSERT = ON;
|
||||
CARRY_OUT_PINS_LCELL_INSERT = OFF;
|
||||
NORMAL_LCELL_INSERT = ON;
|
||||
FLEX_10K_52_COLUMNS = 40;
|
||||
DEFAULT_9K_EXP_PER_LCELL = 1/2;
|
||||
LOCAL_INTERCONNECT_PER_LAB_PERCENT = 100;
|
||||
LCELLS_PER_ROW_PERCENT = 100;
|
||||
FAN_IN_PER_LCELL_PERCENT = 100;
|
||||
EXP_PER_LCELL_PERCENT = 100;
|
||||
ROW_PINS_PERCENT = 50;
|
||||
ORIGINAL_MAXPLUS2_VERSION = 9.6;
|
||||
COMPILER_DATA = "1,1,0,1,0,0,0,1,1,1,1,0,1,1,1";
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE NORMAL.MAX5000
|
||||
BEGIN
|
||||
REGISTER_OPTIMIZATION = ON;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
RESYNTHESIZE_NETWORK = ON;
|
||||
MULTI_LEVEL_FACTORING = ON;
|
||||
SUBFACTOR_EXTRACTION = ON;
|
||||
REFACTORIZATION = ON;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = ON;
|
||||
REDUCE_LOGIC = ON;
|
||||
DECOMPOSE_GATES = ON;
|
||||
SOFT_BUFFER_INSERTION = ON;
|
||||
FAST_IO = OFF;
|
||||
IGNORE_SOFT_BUFFERS = OFF;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
TURBO_BIT = OFF;
|
||||
XOR_SYNTHESIS = ON;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
MINIMIZATION = FULL;
|
||||
CARRY_CHAIN_LENGTH = -1;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN_LENGTH = -1;
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE NORMAL.MAX7000
|
||||
BEGIN
|
||||
REGISTER_OPTIMIZATION = ON;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
RESYNTHESIZE_NETWORK = ON;
|
||||
MULTI_LEVEL_FACTORING = ON;
|
||||
SUBFACTOR_EXTRACTION = ON;
|
||||
REFACTORIZATION = ON;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = ON;
|
||||
REDUCE_LOGIC = ON;
|
||||
DECOMPOSE_GATES = ON;
|
||||
SOFT_BUFFER_INSERTION = ON;
|
||||
FAST_IO = OFF;
|
||||
IGNORE_SOFT_BUFFERS = OFF;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
TURBO_BIT = ON;
|
||||
XOR_SYNTHESIS = ON;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
MINIMIZATION = FULL;
|
||||
CARRY_CHAIN_LENGTH = -1;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN_LENGTH = -1;
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE NORMAL.CLASSIC
|
||||
BEGIN
|
||||
REGISTER_OPTIMIZATION = OFF;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
RESYNTHESIZE_NETWORK = ON;
|
||||
MULTI_LEVEL_FACTORING = OFF;
|
||||
SUBFACTOR_EXTRACTION = OFF;
|
||||
REFACTORIZATION = OFF;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = OFF;
|
||||
REDUCE_LOGIC = OFF;
|
||||
DECOMPOSE_GATES = ON;
|
||||
SOFT_BUFFER_INSERTION = ON;
|
||||
FAST_IO = OFF;
|
||||
IGNORE_SOFT_BUFFERS = OFF;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
TURBO_BIT = ON;
|
||||
XOR_SYNTHESIS = OFF;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
MINIMIZATION = FULL;
|
||||
CARRY_CHAIN_LENGTH = -1;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN_LENGTH = -1;
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE NORMAL.FLEX8000
|
||||
BEGIN
|
||||
REGISTER_OPTIMIZATION = ON;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
RESYNTHESIZE_NETWORK = ON;
|
||||
MULTI_LEVEL_FACTORING = ON;
|
||||
SUBFACTOR_EXTRACTION = ON;
|
||||
REFACTORIZATION = ON;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = ON;
|
||||
REDUCE_LOGIC = ON;
|
||||
DECOMPOSE_GATES = ON;
|
||||
SOFT_BUFFER_INSERTION = ON;
|
||||
IGNORE_SOFT_BUFFERS = ON;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
TURBO_BIT = OFF;
|
||||
XOR_SYNTHESIS = OFF;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
MINIMIZATION = FULL;
|
||||
CARRY_CHAIN_LENGTH = 32;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN_LENGTH = 2;
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE FAST.MAX5000
|
||||
BEGIN
|
||||
REGISTER_OPTIMIZATION = ON;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
RESYNTHESIZE_NETWORK = ON;
|
||||
MULTI_LEVEL_FACTORING = ON;
|
||||
SUBFACTOR_EXTRACTION = OFF;
|
||||
REFACTORIZATION = OFF;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = ON;
|
||||
REDUCE_LOGIC = ON;
|
||||
DECOMPOSE_GATES = ON;
|
||||
SOFT_BUFFER_INSERTION = ON;
|
||||
FAST_IO = OFF;
|
||||
IGNORE_SOFT_BUFFERS = OFF;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
TURBO_BIT = OFF;
|
||||
XOR_SYNTHESIS = ON;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
MINIMIZATION = FULL;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE FAST.MAX7000
|
||||
BEGIN
|
||||
REGISTER_OPTIMIZATION = ON;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
RESYNTHESIZE_NETWORK = ON;
|
||||
MULTI_LEVEL_FACTORING = ON;
|
||||
SUBFACTOR_EXTRACTION = OFF;
|
||||
REFACTORIZATION = OFF;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = ON;
|
||||
REDUCE_LOGIC = ON;
|
||||
DECOMPOSE_GATES = ON;
|
||||
SOFT_BUFFER_INSERTION = ON;
|
||||
FAST_IO = OFF;
|
||||
IGNORE_SOFT_BUFFERS = OFF;
|
||||
PARALLEL_EXPANDERS = ON;
|
||||
TURBO_BIT = ON;
|
||||
XOR_SYNTHESIS = ON;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
MINIMIZATION = FULL;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE FAST.CLASSIC
|
||||
BEGIN
|
||||
REGISTER_OPTIMIZATION = OFF;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
RESYNTHESIZE_NETWORK = ON;
|
||||
MULTI_LEVEL_FACTORING = OFF;
|
||||
SUBFACTOR_EXTRACTION = OFF;
|
||||
REFACTORIZATION = OFF;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = OFF;
|
||||
REDUCE_LOGIC = OFF;
|
||||
DECOMPOSE_GATES = ON;
|
||||
SOFT_BUFFER_INSERTION = ON;
|
||||
FAST_IO = OFF;
|
||||
IGNORE_SOFT_BUFFERS = OFF;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
TURBO_BIT = ON;
|
||||
XOR_SYNTHESIS = OFF;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
MINIMIZATION = FULL;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE FAST.FLEX8000
|
||||
BEGIN
|
||||
SUBFACTOR_EXTRACTION = OFF;
|
||||
REFACTORIZATION = OFF;
|
||||
REGISTER_OPTIMIZATION = ON;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
RESYNTHESIZE_NETWORK = ON;
|
||||
MULTI_LEVEL_FACTORING = ON;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = ON;
|
||||
REDUCE_LOGIC = ON;
|
||||
DECOMPOSE_GATES = ON;
|
||||
SOFT_BUFFER_INSERTION = ON;
|
||||
IGNORE_SOFT_BUFFERS = ON;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
TURBO_BIT = OFF;
|
||||
XOR_SYNTHESIS = OFF;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
MINIMIZATION = FULL;
|
||||
CARRY_CHAIN_LENGTH = 32;
|
||||
CARRY_CHAIN = AUTO;
|
||||
CASCADE_CHAIN_LENGTH = 2;
|
||||
CASCADE_CHAIN = AUTO;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE WYSIWYG.MAX5000
|
||||
BEGIN
|
||||
REGISTER_OPTIMIZATION = OFF;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
RESYNTHESIZE_NETWORK = OFF;
|
||||
MULTI_LEVEL_FACTORING = OFF;
|
||||
SUBFACTOR_EXTRACTION = OFF;
|
||||
REFACTORIZATION = OFF;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = OFF;
|
||||
REDUCE_LOGIC = OFF;
|
||||
DECOMPOSE_GATES = OFF;
|
||||
SOFT_BUFFER_INSERTION = OFF;
|
||||
FAST_IO = OFF;
|
||||
IGNORE_SOFT_BUFFERS = OFF;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
TURBO_BIT = OFF;
|
||||
XOR_SYNTHESIS = OFF;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
MINIMIZATION = PARTIAL;
|
||||
CARRY_CHAIN_LENGTH = -1;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN_LENGTH = -1;
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE WYSIWYG.MAX7000
|
||||
BEGIN
|
||||
REGISTER_OPTIMIZATION = OFF;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
RESYNTHESIZE_NETWORK = OFF;
|
||||
MULTI_LEVEL_FACTORING = OFF;
|
||||
SUBFACTOR_EXTRACTION = OFF;
|
||||
REFACTORIZATION = OFF;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = OFF;
|
||||
REDUCE_LOGIC = OFF;
|
||||
DECOMPOSE_GATES = OFF;
|
||||
SOFT_BUFFER_INSERTION = OFF;
|
||||
FAST_IO = OFF;
|
||||
IGNORE_SOFT_BUFFERS = OFF;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
TURBO_BIT = ON;
|
||||
XOR_SYNTHESIS = OFF;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
MINIMIZATION = PARTIAL;
|
||||
CARRY_CHAIN_LENGTH = -1;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN_LENGTH = -1;
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE WYSIWYG.CLASSIC
|
||||
BEGIN
|
||||
REGISTER_OPTIMIZATION = OFF;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
RESYNTHESIZE_NETWORK = ON;
|
||||
MULTI_LEVEL_FACTORING = OFF;
|
||||
SUBFACTOR_EXTRACTION = OFF;
|
||||
REFACTORIZATION = OFF;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = OFF;
|
||||
REDUCE_LOGIC = OFF;
|
||||
DECOMPOSE_GATES = ON;
|
||||
SOFT_BUFFER_INSERTION = OFF;
|
||||
FAST_IO = OFF;
|
||||
IGNORE_SOFT_BUFFERS = OFF;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
TURBO_BIT = ON;
|
||||
XOR_SYNTHESIS = OFF;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
MINIMIZATION = PARTIAL;
|
||||
CARRY_CHAIN_LENGTH = -1;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN_LENGTH = -1;
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE WYSIWYG.FLEX8000
|
||||
BEGIN
|
||||
REGISTER_OPTIMIZATION = OFF;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
RESYNTHESIZE_NETWORK = OFF;
|
||||
MULTI_LEVEL_FACTORING = OFF;
|
||||
SUBFACTOR_EXTRACTION = OFF;
|
||||
REFACTORIZATION = OFF;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = OFF;
|
||||
REDUCE_LOGIC = OFF;
|
||||
DECOMPOSE_GATES = OFF;
|
||||
SOFT_BUFFER_INSERTION = ON;
|
||||
IGNORE_SOFT_BUFFERS = ON;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
TURBO_BIT = OFF;
|
||||
XOR_SYNTHESIS = OFF;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
MINIMIZATION = PARTIAL;
|
||||
CARRY_CHAIN_LENGTH = 32;
|
||||
CARRY_CHAIN = MANUAL;
|
||||
CASCADE_CHAIN_LENGTH = 2;
|
||||
CASCADE_CHAIN = MANUAL;
|
||||
END;
|
||||
|
||||
27
src/altera/acex/k30/DCP.INC
Normal file
27
src/altera/acex/k30/DCP.INC
Normal file
@ -0,0 +1,27 @@
|
||||
-- Copyright (C) 1988-2000 Altera Corporation
|
||||
-- Any megafunction design, and related net list (encrypted or decrypted),
|
||||
-- support information, device programming or simulation file, and any other
|
||||
-- associated documentation or information provided by Altera or a partner
|
||||
-- under Altera's Megafunction Partnership Program may be used only to
|
||||
-- program PLD devices (but not masked PLD devices) from Altera. Any other
|
||||
-- use of such megafunction design, net list, support information, device
|
||||
-- programming or simulation file, or any other related documentation or
|
||||
-- information is prohibited for any other purpose, including, but not
|
||||
-- limited to modification, reverse engineering, de-compiling, or use with
|
||||
-- any other silicon devices, unless such use is explicitly licensed under
|
||||
-- a separate agreement with Altera or a megafunction partner. Title to
|
||||
-- the intellectual property, including patents, copyrights, trademarks,
|
||||
-- trade secrets, or maskworks, embodied in any such megafunction design,
|
||||
-- net list, support information, device programming or simulation file, or
|
||||
-- any other related documentation or information provided by Altera or a
|
||||
-- megafunction partner, remains with Altera, the megafunction partner, or
|
||||
-- their respective licensors. No other licenses, including any licenses
|
||||
-- needed under any third party's intellectual property, are provided herein.
|
||||
|
||||
-- MAX+plus II Include File
|
||||
-- Version 10.0 9/14/2000
|
||||
-- Created: Thu Feb 07 21:14:23 2002
|
||||
|
||||
FUNCTION dcp (clk42, /reset, ct[2..0], continue, a[15..0], di[7..0], turbo_hand, /io, /rd, /wr, /mr, /rf, /m1, md[7..0], dos, refresh, g_line[9..0], test_r, acc_on, double_cas, blk_mem)
|
||||
WITH (UPDATE)
|
||||
RETURNS (/res, ras, cas, mc_end, mc_begin, mc_type, mc_write, do[7..0], ma[11..0], mca[1..0], clk_z80, turbo, /wait, /iom, /iomm, ra[17..14], page[11..0], type[3..0], cs_rom, cs_ram, v_ram, port, wr_dwg, wr_tm9, wr_awg, rd_kp11, kp11_mix, ga[9..0], graf, sp_scr, sp_sa, scr128, hdd_data, hdd_flip, ram, blk_r, pn4q, dcpp[7..0]);
|
||||
119
src/altera/acex/k30/DCP.MIF
Normal file
119
src/altera/acex/k30/DCP.MIF
Normal file
@ -0,0 +1,119 @@
|
||||
DEPTH = 256; % Memory depth and width are required %
|
||||
WIDTH = 16; % Enter a decimal number %
|
||||
|
||||
ADDRESS_RADIX = HEX; % Address and value radixes are optional %
|
||||
DATA_RADIX = HEX; % Enter BIN, DEC, HEX, or OCT; unless %
|
||||
% otherwise specified, radixes = HEX %
|
||||
|
||||
-- Specify values for addresses, which can be single address or range
|
||||
|
||||
CONTENT
|
||||
BEGIN
|
||||
[0..FF] : 1000;
|
||||
|
||||
0 : 1040 % DCP PAGE %;
|
||||
|
||||
%
|
||||
MA[11..0] bit0 - WG_A5
|
||||
bit1 - WG_A6
|
||||
|
||||
bit2 - MUX_KP11, 0 - WG,CMOS 1 - KMPS,TM9
|
||||
bit3 - RD/WR 0 - WRITE 1 - READ
|
||||
bit4 - CS_WG93 or WR_TM9
|
||||
|
||||
bit5 - HDD/CMOS strobe
|
||||
bit6,7 - 00 - FDD/Scr switches
|
||||
01 - HDD Switch/ Reset
|
||||
10 - HDD1/HDD2
|
||||
11 - CMOS
|
||||
bit8 - HDD CS1/CS3 or CMOS data/adr
|
||||
bit9,10,11 - HDD_A[2..0]
|
||||
%
|
||||
10 :
|
||||
7018 % RD WG93 1F,0F %
|
||||
7019 % RD WG93 3F %
|
||||
701A % RD WG93 5F %
|
||||
701B % RD WG93 7F %
|
||||
|
||||
7017 % WR_PDOS FF %
|
||||
701F % RD_KEYS/ WR_A20 %
|
||||
|
||||
7023 % Set 720 %
|
||||
7027 % Set 1440 %;
|
||||
|
||||
-- 18 :
|
||||
-- 1000 % No_function %
|
||||
|
||||
-- 1B : 1000; % ISA_A20 WR %
|
||||
|
||||
1C : 71D8 % CMOS_DAT_RD %;
|
||||
1D : 70D4 % CMOS_ADR_WR %;
|
||||
1E : 71D4 % CMOS_DAT_WR %;
|
||||
|
||||
20 :
|
||||
60A8 % HD_CS1 ports %
|
||||
62A8
|
||||
64A8
|
||||
66A8
|
||||
68A8
|
||||
6AA8
|
||||
6CA8
|
||||
6EA8
|
||||
|
||||
6DA8 % HD_CS3 3F6 port %
|
||||
6FA8 % HD_CS3 3F7 port %
|
||||
|
||||
7060 % Set HDD1 %
|
||||
7064 % Set HDD2 %
|
||||
|
||||
7120 % Set 320 Lines %
|
||||
7124 % Set 312 Lines %
|
||||
|
||||
7160 % Soft Reset %
|
||||
7164 % ??? %;
|
||||
|
||||
|
||||
30 :
|
||||
7000 % slot 1 ports %
|
||||
7001 % slot 2 ports %
|
||||
7002 % slot 1 mem %
|
||||
7003 % slot 2 mem %
|
||||
;
|
||||
|
||||
40 : 4000; % kb read %
|
||||
|
||||
52 : 3000; -- AY_D READ
|
||||
|
||||
58 : 5000; -- KEMPSTON-Mouse
|
||||
|
||||
[80..FF]: C000;
|
||||
|
||||
88 : 2000; -- COVOX
|
||||
89 : 2000; -- COVOX-Mode
|
||||
|
||||
8C : 3000; -- AY_D READ
|
||||
8D : 2000; -- AY_A WRITE
|
||||
8E : 2000; -- AY_D WRITE
|
||||
|
||||
8F : 2000; -- port for ROM_WRITE
|
||||
|
||||
-- 80 : 7F 7F 7F 7F 7F 7F 7F 7F % KBD_DAT %;
|
||||
-- 90 : 7F % PORT FF %;
|
||||
|
||||
90 : 3030 3031 2032 2033 2034 2035 2036 2037
|
||||
2038 2039 203A 203B 203C 203D 203E 203F; % RAM PAGES %
|
||||
|
||||
B0 : 2020 2021 2022 2023 2024 2025 2026 2027
|
||||
2028 2029 202A 202B 202C 202D 202E 202F; % RAM PAGES %
|
||||
|
||||
[C0..CF]: 2000 % SYS PORTS COPYES %;
|
||||
|
||||
D0 : 2010 2011 2012 2013 2014 2015 2016 2017
|
||||
2018 2019 201A 201B 201C 201D 201E 201F; % RAM PAGES %
|
||||
E0 : 2041 2041 2041 2041 2041 2041 2041 2041
|
||||
2000 2005 2002 2041 20FF 2000 2000 2041; % ROM PAGES %
|
||||
-- E0 : 41 42 43 44 45 46 47 48 00 05 02 E0 F0 00 00 E8; % ROM PAGES %
|
||||
F0 : 2000 2001 2002 2003 2004 2005 2006 2007
|
||||
2008 2009 200A 200B 200C 200D 200E 200F; % RAM PAGES %
|
||||
|
||||
END ;
|
||||
BIN
src/altera/acex/k30/DCP.SCF
Normal file
BIN
src/altera/acex/k30/DCP.SCF
Normal file
Binary file not shown.
750
src/altera/acex/k30/DCP.TDF
Normal file
750
src/altera/acex/k30/DCP.TDF
Normal file
@ -0,0 +1,750 @@
|
||||
|
||||
TITLE "DCP";
|
||||
|
||||
PARAMETERS
|
||||
(
|
||||
UPDATE = 1
|
||||
);
|
||||
|
||||
INCLUDE "lpm_ram_dp";
|
||||
-- INCLUDE "DC_PORT2";
|
||||
|
||||
SUBDESIGN dcp
|
||||
(
|
||||
CLK42 : INPUT;
|
||||
/RESET : INPUT;
|
||||
|
||||
/RES : OUTPUT;
|
||||
|
||||
CT[2..0] : INPUT;
|
||||
|
||||
CONTINUE : INPUT;
|
||||
RAS : OUTPUT;
|
||||
CAS : OUTPUT;
|
||||
MC_END : OUTPUT;
|
||||
MC_BEGIN : OUTPUT;
|
||||
MC_TYPE : OUTPUT;
|
||||
MC_WRITE : OUTPUT;
|
||||
|
||||
A[15..0] : INPUT;
|
||||
DI[7..0] : INPUT;
|
||||
DO[7..0] : OUTPUT;
|
||||
MA[11..0] : OUTPUT;
|
||||
MCA[1..0] : OUTPUT;
|
||||
|
||||
TURBO_HAND : INPUT;
|
||||
CLK_Z80 : OUTPUT;
|
||||
TURBO : OUTPUT;
|
||||
|
||||
/IO : INPUT;
|
||||
/RD : INPUT;
|
||||
/WR : INPUT;
|
||||
/MR : INPUT;
|
||||
/RF : INPUT;
|
||||
/M1 : INPUT;
|
||||
|
||||
/WAIT : OUTPUT;
|
||||
/IOM : OUTPUT;
|
||||
/IOMM : OUTPUT;
|
||||
|
||||
MD[7..0] : INPUT;
|
||||
RA[17..14] : OUTPUT;
|
||||
PAGE[11..0] : OUTPUT;
|
||||
|
||||
TYPE[3..0] : OUTPUT;
|
||||
|
||||
CS_ROM : OUTPUT;
|
||||
CS_RAM : OUTPUT;
|
||||
V_RAM : OUTPUT;
|
||||
PORT : OUTPUT;
|
||||
-- DOS : OUTPUT;
|
||||
DOS : INPUT;
|
||||
|
||||
WR_DWG : OUTPUT;
|
||||
|
||||
WR_TM9 : OUTPUT;
|
||||
WR_AWG : OUTPUT;
|
||||
RD_KP11 : OUTPUT;
|
||||
KP11_MIX : OUTPUT;
|
||||
|
||||
REFRESH : INPUT;
|
||||
|
||||
G_LINE[9..0]: INPUT;
|
||||
GA[9..0] : OUTPUT;
|
||||
GRAF : OUTPUT;
|
||||
|
||||
SP_SCR : OUTPUT;
|
||||
SP_SA : OUTPUT;
|
||||
SCR128 : OUTPUT;
|
||||
|
||||
TEST_R : INPUT;
|
||||
|
||||
HDD_DATA : OUTPUT;
|
||||
HDD_FLIP : OUTPUT;
|
||||
RAM : OUTPUT;
|
||||
BLK_R : OUTPUT;
|
||||
|
||||
PN4Q : OUTPUT;
|
||||
|
||||
ACC_ON : INPUT; -- asselerator state - 1 - present
|
||||
|
||||
DCPP[7..0] : OUTPUT;
|
||||
|
||||
DOUBLE_CAS : INPUT;
|
||||
|
||||
BLK_MEM : INPUT;
|
||||
|
||||
)
|
||||
VARIABLE
|
||||
|
||||
CLK21 : NODE;
|
||||
|
||||
-- DC : DC_PORT2;
|
||||
|
||||
CLK84 : NODE;
|
||||
CLK42X : NODE;
|
||||
|
||||
CTZ[1..0] : DFF;
|
||||
|
||||
-- CT[2..0] : DFF;
|
||||
|
||||
MEM : LPM_RAM_DP WITH (LPM_WIDTH=16,LPM_WIDTHAD=8,LPM_FILE="DCP.MIF");
|
||||
|
||||
D[7..0] : NODE;
|
||||
ADR8_MEM : NODE;
|
||||
MEM_D[15..0]: NODE;
|
||||
MEM_WR : NODE;
|
||||
|
||||
DCP_CX : NODE;
|
||||
SC_LCELL : NODE;
|
||||
|
||||
PG3[5..0] : NODE;
|
||||
PG0[5..0] : NODE;
|
||||
MPGS[7..0] : LCELL;
|
||||
PGS[7..0] : DFF;
|
||||
-- PGS[7..0] : NODE;
|
||||
|
||||
PN[7..0] : DFFE;
|
||||
SC[7..0] : DFFE;
|
||||
SYS : DFFE;
|
||||
CNF[7..0] : DFFE;
|
||||
AROM16 : DFFE;
|
||||
TB_SW : DFFE;
|
||||
|
||||
CASH_ON : NODE;
|
||||
NMI_ENA : NODE;
|
||||
|
||||
DD[7..0] : DFFE;
|
||||
STARTING : NODE;
|
||||
|
||||
-- DOS_ : NODE;
|
||||
-- DOS : NODE;
|
||||
-- DOS_ON_ : NODE;
|
||||
|
||||
MC_RQ : NODE;
|
||||
MC_END : DFFE;
|
||||
MC_BEGIN : DFFE;
|
||||
MC_TYPE : DFFE;
|
||||
MC_WRITE : DFFE;
|
||||
RAS : DFFE;
|
||||
CAS : DFFE;
|
||||
|
||||
MA_[11..0] : DFFE;
|
||||
MCA[1..0] : DFFE;
|
||||
|
||||
/IOM : DFFE;
|
||||
/IOMM : DFFE;
|
||||
/IOMX : DFFE;
|
||||
/IOMY : DFFE;
|
||||
|
||||
WT_CT[3..0] : DFFE;
|
||||
W_TAB[3..0] : LCELL;
|
||||
HDD_W[3..0] : NODE;
|
||||
/IO_WAIT : NODE;
|
||||
/MR_WAIT : NODE;
|
||||
|
||||
MEM_RW : NODE;
|
||||
IO_RW : NODE;
|
||||
IO_RWM : NODE;
|
||||
|
||||
MA_CT[1..0] : DFFE;
|
||||
|
||||
WR_TM9 : DFFE;
|
||||
RD_KP11 : DFFE;
|
||||
|
||||
/RES : NODE;
|
||||
|
||||
RFT : DFF;
|
||||
RFC : DFFE;
|
||||
|
||||
GRAF : DFFE;
|
||||
GRAF_X : NODE;
|
||||
GA[9..0] : LCELL;
|
||||
|
||||
SP_SCR : LCELL;
|
||||
SP_SA : LCELL;
|
||||
|
||||
HDD_FLIP : DFFE;
|
||||
/IOMZ : DFFE;
|
||||
|
||||
HDD_DATA : NODE;
|
||||
HDD_ENA : NODE;
|
||||
|
||||
BLK_C : NODE;
|
||||
/CASH : NODE;
|
||||
|
||||
DCPP[7..0] : DFFE;
|
||||
|
||||
PORTS_X : NODE;
|
||||
|
||||
NO_IO_WAIT : NODE;
|
||||
|
||||
DCP_RES : NODE;
|
||||
|
||||
HDD_A[3..0] : DFF;
|
||||
|
||||
X_ADR[11..0]: LCELL;
|
||||
X_MA_[11..0]: LCELL;
|
||||
|
||||
WR_AWGX : NODE;
|
||||
|
||||
/IOWR : NODE;
|
||||
|
||||
RA[17..14] : LCELL;
|
||||
|
||||
-- SPR_[1..0] : NODE;
|
||||
SPR_[1..0] : LCELL;
|
||||
|
||||
SYS_ENA : NODE;
|
||||
|
||||
BEGIN
|
||||
|
||||
%
|
||||
DC.CLK42 = CLK42;
|
||||
DC./RESET = /RESET;
|
||||
|
||||
DC.A[15..0] = A[15..0];
|
||||
|
||||
DC./IO = /IO;
|
||||
DC./WR = /WR;
|
||||
DC./M1 = /M1;
|
||||
|
||||
-- DC./IOM;
|
||||
-- DC./IOMM;
|
||||
-- DC.DCP[7..0];
|
||||
|
||||
DC.DOS = DOS;
|
||||
DC.CNF[1..0]= CNF[4..3];
|
||||
|
||||
DC.SYS = SYS;
|
||||
|
||||
-- DC.PORT_X;
|
||||
%
|
||||
|
||||
|
||||
-- ==============================================================
|
||||
%
|
||||
CT[].clk = CLK42;
|
||||
|
||||
IF CT1 THEN
|
||||
CT[1..0] = GND;
|
||||
CT2 = !CT2;
|
||||
ELSE
|
||||
CT[1..0] = CT[1..0]+1;
|
||||
CT2 = CT2;
|
||||
END IF;
|
||||
%
|
||||
|
||||
/RES = DFFE(VCC,CLK42,,,CT0);
|
||||
-- ==============================================================
|
||||
|
||||
-- TURBO = DFFE((TB_SW & TURBO_HAND),CLK42,,/RESET,CLK_Z80);
|
||||
TURBO = DFF(DFFE((TB_SW & TURBO_HAND),CLK_Z80,,/RESET,!/RF),CLK42,,);
|
||||
|
||||
CLK84 = CLK42 xor LCELL(CLK42X);
|
||||
CLK42X = DFF(!CLK42X,CLK84,,);
|
||||
|
||||
CTZ[].clk = CLK84 xor CTZ1;
|
||||
CTZ[] = CTZ[]+1;
|
||||
|
||||
-- CLK_Z80 = CTZ1;
|
||||
|
||||
-- CLK_Z80 = DFF((!CLK21 & TURBO) or (TFF((CT2 & CT1),CLK42,,) & !TURBO),!CLK42,,);
|
||||
-- CLK_Z80 = DFF((CLK21 & TURBO) or (TFF((CT2 & CT1),CLK42,,) & !TURBO),!CLK42,,);
|
||||
|
||||
CLK_Z80 = DFF((CLK21 & TURBO) or (TFF((!CT2 & CT1),CLK42,,) & !TURBO),!CLK42,,);
|
||||
-- CLK_Z80 = DFF((!CLK21 & TURBO) or (TFF((!CT2 & CT1),CLK42,,) & !TURBO),!CLK42,,);
|
||||
|
||||
-- ==============================================================
|
||||
CLK21 = DFF((!CT0 xor CT2),CLK42,,);
|
||||
-- === Adress Multiplexer =======================================
|
||||
|
||||
MA_[].clk = CLK42;
|
||||
-- MA_[].ena = (CT2 xor CT0);
|
||||
MA_[].ena = CLK21;
|
||||
|
||||
WR_TM9.clk = CLK42;
|
||||
-- WR_TM9.ena = (CT2 xor CT0);
|
||||
WR_TM9.ena = CLK21;
|
||||
WR_TM9.prn = /RES;
|
||||
|
||||
RD_KP11.clk = !CLK42;
|
||||
-- RD_KP11.ena = (CT2 xor CT0);
|
||||
RD_KP11.ena = CLK21;
|
||||
RD_KP11.prn = /RES;
|
||||
RD_KP11.d = !(MA_CT[] == 0);
|
||||
|
||||
-- WR_AWGX = DFF((WR_TM9 or CLK21),!CLK42,,);
|
||||
WR_AWGX = DFF(GND,!WR_TM9,,DFF(WR_AWGX,CLK42,,));
|
||||
|
||||
-- WR_TM9 = (!MA_CT1 or (!IO_RW & !PORTS_X));
|
||||
WR_TM9 = (!MA_CT1 or (!/IO & !PORTS_X));
|
||||
|
||||
WR_AWG = WR_AWGX;
|
||||
|
||||
KP11_MIX = TFF(VCC,RD_KP11,,);
|
||||
|
||||
WR_DWG = !MC_BEGIN;
|
||||
-- WR_DWG = DFF(!MC_BEGIN,CLK42,,);
|
||||
-- WR_DWG = LCELL(!MC_BEGIN);
|
||||
|
||||
-- MA_CT[].ena = (CT2 xor CT0);
|
||||
MA_CT[].ena = CLK21;
|
||||
MA_CT[].clk = CLK42;
|
||||
|
||||
IF !LCELL(CT2 & !CT1) THEN
|
||||
MA_CT[] = MA_CT[]+1;
|
||||
ELSE
|
||||
MA_CT[] = GND;
|
||||
END IF;
|
||||
|
||||
%
|
||||
MA_[11..0] bit0 - WG_A5
|
||||
bit1 - WG_A6
|
||||
bit2 - MUX_KP11, 0 - WG,CMOS 1 - KMPS,TM9
|
||||
bit3 - RD/WR 0 - WRITE 1 - READ
|
||||
bit4 - CS_WG93 or WR_TM9
|
||||
bit5 - HDD/CMOS strobe
|
||||
bit7,6 - 00 - not
|
||||
01 - ????
|
||||
10 - HDD1/2
|
||||
11 - CMOS
|
||||
bit8 - HDD CS1/CS3 or CMOS data/adr
|
||||
bit9,10,11 - HDD_A[2..0]
|
||||
%
|
||||
CASE A[15..14] IS
|
||||
WHEN 0 => SP_SCR = GND; SP_SA = GND;
|
||||
WHEN 1 => SP_SCR = !GRAF; SP_SA = GND;
|
||||
WHEN 2 => SP_SCR = GND; SP_SA = PG3[1];
|
||||
WHEN 3 => SP_SCR = !GRAF & LCELL(PG3[] == B"1101X1"); SP_SA = PG3[1];
|
||||
END CASE;
|
||||
|
||||
CASE GRAF IS
|
||||
WHEN 0 => GA[] = (GND,GND,MEM.q[3..0],A[13..10]);
|
||||
-- WHEN 1 => GA[] = (VCC,(G_LINE[8..0] + (B"00000",A[13..10])));
|
||||
WHEN 1 => GA[] = (VCC,G_LINE[8..0]);
|
||||
END CASE;
|
||||
|
||||
CASE (IO_RW,MA_CT0) IS
|
||||
WHEN 0 => X_ADR[] = (GND,CNF4,PN5,DOS,/WR,A15,A14,A[6..5],A13,A7,A[2]);
|
||||
WHEN 1 => X_ADR[] = (GND,GND,CNF[4..3],B"01000000");
|
||||
WHEN 2 => X_ADR[] = (GND,GA3,GA[1..0],A[9..2]);
|
||||
WHEN 3 => X_ADR[] = (GND,GND,GA[3..2],MEM.q[7..4],GA[7..4]);
|
||||
END CASE;
|
||||
|
||||
CASE IO_RW IS
|
||||
WHEN 0 => X_MA_[] = (HDD_A[2..0],MEM.q[8..6],((MEM.q[5..4]) & (!/IOMZ,!/IOMY)),/WR,MEM.q2,A[6..5]);
|
||||
WHEN 1 => X_MA_[] = (HDD_A[2..0],B"00000",/WR,VCC,A[6..5]);
|
||||
END CASE;
|
||||
%
|
||||
CASE MA_CT1 IS
|
||||
-- WHEN 0 => MA_[] = X_ADR[];
|
||||
WHEN 0 => MA_[] = (GND,X_ADR[10..0]);
|
||||
WHEN 1 => MA_[] = (HDD_A[2..0],X_MA_[8..4],/WR,X_MA_[3],A[6..5]);
|
||||
END CASE;
|
||||
%
|
||||
|
||||
CASE (IO_RW,MA_CT1) IS
|
||||
WHEN B"00" =>
|
||||
MA_[] = (X_ADR[11..0]);
|
||||
WHEN B"01" =>
|
||||
MA_[] = (HDD_A[2..0],MEM.q[8..6],((MEM.q[5..4]) & (!/IOMZ,!/IOMY)),/WR,MEM.q2,A[6..5]);
|
||||
WHEN B"10" =>
|
||||
MA_[] = (X_ADR[11..0]);
|
||||
WHEN B"11" =>
|
||||
MA_[] = (HDD_A[2..0],B"00000",/WR,VCC,A[6..5]);
|
||||
END CASE;
|
||||
|
||||
MA[] = MA_[];
|
||||
|
||||
MCA[].ena = CT2 & CT1;
|
||||
MCA[].clk = CLK42;
|
||||
MCA[] = A[1..0]; -- adress for CAS
|
||||
|
||||
HDD_A[].clk = CLK42;
|
||||
CASE (A[14],A[2..0]) IS
|
||||
WHEN 0 => HDD_A[] = 0;
|
||||
WHEN 1 => HDD_A[] = 1;
|
||||
WHEN 2 => HDD_A[] = 2;
|
||||
WHEN 3 => HDD_A[] = 3;
|
||||
WHEN 4 => HDD_A[] = 4;
|
||||
WHEN 5 => HDD_A[] = 5;
|
||||
WHEN 6 => HDD_A[] = 0;
|
||||
WHEN 7 => HDD_A[] = 0;
|
||||
WHEN 8 => HDD_A[] = 0;
|
||||
WHEN 9 => HDD_A[] = 0;
|
||||
WHEN 10 => HDD_A[] = 6;
|
||||
WHEN 11 => HDD_A[] = 7;
|
||||
WHEN 12 => HDD_A[] = 14;
|
||||
WHEN 13 => HDD_A[] = 15;
|
||||
WHEN 14 => HDD_A[] = 0;
|
||||
WHEN 15 => HDD_A[] = 0;
|
||||
END CASE;
|
||||
|
||||
|
||||
-- === Memory Sinchronizer ======================================
|
||||
|
||||
|
||||
% RF | MEM | RF
|
||||
____ | | _______
|
||||
/MR \__________/
|
||||
| |
|
||||
_____| | _______
|
||||
MC_BEGIN \________/
|
||||
| |__
|
||||
MC_END ____________/ \_______
|
||||
______ |__________
|
||||
MC_TYPE \_____/
|
||||
| |
|
||||
RAS __ _ ___ __
|
||||
\__/|\__/ | \__/
|
||||
____ _ __
|
||||
CAS \__/ | \__/|\__/
|
||||
| |
|
||||
|
||||
%
|
||||
|
||||
-- MC_RQ = DFF(((/MR & DFF(/IO,CLK42,,)) or (/RD & /WR)),CLK42,,);
|
||||
|
||||
-- MC_RQ = DFF(((/MR & DFFE(GND,!CLK42,,!/IO,CT0)) or (/RD & /WR)),!CLK42,,);
|
||||
|
||||
-- MC_RQ = DFF((((/MR or !/RF) & DFF(/IO,CLK42,,/M1)) or (/RD & /WR)),CLK42,,);
|
||||
|
||||
-- MC_RQ = DFF((((/MR or !/RF) & IO_RW) or (/RD & /WR)),CLK42,,);
|
||||
|
||||
-- MC_RQ = DFF(((MEM_RW & IO_RW) or (/RD & /WR)),CLK42,,);
|
||||
|
||||
MC_RQ = DFF(((MEM_RW & DFF(DFF(IO_RW,CLK42,,!/IO),CLK42,,!/IO)) or (/RD & /WR)),!CLK42,,);
|
||||
|
||||
MC_BEGIN.clk= CLK42;
|
||||
MC_BEGIN.ena= CT1 & CT2;
|
||||
MC_BEGIN.d = MC_RQ;
|
||||
MC_BEGIN.prn= !(/MR & /IO);
|
||||
|
||||
MC_END.clk = CLK42;
|
||||
MC_END.d = VCC;
|
||||
MC_END.ena = (CT0 & CT2) & !MC_BEGIN & CONTINUE & !BLK_C;
|
||||
MC_END.clrn = !(/MR & /IO);
|
||||
|
||||
MC_TYPE.clk = CLK42;
|
||||
MC_TYPE.ena = CT1 & CT2;
|
||||
MC_TYPE.d = MC_RQ or MC_END;
|
||||
MC_TYPE.prn = /RES;
|
||||
|
||||
MC_WRITE.clk= CLK42;
|
||||
MC_WRITE.ena= CT1 & CT2;
|
||||
MC_WRITE.d = MC_RQ or CS_RAM or /WR or MC_END;
|
||||
MC_WRITE.prn= /RES;
|
||||
|
||||
RFT.clk = REFRESH;
|
||||
RFT.d = GND;
|
||||
RFT.prn = RFC;
|
||||
-- RFT.prn = VCC;
|
||||
|
||||
RFC.clk = CLK42;
|
||||
RFC.d = !MC_RQ or RFT;
|
||||
-- RFC.d = !MC_RQ;
|
||||
RFC.ena = CT1 & CT2;
|
||||
|
||||
RAS.ena = (!(CT1 or (CT0 xor MC_TYPE))) & (!MC_TYPE or !RFC);
|
||||
CAS.ena = (!(CT1 or (CT0 xor !MC_TYPE))) & (!MC_TYPE or !RFC);
|
||||
-- RAS.ena = (!(CT1 or (CT0 xor MC_TYPE)));
|
||||
-- CAS.ena = (!(CT1 or (CT0 xor !MC_TYPE)));
|
||||
|
||||
RAS.clk = CLK42; CAS.clk = CLK42;
|
||||
RAS.d = CT2; CAS.d = CT2 or BLK_C;
|
||||
|
||||
RAS.prn = /RES;
|
||||
CAS.prn = /RES;
|
||||
-- CAS.prn = !BLK_C;
|
||||
|
||||
-- /MR_WAIT = (MEM_RW or /CASH or DFF(MC_END,CLK42,!/MR,)) or (!TURBO & !ACC_ON);
|
||||
-- /MR_WAIT = MC_END or LCELL(MEM_RW or /CASH or (!TURBO & !ACC_ON));
|
||||
|
||||
/MR_WAIT = LCELL(MC_END or MEM_RW or /CASH or (!TURBO & !ACC_ON));
|
||||
|
||||
-- MEM_RW = LCELL(/MR or !/RF);
|
||||
|
||||
-- anti gluk!
|
||||
MEM_RW = DFF((!/RF or BLK_MEM),!/MR,,LCELL(MEM_RW or !/MR));
|
||||
IO_RWM = DFF(!/M1,!/IO,,LCELL(IO_RW or !/IO));
|
||||
|
||||
IO_RW = DFF(/IO,CLK42,,/M1);
|
||||
|
||||
/IOMM.clk = CLK42;
|
||||
-- /IOMM.ena = CT0 xor CT2;
|
||||
/IOMM.ena = CLK21;
|
||||
/IOMM.d = IO_RW or !MC_END or DFF((WT_CT[] == 0),CLK42,,);
|
||||
/IOMM.prn = /RES;
|
||||
|
||||
/IOMX.clk = CLK42;
|
||||
-- /IOMX.ena = CT0 xor CT2;
|
||||
/IOMX.ena = CLK21;
|
||||
/IOMX.d = /IOMM;
|
||||
/IOMX.prn = /RES;
|
||||
|
||||
/IOMY.clk = CLK42;
|
||||
-- /IOMY.ena = CT0 xor CT2;
|
||||
/IOMY.ena = CLK21;
|
||||
/IOMY.d = /IOMX or !MC_END or DFF((WT_CT[] == B"000X"),CLK42,,);
|
||||
-- /IOMY.prn = /RES;
|
||||
/IOMY.prn = PORTS_X;
|
||||
|
||||
PORTS_X = DFF(((DCPP[7..4] == B"0010") or (DCPP[7..4] == B"0001")),CLK42,,);
|
||||
|
||||
/IOMZ.clk = CLK42;
|
||||
-- /IOMZ.ena = CT0 xor CT2;
|
||||
/IOMZ.ena = CLK21;
|
||||
/IOMZ.d = (A8 xor /RD) or /IOMX or !MC_END or DFF((WT_CT[] == B"000X"),CLK42,,);
|
||||
/IOMZ.prn = PORTS_X;
|
||||
|
||||
HDD_DATA = DFF((HDD_ENA & DFF((MEM.q[11..8] == 0),CLK42,,) & PORTS_X),CLK42,,);
|
||||
HDD_ENA = (MEM.q[7..5] == B"101");
|
||||
|
||||
HDD_FLIP.clk = /IOM;
|
||||
HDD_FLIP.ena = HDD_ENA & DFF((DCPP[] == B"0010XXXX"),CLK42,,);
|
||||
HDD_FLIP.d = !HDD_FLIP & (MEM.q[11..8] == 0);
|
||||
HDD_FLIP.clrn = /RESET & DFF(GND,!DOUBLE_CAS,,HDD_FLIP);
|
||||
|
||||
/IOM.clk = CLK42;
|
||||
-- /IOM.ena = CT0 xor CT2;
|
||||
/IOM.ena = CLK21;
|
||||
/IOM.d = (/IOMX & /IOM);
|
||||
/IOM.prn = !/IO & /M1;
|
||||
|
||||
-- /IO_WAIT = LCELL(/IO or !/M1 or DFF(DFFE((WT_CT[] == 0),CLK42,,,CLK21),CLK42,,NO_IO_WAIT));
|
||||
|
||||
/IO_WAIT = LCELL(IO_RWM or DFF(DFFE((WT_CT[] == 0),CLK42,,,CLK21),CLK42,,NO_IO_WAIT));
|
||||
|
||||
NO_IO_WAIT = !DFF(((A[7..0] == B"111XX1XX") & !TURBO & DOS),CLK42,,);
|
||||
-- NO_IO_WAIT = TURBO;
|
||||
|
||||
WT_CT[].clk = CLK42;
|
||||
-- WT_CT[].ena = (CT2 xor CT0);
|
||||
WT_CT[].ena = CLK21;
|
||||
-- WT_CT[].ena = CT1;
|
||||
WT_CT[].prn = MC_END;
|
||||
|
||||
CASE (/IOM,DFF((WT_CT[] == 0),CLK42,,)) IS
|
||||
WHEN B"1X" => WT_CT[].d = W_TAB[];
|
||||
WHEN B"00" => WT_CT[].d = WT_CT[]-1;
|
||||
WHEN B"01" => WT_CT[].d = GND;
|
||||
END CASE;
|
||||
|
||||
CASE (TURBO,MEM.q[14..12]) IS
|
||||
WHEN 0 => W_TAB[] = 2; WHEN 8 => W_TAB[] = 2;
|
||||
WHEN 1 => W_TAB[] = 2; WHEN 9 => W_TAB[] = 2;
|
||||
WHEN 2 => W_TAB[] = 1; WHEN 10 => W_TAB[] = 4;
|
||||
WHEN 3 => W_TAB[] = 1; WHEN 11 => W_TAB[] = 4;
|
||||
WHEN 4 => W_TAB[] = 1; WHEN 12 => W_TAB[] = 7;
|
||||
WHEN 5 => W_TAB[] = 2; WHEN 13 => W_TAB[] = 7;
|
||||
-- WHEN 6 => W_TAB[] = 10; WHEN 14 => W_TAB[] = 10;
|
||||
WHEN 6 => W_TAB[] = 7; WHEN 14 => W_TAB[] = 7;
|
||||
-- WHEN 6 => W_TAB[] = 13; WHEN 14 => W_TAB[] = 13;
|
||||
WHEN 7 => W_TAB[] = 10; WHEN 15 => W_TAB[] = 10;
|
||||
END CASE;
|
||||
|
||||
CASE LCELL(MEM.q[11..8] == 0) IS
|
||||
WHEN 0 => HDD_W[] = 10; -- registers wait
|
||||
WHEN 1 => HDD_W[] = 4; -- datas wait
|
||||
END CASE;
|
||||
|
||||
/WAIT = (/IO_WAIT & /MR_WAIT);
|
||||
|
||||
|
||||
-- === Other Devicese CASHE, ISA, ROM... ===
|
||||
|
||||
V_RAM = PN2; -- for ORIGINAL Waits
|
||||
|
||||
IF UPDATE == 1 GENERATE
|
||||
-- all ROM/RAM switches in main .tdf
|
||||
BLK_R = SC4;
|
||||
-- all cashes in main .tdf
|
||||
/CASH = GND;
|
||||
-- cashe dir in main .tdf
|
||||
CASH_ON = GND;
|
||||
ELSE GENERATE
|
||||
-- for blk wait
|
||||
/CASH = DFF((MEM.q[7..4] == 15),!CLK42,BLK_R,);
|
||||
-- when BLK_R = 1 => Other Devices stay Active!
|
||||
BLK_R = DFF( (LCELL((MEM.q7 & MEM.q6 & RAM) or
|
||||
(MEM.q7 & LCELL(A14 & A15 & SC4))) &
|
||||
!DFF(DFF(MC_RQ,CLK42,,!/MR),CLK42,,!/MR)),!CLK42,!/MR,);
|
||||
CASH_ON = DFFE(A7,(/IO or /RD),/RESET,,DFF((DCPP[] == H"88"),CLK42,,));
|
||||
END GENERATE;
|
||||
|
||||
RAM = !LCELL(A14 or A15 or (SC0 & SYS));
|
||||
|
||||
CS_ROM = LCELL(/MR or !RAM or !/RF);
|
||||
CS_RAM = LCELL(/MR or RAM or !/RF);
|
||||
|
||||
-- ==============================================
|
||||
|
||||
-- graf screen enable for pages
|
||||
|
||||
GRAF_X = LCELL(MEM.q[7..4] == B"0101");
|
||||
|
||||
GRAF.clk = CLK42;
|
||||
GRAF.ena = (CT0 & CT2);
|
||||
GRAF.d = GRAF_X;
|
||||
|
||||
BLK_C = LCELL((GRAF_X xor GRAF) & !MC_TYPE);
|
||||
|
||||
-----------------------------------------
|
||||
|
||||
SCR128 = PN3;
|
||||
|
||||
D[] = DI[];
|
||||
-- when not IO - reset DCPP!
|
||||
|
||||
DCP_RES = DFF((STARTING & !/IO & /M1),CLK42,,);
|
||||
|
||||
DCPP[].clk = CLK42;
|
||||
DCPP[].ena = !DFF(MC_END,CLK42,,);
|
||||
DCPP[].clrn = MC_END & DCP_RES; -- not in/out when START
|
||||
DCPP[].d = MD[];
|
||||
|
||||
-- DD[].clk = !CLK42;
|
||||
-- DD[].ena = !DFF(MC_END,!CLK42,,);
|
||||
|
||||
DD[].clk = CLK42;
|
||||
DD[].ena = !DFF(MC_END,CLK42,,);
|
||||
DD[].clrn = MC_END & DCP_RES;
|
||||
|
||||
CASE LCELL(MD[7..4] == 15) IS
|
||||
WHEN 0 => DD[].d = MD[];
|
||||
WHEN 1 => DD[].d = (VCC,VCC,PG3[]);
|
||||
END CASE;
|
||||
|
||||
-- === Port Decoder =============================================
|
||||
|
||||
DCP_CX = (DCPP[] == B"1100XXXX");
|
||||
SYS_ENA = DFF((DCP_CX & (DCPP[] == B"XXXXX110")),CLK42,,);
|
||||
|
||||
-- /IOWR = DFF((/WR or /IO),CLK42,,!/IO);
|
||||
/IOWR = LCELL(/IO or /WR or !/M1);
|
||||
|
||||
CNF[].ena = SYS_ENA; CNF[].d = (DI[] & DI2) or (CNF[] & !DI2);
|
||||
AROM16.ena = SYS_ENA; AROM16.d = (DI0 & !DI1) or (AROM16 & DI1);
|
||||
TB_SW.ena = SYS_ENA; TB_SW.d = (DI0 & DI1) or (TB_SW & !DI1);
|
||||
SYS.ena = SYS_ENA; SYS.d = !A6;
|
||||
|
||||
SC[].ena = DFF((DCP_CX & (DCPP[] == B"XXXXX000")),CLK42,,) ;SC[].d = DI[];
|
||||
PN[].ena = DFF((DCP_CX & (DCPP[] == B"XXXXX001")),CLK42,,) ;PN[].d = DI[];
|
||||
|
||||
TB_SW.clk = /IOWR;
|
||||
AROM16.clk = /IOWR;
|
||||
PN[].clk = /IOWR;
|
||||
SC[].clk = /IOWR;
|
||||
SYS.clk = /IOWR;
|
||||
CNF[].clk = /IOWR;
|
||||
|
||||
AROM16.clrn = /RESET;
|
||||
TB_SW.prn = /RESET;
|
||||
SYS.clrn = /RESET;
|
||||
CNF[].clrn = /RESET;
|
||||
|
||||
SC[].clrn = /RESET & !CNF6; -- Scorpion-OFF
|
||||
|
||||
PN[5..0].clrn = /RESET & !CNF5; -- reset PN5
|
||||
PN[7..5].clrn = /RESET & CNF7; -- set Pentagon-512
|
||||
|
||||
PN4Q = PN4;
|
||||
|
||||
-- ====================================
|
||||
|
||||
-- ********** Pages decoder ***********
|
||||
|
||||
-- ====================================
|
||||
|
||||
PG3[] = (!PN7,VCC,LCELL((SC4 & !CNF7) or (CNF7 & PN6)),PN[2..0]);
|
||||
|
||||
-- SC0,SC1,SYS,DOS,PN4,AROM16,CASH_ON,NMI_ENA
|
||||
PG0[] = (VCC,GND,
|
||||
LCELL(SC0 or !SYS or CASH_ON or !NMI_ENA),
|
||||
LCELL(((AROM16 & !(SC0 & SYS)) or (CASH_ON & NMI_ENA))),
|
||||
LCELL((SPR_1 & SC_LCELL) or !SYS or !NMI_ENA),
|
||||
LCELL((SPR_0 & SC_LCELL) or !SYS or !NMI_ENA));
|
||||
|
||||
-- SC_LCELL = LCELL(!(SC0 & SYS) & !CASH_ON);
|
||||
SC_LCELL = (!(SC0 & SYS) & !CASH_ON);
|
||||
|
||||
NMI_ENA = VCC;
|
||||
|
||||
SPR_[] = !SC1 & (DOS,(PN4 or !DOS)); -- expansion/dos/basic128/basic48
|
||||
|
||||
CASE (TEST_R,SYS) IS
|
||||
WHEN B"X0" => RA[] = (!AROM16,B"000"); -- system 0/1
|
||||
WHEN B"01" => RA[] = (!AROM16,GND,SPR_[]); -- expansion/dos/basic
|
||||
WHEN B"11" => RA[] = (B"001",SPR_0); -- test
|
||||
END CASE;
|
||||
|
||||
-- ====================================
|
||||
|
||||
CASE A[15..14] IS
|
||||
WHEN 0 => MPGS[5..0] = PG0[];
|
||||
WHEN 1 => MPGS[5..0] = B"101001"; %H"E9"%
|
||||
WHEN 2 => MPGS[5..0] = B"101010"; %H"EA"%
|
||||
WHEN 3 => MPGS[5..0] = PG3[];
|
||||
END CASE;
|
||||
MPGS[7..6] = VCC;
|
||||
|
||||
-- STARTING = DFF(GND,VCC,/RESET,(/IO or /RD));
|
||||
STARTING = LCELL(/RESET & (STARTING or !(/IO or /RD)));
|
||||
|
||||
PGS[].clk = !CLK42;
|
||||
CASE (LCELL(/IO & !(A14 & A15 & !STARTING)),MC_END) IS
|
||||
WHEN B"1X" => PGS[] = (VCC,VCC,MPGS[5..0]);
|
||||
WHEN B"01" => PGS[] = DD[];
|
||||
WHEN B"00" => PGS[] = GND;
|
||||
END CASE;
|
||||
|
||||
MEM_WR = DFFE((DCPP[7] & DCPP[6] & STARTING & DFF(DFF((MC_END & !/WR),CLK42,,),CLK42,,)),CLK42,!/IO,,CT1);
|
||||
|
||||
ADR8_MEM = GND;
|
||||
|
||||
CASE ADR8_MEM IS
|
||||
WHEN 1 => MEM_D[] = (DI[],MEM.q[7..0]); DO[] = MEM.q[15..8];
|
||||
WHEN 0 => MEM_D[] = (MEM.q[15..8],DI[]); DO[] = MEM.q[7..0];
|
||||
END CASE;
|
||||
|
||||
MEM.wren = MEM_WR;
|
||||
MEM.data[] = MEM_D[];
|
||||
MEM.wraddress[] = PGS[];
|
||||
MEM.wrclock = CLK42;
|
||||
MEM.wrclken = VCC;
|
||||
MEM.rden = VCC;
|
||||
MEM.rdaddress[] = PGS[];
|
||||
MEM.rdclock = CLK42;
|
||||
MEM.rdclken = VCC;
|
||||
-- = MEM.q[];
|
||||
|
||||
PAGE[] = MEM.q[11..0];
|
||||
TYPE[] = MEM.q[15..12];
|
||||
|
||||
|
||||
PORT = !(MEM.q[15..12] == 0) or /IO or (/RD & /WR);
|
||||
|
||||
END;
|
||||
|
||||
|
||||
568
src/altera/acex/k30/KBD.ACF
Normal file
568
src/altera/acex/k30/KBD.ACF
Normal file
@ -0,0 +1,568 @@
|
||||
--
|
||||
-- Copyright (C) 1988-2000 Altera Corporation
|
||||
-- Any megafunction design, and related net list (encrypted or decrypted),
|
||||
-- support information, device programming or simulation file, and any other
|
||||
-- associated documentation or information provided by Altera or a partner
|
||||
-- under Altera's Megafunction Partnership Program may be used only to
|
||||
-- program PLD devices (but not masked PLD devices) from Altera. Any other
|
||||
-- use of such megafunction design, net list, support information, device
|
||||
-- programming or simulation file, or any other related documentation or
|
||||
-- information is prohibited for any other purpose, including, but not
|
||||
-- limited to modification, reverse engineering, de-compiling, or use with
|
||||
-- any other silicon devices, unless such use is explicitly licensed under
|
||||
-- a separate agreement with Altera or a megafunction partner. Title to
|
||||
-- the intellectual property, including patents, copyrights, trademarks,
|
||||
-- trade secrets, or maskworks, embodied in any such megafunction design,
|
||||
-- net list, support information, device programming or simulation file, or
|
||||
-- any other related documentation or information provided by Altera or a
|
||||
-- megafunction partner, remains with Altera, the megafunction partner, or
|
||||
-- their respective licensors. No other licenses, including any licenses
|
||||
-- needed under any third party's intellectual property, are provided herein.
|
||||
--
|
||||
CHIP kbd
|
||||
BEGIN
|
||||
DEVICE = EP1K30QC208-3;
|
||||
END;
|
||||
|
||||
DEFAULT_DEVICES
|
||||
BEGIN
|
||||
AUTO_DEVICE = EP1K100FC484-1;
|
||||
AUTO_DEVICE = EP1K100FC256-1;
|
||||
AUTO_DEVICE = EP1K100QC208-1;
|
||||
AUTO_DEVICE = EP1K50FC484-1;
|
||||
AUTO_DEVICE = EP1K50FC256-1;
|
||||
AUTO_DEVICE = EP1K50QC208-1;
|
||||
AUTO_DEVICE = EP1K50TC144-1;
|
||||
AUTO_DEVICE = EP1K30FC256-1;
|
||||
AUTO_DEVICE = EP1K30QC208-1;
|
||||
AUTO_DEVICE = EP1K30TC144-1;
|
||||
ASK_BEFORE_ADDING_EXTRA_DEVICES = ON;
|
||||
END;
|
||||
|
||||
TIMING_POINT
|
||||
BEGIN
|
||||
DEVICE_FOR_TIMING_SYNTHESIS = EP1K30QC208-3;
|
||||
FREQUENCY = 100MHz;
|
||||
MAINTAIN_STABLE_SYNTHESIS = OFF;
|
||||
CUT_ALL_CLEAR_PRESET = ON;
|
||||
CUT_ALL_BIDIR = ON;
|
||||
END;
|
||||
|
||||
IGNORED_ASSIGNMENTS
|
||||
BEGIN
|
||||
FIT_IGNORE_TIMING = OFF;
|
||||
DEMOTE_SPECIFIC_LCELL_ASSIGNMENTS_TO_LAB_ASSIGNMENTS = OFF;
|
||||
IGNORE_LOCAL_ROUTING_ASSIGNMENTS = OFF;
|
||||
IGNORE_DEVICE_ASSIGNMENTS = OFF;
|
||||
IGNORE_LC_ASSIGNMENTS = OFF;
|
||||
IGNORE_PIN_ASSIGNMENTS = OFF;
|
||||
IGNORE_CHIP_ASSIGNMENTS = OFF;
|
||||
IGNORE_TIMING_ASSIGNMENTS = OFF;
|
||||
IGNORE_LOGIC_OPTION_ASSIGNMENTS = OFF;
|
||||
IGNORE_CLIQUE_ASSIGNMENTS = OFF;
|
||||
END;
|
||||
|
||||
GLOBAL_PROJECT_DEVICE_OPTIONS
|
||||
BEGIN
|
||||
MAX7000B_ENABLE_VREFB = OFF;
|
||||
MAX7000B_ENABLE_VREFA = OFF;
|
||||
MAX7000B_VCCIO_IOBANK2 = 3.3V;
|
||||
MAX7000B_VCCIO_IOBANK1 = 3.3V;
|
||||
CONFIG_EPROM_PULLUP_RESISTOR = ON;
|
||||
CONFIG_EPROM_USER_CODE = FFFFFFFF;
|
||||
FLEX_CONFIGURATION_EPROM = AUTO;
|
||||
MAX7000AE_ENABLE_JTAG = ON;
|
||||
MAX7000AE_USER_CODE = FFFFFFFF;
|
||||
FLEX6000_USE_LOW_VOLTAGE_CONFIGURATION_EPROM = OFF;
|
||||
FLEX10KA_USE_LOW_VOLTAGE_CONFIGURATION_EPROM = ON;
|
||||
FLEX10K_USE_LOW_VOLTAGE_CONFIGURATION_EPROM = OFF;
|
||||
FLEX6000_ENABLE_JTAG = OFF;
|
||||
CONFIG_SCHEME_FLEX_6000 = PASSIVE_SERIAL;
|
||||
MULTIVOLT_IO = OFF;
|
||||
MAX7000S_ENABLE_JTAG = ON;
|
||||
FLEX10K_ENABLE_LOCK_OUTPUT = OFF;
|
||||
MAX7000S_USER_CODE = FFFF;
|
||||
CONFIG_SCHEME_10K = PASSIVE_SERIAL;
|
||||
FLEX10K_JTAG_USER_CODE = 7F;
|
||||
ENABLE_INIT_DONE_OUTPUT = OFF;
|
||||
ENABLE_CHIP_WIDE_OE = OFF;
|
||||
ENABLE_CHIP_WIDE_RESET = OFF;
|
||||
nCEO = UNRESERVED;
|
||||
CLKUSR = UNRESERVED;
|
||||
ADD17 = UNRESERVED;
|
||||
ADD16 = UNRESERVED;
|
||||
ADD15 = UNRESERVED;
|
||||
ADD14 = UNRESERVED;
|
||||
ADD13 = UNRESERVED;
|
||||
ADD0_TO_ADD12 = UNRESERVED;
|
||||
SDOUT = RESERVED_DRIVES_OUT;
|
||||
RDCLK = UNRESERVED;
|
||||
RDYnBUSY = UNRESERVED;
|
||||
nWS_nRS_nCS_CS = UNRESERVED;
|
||||
DATA1_TO_DATA7 = UNRESERVED;
|
||||
DATA0 = RESERVED_TRI_STATED;
|
||||
FLEX8000_ENABLE_JTAG = OFF;
|
||||
CONFIG_SCHEME = ACTIVE_SERIAL;
|
||||
DISABLE_TIME_OUT = OFF;
|
||||
ENABLE_DCLK_OUTPUT = OFF;
|
||||
RELEASE_CLEARS = OFF;
|
||||
AUTO_RESTART = OFF;
|
||||
USER_CLOCK = OFF;
|
||||
SECURITY_BIT = OFF;
|
||||
RESERVED_PINS_PERCENT = 0;
|
||||
RESERVED_LCELLS_PERCENT = 0;
|
||||
END;
|
||||
|
||||
GLOBAL_PROJECT_SYNTHESIS_ASSIGNMENT_OPTIONS
|
||||
BEGIN
|
||||
STYLE = FAST;
|
||||
MULTI_LEVEL_SYNTHESIS_MAX9000 = ON;
|
||||
AUTO_IMPLEMENT_IN_EAB = OFF;
|
||||
AUTO_OPEN_DRAIN_PINS = ON;
|
||||
ONE_HOT_STATE_MACHINE_ENCODING = OFF;
|
||||
AUTO_REGISTER_PACKING = OFF;
|
||||
DEVICE_FAMILY = ACEX1K;
|
||||
AUTO_FAST_IO = OFF;
|
||||
AUTO_GLOBAL_OE = ON;
|
||||
AUTO_GLOBAL_PRESET = ON;
|
||||
AUTO_GLOBAL_CLEAR = ON;
|
||||
AUTO_GLOBAL_CLOCK = ON;
|
||||
MULTI_LEVEL_SYNTHESIS_MAX5000_7000 = OFF;
|
||||
OPTIMIZE_FOR_SPEED = 5;
|
||||
END;
|
||||
|
||||
COMPILER_PROCESSING_CONFIGURATION
|
||||
BEGIN
|
||||
USE_QUARTUS_FITTER = ON;
|
||||
PRESERVE_ALL_NODE_NAME_SYNONYMS = OFF;
|
||||
FITTER_SETTINGS = NORMAL;
|
||||
SMART_RECOMPILE = OFF;
|
||||
GENERATE_AHDL_TDO_FILE = OFF;
|
||||
RPT_FILE_USER_ASSIGNMENTS = ON;
|
||||
RPT_FILE_LCELL_INTERCONNECT = ON;
|
||||
RPT_FILE_HIERARCHY = ON;
|
||||
RPT_FILE_EQUATIONS = ON;
|
||||
LINKED_SNF_EXTRACTOR = OFF;
|
||||
OPTIMIZE_TIMING_SNF = OFF;
|
||||
TIMING_SNF_EXTRACTOR = ON;
|
||||
FUNCTIONAL_SNF_EXTRACTOR = OFF;
|
||||
DESIGN_DOCTOR_RULES = EPLD;
|
||||
DESIGN_DOCTOR = OFF;
|
||||
END;
|
||||
|
||||
COMPILER_INTERFACES_CONFIGURATION
|
||||
BEGIN
|
||||
NETLIST_OUTPUT_TIME_SCALE = 0.1ns;
|
||||
EDIF_INPUT_SHOW_LMF_MAPPING_MESSAGES = OFF;
|
||||
EDIF_BUS_DELIMITERS = [];
|
||||
EDIF_FLATTEN_BUS = OFF;
|
||||
EDIF_OUTPUT_FORCE_0NS_DELAYS = OFF;
|
||||
EDIF_OUTPUT_INCLUDE_SPECIAL_PRIM = OFF;
|
||||
EDIF_OUTPUT_MAP_ILLEGAL_CHAR = OFF;
|
||||
EDIF_OUTPUT_DELAY_CONSTRUCTS = EDO_FILE;
|
||||
EDIF_OUTPUT_USE_EDC = OFF;
|
||||
EDIF_INPUT_USE_LMF2 = OFF;
|
||||
EDIF_INPUT_USE_LMF1 = OFF;
|
||||
EDIF_OUTPUT_GND = GND;
|
||||
EDIF_OUTPUT_VCC = VCC;
|
||||
EDIF_INPUT_GND = GND;
|
||||
EDIF_INPUT_VCC = VCC;
|
||||
EDIF_OUTPUT_EDC_FILE = *.edc;
|
||||
EDIF_INPUT_LMF2 = *.lmf;
|
||||
EDIF_INPUT_LMF1 = *.lmf;
|
||||
VHDL_GENERATE_CONFIGURATION_DECLARATION = OFF;
|
||||
VHDL_OUTPUT_DELAY_CONSTRUCTS = VHO_FILE;
|
||||
VERILOG_OUTPUT_DELAY_CONSTRUCTS = VO_FILE;
|
||||
VHDL_FLATTEN_BUS = OFF;
|
||||
VERILOG_FLATTEN_BUS = OFF;
|
||||
EDIF_TRUNCATE_HIERARCHY_PATH = OFF;
|
||||
VHDL_TRUNCATE_HIERARCHY_PATH = OFF;
|
||||
VERILOG_TRUNCATE_HIERARCHY_PATH = OFF;
|
||||
VERILOG_OUTPUT_MAP_ILLEGAL_CHAR = OFF;
|
||||
VHDL_WRITER_VERSION = VHDL87;
|
||||
VHDL_READER_VERSION = VHDL87;
|
||||
SYNOPSYS_MAPPING_EFFORT = MEDIUM;
|
||||
SYNOPSYS_BOUNDARY_OPTIMIZATION = OFF;
|
||||
SYNOPSYS_HIERARCHICAL_COMPILATION = ON;
|
||||
SYNOPSYS_DESIGNWARE = OFF;
|
||||
SYNOPSYS_COMPILER = DESIGN;
|
||||
USE_SYNOPSYS_SYNTHESIS = OFF;
|
||||
VHDL_NETLIST_WRITER = OFF;
|
||||
VERILOG_NETLIST_WRITER = OFF;
|
||||
XNF_GENERATE_AHDL_TDX_FILE = ON;
|
||||
XNF_TRANSLATE_INTERNAL_NODE_NAMES = ON;
|
||||
XNF_EMULATE_TRI_STATE_BUSES = INTERNAL_LOGIC;
|
||||
EDIF_OUTPUT_VERSION = 200;
|
||||
EDIF_NETLIST_WRITER = OFF;
|
||||
END;
|
||||
|
||||
CUSTOM_DESIGN_DOCTOR_RULES
|
||||
BEGIN
|
||||
MASTER_RESET = OFF;
|
||||
EXPANDER_NETWORKS = ON;
|
||||
RACE_CONDITIONS = ON;
|
||||
DELAY_CHAINS = ON;
|
||||
ASYNCHRONOUS_INPUTS = ON;
|
||||
PRESET_CLEAR_NETWORKS = ON;
|
||||
STATIC_HAZARDS_AFTER_SYNTHESIS = OFF;
|
||||
STATIC_HAZARDS_BEFORE_SYNTHESIS = ON;
|
||||
MULTI_CLOCK_NETWORKS = ON;
|
||||
MULTI_LEVEL_CLOCKS = ON;
|
||||
GATED_CLOCKS = ON;
|
||||
RIPPLE_CLOCKS = ON;
|
||||
END;
|
||||
|
||||
SIMULATOR_CONFIGURATION
|
||||
BEGIN
|
||||
BIDIR_PIN = STRONG;
|
||||
END_TIME = 0.0ns;
|
||||
START_TIME = 0.0ns;
|
||||
GLITCH_TIME = 0.0ns;
|
||||
GLITCH = OFF;
|
||||
OSCILLATION_TIME = 0.0ns;
|
||||
OSCILLATION = OFF;
|
||||
CHECK_OUTPUTS = OFF;
|
||||
SETUP_HOLD = OFF;
|
||||
USE_DEVICE = OFF;
|
||||
END;
|
||||
|
||||
TIMING_ANALYZER_CONFIGURATION
|
||||
BEGIN
|
||||
ANALYSIS_MODE = REGISTERED_PERFORMANCE;
|
||||
CUT_OFF_RAM_REGISTERED_WE_PATHS = OFF;
|
||||
LIST_PATH_FREQUENCY = 10MHz;
|
||||
LIST_PATH_COUNT = 10;
|
||||
REGISTERED_PERFORMANCE_OPTIONS = NUMBER_OF_PATHS;
|
||||
INCLUDE_PATHS_LESS_THAN_VALUE = 214.7483647ms;
|
||||
INCLUDE_PATHS_LESS_THAN = OFF;
|
||||
INCLUDE_PATHS_GREATER_THAN_VALUE = 0.0ns;
|
||||
INCLUDE_PATHS_GREATER_THAN = OFF;
|
||||
DELAY_MATRIX_OPTIONS = SHOW_ALL_PATHS;
|
||||
CELL_WIDTH = 18;
|
||||
LIST_ONLY_LONGEST_PATH = ON;
|
||||
CUT_OFF_CLEAR_AND_PRESET_PATHS = ON;
|
||||
CUT_OFF_IO_PIN_FEEDBACK = ON;
|
||||
AUTO_RECALCULATE = OFF;
|
||||
END;
|
||||
|
||||
OTHER_CONFIGURATION
|
||||
BEGIN
|
||||
LAST_MAXPLUS2_VERSION = 10.0;
|
||||
EXPLICIT_FAMILY = 1;
|
||||
ROW_PINS_LCELL_INSERT = ON;
|
||||
CARRY_OUT_PINS_LCELL_INSERT = OFF;
|
||||
NORMAL_LCELL_INSERT = ON;
|
||||
FLEX_10K_52_COLUMNS = 40;
|
||||
DEFAULT_9K_EXP_PER_LCELL = 1/2;
|
||||
LOCAL_INTERCONNECT_PER_LAB_PERCENT = 100;
|
||||
LCELLS_PER_ROW_PERCENT = 100;
|
||||
FAN_IN_PER_LCELL_PERCENT = 100;
|
||||
EXP_PER_LCELL_PERCENT = 100;
|
||||
ROW_PINS_PERCENT = 50;
|
||||
ORIGINAL_MAXPLUS2_VERSION = 9.6;
|
||||
COMPILER_DATA = "1,1,0,1,0,0,0,1,1,1,1,0,1,1,1";
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE NORMAL.MAX5000
|
||||
BEGIN
|
||||
REGISTER_OPTIMIZATION = ON;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
RESYNTHESIZE_NETWORK = ON;
|
||||
MULTI_LEVEL_FACTORING = ON;
|
||||
SUBFACTOR_EXTRACTION = ON;
|
||||
REFACTORIZATION = ON;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = ON;
|
||||
REDUCE_LOGIC = ON;
|
||||
DECOMPOSE_GATES = ON;
|
||||
SOFT_BUFFER_INSERTION = ON;
|
||||
FAST_IO = OFF;
|
||||
IGNORE_SOFT_BUFFERS = OFF;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
TURBO_BIT = OFF;
|
||||
XOR_SYNTHESIS = ON;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
MINIMIZATION = FULL;
|
||||
CARRY_CHAIN_LENGTH = -1;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN_LENGTH = -1;
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE NORMAL.MAX7000
|
||||
BEGIN
|
||||
REGISTER_OPTIMIZATION = ON;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
RESYNTHESIZE_NETWORK = ON;
|
||||
MULTI_LEVEL_FACTORING = ON;
|
||||
SUBFACTOR_EXTRACTION = ON;
|
||||
REFACTORIZATION = ON;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = ON;
|
||||
REDUCE_LOGIC = ON;
|
||||
DECOMPOSE_GATES = ON;
|
||||
SOFT_BUFFER_INSERTION = ON;
|
||||
FAST_IO = OFF;
|
||||
IGNORE_SOFT_BUFFERS = OFF;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
TURBO_BIT = ON;
|
||||
XOR_SYNTHESIS = ON;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
MINIMIZATION = FULL;
|
||||
CARRY_CHAIN_LENGTH = -1;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN_LENGTH = -1;
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE NORMAL.CLASSIC
|
||||
BEGIN
|
||||
REGISTER_OPTIMIZATION = OFF;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
RESYNTHESIZE_NETWORK = ON;
|
||||
MULTI_LEVEL_FACTORING = OFF;
|
||||
SUBFACTOR_EXTRACTION = OFF;
|
||||
REFACTORIZATION = OFF;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = OFF;
|
||||
REDUCE_LOGIC = OFF;
|
||||
DECOMPOSE_GATES = ON;
|
||||
SOFT_BUFFER_INSERTION = ON;
|
||||
FAST_IO = OFF;
|
||||
IGNORE_SOFT_BUFFERS = OFF;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
TURBO_BIT = ON;
|
||||
XOR_SYNTHESIS = OFF;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
MINIMIZATION = FULL;
|
||||
CARRY_CHAIN_LENGTH = -1;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN_LENGTH = -1;
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE NORMAL.FLEX8000
|
||||
BEGIN
|
||||
REGISTER_OPTIMIZATION = ON;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
RESYNTHESIZE_NETWORK = ON;
|
||||
MULTI_LEVEL_FACTORING = ON;
|
||||
SUBFACTOR_EXTRACTION = ON;
|
||||
REFACTORIZATION = ON;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = ON;
|
||||
REDUCE_LOGIC = ON;
|
||||
DECOMPOSE_GATES = ON;
|
||||
SOFT_BUFFER_INSERTION = ON;
|
||||
IGNORE_SOFT_BUFFERS = ON;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
TURBO_BIT = OFF;
|
||||
XOR_SYNTHESIS = OFF;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
MINIMIZATION = FULL;
|
||||
CARRY_CHAIN_LENGTH = 32;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN_LENGTH = 2;
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE FAST.MAX5000
|
||||
BEGIN
|
||||
REGISTER_OPTIMIZATION = ON;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
RESYNTHESIZE_NETWORK = ON;
|
||||
MULTI_LEVEL_FACTORING = ON;
|
||||
SUBFACTOR_EXTRACTION = OFF;
|
||||
REFACTORIZATION = OFF;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = ON;
|
||||
REDUCE_LOGIC = ON;
|
||||
DECOMPOSE_GATES = ON;
|
||||
SOFT_BUFFER_INSERTION = ON;
|
||||
FAST_IO = OFF;
|
||||
IGNORE_SOFT_BUFFERS = OFF;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
TURBO_BIT = OFF;
|
||||
XOR_SYNTHESIS = ON;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
MINIMIZATION = FULL;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE FAST.MAX7000
|
||||
BEGIN
|
||||
REGISTER_OPTIMIZATION = ON;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
RESYNTHESIZE_NETWORK = ON;
|
||||
MULTI_LEVEL_FACTORING = ON;
|
||||
SUBFACTOR_EXTRACTION = OFF;
|
||||
REFACTORIZATION = OFF;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = ON;
|
||||
REDUCE_LOGIC = ON;
|
||||
DECOMPOSE_GATES = ON;
|
||||
SOFT_BUFFER_INSERTION = ON;
|
||||
FAST_IO = OFF;
|
||||
IGNORE_SOFT_BUFFERS = OFF;
|
||||
PARALLEL_EXPANDERS = ON;
|
||||
TURBO_BIT = ON;
|
||||
XOR_SYNTHESIS = ON;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
MINIMIZATION = FULL;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE FAST.CLASSIC
|
||||
BEGIN
|
||||
REGISTER_OPTIMIZATION = OFF;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
RESYNTHESIZE_NETWORK = ON;
|
||||
MULTI_LEVEL_FACTORING = OFF;
|
||||
SUBFACTOR_EXTRACTION = OFF;
|
||||
REFACTORIZATION = OFF;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = OFF;
|
||||
REDUCE_LOGIC = OFF;
|
||||
DECOMPOSE_GATES = ON;
|
||||
SOFT_BUFFER_INSERTION = ON;
|
||||
FAST_IO = OFF;
|
||||
IGNORE_SOFT_BUFFERS = OFF;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
TURBO_BIT = ON;
|
||||
XOR_SYNTHESIS = OFF;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
MINIMIZATION = FULL;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE FAST.FLEX8000
|
||||
BEGIN
|
||||
SUBFACTOR_EXTRACTION = ON;
|
||||
REFACTORIZATION = ON;
|
||||
REGISTER_OPTIMIZATION = ON;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
RESYNTHESIZE_NETWORK = ON;
|
||||
MULTI_LEVEL_FACTORING = ON;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = ON;
|
||||
REDUCE_LOGIC = ON;
|
||||
DECOMPOSE_GATES = ON;
|
||||
SOFT_BUFFER_INSERTION = ON;
|
||||
IGNORE_SOFT_BUFFERS = ON;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
TURBO_BIT = OFF;
|
||||
XOR_SYNTHESIS = OFF;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
MINIMIZATION = FULL;
|
||||
CARRY_CHAIN_LENGTH = 32;
|
||||
CARRY_CHAIN = AUTO;
|
||||
CASCADE_CHAIN_LENGTH = 2;
|
||||
CASCADE_CHAIN = AUTO;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE WYSIWYG.MAX5000
|
||||
BEGIN
|
||||
REGISTER_OPTIMIZATION = OFF;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
RESYNTHESIZE_NETWORK = OFF;
|
||||
MULTI_LEVEL_FACTORING = OFF;
|
||||
SUBFACTOR_EXTRACTION = OFF;
|
||||
REFACTORIZATION = OFF;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = OFF;
|
||||
REDUCE_LOGIC = OFF;
|
||||
DECOMPOSE_GATES = OFF;
|
||||
SOFT_BUFFER_INSERTION = OFF;
|
||||
FAST_IO = OFF;
|
||||
IGNORE_SOFT_BUFFERS = OFF;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
TURBO_BIT = OFF;
|
||||
XOR_SYNTHESIS = OFF;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
MINIMIZATION = PARTIAL;
|
||||
CARRY_CHAIN_LENGTH = -1;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN_LENGTH = -1;
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE WYSIWYG.MAX7000
|
||||
BEGIN
|
||||
REGISTER_OPTIMIZATION = OFF;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
RESYNTHESIZE_NETWORK = OFF;
|
||||
MULTI_LEVEL_FACTORING = OFF;
|
||||
SUBFACTOR_EXTRACTION = OFF;
|
||||
REFACTORIZATION = OFF;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = OFF;
|
||||
REDUCE_LOGIC = OFF;
|
||||
DECOMPOSE_GATES = OFF;
|
||||
SOFT_BUFFER_INSERTION = OFF;
|
||||
FAST_IO = OFF;
|
||||
IGNORE_SOFT_BUFFERS = OFF;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
TURBO_BIT = ON;
|
||||
XOR_SYNTHESIS = OFF;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
MINIMIZATION = PARTIAL;
|
||||
CARRY_CHAIN_LENGTH = -1;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN_LENGTH = -1;
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE WYSIWYG.CLASSIC
|
||||
BEGIN
|
||||
REGISTER_OPTIMIZATION = OFF;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
RESYNTHESIZE_NETWORK = ON;
|
||||
MULTI_LEVEL_FACTORING = OFF;
|
||||
SUBFACTOR_EXTRACTION = OFF;
|
||||
REFACTORIZATION = OFF;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = OFF;
|
||||
REDUCE_LOGIC = OFF;
|
||||
DECOMPOSE_GATES = ON;
|
||||
SOFT_BUFFER_INSERTION = OFF;
|
||||
FAST_IO = OFF;
|
||||
IGNORE_SOFT_BUFFERS = OFF;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
TURBO_BIT = ON;
|
||||
XOR_SYNTHESIS = OFF;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
MINIMIZATION = PARTIAL;
|
||||
CARRY_CHAIN_LENGTH = -1;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN_LENGTH = -1;
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE WYSIWYG.FLEX8000
|
||||
BEGIN
|
||||
REGISTER_OPTIMIZATION = OFF;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
RESYNTHESIZE_NETWORK = OFF;
|
||||
MULTI_LEVEL_FACTORING = OFF;
|
||||
SUBFACTOR_EXTRACTION = OFF;
|
||||
REFACTORIZATION = OFF;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = OFF;
|
||||
REDUCE_LOGIC = OFF;
|
||||
DECOMPOSE_GATES = OFF;
|
||||
SOFT_BUFFER_INSERTION = ON;
|
||||
IGNORE_SOFT_BUFFERS = ON;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
TURBO_BIT = OFF;
|
||||
XOR_SYNTHESIS = OFF;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
MINIMIZATION = PARTIAL;
|
||||
CARRY_CHAIN_LENGTH = 32;
|
||||
CARRY_CHAIN = MANUAL;
|
||||
CASCADE_CHAIN_LENGTH = 2;
|
||||
CASCADE_CHAIN = MANUAL;
|
||||
END;
|
||||
|
||||
26
src/altera/acex/k30/KBD.INC
Normal file
26
src/altera/acex/k30/KBD.INC
Normal file
@ -0,0 +1,26 @@
|
||||
-- Copyright (C) 1988-2000 Altera Corporation
|
||||
-- Any megafunction design, and related net list (encrypted or decrypted),
|
||||
-- support information, device programming or simulation file, and any other
|
||||
-- associated documentation or information provided by Altera or a partner
|
||||
-- under Altera's Megafunction Partnership Program may be used only to
|
||||
-- program PLD devices (but not masked PLD devices) from Altera. Any other
|
||||
-- use of such megafunction design, net list, support information, device
|
||||
-- programming or simulation file, or any other related documentation or
|
||||
-- information is prohibited for any other purpose, including, but not
|
||||
-- limited to modification, reverse engineering, de-compiling, or use with
|
||||
-- any other silicon devices, unless such use is explicitly licensed under
|
||||
-- a separate agreement with Altera or a megafunction partner. Title to
|
||||
-- the intellectual property, including patents, copyrights, trademarks,
|
||||
-- trade secrets, or maskworks, embodied in any such megafunction design,
|
||||
-- net list, support information, device programming or simulation file, or
|
||||
-- any other related documentation or information provided by Altera or a
|
||||
-- megafunction partner, remains with Altera, the megafunction partner, or
|
||||
-- their respective licensors. No other licenses, including any licenses
|
||||
-- needed under any third party's intellectual property, are provided herein.
|
||||
|
||||
-- MAX+plus II Include File
|
||||
-- Version 10.0 9/14/2000
|
||||
-- Created: Thu May 03 21:43:31 2001
|
||||
|
||||
FUNCTION kbd (clk42, clk_k, kbd_cc, kbd_dd, /rf, /io, /iom, /m1, a[15..8], ena, int_ena)
|
||||
RETURNS (kbo[7..0], kb_reset, kb_f12, kb_ctrl, kb_alt, kb_sh, int);
|
||||
180
src/altera/acex/k30/KBD.TDF
Normal file
180
src/altera/acex/k30/KBD.TDF
Normal file
@ -0,0 +1,180 @@
|
||||
|
||||
TITLE "ZX-Keyboard";
|
||||
|
||||
INCLUDE "lpm_ram_dq";
|
||||
|
||||
SUBDESIGN kbd
|
||||
(
|
||||
CLK42 : INPUT; -- full sinc 42MHz
|
||||
CLK_K : INPUT; -- sinc input 15KHz
|
||||
KBD_CC : INPUT; -- sinc KBD
|
||||
KBD_DD : INPUT; -- data KBD
|
||||
|
||||
/RF : INPUT; -- /rfsh
|
||||
/IO : INPUT; -- /iorq
|
||||
/IOM : INPUT;
|
||||
/M1 : INPUT;
|
||||
|
||||
A[15..8] : INPUT;
|
||||
|
||||
KBO[7..0] : OUTPUT; -- output
|
||||
|
||||
KB_RESET : OUTPUT;
|
||||
|
||||
KB_F12 : OUTPUT;
|
||||
KB_CTRL : OUTPUT;
|
||||
KB_ALT : OUTPUT;
|
||||
KB_SH : OUTPUT;
|
||||
|
||||
ENA : INPUT;
|
||||
INT_ENA : INPUT;
|
||||
INT : OUTPUT;
|
||||
)
|
||||
VARIABLE
|
||||
|
||||
KB_CT[2..0] : DFF;
|
||||
KB_D[10..0] : DFF;
|
||||
KB_OFF : DFFE;
|
||||
|
||||
KB_EXT : DFF;
|
||||
KB_ALT : DFF;
|
||||
KB_CTRL : DFF;
|
||||
KB_SH : DFF;
|
||||
|
||||
KB_CTRL_X : NODE;
|
||||
KB_ALT_X : NODE;
|
||||
KB_SH_X : NODE;
|
||||
KB_XXX : NODE;
|
||||
KB_RESET : DFF;
|
||||
RXA[1..0] : DFFE;
|
||||
|
||||
K_CLK : NODE;
|
||||
KA[15..0] : NODE;
|
||||
KB_MA[2..0] : DFF;
|
||||
KB_MXA : NODE;
|
||||
KDCA[2..0] : LCELL;
|
||||
|
||||
KDD[7..0] : DFF;
|
||||
KBD[5..0] : DFF;
|
||||
KD[7..0] : NODE;
|
||||
KDX[5..0] : DFF;
|
||||
KDXX[5..0] : DFF;
|
||||
WR_KBD : NODE;
|
||||
KB_OFL : NODE;
|
||||
|
||||
BEGIN
|
||||
|
||||
INT = DFF((KB_CT[] == 0),CLK42,,INT_ENA);
|
||||
|
||||
-- KB_CT[].clk = DFF(CLK_K,CLK42,,);
|
||||
KB_CT[].clk = CLK_K;
|
||||
KB_CT[].prn = DFF(KBD_CC,CLK42,,);
|
||||
|
||||
CASE KB_CT[] IS
|
||||
WHEN 0 => KB_CT[].d = GND;
|
||||
WHEN 1,2,3,4,5,6,7 => KB_CT[].d = KB_CT[] - 1;
|
||||
END CASE;
|
||||
|
||||
KB_D[].clk = DFF(!KBD_CC,CLK42,,);
|
||||
KB_D[].d = (KBD_DD,KB_D[10..1]);
|
||||
|
||||
KB_OFF.ena = !KB_EXT;
|
||||
KB_OFF.clk = DFF((KB_CT[] == 0),CLK42,,);
|
||||
KB_OFF.d = KB_D[] == B"XX11110000X";
|
||||
|
||||
KB_EXT.clk = DFF((KB_CT[] == 1),CLK42,,);
|
||||
KB_EXT.d = KB_D[] == B"XX11100000X";
|
||||
|
||||
KB_CTRL.clk = !KB_CT2;
|
||||
KB_ALT.clk = !KB_CT2;
|
||||
KB_SH.clk = !KB_CT2;
|
||||
|
||||
KB_CTRL_X = LCELL(KB_D[] == B"XXXXX1X100X");
|
||||
KB_ALT_X = LCELL(KB_D[] == B"XXXXX1X001X");
|
||||
KB_SH_X = LCELL(KB_D[] == B"XX0X01X0XXX") &
|
||||
CASCADE((KB_D[] == B"XXX1XX1X01X") or (KB_D[] == B"XXX0XX0X10X"));
|
||||
KB_XXX = LCELL(KB_D[] == B"XX000X0XXXX");
|
||||
|
||||
CASE KB_OFF IS
|
||||
WHEN 0 =>
|
||||
KB_CTRL.d = (KB_CTRL_X & KB_XXX) or KB_CTRL;
|
||||
KB_ALT.d = (KB_ALT_X & KB_XXX) or KB_ALT;
|
||||
KB_SH.d = (KB_SH_X) or KB_SH;
|
||||
WHEN 1 =>
|
||||
KB_CTRL.d = !(KB_CTRL_X & KB_XXX) & KB_CTRL;
|
||||
KB_ALT.d = !(KB_ALT_X & KB_XXX) & KB_ALT;
|
||||
KB_SH.d = !(KB_SH_X) & KB_SH;
|
||||
END CASE;
|
||||
|
||||
KB_F12 = DFF(!((KB_XXX & LCELL(KB_D[] == B"XXXXX0X111X")) & !KB_OFF),
|
||||
!KB_CT2,,!(KB_CT[] == 1));
|
||||
|
||||
KB_RESET.clk = !KB_CT2;
|
||||
KB_RESET.d = !(KB_ALT_X & (KB_D[] == B"XX011X0XXXX") & !KB_OFF & KB_CTRL & KB_ALT);
|
||||
KB_RESET.prn = !DFF((KB_CT[] == 1),CLK42,,);
|
||||
|
||||
K_CLK = DFF(/RF,CLK42,,);
|
||||
|
||||
RXA[].ena = VCC;
|
||||
RXA[].clk = K_CLK;
|
||||
|
||||
CASE DFF((!(KB_CT[] == B"01X") & (RXA[] == 0)),CLK42,,) IS
|
||||
WHEN B"1" => RXA[] = GND;
|
||||
WHEN B"0" => RXA[] = (RXA0,!RXA1);
|
||||
END CASE;
|
||||
|
||||
CASE (DFF((/IO & (RXA[] == 0),CLK42,,)),LCELL(KDD7 & KDD6)) IS
|
||||
WHEN B"0X" => KA[15..8] = (B"101",KDCA[],B"11");
|
||||
WHEN B"10" => KA[15..8] = (B"110000",KDD7,KDD6);
|
||||
WHEN B"11" => KA[15..8] = KB_D[8..1];
|
||||
END CASE;
|
||||
|
||||
KB_MA[].clk = CLK42;
|
||||
KB_MA[].d = KB_MA[] + 1;
|
||||
KB_MA[].clrn = !DFF(/IO,CLK42,,);
|
||||
|
||||
KB_MXA = DFF(( (((KB_MA[] == 7) & A15) or ((KB_MA[] == 6) & A14))
|
||||
or (((KB_MA[] == 5) & A13) or ((KB_MA[] == 4) & A12))
|
||||
or (((KB_MA[] == 3) & A11) or ((KB_MA[] == 2) & A10))
|
||||
or (((KB_MA[] == 1) & A9 ) or ((KB_MA[] == 0) & A8 ))),CLK42,,);
|
||||
|
||||
IF !DFF(/IO,CLK42,,) THEN
|
||||
KDCA[] = KB_MA[];
|
||||
ELSE
|
||||
KDCA[] = KDD[5..3];
|
||||
END IF;
|
||||
|
||||
KDD[].clk = RXA0;
|
||||
KDD[].d = KD[];
|
||||
KDD[7..6].prn = !KB_CT2;
|
||||
|
||||
KDXX[].clk = RXA0;
|
||||
KDXX[].d = !((KD[2..0] == 5),(KD[2..0] == 4),
|
||||
(KD[2..0] == 3),(KD[2..0] == 2),
|
||||
(KD[2..0] == 1),(KD[2..0] == 0));
|
||||
|
||||
KDX[].clk = RXA1;
|
||||
|
||||
CASE KB_OFF IS
|
||||
WHEN B"0" => KDX[].d = (KD[5..0] & KDXX[]);
|
||||
WHEN B"1" => KDX[].d = (KD[5..0] or !KDXX[]);
|
||||
END CASE;
|
||||
|
||||
-- ==============================
|
||||
|
||||
WR_KBD = K_CLK or !DFF((KB_CT[] == 2),CLK42,,) or !(RXA[] == 3);
|
||||
|
||||
KD[] = lpm_ram_dq((B"11",KDX[5..0]),KA[15..8],!WR_KBD,CLK42,)
|
||||
WITH (lpm_width=8,lpm_widthad=8,lpm_file="KBD_INI2.MIF",
|
||||
lpm_outdata="UNREGISTERED");
|
||||
|
||||
KBD[].clk = CLK42;
|
||||
KBD[].prn = DFF(VCC,KB_MA2,(!/IO & ENA),);
|
||||
|
||||
-- KBD[].prn = DFF(!/IOM,CLK42,,);
|
||||
KBD[].d = KBD[] & (KD[5..0] or KB_MXA);
|
||||
|
||||
KBO[] = (VCC,VCC,KBD[]);
|
||||
|
||||
END;
|
||||
|
||||
167
src/altera/acex/k30/KBD_INI2.MIF
Normal file
167
src/altera/acex/k30/KBD_INI2.MIF
Normal file
@ -0,0 +1,167 @@
|
||||
DEPTH = 256; % Memory depth and width are required %
|
||||
WIDTH = 8; % Enter a decimal number %
|
||||
|
||||
ADDRESS_RADIX = HEX; % Address and value radixes are optional %
|
||||
DATA_RADIX = BIN; % Enter BIN, DEC, HEX, or OCT; unless %
|
||||
% otherwise specified, radixes = HEX %
|
||||
|
||||
-- Specify values for addresses, which can be single address or range
|
||||
|
||||
CONTENT
|
||||
BEGIN
|
||||
[0..FF] : 11111111;
|
||||
0 :
|
||||
11111111 % .. %
|
||||
00100001 % F9 %
|
||||
11111111 % .. %
|
||||
00011100 % F5 %
|
||||
00011010 % F3 %
|
||||
00011000 % F1 %
|
||||
00011001 % F2 %
|
||||
11111111 % F12 %
|
||||
11111111 % .. %
|
||||
00100000 % F10 %
|
||||
|
||||
00100010 % F8 %
|
||||
00100100 % F6 %
|
||||
00011011 % F4 %
|
||||
01011000 % Tab %
|
||||
10001000 % ~` %
|
||||
11111111 % .. %
|
||||
11111111 % .. %
|
||||
01111001 % Alt %
|
||||
11000000 % Left Shift %
|
||||
11111111 % .. %
|
||||
|
||||
11111001 % Ctrl %
|
||||
11010000 % 'Q' %
|
||||
11011000 % '1' %
|
||||
11111111 % .. %
|
||||
11111111 % .. %
|
||||
11111111 % .. %
|
||||
11000001 % 'Z' %
|
||||
11001001 % 'S' %
|
||||
11001000 % 'A' %
|
||||
11010001 % 'W' %
|
||||
|
||||
11011001 % '2' %
|
||||
01110000 % left WIN %
|
||||
11111111 % .. %
|
||||
11000011 % 'C' %
|
||||
11000010 % 'X' %
|
||||
11001010 % 'D' %
|
||||
11010010 % 'E' %
|
||||
11011011 % '4' %
|
||||
11011010 % '3' %
|
||||
10110000 % Right WIN %
|
||||
|
||||
11111111 % .. %
|
||||
11111000 % ' ' %
|
||||
11000100 % 'V' %
|
||||
11001011 % 'F' %
|
||||
11010100 % 'T' %
|
||||
11010011 % 'R' %
|
||||
11011100 % '5' %
|
||||
10111000 % Right Mouse %
|
||||
11111111 % .. %
|
||||
11111011 % 'N' %
|
||||
|
||||
11111100 % 'B' %
|
||||
11110100 % 'H' %
|
||||
11001100 % 'G' %
|
||||
11101100 % 'Y' %
|
||||
11100100 % '6' %
|
||||
11111111 % .. %
|
||||
11111111 % .. %
|
||||
11111111 % .. %
|
||||
11111010 % 'M' %
|
||||
11110011 % 'J' %
|
||||
|
||||
11101011 % 'U' %
|
||||
11100011 % '7' %
|
||||
11100010 % '8' %
|
||||
11111111 % .. %
|
||||
11111111 % .. %
|
||||
10111011 % ',' %
|
||||
11110010 % 'K' %
|
||||
11101010 % 'I' %
|
||||
11101001 % 'O' %
|
||||
11100000 % '0' %
|
||||
|
||||
11100001 % '9' %
|
||||
11111111 % .. %
|
||||
11111111 % .. %
|
||||
10111010 % '.' %
|
||||
10000100 % '/' %
|
||||
11110001 % 'L' %
|
||||
10101001 % ';' %
|
||||
11101000 % 'P' %
|
||||
10110011 % '-' %
|
||||
11111111 % .. %
|
||||
|
||||
11111111 % .. %
|
||||
11111111 % .. %
|
||||
10101000 % "'" %
|
||||
11111111 % .. %
|
||||
10101100 % '[' %
|
||||
10110001 % '=' %
|
||||
11111111 % .. %
|
||||
11111111 % .. %
|
||||
01011001 % Caps Lock %
|
||||
11000000 % Right SHIFT %
|
||||
|
||||
11110000 % ENTER %
|
||||
10101011 % ']' %
|
||||
11111111 % .. %
|
||||
10001010 % '\' %
|
||||
11111111 % .. %
|
||||
11111111 % .. %
|
||||
11111111 % .. %
|
||||
11111111 % .. %
|
||||
11111111 % .. %
|
||||
11111111 % .. %
|
||||
|
||||
11111111 % .. %
|
||||
11111111 % .. %
|
||||
01100000 % Back %
|
||||
11111111 % .. %
|
||||
11111111 % .. %
|
||||
10010010 % End %
|
||||
11111111 % .. %
|
||||
01011100 % <- %
|
||||
10010000 % Home %
|
||||
11111111 % .. %
|
||||
|
||||
11111111 % .. %
|
||||
11111111 % .. %
|
||||
10010001 % ins %
|
||||
01100001 % DEL %
|
||||
01100100 % Dn %
|
||||
10101010 % grey 5 ; ctrl + I %
|
||||
01100010 % -> %
|
||||
01100011 % Up %
|
||||
01111000 % ESC %
|
||||
00111111 % Num %
|
||||
|
||||
11111111 % F11 %
|
||||
10110010 % G+ %
|
||||
01011011 % PDn ; caps + 4 %
|
||||
10110011 % G- %
|
||||
10111100 % G* %
|
||||
01011010 % PUp ; caps + 3 %
|
||||
00000000 % Scrol Lock %
|
||||
11111111 % .. %
|
||||
11111111 % .. %
|
||||
11111111 % .. %
|
||||
|
||||
11111111 % .. %
|
||||
00100011 % F7 % ;
|
||||
% !! DATA FOR CAPS !! %
|
||||
C0 :
|
||||
11111101 % Function shift %
|
||||
11000000 % Left Shift %
|
||||
11111001 % Ctrl %
|
||||
11111111 ; % no shift %
|
||||
END ;
|
||||
|
||||
|
||||
571
src/altera/acex/k30/MOUSE.ACF
Normal file
571
src/altera/acex/k30/MOUSE.ACF
Normal file
@ -0,0 +1,571 @@
|
||||
--
|
||||
-- Copyright (C) 1988-2000 Altera Corporation
|
||||
-- Any megafunction design, and related net list (encrypted or decrypted),
|
||||
-- support information, device programming or simulation file, and any other
|
||||
-- associated documentation or information provided by Altera or a partner
|
||||
-- under Altera's Megafunction Partnership Program may be used only to
|
||||
-- program PLD devices (but not masked PLD devices) from Altera. Any other
|
||||
-- use of such megafunction design, net list, support information, device
|
||||
-- programming or simulation file, or any other related documentation or
|
||||
-- information is prohibited for any other purpose, including, but not
|
||||
-- limited to modification, reverse engineering, de-compiling, or use with
|
||||
-- any other silicon devices, unless such use is explicitly licensed under
|
||||
-- a separate agreement with Altera or a megafunction partner. Title to
|
||||
-- the intellectual property, including patents, copyrights, trademarks,
|
||||
-- trade secrets, or maskworks, embodied in any such megafunction design,
|
||||
-- net list, support information, device programming or simulation file, or
|
||||
-- any other related documentation or information provided by Altera or a
|
||||
-- megafunction partner, remains with Altera, the megafunction partner, or
|
||||
-- their respective licensors. No other licenses, including any licenses
|
||||
-- needed under any third party's intellectual property, are provided herein.
|
||||
--
|
||||
CHIP mouse
|
||||
BEGIN
|
||||
DEVICE = EP1K30QC208-3;
|
||||
END;
|
||||
|
||||
DEFAULT_DEVICES
|
||||
BEGIN
|
||||
AUTO_DEVICE = EP1K100FC484-1;
|
||||
AUTO_DEVICE = EP1K100FC256-1;
|
||||
AUTO_DEVICE = EP1K100QC208-1;
|
||||
AUTO_DEVICE = EP1K50FC484-1;
|
||||
AUTO_DEVICE = EP1K50FC256-1;
|
||||
AUTO_DEVICE = EP1K50QC208-1;
|
||||
AUTO_DEVICE = EP1K50TC144-1;
|
||||
AUTO_DEVICE = EP1K30FC256-1;
|
||||
AUTO_DEVICE = EP1K30QC208-1;
|
||||
AUTO_DEVICE = EP1K30TC144-1;
|
||||
AUTO_DEVICE = EP1K10FC256-1;
|
||||
AUTO_DEVICE = EP1K10QC208-1;
|
||||
AUTO_DEVICE = EP1K10TC144-1;
|
||||
AUTO_DEVICE = EP1K10TC100-1;
|
||||
ASK_BEFORE_ADDING_EXTRA_DEVICES = ON;
|
||||
END;
|
||||
|
||||
TIMING_POINT
|
||||
BEGIN
|
||||
DEVICE_FOR_TIMING_SYNTHESIS = EP1K30QC208-3;
|
||||
FREQUENCY = 200MHz;
|
||||
MAINTAIN_STABLE_SYNTHESIS = OFF;
|
||||
CUT_ALL_CLEAR_PRESET = ON;
|
||||
CUT_ALL_BIDIR = ON;
|
||||
END;
|
||||
|
||||
IGNORED_ASSIGNMENTS
|
||||
BEGIN
|
||||
FIT_IGNORE_TIMING = OFF;
|
||||
DEMOTE_SPECIFIC_LCELL_ASSIGNMENTS_TO_LAB_ASSIGNMENTS = OFF;
|
||||
IGNORE_LOCAL_ROUTING_ASSIGNMENTS = OFF;
|
||||
IGNORE_DEVICE_ASSIGNMENTS = OFF;
|
||||
IGNORE_LC_ASSIGNMENTS = OFF;
|
||||
IGNORE_PIN_ASSIGNMENTS = OFF;
|
||||
IGNORE_CHIP_ASSIGNMENTS = OFF;
|
||||
IGNORE_TIMING_ASSIGNMENTS = OFF;
|
||||
IGNORE_LOGIC_OPTION_ASSIGNMENTS = OFF;
|
||||
IGNORE_CLIQUE_ASSIGNMENTS = OFF;
|
||||
END;
|
||||
|
||||
GLOBAL_PROJECT_DEVICE_OPTIONS
|
||||
BEGIN
|
||||
MAX7000B_ENABLE_VREFB = OFF;
|
||||
MAX7000B_ENABLE_VREFA = OFF;
|
||||
MAX7000B_VCCIO_IOBANK2 = 3.3V;
|
||||
MAX7000B_VCCIO_IOBANK1 = 3.3V;
|
||||
CONFIG_EPROM_PULLUP_RESISTOR = ON;
|
||||
CONFIG_EPROM_USER_CODE = FFFFFFFF;
|
||||
FLEX_CONFIGURATION_EPROM = AUTO;
|
||||
MAX7000AE_ENABLE_JTAG = ON;
|
||||
MAX7000AE_USER_CODE = FFFFFFFF;
|
||||
FLEX6000_USE_LOW_VOLTAGE_CONFIGURATION_EPROM = OFF;
|
||||
FLEX10KA_USE_LOW_VOLTAGE_CONFIGURATION_EPROM = ON;
|
||||
FLEX10K_USE_LOW_VOLTAGE_CONFIGURATION_EPROM = OFF;
|
||||
FLEX6000_ENABLE_JTAG = OFF;
|
||||
CONFIG_SCHEME_FLEX_6000 = PASSIVE_SERIAL;
|
||||
MULTIVOLT_IO = OFF;
|
||||
MAX7000S_ENABLE_JTAG = ON;
|
||||
FLEX10K_ENABLE_LOCK_OUTPUT = OFF;
|
||||
MAX7000S_USER_CODE = FFFF;
|
||||
CONFIG_SCHEME_10K = PASSIVE_SERIAL;
|
||||
FLEX10K_JTAG_USER_CODE = 7F;
|
||||
ENABLE_INIT_DONE_OUTPUT = OFF;
|
||||
ENABLE_CHIP_WIDE_OE = OFF;
|
||||
ENABLE_CHIP_WIDE_RESET = OFF;
|
||||
nCEO = UNRESERVED;
|
||||
CLKUSR = UNRESERVED;
|
||||
ADD17 = UNRESERVED;
|
||||
ADD16 = UNRESERVED;
|
||||
ADD15 = UNRESERVED;
|
||||
ADD14 = UNRESERVED;
|
||||
ADD13 = UNRESERVED;
|
||||
ADD0_TO_ADD12 = UNRESERVED;
|
||||
SDOUT = RESERVED_DRIVES_OUT;
|
||||
RDCLK = UNRESERVED;
|
||||
RDYnBUSY = UNRESERVED;
|
||||
nWS_nRS_nCS_CS = UNRESERVED;
|
||||
DATA1_TO_DATA7 = UNRESERVED;
|
||||
DATA0 = RESERVED_TRI_STATED;
|
||||
FLEX8000_ENABLE_JTAG = OFF;
|
||||
CONFIG_SCHEME = ACTIVE_SERIAL;
|
||||
DISABLE_TIME_OUT = OFF;
|
||||
ENABLE_DCLK_OUTPUT = OFF;
|
||||
RELEASE_CLEARS = OFF;
|
||||
AUTO_RESTART = OFF;
|
||||
USER_CLOCK = OFF;
|
||||
SECURITY_BIT = OFF;
|
||||
RESERVED_PINS_PERCENT = 0;
|
||||
RESERVED_LCELLS_PERCENT = 0;
|
||||
END;
|
||||
|
||||
GLOBAL_PROJECT_SYNTHESIS_ASSIGNMENT_OPTIONS
|
||||
BEGIN
|
||||
STYLE = FAST;
|
||||
MULTI_LEVEL_SYNTHESIS_MAX9000 = ON;
|
||||
AUTO_IMPLEMENT_IN_EAB = OFF;
|
||||
AUTO_OPEN_DRAIN_PINS = ON;
|
||||
ONE_HOT_STATE_MACHINE_ENCODING = OFF;
|
||||
AUTO_REGISTER_PACKING = OFF;
|
||||
DEVICE_FAMILY = ACEX1K;
|
||||
AUTO_FAST_IO = OFF;
|
||||
AUTO_GLOBAL_OE = ON;
|
||||
AUTO_GLOBAL_PRESET = ON;
|
||||
AUTO_GLOBAL_CLEAR = ON;
|
||||
AUTO_GLOBAL_CLOCK = ON;
|
||||
MULTI_LEVEL_SYNTHESIS_MAX5000_7000 = OFF;
|
||||
OPTIMIZE_FOR_SPEED = 5;
|
||||
END;
|
||||
|
||||
COMPILER_PROCESSING_CONFIGURATION
|
||||
BEGIN
|
||||
USE_QUARTUS_FITTER = ON;
|
||||
PRESERVE_ALL_NODE_NAME_SYNONYMS = OFF;
|
||||
FITTER_SETTINGS = NORMAL;
|
||||
SMART_RECOMPILE = OFF;
|
||||
GENERATE_AHDL_TDO_FILE = OFF;
|
||||
RPT_FILE_USER_ASSIGNMENTS = ON;
|
||||
RPT_FILE_LCELL_INTERCONNECT = ON;
|
||||
RPT_FILE_HIERARCHY = ON;
|
||||
RPT_FILE_EQUATIONS = ON;
|
||||
LINKED_SNF_EXTRACTOR = OFF;
|
||||
OPTIMIZE_TIMING_SNF = OFF;
|
||||
TIMING_SNF_EXTRACTOR = ON;
|
||||
FUNCTIONAL_SNF_EXTRACTOR = OFF;
|
||||
DESIGN_DOCTOR_RULES = EPLD;
|
||||
DESIGN_DOCTOR = OFF;
|
||||
END;
|
||||
|
||||
COMPILER_INTERFACES_CONFIGURATION
|
||||
BEGIN
|
||||
NETLIST_OUTPUT_TIME_SCALE = 0.1ns;
|
||||
EDIF_INPUT_SHOW_LMF_MAPPING_MESSAGES = OFF;
|
||||
EDIF_BUS_DELIMITERS = [];
|
||||
EDIF_FLATTEN_BUS = OFF;
|
||||
EDIF_OUTPUT_FORCE_0NS_DELAYS = OFF;
|
||||
EDIF_OUTPUT_INCLUDE_SPECIAL_PRIM = OFF;
|
||||
EDIF_OUTPUT_MAP_ILLEGAL_CHAR = OFF;
|
||||
EDIF_OUTPUT_DELAY_CONSTRUCTS = EDO_FILE;
|
||||
EDIF_OUTPUT_USE_EDC = OFF;
|
||||
EDIF_INPUT_USE_LMF2 = OFF;
|
||||
EDIF_INPUT_USE_LMF1 = OFF;
|
||||
EDIF_OUTPUT_GND = GND;
|
||||
EDIF_OUTPUT_VCC = VCC;
|
||||
EDIF_INPUT_GND = GND;
|
||||
EDIF_INPUT_VCC = VCC;
|
||||
EDIF_OUTPUT_EDC_FILE = *.edc;
|
||||
EDIF_INPUT_LMF2 = *.lmf;
|
||||
EDIF_INPUT_LMF1 = *.lmf;
|
||||
VHDL_GENERATE_CONFIGURATION_DECLARATION = OFF;
|
||||
VHDL_OUTPUT_DELAY_CONSTRUCTS = VHO_FILE;
|
||||
VERILOG_OUTPUT_DELAY_CONSTRUCTS = VO_FILE;
|
||||
VHDL_FLATTEN_BUS = OFF;
|
||||
VERILOG_FLATTEN_BUS = OFF;
|
||||
EDIF_TRUNCATE_HIERARCHY_PATH = OFF;
|
||||
VHDL_TRUNCATE_HIERARCHY_PATH = OFF;
|
||||
VERILOG_TRUNCATE_HIERARCHY_PATH = OFF;
|
||||
VERILOG_OUTPUT_MAP_ILLEGAL_CHAR = OFF;
|
||||
VHDL_WRITER_VERSION = VHDL93;
|
||||
VHDL_READER_VERSION = VHDL93;
|
||||
SYNOPSYS_MAPPING_EFFORT = MEDIUM;
|
||||
SYNOPSYS_BOUNDARY_OPTIMIZATION = OFF;
|
||||
SYNOPSYS_HIERARCHICAL_COMPILATION = ON;
|
||||
SYNOPSYS_DESIGNWARE = OFF;
|
||||
SYNOPSYS_COMPILER = DESIGN;
|
||||
USE_SYNOPSYS_SYNTHESIS = OFF;
|
||||
VHDL_NETLIST_WRITER = OFF;
|
||||
VERILOG_NETLIST_WRITER = OFF;
|
||||
XNF_GENERATE_AHDL_TDX_FILE = ON;
|
||||
XNF_TRANSLATE_INTERNAL_NODE_NAMES = ON;
|
||||
XNF_EMULATE_TRI_STATE_BUSES = INTERNAL_LOGIC;
|
||||
EDIF_OUTPUT_VERSION = 200;
|
||||
EDIF_NETLIST_WRITER = OFF;
|
||||
END;
|
||||
|
||||
CUSTOM_DESIGN_DOCTOR_RULES
|
||||
BEGIN
|
||||
MASTER_RESET = OFF;
|
||||
EXPANDER_NETWORKS = ON;
|
||||
RACE_CONDITIONS = ON;
|
||||
DELAY_CHAINS = ON;
|
||||
ASYNCHRONOUS_INPUTS = ON;
|
||||
PRESET_CLEAR_NETWORKS = ON;
|
||||
STATIC_HAZARDS_AFTER_SYNTHESIS = OFF;
|
||||
STATIC_HAZARDS_BEFORE_SYNTHESIS = ON;
|
||||
MULTI_CLOCK_NETWORKS = ON;
|
||||
MULTI_LEVEL_CLOCKS = ON;
|
||||
GATED_CLOCKS = ON;
|
||||
RIPPLE_CLOCKS = ON;
|
||||
END;
|
||||
|
||||
SIMULATOR_CONFIGURATION
|
||||
BEGIN
|
||||
END_TIME = 10.0us;
|
||||
BIDIR_PIN = STRONG;
|
||||
START_TIME = 0.0ns;
|
||||
GLITCH_TIME = 0.0ns;
|
||||
GLITCH = OFF;
|
||||
OSCILLATION_TIME = 0.0ns;
|
||||
OSCILLATION = OFF;
|
||||
CHECK_OUTPUTS = OFF;
|
||||
SETUP_HOLD = OFF;
|
||||
USE_DEVICE = OFF;
|
||||
END;
|
||||
|
||||
TIMING_ANALYZER_CONFIGURATION
|
||||
BEGIN
|
||||
CUT_OFF_RAM_REGISTERED_WE_PATHS = OFF;
|
||||
LIST_PATH_FREQUENCY = 10MHz;
|
||||
LIST_PATH_COUNT = 10;
|
||||
REGISTERED_PERFORMANCE_OPTIONS = NUMBER_OF_PATHS;
|
||||
INCLUDE_PATHS_LESS_THAN_VALUE = 214.7483647ms;
|
||||
INCLUDE_PATHS_LESS_THAN = OFF;
|
||||
INCLUDE_PATHS_GREATER_THAN_VALUE = 0.0ns;
|
||||
INCLUDE_PATHS_GREATER_THAN = OFF;
|
||||
DELAY_MATRIX_OPTIONS = SHOW_ALL_PATHS;
|
||||
CELL_WIDTH = 18;
|
||||
LIST_ONLY_LONGEST_PATH = ON;
|
||||
CUT_OFF_CLEAR_AND_PRESET_PATHS = ON;
|
||||
CUT_OFF_IO_PIN_FEEDBACK = ON;
|
||||
AUTO_RECALCULATE = OFF;
|
||||
ANALYSIS_MODE = DELAY_MATRIX;
|
||||
END;
|
||||
|
||||
OTHER_CONFIGURATION
|
||||
BEGIN
|
||||
EXPLICIT_FAMILY = 1;
|
||||
ROW_PINS_LCELL_INSERT = ON;
|
||||
CARRY_OUT_PINS_LCELL_INSERT = OFF;
|
||||
NORMAL_LCELL_INSERT = ON;
|
||||
LAST_MAXPLUS2_VERSION = 10.0;
|
||||
FLEX_10K_52_COLUMNS = 40;
|
||||
DEFAULT_9K_EXP_PER_LCELL = 1/2;
|
||||
LOCAL_INTERCONNECT_PER_LAB_PERCENT = 100;
|
||||
LCELLS_PER_ROW_PERCENT = 100;
|
||||
FAN_IN_PER_LCELL_PERCENT = 100;
|
||||
EXP_PER_LCELL_PERCENT = 100;
|
||||
ROW_PINS_PERCENT = 50;
|
||||
ORIGINAL_MAXPLUS2_VERSION = 10.0;
|
||||
COMPILER_DATA = "1,1,0,1,0,0,0,1,1,1,1,0,1,1,1";
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE NORMAL.MAX5000
|
||||
BEGIN
|
||||
REGISTER_OPTIMIZATION = ON;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
RESYNTHESIZE_NETWORK = ON;
|
||||
MULTI_LEVEL_FACTORING = ON;
|
||||
SUBFACTOR_EXTRACTION = ON;
|
||||
REFACTORIZATION = ON;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = ON;
|
||||
REDUCE_LOGIC = ON;
|
||||
DECOMPOSE_GATES = ON;
|
||||
SOFT_BUFFER_INSERTION = ON;
|
||||
FAST_IO = OFF;
|
||||
IGNORE_SOFT_BUFFERS = OFF;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
TURBO_BIT = OFF;
|
||||
XOR_SYNTHESIS = ON;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
MINIMIZATION = FULL;
|
||||
CARRY_CHAIN_LENGTH = -1;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN_LENGTH = -1;
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE NORMAL.MAX7000
|
||||
BEGIN
|
||||
REGISTER_OPTIMIZATION = ON;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
RESYNTHESIZE_NETWORK = ON;
|
||||
MULTI_LEVEL_FACTORING = ON;
|
||||
SUBFACTOR_EXTRACTION = ON;
|
||||
REFACTORIZATION = ON;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = ON;
|
||||
REDUCE_LOGIC = ON;
|
||||
DECOMPOSE_GATES = ON;
|
||||
SOFT_BUFFER_INSERTION = ON;
|
||||
FAST_IO = OFF;
|
||||
IGNORE_SOFT_BUFFERS = OFF;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
TURBO_BIT = ON;
|
||||
XOR_SYNTHESIS = ON;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
MINIMIZATION = FULL;
|
||||
CARRY_CHAIN_LENGTH = -1;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN_LENGTH = -1;
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE NORMAL.CLASSIC
|
||||
BEGIN
|
||||
REGISTER_OPTIMIZATION = OFF;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
RESYNTHESIZE_NETWORK = ON;
|
||||
MULTI_LEVEL_FACTORING = OFF;
|
||||
SUBFACTOR_EXTRACTION = OFF;
|
||||
REFACTORIZATION = OFF;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = OFF;
|
||||
REDUCE_LOGIC = OFF;
|
||||
DECOMPOSE_GATES = ON;
|
||||
SOFT_BUFFER_INSERTION = ON;
|
||||
FAST_IO = OFF;
|
||||
IGNORE_SOFT_BUFFERS = OFF;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
TURBO_BIT = ON;
|
||||
XOR_SYNTHESIS = OFF;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
MINIMIZATION = FULL;
|
||||
CARRY_CHAIN_LENGTH = -1;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN_LENGTH = -1;
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE NORMAL.FLEX8000
|
||||
BEGIN
|
||||
REGISTER_OPTIMIZATION = ON;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
RESYNTHESIZE_NETWORK = ON;
|
||||
MULTI_LEVEL_FACTORING = ON;
|
||||
SUBFACTOR_EXTRACTION = ON;
|
||||
REFACTORIZATION = ON;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = ON;
|
||||
REDUCE_LOGIC = ON;
|
||||
DECOMPOSE_GATES = ON;
|
||||
SOFT_BUFFER_INSERTION = ON;
|
||||
IGNORE_SOFT_BUFFERS = ON;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
TURBO_BIT = OFF;
|
||||
XOR_SYNTHESIS = OFF;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
MINIMIZATION = FULL;
|
||||
CARRY_CHAIN_LENGTH = 32;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN_LENGTH = 2;
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE FAST.MAX5000
|
||||
BEGIN
|
||||
REGISTER_OPTIMIZATION = ON;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
RESYNTHESIZE_NETWORK = ON;
|
||||
MULTI_LEVEL_FACTORING = ON;
|
||||
SUBFACTOR_EXTRACTION = OFF;
|
||||
REFACTORIZATION = OFF;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = ON;
|
||||
REDUCE_LOGIC = ON;
|
||||
DECOMPOSE_GATES = ON;
|
||||
SOFT_BUFFER_INSERTION = ON;
|
||||
FAST_IO = OFF;
|
||||
IGNORE_SOFT_BUFFERS = OFF;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
TURBO_BIT = OFF;
|
||||
XOR_SYNTHESIS = ON;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
MINIMIZATION = FULL;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE FAST.MAX7000
|
||||
BEGIN
|
||||
REGISTER_OPTIMIZATION = ON;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
RESYNTHESIZE_NETWORK = ON;
|
||||
MULTI_LEVEL_FACTORING = ON;
|
||||
SUBFACTOR_EXTRACTION = OFF;
|
||||
REFACTORIZATION = OFF;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = ON;
|
||||
REDUCE_LOGIC = ON;
|
||||
DECOMPOSE_GATES = ON;
|
||||
SOFT_BUFFER_INSERTION = ON;
|
||||
FAST_IO = OFF;
|
||||
IGNORE_SOFT_BUFFERS = OFF;
|
||||
PARALLEL_EXPANDERS = ON;
|
||||
TURBO_BIT = ON;
|
||||
XOR_SYNTHESIS = ON;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
MINIMIZATION = FULL;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE FAST.CLASSIC
|
||||
BEGIN
|
||||
REGISTER_OPTIMIZATION = OFF;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
RESYNTHESIZE_NETWORK = ON;
|
||||
MULTI_LEVEL_FACTORING = OFF;
|
||||
SUBFACTOR_EXTRACTION = OFF;
|
||||
REFACTORIZATION = OFF;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = OFF;
|
||||
REDUCE_LOGIC = OFF;
|
||||
DECOMPOSE_GATES = ON;
|
||||
SOFT_BUFFER_INSERTION = ON;
|
||||
FAST_IO = OFF;
|
||||
IGNORE_SOFT_BUFFERS = OFF;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
TURBO_BIT = ON;
|
||||
XOR_SYNTHESIS = OFF;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
MINIMIZATION = FULL;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE FAST.FLEX8000
|
||||
BEGIN
|
||||
REGISTER_OPTIMIZATION = ON;
|
||||
RESYNTHESIZE_NETWORK = ON;
|
||||
MULTI_LEVEL_FACTORING = ON;
|
||||
SUBFACTOR_EXTRACTION = OFF;
|
||||
REFACTORIZATION = OFF;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = ON;
|
||||
REDUCE_LOGIC = ON;
|
||||
DECOMPOSE_GATES = ON;
|
||||
SOFT_BUFFER_INSERTION = ON;
|
||||
IGNORE_SOFT_BUFFERS = ON;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
TURBO_BIT = OFF;
|
||||
XOR_SYNTHESIS = OFF;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
MINIMIZATION = FULL;
|
||||
CARRY_CHAIN_LENGTH = 32;
|
||||
CARRY_CHAIN = AUTO;
|
||||
CASCADE_CHAIN_LENGTH = 2;
|
||||
CASCADE_CHAIN = AUTO;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE WYSIWYG.MAX5000
|
||||
BEGIN
|
||||
REGISTER_OPTIMIZATION = OFF;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
RESYNTHESIZE_NETWORK = OFF;
|
||||
MULTI_LEVEL_FACTORING = OFF;
|
||||
SUBFACTOR_EXTRACTION = OFF;
|
||||
REFACTORIZATION = OFF;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = OFF;
|
||||
REDUCE_LOGIC = OFF;
|
||||
DECOMPOSE_GATES = OFF;
|
||||
SOFT_BUFFER_INSERTION = OFF;
|
||||
FAST_IO = OFF;
|
||||
IGNORE_SOFT_BUFFERS = OFF;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
TURBO_BIT = OFF;
|
||||
XOR_SYNTHESIS = OFF;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
MINIMIZATION = PARTIAL;
|
||||
CARRY_CHAIN_LENGTH = -1;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN_LENGTH = -1;
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE WYSIWYG.MAX7000
|
||||
BEGIN
|
||||
REGISTER_OPTIMIZATION = OFF;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
RESYNTHESIZE_NETWORK = OFF;
|
||||
MULTI_LEVEL_FACTORING = OFF;
|
||||
SUBFACTOR_EXTRACTION = OFF;
|
||||
REFACTORIZATION = OFF;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = OFF;
|
||||
REDUCE_LOGIC = OFF;
|
||||
DECOMPOSE_GATES = OFF;
|
||||
SOFT_BUFFER_INSERTION = OFF;
|
||||
FAST_IO = OFF;
|
||||
IGNORE_SOFT_BUFFERS = OFF;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
TURBO_BIT = ON;
|
||||
XOR_SYNTHESIS = OFF;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
MINIMIZATION = PARTIAL;
|
||||
CARRY_CHAIN_LENGTH = -1;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN_LENGTH = -1;
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE WYSIWYG.CLASSIC
|
||||
BEGIN
|
||||
REGISTER_OPTIMIZATION = OFF;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
RESYNTHESIZE_NETWORK = ON;
|
||||
MULTI_LEVEL_FACTORING = OFF;
|
||||
SUBFACTOR_EXTRACTION = OFF;
|
||||
REFACTORIZATION = OFF;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = OFF;
|
||||
REDUCE_LOGIC = OFF;
|
||||
DECOMPOSE_GATES = ON;
|
||||
SOFT_BUFFER_INSERTION = OFF;
|
||||
FAST_IO = OFF;
|
||||
IGNORE_SOFT_BUFFERS = OFF;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
TURBO_BIT = ON;
|
||||
XOR_SYNTHESIS = OFF;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
MINIMIZATION = PARTIAL;
|
||||
CARRY_CHAIN_LENGTH = -1;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN_LENGTH = -1;
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE WYSIWYG.FLEX8000
|
||||
BEGIN
|
||||
REGISTER_OPTIMIZATION = OFF;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
RESYNTHESIZE_NETWORK = OFF;
|
||||
MULTI_LEVEL_FACTORING = OFF;
|
||||
SUBFACTOR_EXTRACTION = OFF;
|
||||
REFACTORIZATION = OFF;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = OFF;
|
||||
REDUCE_LOGIC = OFF;
|
||||
DECOMPOSE_GATES = OFF;
|
||||
SOFT_BUFFER_INSERTION = ON;
|
||||
IGNORE_SOFT_BUFFERS = ON;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
TURBO_BIT = OFF;
|
||||
XOR_SYNTHESIS = OFF;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
MINIMIZATION = PARTIAL;
|
||||
CARRY_CHAIN_LENGTH = 32;
|
||||
CARRY_CHAIN = MANUAL;
|
||||
CASCADE_CHAIN_LENGTH = 2;
|
||||
CASCADE_CHAIN = MANUAL;
|
||||
END;
|
||||
|
||||
26
src/altera/acex/k30/MOUSE.INC
Normal file
26
src/altera/acex/k30/MOUSE.INC
Normal file
@ -0,0 +1,26 @@
|
||||
-- Copyright (C) 1988-2000 Altera Corporation
|
||||
-- Any megafunction design, and related net list (encrypted or decrypted),
|
||||
-- support information, device programming or simulation file, and any other
|
||||
-- associated documentation or information provided by Altera or a partner
|
||||
-- under Altera's Megafunction Partnership Program may be used only to
|
||||
-- program PLD devices (but not masked PLD devices) from Altera. Any other
|
||||
-- use of such megafunction design, net list, support information, device
|
||||
-- programming or simulation file, or any other related documentation or
|
||||
-- information is prohibited for any other purpose, including, but not
|
||||
-- limited to modification, reverse engineering, de-compiling, or use with
|
||||
-- any other silicon devices, unless such use is explicitly licensed under
|
||||
-- a separate agreement with Altera or a megafunction partner. Title to
|
||||
-- the intellectual property, including patents, copyrights, trademarks,
|
||||
-- trade secrets, or maskworks, embodied in any such megafunction design,
|
||||
-- net list, support information, device programming or simulation file, or
|
||||
-- any other related documentation or information provided by Altera or a
|
||||
-- megafunction partner, remains with Altera, the megafunction partner, or
|
||||
-- their respective licensors. No other licenses, including any licenses
|
||||
-- needed under any third party's intellectual property, are provided herein.
|
||||
|
||||
-- MAX+plus II Include File
|
||||
-- Version 10.0 9/14/2000
|
||||
-- Created: Sat Jun 16 17:49:35 2001
|
||||
|
||||
FUNCTION mouse (mouse_d, clk)
|
||||
RETURNS (out_x[9..0], out_y[9..0], out_k[1..0], int);
|
||||
65
src/altera/acex/k30/MOUSE.MIF
Normal file
65
src/altera/acex/k30/MOUSE.MIF
Normal file
@ -0,0 +1,65 @@
|
||||
DEPTH = 256; % Memory depth and width are required %
|
||||
WIDTH = 16; % Enter a decimal number %
|
||||
|
||||
ADDRESS_RADIX = HEX; % Address and value radixes are optional %
|
||||
DATA_RADIX = HEX; % Enter BIN, DEC, HEX, or OCT; unless %
|
||||
% otherwise specified, radixes = HEX %
|
||||
|
||||
-- Specify values for addresses, which can be single address or range
|
||||
|
||||
CONTENT
|
||||
BEGIN
|
||||
|
||||
[0..FF] : 0;
|
||||
|
||||
%
|
||||
11
|
||||
1211
|
||||
122211
|
||||
12222211
|
||||
1222222211
|
||||
122222222211
|
||||
1222222211
|
||||
12222221
|
||||
12222221
|
||||
121112221
|
||||
11 12221
|
||||
1 1221
|
||||
111
|
||||
|
||||
|
||||
|
||||
%
|
||||
|
||||
00 : 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0;
|
||||
10 : 1 2 1 1 0 0 0 0 0 0 0 0 0 0 0 0;
|
||||
20 : 1 2 2 2 1 1 0 0 0 0 0 0 0 0 0 0;
|
||||
30 : 1 2 2 2 2 2 1 1 0 0 0 0 0 0 0 0;
|
||||
40 : 1 2 2 2 2 2 2 2 1 1 0 0 0 0 0 0;
|
||||
50 : 1 2 2 2 2 2 2 2 2 2 1 1 0 0 0 0;
|
||||
60 : 1 2 2 2 2 2 2 2 1 1 0 0 0 0 0 0;
|
||||
E0 : 1 2 2 2 2 2 2 1 0 0 0 0 0 0 0 0;
|
||||
70 : 1 2 2 2 2 2 2 1 0 0 0 0 0 0 0 0;
|
||||
80 : 1 2 1 1 1 2 2 2 1 0 0 0 0 0 0 0;
|
||||
90 : 1 1 0 0 0 1 2 2 2 1 0 0 0 0 0 0;
|
||||
A0 : 1 0 0 0 0 0 1 2 2 1 0 0 0 0 0 0;
|
||||
B0 : 0 0 0 0 0 0 0 1 1 1 0 0 0 0 0 0;
|
||||
C0 : 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0;
|
||||
D0 : 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0;
|
||||
E0 : 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0;
|
||||
F0 : 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0;
|
||||
|
||||
%
|
||||
|
||||
1110 0000 0000 0 00 0000 0000 0000 0000
|
||||
1000 0000 0000 0100 0000 0100 0000 0000
|
||||
1000 1100 1010 0000 1100 1110 0100 1010
|
||||
1110 1010 1100 0100 1010 0100 1010 1100
|
||||
0010 1010 1000 0100 1010 0100 1110 1000
|
||||
0010 1100 1000 0100 1010 0100 1000 1000
|
||||
1110 1000 1000 0100 1010 0010 0110 1000
|
||||
0000 1000 0000 0000 0000 0000 0000 0000
|
||||
|
||||
%
|
||||
|
||||
END;
|
||||
BIN
src/altera/acex/k30/MOUSE.SCF
Normal file
BIN
src/altera/acex/k30/MOUSE.SCF
Normal file
Binary file not shown.
76
src/altera/acex/k30/MOUSE.TDF
Normal file
76
src/altera/acex/k30/MOUSE.TDF
Normal file
@ -0,0 +1,76 @@
|
||||
|
||||
TITLE "Sp-Mouse";
|
||||
|
||||
INCLUDE "lpm_add_sub";
|
||||
|
||||
SUBDESIGN mouse
|
||||
(
|
||||
MOUSE_D : INPUT;
|
||||
CLK : INPUT;
|
||||
OUT_X[9..0] : OUTPUT;
|
||||
OUT_Y[9..0] : OUTPUT;
|
||||
OUT_K[1..0] : OUTPUT;
|
||||
INT : OUTPUT;
|
||||
)
|
||||
VARIABLE
|
||||
|
||||
SUM_X[9..0] : DFFE;
|
||||
SUM_Y[9..0] : DFFE;
|
||||
|
||||
CT[3..0] : DFF;
|
||||
RG[9..0] : DFFE;
|
||||
STATE[1..0] : DFFE;
|
||||
RGK[5..0] : DFFE;
|
||||
|
||||
MOUSE_IMP : NODE;
|
||||
|
||||
DDX[7..0] : NODE;
|
||||
DDY[7..0] : NODE;
|
||||
|
||||
BEGIN
|
||||
|
||||
CT[].clk = CLK;
|
||||
|
||||
MOUSE_IMP = MOUSE_D xor !DFF(MOUSE_D,CLK,,);
|
||||
|
||||
CT[].clrn = MOUSE_IMP;
|
||||
|
||||
IF CT[] == 12 THEN
|
||||
CT[] = GND;
|
||||
ELSE
|
||||
CT[] = CT[]+1;
|
||||
END IF;
|
||||
|
||||
RG[].clk = CLK;
|
||||
RG[].ena = (CT[] == 4) or !RG0;
|
||||
RG[].d = ((MOUSE_D,RG[9..1]) or !RG0);
|
||||
RG[].prn = VCC;
|
||||
|
||||
STATE[].ena = !RG0;
|
||||
STATE[].clk = CLK;
|
||||
|
||||
STATE[].d = (STATE0,RG7);
|
||||
|
||||
RGK[].clk = CLK;
|
||||
RGK[].ena = (RG7 & !RG0);
|
||||
RGK[].d = RG[6..1];
|
||||
|
||||
DDX[] = (RGK[1..0],RG[6..1]);
|
||||
DDY[] = (RGK[3..2],RG[6..1]);
|
||||
|
||||
SUM_X[].ena = LCELL(!RG7 & (STATE[] == 1) & !RG0);
|
||||
SUM_Y[].ena = LCELL(!RG7 & (STATE[] == 2) & !RG0);
|
||||
|
||||
SUM_X[].clk = CLK;
|
||||
SUM_Y[].clk = CLK;
|
||||
|
||||
SUM_X[] = SUM_X[] + (DDX7,DDX7,DDX[]);
|
||||
SUM_Y[] = SUM_Y[] + (DDY7,DDY7,DDY[]);
|
||||
|
||||
OUT_X[] = SUM_X[];
|
||||
OUT_Y[] = SUM_Y[];
|
||||
OUT_K[] = RGK[5..4];
|
||||
|
||||
INT = DFF(((STATE[] == 2) & !RG0),CLK,,);
|
||||
|
||||
END;
|
||||
1366
src/altera/acex/k30/SP2_ACEX.ACF
Normal file
1366
src/altera/acex/k30/SP2_ACEX.ACF
Normal file
File diff suppressed because it is too large
Load Diff
BIN
src/altera/acex/k30/SP2_ACEX.SCF
Normal file
BIN
src/altera/acex/k30/SP2_ACEX.SCF
Normal file
Binary file not shown.
1222
src/altera/acex/k30/SP2_ACEX.TDF
Normal file
1222
src/altera/acex/k30/SP2_ACEX.TDF
Normal file
File diff suppressed because it is too large
Load Diff
588
src/altera/acex/k30/VIDEO2.ACF
Normal file
588
src/altera/acex/k30/VIDEO2.ACF
Normal file
@ -0,0 +1,588 @@
|
||||
--
|
||||
-- Copyright (C) 1988-2000 Altera Corporation
|
||||
-- Any megafunction design, and related net list (encrypted or decrypted),
|
||||
-- support information, device programming or simulation file, and any other
|
||||
-- associated documentation or information provided by Altera or a partner
|
||||
-- under Altera's Megafunction Partnership Program may be used only to
|
||||
-- program PLD devices (but not masked PLD devices) from Altera. Any other
|
||||
-- use of such megafunction design, net list, support information, device
|
||||
-- programming or simulation file, or any other related documentation or
|
||||
-- information is prohibited for any other purpose, including, but not
|
||||
-- limited to modification, reverse engineering, de-compiling, or use with
|
||||
-- any other silicon devices, unless such use is explicitly licensed under
|
||||
-- a separate agreement with Altera or a megafunction partner. Title to
|
||||
-- the intellectual property, including patents, copyrights, trademarks,
|
||||
-- trade secrets, or maskworks, embodied in any such megafunction design,
|
||||
-- net list, support information, device programming or simulation file, or
|
||||
-- any other related documentation or information provided by Altera or a
|
||||
-- megafunction partner, remains with Altera, the megafunction partner, or
|
||||
-- their respective licensors. No other licenses, including any licenses
|
||||
-- needed under any third party's intellectual property, are provided herein.
|
||||
--
|
||||
CHIP video2
|
||||
BEGIN
|
||||
DEVICE = AUTO;
|
||||
END;
|
||||
|
||||
DEFAULT_DEVICES
|
||||
BEGIN
|
||||
ASK_BEFORE_ADDING_EXTRA_DEVICES = ON;
|
||||
AUTO_DEVICE = EP1K30TC144-1;
|
||||
AUTO_DEVICE = EP1K30QC208-1;
|
||||
AUTO_DEVICE = EP1K30FC256-1;
|
||||
AUTO_DEVICE = EP1K50TC144-1;
|
||||
AUTO_DEVICE = EP1K50QC208-1;
|
||||
AUTO_DEVICE = EP1K50FC256-1;
|
||||
AUTO_DEVICE = EP1K50FC484-1;
|
||||
AUTO_DEVICE = EP1K100QC208-1;
|
||||
AUTO_DEVICE = EP1K100FC256-1;
|
||||
AUTO_DEVICE = EP1K100FC484-1;
|
||||
END;
|
||||
|
||||
TIMING_POINT
|
||||
BEGIN
|
||||
MAINTAIN_STABLE_SYNTHESIS = ON;
|
||||
DEVICE_FOR_TIMING_SYNTHESIS = EP1K30FC256-3;
|
||||
CUT_ALL_BIDIR = ON;
|
||||
CUT_ALL_CLEAR_PRESET = ON;
|
||||
FREQUENCY = 200MHz;
|
||||
END;
|
||||
|
||||
IGNORED_ASSIGNMENTS
|
||||
BEGIN
|
||||
IGNORE_CLIQUE_ASSIGNMENTS = OFF;
|
||||
IGNORE_LOGIC_OPTION_ASSIGNMENTS = OFF;
|
||||
IGNORE_TIMING_ASSIGNMENTS = OFF;
|
||||
IGNORE_CHIP_ASSIGNMENTS = OFF;
|
||||
IGNORE_PIN_ASSIGNMENTS = OFF;
|
||||
IGNORE_LC_ASSIGNMENTS = OFF;
|
||||
IGNORE_DEVICE_ASSIGNMENTS = OFF;
|
||||
IGNORE_LOCAL_ROUTING_ASSIGNMENTS = OFF;
|
||||
DEMOTE_SPECIFIC_LCELL_ASSIGNMENTS_TO_LAB_ASSIGNMENTS = OFF;
|
||||
FIT_IGNORE_TIMING = OFF;
|
||||
END;
|
||||
|
||||
LOGIC_OPTIONS
|
||||
BEGIN
|
||||
|VAO15 : FAST_IO = ON;
|
||||
|VAO14 : FAST_IO = ON;
|
||||
|VAO13 : FAST_IO = ON;
|
||||
|VAO12 : FAST_IO = ON;
|
||||
|VAO11 : FAST_IO = ON;
|
||||
|VAO10 : FAST_IO = ON;
|
||||
|VAO9 : FAST_IO = ON;
|
||||
|VAO8 : FAST_IO = ON;
|
||||
|VAO7 : FAST_IO = ON;
|
||||
|VAO6 : FAST_IO = ON;
|
||||
|VAO5 : FAST_IO = ON;
|
||||
|VAO4 : FAST_IO = ON;
|
||||
|VAO3 : FAST_IO = ON;
|
||||
|VAO2 : FAST_IO = ON;
|
||||
|VAO1 : FAST_IO = ON;
|
||||
|VAO0 : FAST_IO = ON;
|
||||
END;
|
||||
|
||||
GLOBAL_PROJECT_DEVICE_OPTIONS
|
||||
BEGIN
|
||||
RESERVED_LCELLS_PERCENT = 0;
|
||||
RESERVED_PINS_PERCENT = 0;
|
||||
SECURITY_BIT = OFF;
|
||||
USER_CLOCK = OFF;
|
||||
AUTO_RESTART = OFF;
|
||||
RELEASE_CLEARS = OFF;
|
||||
ENABLE_DCLK_OUTPUT = OFF;
|
||||
DISABLE_TIME_OUT = OFF;
|
||||
CONFIG_SCHEME = ACTIVE_SERIAL;
|
||||
FLEX8000_ENABLE_JTAG = OFF;
|
||||
DATA0 = RESERVED_TRI_STATED;
|
||||
DATA1_TO_DATA7 = UNRESERVED;
|
||||
nWS_nRS_nCS_CS = UNRESERVED;
|
||||
RDYnBUSY = UNRESERVED;
|
||||
RDCLK = UNRESERVED;
|
||||
SDOUT = RESERVED_DRIVES_OUT;
|
||||
ADD0_TO_ADD12 = UNRESERVED;
|
||||
ADD13 = UNRESERVED;
|
||||
ADD14 = UNRESERVED;
|
||||
ADD15 = UNRESERVED;
|
||||
ADD16 = UNRESERVED;
|
||||
ADD17 = UNRESERVED;
|
||||
CLKUSR = UNRESERVED;
|
||||
nCEO = UNRESERVED;
|
||||
ENABLE_CHIP_WIDE_RESET = OFF;
|
||||
ENABLE_CHIP_WIDE_OE = OFF;
|
||||
ENABLE_INIT_DONE_OUTPUT = OFF;
|
||||
FLEX10K_JTAG_USER_CODE = 7F;
|
||||
CONFIG_SCHEME_10K = PASSIVE_SERIAL;
|
||||
MAX7000S_USER_CODE = FFFF;
|
||||
FLEX10K_ENABLE_LOCK_OUTPUT = OFF;
|
||||
MAX7000S_ENABLE_JTAG = ON;
|
||||
MULTIVOLT_IO = OFF;
|
||||
CONFIG_SCHEME_FLEX_6000 = PASSIVE_SERIAL;
|
||||
FLEX6000_ENABLE_JTAG = OFF;
|
||||
FLEX10K_USE_LOW_VOLTAGE_CONFIGURATION_EPROM = OFF;
|
||||
FLEX10KA_USE_LOW_VOLTAGE_CONFIGURATION_EPROM = ON;
|
||||
FLEX6000_USE_LOW_VOLTAGE_CONFIGURATION_EPROM = OFF;
|
||||
MAX7000AE_USER_CODE = FFFFFFFF;
|
||||
MAX7000AE_ENABLE_JTAG = ON;
|
||||
FLEX_CONFIGURATION_EPROM = AUTO;
|
||||
CONFIG_EPROM_USER_CODE = FFFFFFFF;
|
||||
CONFIG_EPROM_PULLUP_RESISTOR = ON;
|
||||
MAX7000B_VCCIO_IOBANK1 = 3.3V;
|
||||
MAX7000B_VCCIO_IOBANK2 = 3.3V;
|
||||
MAX7000B_ENABLE_VREFA = OFF;
|
||||
MAX7000B_ENABLE_VREFB = OFF;
|
||||
END;
|
||||
|
||||
GLOBAL_PROJECT_SYNTHESIS_ASSIGNMENT_OPTIONS
|
||||
BEGIN
|
||||
OPTIMIZE_FOR_SPEED = 5;
|
||||
MULTI_LEVEL_SYNTHESIS_MAX5000_7000 = OFF;
|
||||
AUTO_GLOBAL_CLOCK = ON;
|
||||
AUTO_GLOBAL_CLEAR = ON;
|
||||
AUTO_GLOBAL_PRESET = ON;
|
||||
AUTO_GLOBAL_OE = ON;
|
||||
AUTO_FAST_IO = OFF;
|
||||
DEVICE_FAMILY = ACEX1K;
|
||||
AUTO_REGISTER_PACKING = OFF;
|
||||
ONE_HOT_STATE_MACHINE_ENCODING = OFF;
|
||||
AUTO_OPEN_DRAIN_PINS = ON;
|
||||
AUTO_IMPLEMENT_IN_EAB = OFF;
|
||||
MULTI_LEVEL_SYNTHESIS_MAX9000 = ON;
|
||||
STYLE = FAST;
|
||||
END;
|
||||
|
||||
COMPILER_PROCESSING_CONFIGURATION
|
||||
BEGIN
|
||||
USE_QUARTUS_FITTER = ON;
|
||||
DESIGN_DOCTOR = OFF;
|
||||
DESIGN_DOCTOR_RULES = EPLD;
|
||||
FUNCTIONAL_SNF_EXTRACTOR = OFF;
|
||||
TIMING_SNF_EXTRACTOR = ON;
|
||||
OPTIMIZE_TIMING_SNF = OFF;
|
||||
LINKED_SNF_EXTRACTOR = OFF;
|
||||
RPT_FILE_EQUATIONS = ON;
|
||||
RPT_FILE_HIERARCHY = ON;
|
||||
RPT_FILE_LCELL_INTERCONNECT = ON;
|
||||
RPT_FILE_USER_ASSIGNMENTS = ON;
|
||||
GENERATE_AHDL_TDO_FILE = OFF;
|
||||
SMART_RECOMPILE = OFF;
|
||||
FITTER_SETTINGS = NORMAL;
|
||||
PRESERVE_ALL_NODE_NAME_SYNONYMS = OFF;
|
||||
END;
|
||||
|
||||
COMPILER_INTERFACES_CONFIGURATION
|
||||
BEGIN
|
||||
EDIF_NETLIST_WRITER = OFF;
|
||||
EDIF_OUTPUT_VERSION = 200;
|
||||
XNF_EMULATE_TRI_STATE_BUSES = INTERNAL_LOGIC;
|
||||
XNF_TRANSLATE_INTERNAL_NODE_NAMES = ON;
|
||||
XNF_GENERATE_AHDL_TDX_FILE = ON;
|
||||
VERILOG_NETLIST_WRITER = OFF;
|
||||
VHDL_NETLIST_WRITER = OFF;
|
||||
USE_SYNOPSYS_SYNTHESIS = OFF;
|
||||
SYNOPSYS_COMPILER = DESIGN;
|
||||
SYNOPSYS_DESIGNWARE = OFF;
|
||||
SYNOPSYS_HIERARCHICAL_COMPILATION = ON;
|
||||
SYNOPSYS_BOUNDARY_OPTIMIZATION = OFF;
|
||||
SYNOPSYS_MAPPING_EFFORT = MEDIUM;
|
||||
VHDL_READER_VERSION = VHDL87;
|
||||
VHDL_WRITER_VERSION = VHDL87;
|
||||
VERILOG_OUTPUT_MAP_ILLEGAL_CHAR = OFF;
|
||||
VERILOG_TRUNCATE_HIERARCHY_PATH = OFF;
|
||||
VHDL_TRUNCATE_HIERARCHY_PATH = OFF;
|
||||
EDIF_TRUNCATE_HIERARCHY_PATH = OFF;
|
||||
VERILOG_FLATTEN_BUS = OFF;
|
||||
VHDL_FLATTEN_BUS = OFF;
|
||||
VERILOG_OUTPUT_DELAY_CONSTRUCTS = VO_FILE;
|
||||
VHDL_OUTPUT_DELAY_CONSTRUCTS = VHO_FILE;
|
||||
VHDL_GENERATE_CONFIGURATION_DECLARATION = OFF;
|
||||
EDIF_INPUT_LMF1 = *.lmf;
|
||||
EDIF_INPUT_LMF2 = *.lmf;
|
||||
EDIF_OUTPUT_EDC_FILE = *.edc;
|
||||
EDIF_INPUT_VCC = VCC;
|
||||
EDIF_INPUT_GND = GND;
|
||||
EDIF_OUTPUT_VCC = VCC;
|
||||
EDIF_OUTPUT_GND = GND;
|
||||
EDIF_INPUT_USE_LMF1 = OFF;
|
||||
EDIF_INPUT_USE_LMF2 = OFF;
|
||||
EDIF_OUTPUT_USE_EDC = OFF;
|
||||
EDIF_OUTPUT_DELAY_CONSTRUCTS = EDO_FILE;
|
||||
EDIF_OUTPUT_MAP_ILLEGAL_CHAR = OFF;
|
||||
EDIF_OUTPUT_INCLUDE_SPECIAL_PRIM = OFF;
|
||||
EDIF_OUTPUT_FORCE_0NS_DELAYS = OFF;
|
||||
EDIF_FLATTEN_BUS = OFF;
|
||||
EDIF_BUS_DELIMITERS = [];
|
||||
EDIF_INPUT_SHOW_LMF_MAPPING_MESSAGES = OFF;
|
||||
NETLIST_OUTPUT_TIME_SCALE = 0.1ns;
|
||||
END;
|
||||
|
||||
CUSTOM_DESIGN_DOCTOR_RULES
|
||||
BEGIN
|
||||
RIPPLE_CLOCKS = ON;
|
||||
GATED_CLOCKS = ON;
|
||||
MULTI_LEVEL_CLOCKS = ON;
|
||||
MULTI_CLOCK_NETWORKS = ON;
|
||||
STATIC_HAZARDS_BEFORE_SYNTHESIS = ON;
|
||||
STATIC_HAZARDS_AFTER_SYNTHESIS = OFF;
|
||||
PRESET_CLEAR_NETWORKS = ON;
|
||||
ASYNCHRONOUS_INPUTS = ON;
|
||||
DELAY_CHAINS = ON;
|
||||
RACE_CONDITIONS = ON;
|
||||
EXPANDER_NETWORKS = ON;
|
||||
MASTER_RESET = OFF;
|
||||
END;
|
||||
|
||||
SIMULATOR_CONFIGURATION
|
||||
BEGIN
|
||||
CHECK_OUTPUTS = OFF;
|
||||
USE_DEVICE = OFF;
|
||||
SETUP_HOLD = OFF;
|
||||
OSCILLATION = OFF;
|
||||
OSCILLATION_TIME = 0.0ns;
|
||||
GLITCH = OFF;
|
||||
GLITCH_TIME = 0.0ns;
|
||||
START_TIME = 0.0ns;
|
||||
BIDIR_PIN = STRONG;
|
||||
END_TIME = 10.0us;
|
||||
END;
|
||||
|
||||
TIMING_ANALYZER_CONFIGURATION
|
||||
BEGIN
|
||||
ANALYSIS_MODE = REGISTERED_PERFORMANCE;
|
||||
AUTO_RECALCULATE = OFF;
|
||||
CUT_OFF_IO_PIN_FEEDBACK = ON;
|
||||
CUT_OFF_CLEAR_AND_PRESET_PATHS = ON;
|
||||
LIST_ONLY_LONGEST_PATH = ON;
|
||||
CELL_WIDTH = 18;
|
||||
DELAY_MATRIX_OPTIONS = SHOW_ALL_PATHS;
|
||||
INCLUDE_PATHS_GREATER_THAN = OFF;
|
||||
INCLUDE_PATHS_GREATER_THAN_VALUE = 0.0ns;
|
||||
INCLUDE_PATHS_LESS_THAN = OFF;
|
||||
INCLUDE_PATHS_LESS_THAN_VALUE = 214.7483647ms;
|
||||
REGISTERED_PERFORMANCE_OPTIONS = NUMBER_OF_PATHS;
|
||||
LIST_PATH_COUNT = 10;
|
||||
LIST_PATH_FREQUENCY = 10MHz;
|
||||
CUT_OFF_RAM_REGISTERED_WE_PATHS = OFF;
|
||||
END;
|
||||
|
||||
OTHER_CONFIGURATION
|
||||
BEGIN
|
||||
LAST_MAXPLUS2_VERSION = 10.0;
|
||||
EXPLICIT_FAMILY = 1;
|
||||
COMPILER_DATA = "1,1,0,1,0,0,0,1,1,1,1,0,1,1,1";
|
||||
ORIGINAL_MAXPLUS2_VERSION = 9.6;
|
||||
ROW_PINS_PERCENT = 50;
|
||||
EXP_PER_LCELL_PERCENT = 100;
|
||||
FAN_IN_PER_LCELL_PERCENT = 100;
|
||||
LCELLS_PER_ROW_PERCENT = 100;
|
||||
LOCAL_INTERCONNECT_PER_LAB_PERCENT = 100;
|
||||
DEFAULT_9K_EXP_PER_LCELL = 1/2;
|
||||
FLEX_10K_52_COLUMNS = 40;
|
||||
NORMAL_LCELL_INSERT = ON;
|
||||
CARRY_OUT_PINS_LCELL_INSERT = OFF;
|
||||
ROW_PINS_LCELL_INSERT = ON;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE NORMAL.MAX5000
|
||||
BEGIN
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN_LENGTH = -1;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CARRY_CHAIN_LENGTH = -1;
|
||||
MINIMIZATION = FULL;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
XOR_SYNTHESIS = ON;
|
||||
TURBO_BIT = OFF;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
IGNORE_SOFT_BUFFERS = OFF;
|
||||
FAST_IO = OFF;
|
||||
SOFT_BUFFER_INSERTION = ON;
|
||||
DECOMPOSE_GATES = ON;
|
||||
REDUCE_LOGIC = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = ON;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
REFACTORIZATION = ON;
|
||||
SUBFACTOR_EXTRACTION = ON;
|
||||
MULTI_LEVEL_FACTORING = ON;
|
||||
RESYNTHESIZE_NETWORK = ON;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
REGISTER_OPTIMIZATION = ON;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE NORMAL.MAX7000
|
||||
BEGIN
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN_LENGTH = -1;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CARRY_CHAIN_LENGTH = -1;
|
||||
MINIMIZATION = FULL;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
XOR_SYNTHESIS = ON;
|
||||
TURBO_BIT = ON;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
IGNORE_SOFT_BUFFERS = OFF;
|
||||
FAST_IO = OFF;
|
||||
SOFT_BUFFER_INSERTION = ON;
|
||||
DECOMPOSE_GATES = ON;
|
||||
REDUCE_LOGIC = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = ON;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
REFACTORIZATION = ON;
|
||||
SUBFACTOR_EXTRACTION = ON;
|
||||
MULTI_LEVEL_FACTORING = ON;
|
||||
RESYNTHESIZE_NETWORK = ON;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
REGISTER_OPTIMIZATION = ON;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE NORMAL.CLASSIC
|
||||
BEGIN
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN_LENGTH = -1;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CARRY_CHAIN_LENGTH = -1;
|
||||
MINIMIZATION = FULL;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
XOR_SYNTHESIS = OFF;
|
||||
TURBO_BIT = ON;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
IGNORE_SOFT_BUFFERS = OFF;
|
||||
FAST_IO = OFF;
|
||||
SOFT_BUFFER_INSERTION = ON;
|
||||
DECOMPOSE_GATES = ON;
|
||||
REDUCE_LOGIC = OFF;
|
||||
DUPLICATE_LOGIC_EXTRACTION = OFF;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
REFACTORIZATION = OFF;
|
||||
SUBFACTOR_EXTRACTION = OFF;
|
||||
MULTI_LEVEL_FACTORING = OFF;
|
||||
RESYNTHESIZE_NETWORK = ON;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
REGISTER_OPTIMIZATION = OFF;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE NORMAL.FLEX8000
|
||||
BEGIN
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN_LENGTH = 2;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CARRY_CHAIN_LENGTH = 32;
|
||||
MINIMIZATION = FULL;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
XOR_SYNTHESIS = OFF;
|
||||
TURBO_BIT = OFF;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
IGNORE_SOFT_BUFFERS = ON;
|
||||
SOFT_BUFFER_INSERTION = ON;
|
||||
DECOMPOSE_GATES = ON;
|
||||
REDUCE_LOGIC = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = ON;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
REFACTORIZATION = ON;
|
||||
SUBFACTOR_EXTRACTION = ON;
|
||||
MULTI_LEVEL_FACTORING = ON;
|
||||
RESYNTHESIZE_NETWORK = ON;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
REGISTER_OPTIMIZATION = ON;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE FAST.MAX5000
|
||||
BEGIN
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
XOR_SYNTHESIS = ON;
|
||||
TURBO_BIT = OFF;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
IGNORE_SOFT_BUFFERS = OFF;
|
||||
FAST_IO = OFF;
|
||||
MINIMIZATION = FULL;
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
SOFT_BUFFER_INSERTION = ON;
|
||||
DECOMPOSE_GATES = ON;
|
||||
REDUCE_LOGIC = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = ON;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
REFACTORIZATION = OFF;
|
||||
SUBFACTOR_EXTRACTION = OFF;
|
||||
MULTI_LEVEL_FACTORING = ON;
|
||||
RESYNTHESIZE_NETWORK = ON;
|
||||
REGISTER_OPTIMIZATION = ON;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE FAST.MAX7000
|
||||
BEGIN
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
XOR_SYNTHESIS = ON;
|
||||
TURBO_BIT = ON;
|
||||
PARALLEL_EXPANDERS = ON;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
IGNORE_SOFT_BUFFERS = OFF;
|
||||
FAST_IO = OFF;
|
||||
MINIMIZATION = FULL;
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
SOFT_BUFFER_INSERTION = ON;
|
||||
DECOMPOSE_GATES = ON;
|
||||
REDUCE_LOGIC = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = ON;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
REFACTORIZATION = OFF;
|
||||
SUBFACTOR_EXTRACTION = OFF;
|
||||
MULTI_LEVEL_FACTORING = ON;
|
||||
RESYNTHESIZE_NETWORK = ON;
|
||||
REGISTER_OPTIMIZATION = ON;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE FAST.CLASSIC
|
||||
BEGIN
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
XOR_SYNTHESIS = OFF;
|
||||
TURBO_BIT = ON;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
IGNORE_SOFT_BUFFERS = OFF;
|
||||
FAST_IO = OFF;
|
||||
MINIMIZATION = FULL;
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
SOFT_BUFFER_INSERTION = ON;
|
||||
DECOMPOSE_GATES = ON;
|
||||
REDUCE_LOGIC = OFF;
|
||||
DUPLICATE_LOGIC_EXTRACTION = OFF;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
REFACTORIZATION = OFF;
|
||||
SUBFACTOR_EXTRACTION = OFF;
|
||||
MULTI_LEVEL_FACTORING = OFF;
|
||||
RESYNTHESIZE_NETWORK = ON;
|
||||
REGISTER_OPTIMIZATION = OFF;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE FAST.FLEX8000
|
||||
BEGIN
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
XOR_SYNTHESIS = OFF;
|
||||
TURBO_BIT = OFF;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
IGNORE_SOFT_BUFFERS = ON;
|
||||
MINIMIZATION = FULL;
|
||||
CASCADE_CHAIN = AUTO;
|
||||
CARRY_CHAIN = AUTO;
|
||||
SOFT_BUFFER_INSERTION = ON;
|
||||
DECOMPOSE_GATES = ON;
|
||||
REDUCE_LOGIC = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = ON;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
REFACTORIZATION = ON;
|
||||
SUBFACTOR_EXTRACTION = ON;
|
||||
MULTI_LEVEL_FACTORING = ON;
|
||||
RESYNTHESIZE_NETWORK = ON;
|
||||
REGISTER_OPTIMIZATION = ON;
|
||||
CASCADE_CHAIN_LENGTH = 2;
|
||||
CARRY_CHAIN_LENGTH = 32;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE WYSIWYG.MAX5000
|
||||
BEGIN
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN_LENGTH = -1;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CARRY_CHAIN_LENGTH = -1;
|
||||
MINIMIZATION = PARTIAL;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
XOR_SYNTHESIS = OFF;
|
||||
TURBO_BIT = OFF;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
IGNORE_SOFT_BUFFERS = OFF;
|
||||
FAST_IO = OFF;
|
||||
SOFT_BUFFER_INSERTION = OFF;
|
||||
DECOMPOSE_GATES = OFF;
|
||||
REDUCE_LOGIC = OFF;
|
||||
DUPLICATE_LOGIC_EXTRACTION = OFF;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
REFACTORIZATION = OFF;
|
||||
SUBFACTOR_EXTRACTION = OFF;
|
||||
MULTI_LEVEL_FACTORING = OFF;
|
||||
RESYNTHESIZE_NETWORK = OFF;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
REGISTER_OPTIMIZATION = OFF;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE WYSIWYG.MAX7000
|
||||
BEGIN
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN_LENGTH = -1;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CARRY_CHAIN_LENGTH = -1;
|
||||
MINIMIZATION = PARTIAL;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
XOR_SYNTHESIS = OFF;
|
||||
TURBO_BIT = ON;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
IGNORE_SOFT_BUFFERS = OFF;
|
||||
FAST_IO = OFF;
|
||||
SOFT_BUFFER_INSERTION = OFF;
|
||||
DECOMPOSE_GATES = OFF;
|
||||
REDUCE_LOGIC = OFF;
|
||||
DUPLICATE_LOGIC_EXTRACTION = OFF;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
REFACTORIZATION = OFF;
|
||||
SUBFACTOR_EXTRACTION = OFF;
|
||||
MULTI_LEVEL_FACTORING = OFF;
|
||||
RESYNTHESIZE_NETWORK = OFF;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
REGISTER_OPTIMIZATION = OFF;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE WYSIWYG.CLASSIC
|
||||
BEGIN
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN_LENGTH = -1;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CARRY_CHAIN_LENGTH = -1;
|
||||
MINIMIZATION = PARTIAL;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
XOR_SYNTHESIS = OFF;
|
||||
TURBO_BIT = ON;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
IGNORE_SOFT_BUFFERS = OFF;
|
||||
FAST_IO = OFF;
|
||||
SOFT_BUFFER_INSERTION = OFF;
|
||||
DECOMPOSE_GATES = ON;
|
||||
REDUCE_LOGIC = OFF;
|
||||
DUPLICATE_LOGIC_EXTRACTION = OFF;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
REFACTORIZATION = OFF;
|
||||
SUBFACTOR_EXTRACTION = OFF;
|
||||
MULTI_LEVEL_FACTORING = OFF;
|
||||
RESYNTHESIZE_NETWORK = ON;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
REGISTER_OPTIMIZATION = OFF;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE WYSIWYG.FLEX8000
|
||||
BEGIN
|
||||
CASCADE_CHAIN = MANUAL;
|
||||
CASCADE_CHAIN_LENGTH = 2;
|
||||
CARRY_CHAIN = MANUAL;
|
||||
CARRY_CHAIN_LENGTH = 32;
|
||||
MINIMIZATION = PARTIAL;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
XOR_SYNTHESIS = OFF;
|
||||
TURBO_BIT = OFF;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
IGNORE_SOFT_BUFFERS = ON;
|
||||
SOFT_BUFFER_INSERTION = ON;
|
||||
DECOMPOSE_GATES = OFF;
|
||||
REDUCE_LOGIC = OFF;
|
||||
DUPLICATE_LOGIC_EXTRACTION = OFF;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
REFACTORIZATION = OFF;
|
||||
SUBFACTOR_EXTRACTION = OFF;
|
||||
MULTI_LEVEL_FACTORING = OFF;
|
||||
RESYNTHESIZE_NETWORK = OFF;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
REGISTER_OPTIMIZATION = OFF;
|
||||
END;
|
||||
|
||||
27
src/altera/acex/k30/VIDEO2.INC
Normal file
27
src/altera/acex/k30/VIDEO2.INC
Normal file
@ -0,0 +1,27 @@
|
||||
-- Copyright (C) 1988-2000 Altera Corporation
|
||||
-- Any megafunction design, and related net list (encrypted or decrypted),
|
||||
-- support information, device programming or simulation file, and any other
|
||||
-- associated documentation or information provided by Altera or a partner
|
||||
-- under Altera's Megafunction Partnership Program may be used only to
|
||||
-- program PLD devices (but not masked PLD devices) from Altera. Any other
|
||||
-- use of such megafunction design, net list, support information, device
|
||||
-- programming or simulation file, or any other related documentation or
|
||||
-- information is prohibited for any other purpose, including, but not
|
||||
-- limited to modification, reverse engineering, de-compiling, or use with
|
||||
-- any other silicon devices, unless such use is explicitly licensed under
|
||||
-- a separate agreement with Altera or a megafunction partner. Title to
|
||||
-- the intellectual property, including patents, copyrights, trademarks,
|
||||
-- trade secrets, or maskworks, embodied in any such megafunction design,
|
||||
-- net list, support information, device programming or simulation file, or
|
||||
-- any other related documentation or information provided by Altera or a
|
||||
-- megafunction partner, remains with Altera, the megafunction partner, or
|
||||
-- their respective licensors. No other licenses, including any licenses
|
||||
-- needed under any third party's intellectual property, are provided herein.
|
||||
|
||||
-- MAX+plus II Include File
|
||||
-- Version 10.0 9/14/2000
|
||||
-- Created: Mon Nov 19 00:36:42 2001
|
||||
|
||||
FUNCTION video2 (clk42, start_up, copy_sinc_h, copy_sinc_v, wr, vai[19..0], d[7..0], mdi[15..0], vdm0[7..0], vdm1[7..0], vdm2[7..0], vdm3[7..0], zx_port[7..0], dir_port[7..0], double_cas, mouse_x[9..0], mouse_y[9..0])
|
||||
WITH (MODE, MOUSE)
|
||||
RETURNS (ct[5..0], cth[5..0], ctv[8..0], ctf[6..0], blank, vao[15..0], vdo0[7..0], vdo1[7..0], vdo2[7..0], vdo3[7..0], v_wr[3..0], v_wen[3..0], v_cs[1..0], wr_pix, intt);
|
||||
BIN
src/altera/acex/k30/VIDEO2.SCF
Normal file
BIN
src/altera/acex/k30/VIDEO2.SCF
Normal file
Binary file not shown.
676
src/altera/acex/k30/VIDEO2.TDF
Normal file
676
src/altera/acex/k30/VIDEO2.TDF
Normal file
@ -0,0 +1,676 @@
|
||||
|
||||
TITLE "Video-controller";
|
||||
|
||||
INCLUDE "lpm_ram_dp";
|
||||
|
||||
PARAMETERS
|
||||
(
|
||||
MODE = "SPRINTER",
|
||||
MOUSE = "NO",
|
||||
HOR_PLACE = H"50",
|
||||
VER_PLACE = H"91" -- 122h/2
|
||||
);
|
||||
|
||||
SUBDESIGN video2
|
||||
(
|
||||
CLK42 : INPUT;
|
||||
|
||||
CT[5..0] : OUTPUT;
|
||||
CTH[5..0] : OUTPUT;
|
||||
CTV[8..0] : OUTPUT;
|
||||
CTF[6..0] : OUTPUT;
|
||||
|
||||
BLANK : OUTPUT;
|
||||
|
||||
START_UP : INPUT;
|
||||
COPY_SINC_H : INPUT;
|
||||
COPY_SINC_V : INPUT;
|
||||
|
||||
WR : INPUT;
|
||||
|
||||
VAI[19..0] : INPUT; -- input screen adress
|
||||
|
||||
VAO[15..0] : OUTPUT;
|
||||
|
||||
D[7..0] : INPUT;
|
||||
MDI[15..0] : INPUT;
|
||||
|
||||
VDO0[7..0] : OUTPUT;
|
||||
VDO1[7..0] : OUTPUT;
|
||||
VDO2[7..0] : OUTPUT;
|
||||
VDO3[7..0] : OUTPUT;
|
||||
|
||||
VDM0[7..0] : INPUT;
|
||||
VDM1[7..0] : INPUT;
|
||||
VDM2[7..0] : INPUT;
|
||||
VDM3[7..0] : INPUT;
|
||||
|
||||
V_WR[3..0] : OUTPUT;
|
||||
V_WEN[3..0] : OUTPUT;
|
||||
|
||||
V_CS[1..0] : OUTPUT;
|
||||
WR_PIX : OUTPUT;
|
||||
|
||||
-- ZX_COLOR[3..0] : OUTPUT;
|
||||
|
||||
ZX_PORT[7..0] : INPUT;
|
||||
DIR_PORT[7..0] : INPUT;
|
||||
|
||||
%
|
||||
bit0 - Spectrum SCREEN Switch
|
||||
bit1 - Spectrum Adress MODE
|
||||
bit2 - Write to Spectrum Screen OFF
|
||||
bit3 - MODE page 0/1
|
||||
bit4 - MODE on/off screen
|
||||
|
||||
bit7..5 - Border
|
||||
%
|
||||
|
||||
INTT : OUTPUT;
|
||||
|
||||
DOUBLE_CAS : INPUT;
|
||||
|
||||
MOUSE_X[9..0] : INPUT;
|
||||
MOUSE_Y[9..0] : INPUT;
|
||||
|
||||
|
||||
)
|
||||
VARIABLE
|
||||
|
||||
CLK84 : NODE;
|
||||
CLK84_X : NODE;
|
||||
CLK84_Y : NODE;
|
||||
|
||||
ZX_COLOR[3..0] : NODE;
|
||||
|
||||
CT[5..0] : DFFE;
|
||||
CTH[5..0] : DFFE;
|
||||
CTV[8..0] : DFFE;
|
||||
CTF[6..0] : DFF;
|
||||
|
||||
VXA[19..0] : DFFE;
|
||||
|
||||
VXD0[7..0] : DFFE;
|
||||
VXD1[7..0] : DFFE;
|
||||
VXD2[7..0] : DFFE;
|
||||
VXD3[7..0] : DFFE;
|
||||
|
||||
E_WR : NODE;
|
||||
E_WRD : NODE;
|
||||
|
||||
BLANK : NODE;
|
||||
BORD : NODE;
|
||||
-- INTT_T : NODE;
|
||||
INTTX : NODE;
|
||||
|
||||
VLA[17..0] : DFF;
|
||||
-- SVA[17..0] : NODE;
|
||||
SVA[17..0] : DFF;
|
||||
-- RSVA[8..0] : LCELL;
|
||||
RSVA[8..0] : NODE;
|
||||
-- RSVA[8..0] : DFF;
|
||||
|
||||
V_CST[1..0] : DFF;
|
||||
VCM[2..0] : DFF;
|
||||
TSN_W3 : DFF;
|
||||
V_WE : DFF;
|
||||
V_WEX : DFF;
|
||||
|
||||
V_WEM : NODE;
|
||||
V_WEM2 : NODE;
|
||||
V_WRM : NODE;
|
||||
V_WRM2 : NODE;
|
||||
|
||||
V_WEMM : NODE;
|
||||
V_WEMMM : NODE;
|
||||
V_WEMMN : NODE;
|
||||
V_WEMMO : NODE;
|
||||
V_WET[3..0] : DFF;
|
||||
|
||||
D_PIC0[7..0] : DFFE;
|
||||
-- D_PIC0_[7..0] : LCELL;
|
||||
|
||||
D_PIC0_[7..0] : DFFE;
|
||||
D_PIC1_[7..0] : DFFE;
|
||||
D_PIC2_[7..0] : DFFE;
|
||||
D_PIC3_[7..0] : DFFE;
|
||||
|
||||
D_PICX_[7..0] : NODE;
|
||||
|
||||
LWR_PIC : NODE;
|
||||
LWR_COL : NODE;
|
||||
|
||||
WR_PIC : DFF;
|
||||
WR_COL : DFF;
|
||||
LD_PIC : NODE;
|
||||
|
||||
RBRVA[10..8]: DFF;
|
||||
BRVA[7..0] : DFF;
|
||||
DCOL[7..0] : DFFE;
|
||||
|
||||
MXWE : NODE;
|
||||
-- MXCE : NODE;
|
||||
|
||||
AX128 : NODE;
|
||||
|
||||
BRD[2..0] : NODE;
|
||||
|
||||
ZX_COL[3..0] : LCELL;
|
||||
|
||||
ZXA15 : NODE;
|
||||
ZXS[5..0] : NODE;
|
||||
ZX_SCREEN : NODE;
|
||||
SCR128 : NODE;
|
||||
|
||||
MODE0[7..0] : DFFE;
|
||||
MODE1[7..0] : DFFE;
|
||||
MODE2[7..0] : DFFE;
|
||||
-- MODE3[7..0] : DFF;
|
||||
|
||||
WR_MODE : DFF;
|
||||
LWR_MODE : NODE;
|
||||
X_MODE[7..4]: NODE;
|
||||
X_MODE_BOND : NODE;
|
||||
|
||||
-- M_CTV[2..0] : DFF;
|
||||
-- M_CT[5..3] : DFF;
|
||||
M_CTV[2..0] : LCELL;
|
||||
M_CT[5..3] : LCELL;
|
||||
|
||||
DOUBLE : DFFE;
|
||||
|
||||
PIC_CLK : NODE;
|
||||
|
||||
MS_X[9..0] : DFF;
|
||||
MS_Y[9..0] : DFF;
|
||||
|
||||
MS_POINT : NODE;
|
||||
MS_POINT2 : NODE;
|
||||
MS_PNT : NODE;
|
||||
|
||||
MS_DAT : LPM_RAM_DP WITH (LPM_WIDTH=16,LPM_WIDTHAD=8,LPM_FILE="MOUSE.MIF");
|
||||
|
||||
SCR_ENA : DFFE;
|
||||
V_WR_[3..0] : LCELL;
|
||||
V_WEY[3..0] : LCELL;
|
||||
|
||||
V_WE_R : NODE;
|
||||
|
||||
V_CSX[3..0] : NODE;
|
||||
|
||||
V_EN[3..0] : NODE;
|
||||
|
||||
F_WR : NODE;
|
||||
|
||||
BEGIN
|
||||
|
||||
DEFAULTS
|
||||
WR_MODE.d = VCC; -- WR_MODE2.d = VCC; -- WR_MODE2X.d = VCC;
|
||||
V_CST[].d = VCC; V_WR[] = VCC; TSN_W3.d = VCC;
|
||||
V_WE.d = VCC; WR_COL.d = VCC; WR_PIC.d = VCC;
|
||||
V_WET[].d = VCC;
|
||||
END DEFAULTS;
|
||||
|
||||
ZX_COLOR[] = ZX_COL[];
|
||||
|
||||
-- === MOUSE counters ========
|
||||
|
||||
MS_X[].clk = !CT1;
|
||||
CASE LCELL(CTH[5..2] == 12) IS
|
||||
WHEN 0 => MS_X[] = MS_X[] + 1;
|
||||
WHEN 1 => MS_X[] = (!MOUSE_X[9..0]);
|
||||
END CASE;
|
||||
|
||||
MS_Y[].clk = !CTH5;
|
||||
CASE LCELL(CTV8 & !CTV5 & CTV4) IS
|
||||
WHEN 0 => MS_Y[] = MS_Y[] + 1;
|
||||
WHEN 1 => MS_Y[] = (GND,!MOUSE_Y[8..0]);
|
||||
END CASE;
|
||||
|
||||
MS_PNT = DFF(((MS_X[] == B"100000XXXX") & (MS_Y[] == B"100000XXXX")),CLK42,,);
|
||||
|
||||
MS_DAT.wren = GND;
|
||||
MS_DAT.data[] = GND;
|
||||
MS_DAT.wraddress[] = GND;
|
||||
MS_DAT.wrclock = CLK42;
|
||||
MS_DAT.wrclken = GND;
|
||||
MS_DAT.rden = VCC;
|
||||
MS_DAT.rdaddress[] = (MS_Y[3..0],MS_X[3..0]);
|
||||
MS_DAT.rdclock = CLK42;
|
||||
MS_DAT.rdclken = VCC;
|
||||
|
||||
IF MOUSE == "NO" GENERATE
|
||||
MS_POINT = GND;
|
||||
MS_POINT2 = GND;
|
||||
ELSE GENERATE
|
||||
MS_POINT = DFF((MS_PNT & MS_DAT.q0),CLK42,,);
|
||||
MS_POINT2 = DFF((MS_PNT & MS_DAT.q1),CLK42,,);
|
||||
END GENERATE;
|
||||
|
||||
-- === Sinc-counts GENERATOR ============================================
|
||||
|
||||
-- CT[].clrn = START_UP;
|
||||
|
||||
-- (,CTH[5..0].clrn,CT[5].clrn) = !COPY_SINC_H or HOR_PLACE;
|
||||
-- (,CTH[5..0].prn ,CT[5].prn ) = !COPY_SINC_H or !HOR_PLACE;
|
||||
|
||||
-- CTV[].clrn = !COPY_SINC_V or VER_PLACE;
|
||||
-- CTV[].prn = !COPY_SINC_V or !VER_PLACE;
|
||||
|
||||
CT[5].clrn = !COPY_SINC_H;
|
||||
|
||||
-- set CTH to 50 (32h)
|
||||
CTH[0].clrn = !COPY_SINC_H;
|
||||
CTH[1].prn = !COPY_SINC_H;
|
||||
CTH[2].clrn = !COPY_SINC_H;
|
||||
CTH[3].clrn = !COPY_SINC_H;
|
||||
CTH[4].prn = !COPY_SINC_H;
|
||||
CTH[5].prn = !COPY_SINC_H;
|
||||
|
||||
-- set CTV to 122h
|
||||
CTV[0].clrn = !COPY_SINC_V;
|
||||
CTV[1].prn = !COPY_SINC_V;
|
||||
CTV[3..2].clrn = !COPY_SINC_V;
|
||||
|
||||
CTV[4].clrn = !COPY_SINC_V;
|
||||
CTV[5].prn = !COPY_SINC_V;
|
||||
CTV[7..6].clrn = !COPY_SINC_V;
|
||||
CTV[8].prn = !COPY_SINC_V;
|
||||
|
||||
CT[5..0].clk = CLK42;
|
||||
CTH[5..0].clk = CLK42;
|
||||
CTV[8..0].clk = CLK42;
|
||||
|
||||
CT[2..0].ena = VCC;
|
||||
CASE CT[2..0] IS
|
||||
WHEN 0 => CT[2..0] = 1;
|
||||
WHEN 1 => CT[2..0] = 2;
|
||||
WHEN 2 => CT[2..0] = 4;
|
||||
WHEN 3 => CT[2..0] = 4;
|
||||
WHEN 4 => CT[2..0] = 5;
|
||||
WHEN 5 => CT[2..0] = 6;
|
||||
WHEN 6 => CT[2..0] = 0;
|
||||
WHEN 7 => CT[2..0] = 0;
|
||||
END CASE;
|
||||
-- for remove sinc jitter
|
||||
-- CT[5..3].ena = DFF(((CT0 & CT2) or (COPY_SINC_H & !CT4)),CLK42,,);
|
||||
CT[5..3].ena = DFF((CT0 & CT2),CLK42,,);
|
||||
CT[5..3] = CT[5..3]+1;
|
||||
%
|
||||
CASE CT[4..3] IS
|
||||
WHEN 0 => CT[5..3] = CT[5..3]+1;
|
||||
WHEN 1 => CT[5..3] = CT[5..3]+1;
|
||||
WHEN 2 => CT[5..3] = CT[5..3]+1;
|
||||
WHEN 3 => CT[5..3] = CT[5..3]+1;
|
||||
END CASE;
|
||||
%
|
||||
CTH[].ena = DFF(((CT[5..2] == 15) & CT0),CLK42,,);
|
||||
CTV[].ena = DFF(((CT[5..2] == 15) & CT0 & (CTH[] == 48)),CLK42,,);
|
||||
|
||||
IF CTH[] == 55 THEN
|
||||
CTH[] = GND;
|
||||
ELSE
|
||||
CTH[] = CTH[] + 1;
|
||||
END IF;
|
||||
|
||||
IF CTV[] == 319 THEN
|
||||
CTV[] = GND;
|
||||
ELSE
|
||||
CTV[] = CTV[] + 1;
|
||||
END IF;
|
||||
|
||||
CTF[].clk = CTV8;
|
||||
CTF[] = CTF[]+1;
|
||||
|
||||
-- ==== Video ==========================================================
|
||||
|
||||
ZXS[] = ZX_PORT[5..0]; -- pages ZX Screens
|
||||
ZX_SCREEN = ZX_PORT6; -- enable ZX Screen write
|
||||
ZXA15 = ZX_PORT7; -- ZX A15' line
|
||||
|
||||
SCR128 = DIR_PORT0;
|
||||
|
||||
-- WR_PIX = LCELL(TSN_W3);
|
||||
WR_PIX = (TSN_W3);
|
||||
|
||||
DOUBLE.clk = CLK42; DOUBLE.ena = !E_WR; DOUBLE = DOUBLE_CAS;
|
||||
VXA[].clk = CLK42; VXA[].ena = !E_WR;
|
||||
|
||||
VXD0[].clk = CLK42; VXD0[].ena = !E_WRD; VDO0[] = VXD0[];
|
||||
VXD1[].clk = CLK42; VXD1[].ena = !E_WRD; VDO1[] = VXD1[];
|
||||
VXD2[].clk = CLK42; VXD2[].ena = !E_WRD; VDO2[] = VXD2[];
|
||||
VXD3[].clk = CLK42; VXD3[].ena = !E_WRD; VDO3[] = VXD3[];
|
||||
|
||||
-- VXD0[] = D[];
|
||||
-- VXD1[] = D[];
|
||||
-- VXD2[] = D[];
|
||||
-- VXD3[] = D[];
|
||||
|
||||
(VXD0[],VXD1[]) = MDI[];
|
||||
(VXD2[],VXD3[]) = MDI[];
|
||||
|
||||
BRD[] = DIR_PORT[7..5];
|
||||
|
||||
VCM[].clk = CLK42;
|
||||
TSN_W3.clk = CLK42;
|
||||
V_CST[].clk = CLK42;
|
||||
V_WE.clk = CLK42;
|
||||
V_WET[].clk = CLK42;
|
||||
VLA[].clk = CLK42;
|
||||
|
||||
SCR_ENA.clk = CLK42;
|
||||
SCR_ENA.ena = !E_WR;
|
||||
SCR_ENA.d = !(VAI19 or ZX_SCREEN);
|
||||
|
||||
E_WRD = DFF(E_WR,CLK42,,);
|
||||
E_WR = LCELL(WR or !(VAI19 or ZX_SCREEN) or !DFF(WR,CLK42,,));
|
||||
-- E_WR = LCELL(WR or !DFF(WR,CLK42,,));
|
||||
|
||||
-- ****************************************************
|
||||
|
||||
IF MODE == "SPRINTER" GENERATE
|
||||
|
||||
-- VAI[19] - switch adress mode 1 - graf mode, 0 - spectrum mode
|
||||
|
||||
-- MXWE = DFF(((DFF(E_WR,CLK42,,) or SCR_ENA) & MXWE),CLK42,,V_WE);
|
||||
MXWE = DFF(MXWE,CLK42,E_WR,V_WE);
|
||||
|
||||
IF VAI[19] THEN
|
||||
-- in graf mode all 256k(512k) range
|
||||
VXA[] = VAI[];
|
||||
ELSE
|
||||
-- in spectrum mode 8k/16k range pages
|
||||
VXA[] = (GND,GND,VAI[7..0],ZXS[4..1],LCELL(ZXS0 xor ZXA15 xor VAI13),VAI[12..8]);
|
||||
END IF;
|
||||
|
||||
-- BORD = DFF((MODE0[7..4] == 15),WR_PIC,,);
|
||||
-- BLANK = DFF((BORD & MODE03 & MODE02),WR_PIC,,);
|
||||
-- INTTX = DFF((BORD & MODE03 & MODE02 & MODE00),WR_PIC,,);
|
||||
|
||||
BORD = DFF((MODE0[7..4] == 15),LWR_COL,,);
|
||||
BLANK = DFF(((BORD & MODE03 & MODE02) or DIR_PORT4),LWR_COL,,);
|
||||
INTTX = DFF((BORD & MODE03 & MODE02 & MODE00),LWR_COL,,);
|
||||
|
||||
INTT = DFF(!(INTTX & (CTV[2..0] == 7)),CT5,,);
|
||||
|
||||
-- INTT = DFF((INTTX or DFF(INTTX,CT5,,)),CT5,,);
|
||||
-- INTT = DFF(!(BLANK & (CTV[2..0] == 7)),CLK42,,MODE0[0]);
|
||||
|
||||
CASE CT[2..0] IS
|
||||
WHEN B"110" => VCM[2..0].d = 5; -- 101
|
||||
WHEN B"000" => VCM[2..0].d = 1; -- 001
|
||||
WHEN B"001" => VCM[2..0].d = 4; -- 100
|
||||
WHEN B"010" => VCM[2..0].d = 3; -- 011
|
||||
WHEN B"100" => VCM[2..0].d = 2; -- 010
|
||||
WHEN B"101" => VCM[2..0].d = 0; -- 000
|
||||
END CASE;
|
||||
|
||||
CASE VCM[1..0] IS
|
||||
WHEN 0 =>
|
||||
VLA[].d = (BRVA[7..0],VCC,VCC,VCC,VCC,VCC,RBRVA[10..8],GND,GND);
|
||||
V_CST[].d = (VCC,GND);
|
||||
V_WE.d = VCC;
|
||||
V_WEX.d = VCC;
|
||||
IF VCM2 THEN
|
||||
-- TSN_W3.d = X_MODE5;
|
||||
TSN_W3.d = X_MODE_BOND;
|
||||
-- V_CST[].d = (VCC,X_MODE5);
|
||||
ELSE
|
||||
TSN_W3.d = X_MODE_BOND;
|
||||
-- V_CST[].d = (VCC,X_MODE_BOND);
|
||||
END IF;
|
||||
WHEN 1 =>
|
||||
WR_PIC.d = !VCM2;
|
||||
WR_COL.d = VCM2;
|
||||
VLA[].d = SVA[];
|
||||
V_CST[].d = (VCC,GND);
|
||||
V_WE.d = VCC;
|
||||
V_WEX.d = VCC;
|
||||
WHEN 2 =>
|
||||
VLA[].d = VXA[17..0];
|
||||
V_CST[].d = (!VXA18,VXA18) or MXWE;
|
||||
V_WE.d = MXWE;
|
||||
V_WEX.d = GND;
|
||||
V_WET[].d = MXWE or !((!VXA1 & !VXA0),(!VXA1 & VXA0),(VXA1 & !VXA0),(VXA1 & VXA0));
|
||||
WHEN 3 =>
|
||||
WR_PIC.d = X_MODE5;
|
||||
VLA[].d = (DIR_PORT3,CTH[5..0],CT5,VCC,VCC,CTV[8..3],GND,GND);
|
||||
WR_MODE.d = !(CT[5..3] == B"111") & !(CT4 & CT3 & !MODE0[5]);
|
||||
V_CST[].d = (VCC,GND);
|
||||
V_WE.d = VCC;
|
||||
V_WEX.d = VCC;
|
||||
END CASE;
|
||||
|
||||
-- choose V-RAM komplect
|
||||
|
||||
V_CST1.prn = GND;
|
||||
-- V_CS0.clrn = GND;
|
||||
V_CST0.prn = (LCELL(DFF(GND,!CLK42,,!V_CST0)));
|
||||
V_CS1 = VCC;
|
||||
-- V_CS0 = LCELL(V_CST0);
|
||||
|
||||
V_CSX0 = LCELL(!CLK42);
|
||||
V_CSX1 = LCELL(V_CSX0);
|
||||
V_CSX2 = LCELL(V_CSX1 & V_CSX0);
|
||||
V_CSX3 = LCELL(V_CSX2);
|
||||
|
||||
-- V_CS0 = V_CSX3;
|
||||
V_CS0 = GND;
|
||||
|
||||
-- =====================
|
||||
|
||||
SVA[].clk = CLK42;
|
||||
SVA[9..6] = MODE0[3..0];
|
||||
-- RSVA[].clk = CLK42;
|
||||
(SVA[12..10],SVA[5..0]) = RSVA[];
|
||||
|
||||
-- M_CTV[2..0].clk = CLK42;
|
||||
-- M_CT[5..3].clk = CLK42;
|
||||
M_CTV[2..0] = (!MODE2[2] & CTV[2..0]) or MODE2[2] & (MODE2[1],CTV[2..1]);
|
||||
M_CT[5..3] = (!MODE2[2] & (CT[5],!CT[4..3])) or MODE2[2] & (MODE2[0],!CT[5..4]);
|
||||
|
||||
CASE (!VCM2,MODE0[4]) IS
|
||||
-- CASE (!VCM1,MODE0[4]) IS
|
||||
WHEN B"X0" =>
|
||||
-- Graf adress --
|
||||
RSVA[] = (M_CTV[2..0],MODE1[2..0],M_CT[5..3]);
|
||||
SVA[17..13] = MODE1[7..3];
|
||||
|
||||
-- SVA[12..10] = CTV[2..0];
|
||||
-- SVA[5..0] = (MODE1[2..0],CT5,!CT[4..3]);
|
||||
WHEN B"01" =>
|
||||
-- ZX-atr adress --
|
||||
RSVA[] = (MODE2[2..0],SCR128,VCC,VCC,GND,!MODE0[7..6]);
|
||||
SVA[17..13] = MODE2[7..3];
|
||||
|
||||
-- SVA[12..10] = MODE2[2..0];
|
||||
-- SVA[5..0] = (SCR128,VCC,VCC,GND,!MODE0[7..6]);
|
||||
WHEN B"11" =>
|
||||
-- ZX-pic adress --
|
||||
RSVA[] = (MODE1[2..0],SCR128,MODE0[7..6],CTV2,!CTV1,!CTV0);
|
||||
SVA[17..13] = MODE1[7..3];
|
||||
|
||||
-- SVA[12..10] = MODE1[2..0];
|
||||
-- SVA[5..0] = (SCR128,MODE0[7..6],CTV2,!CTV1,!CTV0);
|
||||
END CASE;
|
||||
|
||||
-- X_MODE_BOND = LCELL(LCELL(DCOL[7..4] == 15) & LCELL(DCOL[3..0] == 15) & DFF((MODE0[7] & MODE0[5] & !MODE0[4]),LWR_COL,VCC,VCC));
|
||||
X_MODE_BOND = GND;
|
||||
|
||||
-- LD_PIC = LCELL((MODE0[5] & DFF((CT[5..3] == B"000"),CLK42,,)) or (!MODE0[5] & DFF((CT[4..2] == B"000"),CLK42,,)));
|
||||
LD_PIC = LCELL((MODE0[5] & DFF((CT[5..3] == B"000"),CLK42,,)) or (!MODE0[5] & DFF((CT[4..2] == B"000"),CLK42,,)));
|
||||
|
||||
-- CASE (DFF(VLA1,!CLK42,,),DFF(VLA0,!CLK42,,)) IS
|
||||
|
||||
-- D_PIC0_[].clk = !CLK42;
|
||||
-- D_PIC1_[].clk = !CLK42;
|
||||
-- D_PIC2_[].clk = !CLK42;
|
||||
-- D_PIC3_[].clk = !CLK42;
|
||||
|
||||
-- PIC_CLK = LCELL(LCELL(CLK42));
|
||||
PIC_CLK = !CLK42;
|
||||
|
||||
D_PIC0_[].clk = PIC_CLK;
|
||||
D_PIC1_[].clk = PIC_CLK;
|
||||
D_PIC2_[].clk = PIC_CLK;
|
||||
D_PIC3_[].clk = PIC_CLK;
|
||||
|
||||
D_PIC0_[] = VDM0[];
|
||||
D_PIC1_[] = VDM1[];
|
||||
D_PIC2_[] = VDM2[];
|
||||
D_PIC3_[] = VDM3[];
|
||||
|
||||
CASE (DFF(VLA1,CLK42,,),DFF(VLA0,CLK42,,)) IS
|
||||
WHEN 0 => D_PICX_[] = D_PIC0_[];
|
||||
WHEN 1 => D_PICX_[] = D_PIC1_[];
|
||||
WHEN 2 => D_PICX_[] = D_PIC2_[];
|
||||
WHEN 3 => D_PICX_[] = D_PIC3_[];
|
||||
END CASE;
|
||||
|
||||
MODE0[].ena = VCC;
|
||||
MODE1[].ena = VCC;
|
||||
MODE2[].ena = VCC;
|
||||
MODE0[].clk = LWR_MODE;
|
||||
MODE1[].clk = LWR_MODE;
|
||||
MODE2[].clk = LWR_MODE;
|
||||
MODE0[].d = VDM3[];
|
||||
MODE1[].d = VDM2[];
|
||||
MODE2[].d = VDM1[];
|
||||
LWR_MODE = LCELL(LCELL(WR_MODE));
|
||||
%
|
||||
MODE0[].ena = LWR_MODE;
|
||||
MODE1[].ena = LWR_MODE;
|
||||
MODE2[].ena = LWR_MODE;
|
||||
MODE0[].clk = CLK42;
|
||||
MODE1[].clk = CLK42;
|
||||
MODE2[].clk = CLK42;
|
||||
MODE0[].d = D_PIC3_[];
|
||||
MODE1[].d = D_PIC2_[];
|
||||
MODE2[].d = D_PIC1_[];
|
||||
LWR_MODE = DFF(!WR_MODE,CLK42,,);
|
||||
%
|
||||
X_MODE7 = DFF(MODE0[7],LWR_COL,,);
|
||||
X_MODE6 = DFF(MODE0[6],LWR_COL,,);
|
||||
X_MODE5 = DFF(MODE0[5],LWR_COL,,);
|
||||
X_MODE4 = DFF(MODE0[4],LWR_COL,,);
|
||||
|
||||
VAO[] = VLA[17..2];
|
||||
|
||||
WR_PIC.clk = CLK42;
|
||||
WR_COL.clk = CLK42;
|
||||
WR_MODE.clk = CLK42;
|
||||
|
||||
-- LWR_PIC = LCELL(LCELL(WR_PIC));
|
||||
-- LWR_COL = LCELL(LCELL(WR_COL));
|
||||
-- LWR_PIC = LCELL(WR_PIC);
|
||||
-- LWR_COL = LCELL(WR_COL);
|
||||
LWR_PIC = DFF(WR_PIC,CLK42,,);
|
||||
LWR_COL = DFF(WR_COL,CLK42,,);
|
||||
|
||||
-- D_PIC0[].ena = VCC;
|
||||
-- D_PIC0[].clk = (LWR_PIC);
|
||||
D_PIC0[].ena = !LWR_PIC;
|
||||
D_PIC0[].clk = CLK42;
|
||||
|
||||
IF LD_PIC THEN
|
||||
-- D_PIC0[] = D_PIC0_[];
|
||||
D_PIC0[] = D_PICX_[];
|
||||
ELSE
|
||||
D_PIC0[] = (D_PIC0[6..0],GND);
|
||||
END IF;
|
||||
|
||||
-- DCOL[].clk = (LWR_COL);
|
||||
DCOL[].ena = !LWR_COL;
|
||||
DCOL[].clk = CLK42;
|
||||
|
||||
IF DFF((MODE0[7..4] == 15),WR_PIC,,) THEN
|
||||
DCOL[].d = (B"00",BRD[2..0],BRD[2..0]);
|
||||
ELSE
|
||||
-- DCOL[].d = D_PIC0_[];
|
||||
DCOL[].d = D_PICX_[];
|
||||
END IF;
|
||||
|
||||
DCOL[].clrn = !BLANK;
|
||||
|
||||
BRVA[].clk = CLK42;
|
||||
BRVA[].clrn = !MS_POINT;
|
||||
BRVA[].prn = !MS_POINT2;
|
||||
|
||||
-- CASE (LCELL(X_MODE4 or X_MODE5),CT2) IS
|
||||
CASE (DFF((MODE0[4] or MODE0[5]),LWR_COL,,),CT2) IS
|
||||
WHEN B"1X" => BRVA[7..0] = DCOL[];
|
||||
WHEN B"01" => BRVA[7..0] = (B"0000",DCOL[7..4]);
|
||||
WHEN B"00" => BRVA[7..0] = (B"0000",DCOL[3..0]);
|
||||
END CASE;
|
||||
|
||||
-- BRVA[10..8] = (x_mode4,RBRVA[9..8]);
|
||||
RBRVA[].clk = CLK42;
|
||||
|
||||
CASE (BORD,X_MODE4) IS
|
||||
WHEN B"X0" => RBRVA[10..8].d = (GND,X_MODE[7..6]);
|
||||
WHEN B"X1" => RBRVA[10..8].d = (VCC,(CTF4 & !BLANK),D_PIC0[7]);
|
||||
END CASE;
|
||||
|
||||
RBRVA[9..8].clrn = !BORD;
|
||||
RBRVA[10].prn = !BORD;
|
||||
|
||||
CASE (RBRVA[9..8],BRVA7) IS
|
||||
WHEN 0,1,4,7 => ZX_COL[] = (BRVA[6],BRVA[5..3]);
|
||||
WHEN 2,3,6,5 => ZX_COL[] = (BRVA[6],BRVA[2..0]);
|
||||
END CASE;
|
||||
|
||||
-- V_WET[].prn = LCELL(DFF(GND,!CLK42,,!V_WE));
|
||||
-- V_WE.prn = LCELL(DFF(GND,!CLK42,,!V_WE));
|
||||
|
||||
V_WE_R = DFF(GND,!CLK42,,!V_WE);
|
||||
V_WE.prn = V_WE_R;
|
||||
V_WET[].prn = V_WE_R;
|
||||
|
||||
-- V_WR[] = LCELL(V_WE) or !((!VXA1 & !VXA0),(!VXA1 & VXA0),(VXA1 & !VXA0),(VXA1 & VXA0));
|
||||
|
||||
-- V_WR[] = (V_WE) or !(
|
||||
|
||||
V_WEX.clk = CLK42;
|
||||
-- V_WEX.d = V_WE;
|
||||
-- V_WEX.prn = (DFF(GND,CLK42,,!V_WEX));
|
||||
|
||||
|
||||
V_WEMMM = LCELL(V_WE);
|
||||
V_WEMMN = LCELL(V_WEMMM);
|
||||
V_WEMMO = LCELL(V_WEMMN);
|
||||
V_WEMM = LCELL(V_WEMMO);
|
||||
|
||||
V_WRM = LCELL(V_WEMMN & V_WEMMM);
|
||||
V_WRM2 = LCELL(V_WEMMN & V_WEMMM);
|
||||
|
||||
V_WEM = LCELL(V_WEMMM & V_WEMMO);
|
||||
V_WEM2 = LCELL(V_WEMMM & V_WEMMO);
|
||||
|
||||
V_EN3 = DFF(!(!VXA1 & (!VXA0 or DOUBLE)),CLK42,F_WR,);
|
||||
V_EN2 = DFF(!(!VXA1 & (VXA0 or DOUBLE)) ,CLK42,F_WR,);
|
||||
V_EN1 = DFF(!(VXA1 & (!VXA0 or DOUBLE)) ,CLK42,F_WR,);
|
||||
V_EN0 = DFF(!(VXA1 & (VXA0 or DOUBLE)) ,CLK42,F_WR,);
|
||||
|
||||
F_WR = DFF(VCC,V_WE,,);
|
||||
|
||||
V_WR_3 = V_WRM or V_EN3;
|
||||
V_WR_2 = V_WRM2 or V_EN2;
|
||||
V_WR_1 = V_WRM or V_EN1;
|
||||
V_WR_0 = V_WRM or V_EN0;
|
||||
|
||||
V_WEY3 = V_WEM or V_EN3;
|
||||
V_WEY2 = V_WEM2 or V_EN2;
|
||||
V_WEY1 = V_WEM or V_EN1;
|
||||
V_WEY0 = V_WEM or V_EN0;
|
||||
|
||||
V_WR[] = V_WR_[];
|
||||
V_WEN[] = V_WEY[];
|
||||
|
||||
CLK84 = LCELL(CLK42 xor CLK84_X);
|
||||
CLK84_X = DFF(!CLK84_X,CLK84,,);
|
||||
CLK84_Y = CLK84;
|
||||
|
||||
END GENERATE; -- end "sprinter" mode
|
||||
|
||||
|
||||
END;
|
||||
BIN
src/altera/acex/k30/scf/ACCELER.SCF
Normal file
BIN
src/altera/acex/k30/scf/ACCELER.SCF
Normal file
Binary file not shown.
BIN
src/altera/acex/k30/scf/DCP.SCF
Normal file
BIN
src/altera/acex/k30/scf/DCP.SCF
Normal file
Binary file not shown.
BIN
src/altera/acex/k30/scf/MOUSE.SCF
Normal file
BIN
src/altera/acex/k30/scf/MOUSE.SCF
Normal file
Binary file not shown.
BIN
src/altera/acex/k30/scf/SP2_ACEX.SCF
Normal file
BIN
src/altera/acex/k30/scf/SP2_ACEX.SCF
Normal file
Binary file not shown.
BIN
src/altera/acex/k30/scf/VIDEO2.SCF
Normal file
BIN
src/altera/acex/k30/scf/VIDEO2.SCF
Normal file
Binary file not shown.
49
src/altera/acex/make.cmd
Normal file
49
src/altera/acex/make.cmd
Normal file
@ -0,0 +1,49 @@
|
||||
@set BIN=..\..\bin\
|
||||
@set CHIP=K30
|
||||
|
||||
@echo -------------------------------------------------------[Bitstream START]
|
||||
@echo STEP 0, Task [1/2] ALTERA ACEX-%CHIP% STREAM
|
||||
|
||||
@if exist SP2_ACEX.ttf goto trans
|
||||
|
||||
@copy %CHIP%\*.* .\*.*
|
||||
|
||||
@C:\MAXPLUS2\MAXPLUS2.EXE -compile SP2_ACEX
|
||||
|
||||
@del *.txt
|
||||
@del *.bak
|
||||
@del *.cnf
|
||||
@del *.db?
|
||||
|
||||
@del *.hif
|
||||
@del *.mmf
|
||||
@del *.mtf
|
||||
@del *.mtb
|
||||
@del *.hex
|
||||
@del *.ndb
|
||||
@del *.pin
|
||||
@del *.pof
|
||||
@del *.snf
|
||||
@del *.fit
|
||||
|
||||
@del *.SCF
|
||||
@del *.ACF
|
||||
@del *.TDF
|
||||
@del *.INC
|
||||
@del *.MIF
|
||||
|
||||
:trans
|
||||
@%BIN%\transttf.exe SP2_ACEX.ttf STREAM.BIN
|
||||
@if not exist STREAM.BIN goto error
|
||||
|
||||
@goto quit
|
||||
|
||||
:error
|
||||
@color 04
|
||||
@echo ---------------------------------------------------------------------[Compiling bitstream %CHIP% ERROR!!!]
|
||||
@pause 0
|
||||
@exit 3
|
||||
|
||||
:quit
|
||||
@echo [OK ]
|
||||
@echo.
|
||||
14807
src/altera/acex/sp2_acex.rpt
Normal file
14807
src/altera/acex/sp2_acex.rpt
Normal file
File diff suppressed because it is too large
Load Diff
10
src/altera/make_altera.cmd
Normal file
10
src/altera/make_altera.cmd
Normal file
@ -0,0 +1,10 @@
|
||||
@echo off
|
||||
|
||||
cd acex
|
||||
call make.cmd
|
||||
|
||||
cd ..\max
|
||||
call make.cmd
|
||||
|
||||
cd ..
|
||||
|
||||
653
src/altera/max/7064/SP2_MAX.ACF
Normal file
653
src/altera/max/7064/SP2_MAX.ACF
Normal file
@ -0,0 +1,653 @@
|
||||
--
|
||||
-- Copyright (C) 1988-2000 Altera Corporation
|
||||
-- Any megafunction design, and related net list (encrypted or decrypted),
|
||||
-- support information, device programming or simulation file, and any other
|
||||
-- associated documentation or information provided by Altera or a partner
|
||||
-- under Altera's Megafunction Partnership Program may be used only to
|
||||
-- program PLD devices (but not masked PLD devices) from Altera. Any other
|
||||
-- use of such megafunction design, net list, support information, device
|
||||
-- programming or simulation file, or any other related documentation or
|
||||
-- information is prohibited for any other purpose, including, but not
|
||||
-- limited to modification, reverse engineering, de-compiling, or use with
|
||||
-- any other silicon devices, unless such use is explicitly licensed under
|
||||
-- a separate agreement with Altera or a megafunction partner. Title to
|
||||
-- the intellectual property, including patents, copyrights, trademarks,
|
||||
-- trade secrets, or maskworks, embodied in any such megafunction design,
|
||||
-- net list, support information, device programming or simulation file, or
|
||||
-- any other related documentation or information provided by Altera or a
|
||||
-- megafunction partner, remains with Altera, the megafunction partner, or
|
||||
-- their respective licensors. No other licenses, including any licenses
|
||||
-- needed under any third party's intellectual property, are provided herein.
|
||||
--
|
||||
CHIP SP2_MAX
|
||||
BEGIN
|
||||
DEVICE = EPM7064STC100-10;
|
||||
|GND65 : INPUT_PIN = 65;
|
||||
|GND33 : INPUT_PIN = 33;
|
||||
|/CONF_X : BIDIR_PIN = 54;
|
||||
|10K_D0 : OUTPUT_PIN = 58;
|
||||
|CLKZZ : BIDIR_PIN = 32;
|
||||
|10K_CLK : OUTPUT_PIN = 56;
|
||||
|XHD2_CS2 : OUTPUT_PIN = 83;
|
||||
|XHD2_CS1 : OUTPUT_PIN = 81;
|
||||
|XHD1_CS2 : OUTPUT_PIN = 80;
|
||||
|XHD1_CS1 : OUTPUT_PIN = 79;
|
||||
|XHD_WR : OUTPUT_PIN = 75;
|
||||
|XHD_RES : OUTPUT_PIN = 71;
|
||||
|XHD_RD : OUTPUT_PIN = 76;
|
||||
|WR_PDOS : OUTPUT_PIN = 8;
|
||||
|/WG_WR : OUTPUT_PIN = 93;
|
||||
|/WG_RD : OUTPUT_PIN = 97;
|
||||
|WDAT : OUTPUT_PIN = 98;
|
||||
|TG42_OUT : OUTPUT_PIN = 85;
|
||||
|TG42_BUF : OUTPUT_PIN = 36;
|
||||
|SINC_2 : OUTPUT_PIN = 19;
|
||||
|SINC_1 : OUTPUT_PIN = 20;
|
||||
|SINC_V : OUTPUT_PIN = 64;
|
||||
|SINC_H : OUTPUT_PIN = 68;
|
||||
|SINC : OUTPUT_PIN = 67;
|
||||
|QDAT : OUTPUT_PIN = 16;
|
||||
|HD_DIR : OUTPUT_PIN = 48;
|
||||
|HD_CS : OUTPUT_PIN = 52;
|
||||
|FDAT : OUTPUT_PIN = 14;
|
||||
|DENS_X : OUTPUT_PIN = 96;
|
||||
|CMOS_DWR : OUTPUT_PIN = 100;
|
||||
|CMOS_DRD : OUTPUT_PIN = 99;
|
||||
|CMOS_AS : OUTPUT_PIN = 6;
|
||||
|CLK14 : OUTPUT_PIN = 31;
|
||||
|CLK_WG : OUTPUT_PIN = 13;
|
||||
|BEEP : OUTPUT_PIN = 84;
|
||||
|AUD : OUTPUT_PIN = 35;
|
||||
|XHR_RDY : INPUT_PIN = 88;
|
||||
|XA2 : INPUT_PIN = 23;
|
||||
|XA1 : INPUT_PIN = 21;
|
||||
|XA0 : INPUT_PIN = 17;
|
||||
|XACS : INPUT_PIN = 37;
|
||||
|WSTB : INPUT_PIN = 10;
|
||||
|WR_CNF : INPUT_PIN = 57;
|
||||
|WD : INPUT_PIN = 9;
|
||||
|VGA_IN : INPUT_PIN = 61;
|
||||
|TR43 : INPUT_PIN = 12;
|
||||
|TG42_IN : INPUT_PIN = 87;
|
||||
|STE : INPUT_PIN = 94;
|
||||
|SR : INPUT_PIN = 29;
|
||||
|SL : INPUT_PIN = 30;
|
||||
|SINC_IN : INPUT_PIN = 69;
|
||||
|RSTB : INPUT_PIN = 25;
|
||||
|RDAT : INPUT_PIN = 92;
|
||||
|PW_GOOD : INPUT_PIN = 90;
|
||||
|HDD_C3 : INPUT_PIN = 40;
|
||||
|HDD_C2 : INPUT_PIN = 41;
|
||||
|HDD_C1 : INPUT_PIN = 42;
|
||||
|HDD_C0 : INPUT_PIN = 47;
|
||||
|FDD_C2 : INPUT_PIN = 46;
|
||||
|FDD_C1 : INPUT_PIN = 45;
|
||||
|FDD_C0 : INPUT_PIN = 44;
|
||||
|EPM_RES : INPUT_PIN = 89;
|
||||
|D0 : INPUT_PIN = 60;
|
||||
END;
|
||||
|
||||
DEFAULT_DEVICES
|
||||
BEGIN
|
||||
AUTO_DEVICE = EPM7256SQC208-7;
|
||||
AUTO_DEVICE = EPM7256SRC208-7;
|
||||
AUTO_DEVICE = EPM7192SQC160-7;
|
||||
AUTO_DEVICE = EPM7160SQC160-6;
|
||||
AUTO_DEVICE = EPM7160STC100-6;
|
||||
AUTO_DEVICE = EPM7160SLC84-6;
|
||||
AUTO_DEVICE = EPM7128SQC160-6;
|
||||
AUTO_DEVICE = EPM7128STC100-6;
|
||||
AUTO_DEVICE = EPM7128SQC100-6;
|
||||
AUTO_DEVICE = EPM7128SLC84-6;
|
||||
AUTO_DEVICE = EPM7064STC100-5;
|
||||
AUTO_DEVICE = EPM7064SLC84-5;
|
||||
AUTO_DEVICE = EPM7064STC44-5;
|
||||
AUTO_DEVICE = EPM7064SLC44-5;
|
||||
AUTO_DEVICE = EPM7032STC44-5;
|
||||
AUTO_DEVICE = EPM7032SLC44-5;
|
||||
ASK_BEFORE_ADDING_EXTRA_DEVICES = ON;
|
||||
END;
|
||||
|
||||
TIMING_POINT
|
||||
BEGIN
|
||||
DEVICE_FOR_TIMING_SYNTHESIS = EPM7064STC100-10;
|
||||
FREQUENCY = 100MHz;
|
||||
MAINTAIN_STABLE_SYNTHESIS = OFF;
|
||||
CUT_ALL_CLEAR_PRESET = ON;
|
||||
CUT_ALL_BIDIR = ON;
|
||||
END;
|
||||
|
||||
IGNORED_ASSIGNMENTS
|
||||
BEGIN
|
||||
FIT_IGNORE_TIMING = ON;
|
||||
DEMOTE_SPECIFIC_LCELL_ASSIGNMENTS_TO_LAB_ASSIGNMENTS = OFF;
|
||||
IGNORE_LOCAL_ROUTING_ASSIGNMENTS = OFF;
|
||||
IGNORE_DEVICE_ASSIGNMENTS = OFF;
|
||||
IGNORE_LC_ASSIGNMENTS = OFF;
|
||||
IGNORE_PIN_ASSIGNMENTS = OFF;
|
||||
IGNORE_CHIP_ASSIGNMENTS = OFF;
|
||||
IGNORE_TIMING_ASSIGNMENTS = OFF;
|
||||
IGNORE_LOGIC_OPTION_ASSIGNMENTS = OFF;
|
||||
IGNORE_CLIQUE_ASSIGNMENTS = OFF;
|
||||
END;
|
||||
|
||||
LOGIC_OPTIONS
|
||||
BEGIN
|
||||
|LR_T1 : TURBO_BIT = ON;
|
||||
|LR_T0 : TURBO_BIT = ON;
|
||||
|CLK_WG : TURBO_BIT = ON;
|
||||
|TG42_BUF : STYLE = WYSIWYG;
|
||||
|TG42_OUT : STYLE = WYSIWYG;
|
||||
|XHD_RD : TURBO_BIT = OFF;
|
||||
|XHD_RES : TURBO_BIT = OFF;
|
||||
|XHD_WR : TURBO_BIT = OFF;
|
||||
|XHD1_CS1 : TURBO_BIT = OFF;
|
||||
|XHD1_CS2 : TURBO_BIT = OFF;
|
||||
|XHD2_CS1 : TURBO_BIT = OFF;
|
||||
|XHD2_CS2 : TURBO_BIT = OFF;
|
||||
|10K_CLK : TURBO_BIT = OFF;
|
||||
|10K_D0 : TURBO_BIT = OFF;
|
||||
|REG_P0 : TURBO_BIT = ON;
|
||||
|REG_P1 : TURBO_BIT = ON;
|
||||
|REG_P2 : TURBO_BIT = ON;
|
||||
|TG42_BUF : TURBO_BIT = ON;
|
||||
|TG42_OUT : TURBO_BIT = ON;
|
||||
|STWG0 : TURBO_BIT = ON;
|
||||
|STWG1 : TURBO_BIT = ON;
|
||||
|STWG2 : TURBO_BIT = ON;
|
||||
|XCT0 : TURBO_BIT = ON;
|
||||
|XCT1 : TURBO_BIT = ON;
|
||||
END;
|
||||
|
||||
GLOBAL_PROJECT_DEVICE_OPTIONS
|
||||
BEGIN
|
||||
MULTIVOLT_IO = OFF;
|
||||
SECURITY_BIT = ON;
|
||||
MAX7000B_ENABLE_VREFB = OFF;
|
||||
MAX7000B_ENABLE_VREFA = OFF;
|
||||
MAX7000B_VCCIO_IOBANK2 = 3.3V;
|
||||
MAX7000B_VCCIO_IOBANK1 = 3.3V;
|
||||
CONFIG_EPROM_PULLUP_RESISTOR = ON;
|
||||
CONFIG_EPROM_USER_CODE = FFFFFFFF;
|
||||
FLEX_CONFIGURATION_EPROM = AUTO;
|
||||
MAX7000AE_ENABLE_JTAG = ON;
|
||||
MAX7000AE_USER_CODE = FFFFFFFF;
|
||||
FLEX6000_USE_LOW_VOLTAGE_CONFIGURATION_EPROM = OFF;
|
||||
FLEX10KA_USE_LOW_VOLTAGE_CONFIGURATION_EPROM = ON;
|
||||
FLEX10K_USE_LOW_VOLTAGE_CONFIGURATION_EPROM = OFF;
|
||||
FLEX6000_ENABLE_JTAG = OFF;
|
||||
CONFIG_SCHEME_FLEX_6000 = PASSIVE_SERIAL;
|
||||
MAX7000S_ENABLE_JTAG = ON;
|
||||
FLEX10K_ENABLE_LOCK_OUTPUT = OFF;
|
||||
MAX7000S_USER_CODE = FFFF;
|
||||
CONFIG_SCHEME_10K = PASSIVE_SERIAL;
|
||||
FLEX10K_JTAG_USER_CODE = 7F;
|
||||
ENABLE_INIT_DONE_OUTPUT = OFF;
|
||||
ENABLE_CHIP_WIDE_OE = OFF;
|
||||
ENABLE_CHIP_WIDE_RESET = OFF;
|
||||
nCEO = UNRESERVED;
|
||||
CLKUSR = UNRESERVED;
|
||||
ADD17 = UNRESERVED;
|
||||
ADD16 = UNRESERVED;
|
||||
ADD15 = UNRESERVED;
|
||||
ADD14 = UNRESERVED;
|
||||
ADD13 = UNRESERVED;
|
||||
ADD0_TO_ADD12 = UNRESERVED;
|
||||
SDOUT = RESERVED_DRIVES_OUT;
|
||||
RDCLK = UNRESERVED;
|
||||
RDYnBUSY = UNRESERVED;
|
||||
nWS_nRS_nCS_CS = UNRESERVED;
|
||||
DATA1_TO_DATA7 = UNRESERVED;
|
||||
DATA0 = RESERVED_TRI_STATED;
|
||||
FLEX8000_ENABLE_JTAG = OFF;
|
||||
CONFIG_SCHEME = ACTIVE_SERIAL;
|
||||
DISABLE_TIME_OUT = OFF;
|
||||
ENABLE_DCLK_OUTPUT = OFF;
|
||||
RELEASE_CLEARS = OFF;
|
||||
AUTO_RESTART = OFF;
|
||||
USER_CLOCK = OFF;
|
||||
RESERVED_PINS_PERCENT = 0;
|
||||
RESERVED_LCELLS_PERCENT = 0;
|
||||
END;
|
||||
|
||||
GLOBAL_PROJECT_SYNTHESIS_ASSIGNMENT_OPTIONS
|
||||
BEGIN
|
||||
STYLE = NORMAL;
|
||||
AUTO_GLOBAL_CLEAR = OFF;
|
||||
AUTO_GLOBAL_CLOCK = OFF;
|
||||
DEVICE_FAMILY = MAX7000S;
|
||||
MULTI_LEVEL_SYNTHESIS_MAX9000 = ON;
|
||||
AUTO_IMPLEMENT_IN_EAB = OFF;
|
||||
AUTO_OPEN_DRAIN_PINS = ON;
|
||||
ONE_HOT_STATE_MACHINE_ENCODING = OFF;
|
||||
AUTO_REGISTER_PACKING = OFF;
|
||||
AUTO_FAST_IO = OFF;
|
||||
AUTO_GLOBAL_OE = ON;
|
||||
AUTO_GLOBAL_PRESET = ON;
|
||||
MULTI_LEVEL_SYNTHESIS_MAX5000_7000 = OFF;
|
||||
OPTIMIZE_FOR_SPEED = 5;
|
||||
END;
|
||||
|
||||
COMPILER_PROCESSING_CONFIGURATION
|
||||
BEGIN
|
||||
FITTER_SETTINGS = ADVANCED;
|
||||
USE_QUARTUS_FITTER = OFF;
|
||||
PRESERVE_ALL_NODE_NAME_SYNONYMS = OFF;
|
||||
SMART_RECOMPILE = OFF;
|
||||
GENERATE_AHDL_TDO_FILE = OFF;
|
||||
RPT_FILE_USER_ASSIGNMENTS = ON;
|
||||
RPT_FILE_LCELL_INTERCONNECT = ON;
|
||||
RPT_FILE_HIERARCHY = ON;
|
||||
RPT_FILE_EQUATIONS = ON;
|
||||
LINKED_SNF_EXTRACTOR = OFF;
|
||||
OPTIMIZE_TIMING_SNF = OFF;
|
||||
TIMING_SNF_EXTRACTOR = ON;
|
||||
FUNCTIONAL_SNF_EXTRACTOR = OFF;
|
||||
DESIGN_DOCTOR_RULES = EPLD;
|
||||
DESIGN_DOCTOR = OFF;
|
||||
END;
|
||||
|
||||
COMPILER_INTERFACES_CONFIGURATION
|
||||
BEGIN
|
||||
NETLIST_OUTPUT_TIME_SCALE = 0.1ns;
|
||||
EDIF_INPUT_SHOW_LMF_MAPPING_MESSAGES = OFF;
|
||||
EDIF_BUS_DELIMITERS = [];
|
||||
EDIF_FLATTEN_BUS = OFF;
|
||||
EDIF_OUTPUT_FORCE_0NS_DELAYS = OFF;
|
||||
EDIF_OUTPUT_INCLUDE_SPECIAL_PRIM = OFF;
|
||||
EDIF_OUTPUT_MAP_ILLEGAL_CHAR = OFF;
|
||||
EDIF_OUTPUT_DELAY_CONSTRUCTS = EDO_FILE;
|
||||
EDIF_OUTPUT_USE_EDC = OFF;
|
||||
EDIF_INPUT_USE_LMF2 = OFF;
|
||||
EDIF_INPUT_USE_LMF1 = OFF;
|
||||
EDIF_OUTPUT_GND = GND;
|
||||
EDIF_OUTPUT_VCC = VCC;
|
||||
EDIF_INPUT_GND = GND;
|
||||
EDIF_INPUT_VCC = VCC;
|
||||
EDIF_OUTPUT_EDC_FILE = *.edc;
|
||||
EDIF_INPUT_LMF2 = *.lmf;
|
||||
EDIF_INPUT_LMF1 = *.lmf;
|
||||
VHDL_GENERATE_CONFIGURATION_DECLARATION = OFF;
|
||||
VHDL_OUTPUT_DELAY_CONSTRUCTS = VHO_FILE;
|
||||
VERILOG_OUTPUT_DELAY_CONSTRUCTS = VO_FILE;
|
||||
VHDL_FLATTEN_BUS = OFF;
|
||||
VERILOG_FLATTEN_BUS = OFF;
|
||||
EDIF_TRUNCATE_HIERARCHY_PATH = OFF;
|
||||
VHDL_TRUNCATE_HIERARCHY_PATH = OFF;
|
||||
VERILOG_TRUNCATE_HIERARCHY_PATH = OFF;
|
||||
VERILOG_OUTPUT_MAP_ILLEGAL_CHAR = OFF;
|
||||
VHDL_WRITER_VERSION = VHDL87;
|
||||
VHDL_READER_VERSION = VHDL87;
|
||||
SYNOPSYS_MAPPING_EFFORT = MEDIUM;
|
||||
SYNOPSYS_BOUNDARY_OPTIMIZATION = OFF;
|
||||
SYNOPSYS_HIERARCHICAL_COMPILATION = ON;
|
||||
SYNOPSYS_DESIGNWARE = OFF;
|
||||
SYNOPSYS_COMPILER = DESIGN;
|
||||
USE_SYNOPSYS_SYNTHESIS = OFF;
|
||||
VHDL_NETLIST_WRITER = OFF;
|
||||
VERILOG_NETLIST_WRITER = OFF;
|
||||
XNF_GENERATE_AHDL_TDX_FILE = ON;
|
||||
XNF_TRANSLATE_INTERNAL_NODE_NAMES = ON;
|
||||
XNF_EMULATE_TRI_STATE_BUSES = INTERNAL_LOGIC;
|
||||
EDIF_OUTPUT_VERSION = 200;
|
||||
EDIF_NETLIST_WRITER = OFF;
|
||||
END;
|
||||
|
||||
CUSTOM_DESIGN_DOCTOR_RULES
|
||||
BEGIN
|
||||
MASTER_RESET = OFF;
|
||||
EXPANDER_NETWORKS = ON;
|
||||
RACE_CONDITIONS = ON;
|
||||
DELAY_CHAINS = ON;
|
||||
ASYNCHRONOUS_INPUTS = ON;
|
||||
PRESET_CLEAR_NETWORKS = ON;
|
||||
STATIC_HAZARDS_AFTER_SYNTHESIS = OFF;
|
||||
STATIC_HAZARDS_BEFORE_SYNTHESIS = ON;
|
||||
MULTI_CLOCK_NETWORKS = ON;
|
||||
MULTI_LEVEL_CLOCKS = ON;
|
||||
GATED_CLOCKS = ON;
|
||||
RIPPLE_CLOCKS = ON;
|
||||
END;
|
||||
|
||||
SIMULATOR_CONFIGURATION
|
||||
BEGIN
|
||||
END_TIME = 25.0us;
|
||||
BIDIR_PIN = STRONG;
|
||||
START_TIME = 0.0ns;
|
||||
GLITCH_TIME = 0.0ns;
|
||||
GLITCH = OFF;
|
||||
OSCILLATION_TIME = 0.0ns;
|
||||
OSCILLATION = OFF;
|
||||
CHECK_OUTPUTS = OFF;
|
||||
SETUP_HOLD = OFF;
|
||||
USE_DEVICE = OFF;
|
||||
END;
|
||||
|
||||
TIMING_ANALYZER_CONFIGURATION
|
||||
BEGIN
|
||||
ANALYSIS_MODE = REGISTERED_PERFORMANCE;
|
||||
CUT_OFF_RAM_REGISTERED_WE_PATHS = OFF;
|
||||
LIST_PATH_FREQUENCY = 10MHz;
|
||||
LIST_PATH_COUNT = 10;
|
||||
REGISTERED_PERFORMANCE_OPTIONS = NUMBER_OF_PATHS;
|
||||
INCLUDE_PATHS_LESS_THAN_VALUE = 214.7483647ms;
|
||||
INCLUDE_PATHS_LESS_THAN = OFF;
|
||||
INCLUDE_PATHS_GREATER_THAN_VALUE = 0.0ns;
|
||||
INCLUDE_PATHS_GREATER_THAN = OFF;
|
||||
DELAY_MATRIX_OPTIONS = SHOW_ALL_PATHS;
|
||||
CELL_WIDTH = 18;
|
||||
LIST_ONLY_LONGEST_PATH = ON;
|
||||
CUT_OFF_CLEAR_AND_PRESET_PATHS = ON;
|
||||
CUT_OFF_IO_PIN_FEEDBACK = ON;
|
||||
AUTO_RECALCULATE = OFF;
|
||||
END;
|
||||
|
||||
OTHER_CONFIGURATION
|
||||
BEGIN
|
||||
LAST_MAXPLUS2_VERSION = 10.0;
|
||||
ROW_PINS_LCELL_INSERT = ON;
|
||||
CARRY_OUT_PINS_LCELL_INSERT = OFF;
|
||||
NORMAL_LCELL_INSERT = ON;
|
||||
EXPLICIT_FAMILY = 1;
|
||||
FLEX_10K_52_COLUMNS = 40;
|
||||
DEFAULT_9K_EXP_PER_LCELL = 1/2;
|
||||
LOCAL_INTERCONNECT_PER_LAB_PERCENT = 100;
|
||||
LCELLS_PER_ROW_PERCENT = 100;
|
||||
FAN_IN_PER_LCELL_PERCENT = 100;
|
||||
EXP_PER_LCELL_PERCENT = 100;
|
||||
ROW_PINS_PERCENT = 50;
|
||||
ORIGINAL_MAXPLUS2_VERSION = 9.6;
|
||||
COMPILER_DATA = "1,1,0,1,0,0,0,1,1,1,1,0,1,1,1";
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE NORMAL.MAX5000
|
||||
BEGIN
|
||||
REGISTER_OPTIMIZATION = ON;
|
||||
RESYNTHESIZE_NETWORK = ON;
|
||||
MULTI_LEVEL_FACTORING = ON;
|
||||
SUBFACTOR_EXTRACTION = ON;
|
||||
REFACTORIZATION = ON;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = ON;
|
||||
REDUCE_LOGIC = ON;
|
||||
DECOMPOSE_GATES = ON;
|
||||
SOFT_BUFFER_INSERTION = ON;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
MINIMIZATION = FULL;
|
||||
FAST_IO = OFF;
|
||||
IGNORE_SOFT_BUFFERS = OFF;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
TURBO_BIT = OFF;
|
||||
XOR_SYNTHESIS = ON;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE NORMAL.MAX7000
|
||||
BEGIN
|
||||
TURBO_BIT = ON;
|
||||
REGISTER_OPTIMIZATION = ON;
|
||||
RESYNTHESIZE_NETWORK = ON;
|
||||
MULTI_LEVEL_FACTORING = ON;
|
||||
SUBFACTOR_EXTRACTION = ON;
|
||||
REFACTORIZATION = ON;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = ON;
|
||||
REDUCE_LOGIC = ON;
|
||||
DECOMPOSE_GATES = ON;
|
||||
SOFT_BUFFER_INSERTION = ON;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
MINIMIZATION = FULL;
|
||||
FAST_IO = OFF;
|
||||
IGNORE_SOFT_BUFFERS = OFF;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
XOR_SYNTHESIS = ON;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE NORMAL.CLASSIC
|
||||
BEGIN
|
||||
REGISTER_OPTIMIZATION = OFF;
|
||||
RESYNTHESIZE_NETWORK = ON;
|
||||
MULTI_LEVEL_FACTORING = OFF;
|
||||
SUBFACTOR_EXTRACTION = OFF;
|
||||
REFACTORIZATION = OFF;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = OFF;
|
||||
REDUCE_LOGIC = OFF;
|
||||
DECOMPOSE_GATES = ON;
|
||||
SOFT_BUFFER_INSERTION = ON;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
MINIMIZATION = FULL;
|
||||
FAST_IO = OFF;
|
||||
IGNORE_SOFT_BUFFERS = OFF;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
TURBO_BIT = ON;
|
||||
XOR_SYNTHESIS = OFF;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE NORMAL.FLEX8000
|
||||
BEGIN
|
||||
CARRY_CHAIN_LENGTH = 32;
|
||||
CASCADE_CHAIN_LENGTH = 2;
|
||||
REGISTER_OPTIMIZATION = ON;
|
||||
RESYNTHESIZE_NETWORK = ON;
|
||||
MULTI_LEVEL_FACTORING = ON;
|
||||
SUBFACTOR_EXTRACTION = ON;
|
||||
REFACTORIZATION = ON;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = ON;
|
||||
REDUCE_LOGIC = ON;
|
||||
DECOMPOSE_GATES = ON;
|
||||
SOFT_BUFFER_INSERTION = ON;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
MINIMIZATION = FULL;
|
||||
IGNORE_SOFT_BUFFERS = ON;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
TURBO_BIT = OFF;
|
||||
XOR_SYNTHESIS = OFF;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE FAST.MAX5000
|
||||
BEGIN
|
||||
REGISTER_OPTIMIZATION = ON;
|
||||
RESYNTHESIZE_NETWORK = ON;
|
||||
MULTI_LEVEL_FACTORING = ON;
|
||||
SUBFACTOR_EXTRACTION = OFF;
|
||||
REFACTORIZATION = OFF;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = ON;
|
||||
REDUCE_LOGIC = ON;
|
||||
DECOMPOSE_GATES = ON;
|
||||
SOFT_BUFFER_INSERTION = ON;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
MINIMIZATION = FULL;
|
||||
FAST_IO = OFF;
|
||||
IGNORE_SOFT_BUFFERS = OFF;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
TURBO_BIT = OFF;
|
||||
XOR_SYNTHESIS = ON;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE FAST.MAX7000
|
||||
BEGIN
|
||||
TURBO_BIT = ON;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
XOR_SYNTHESIS = ON;
|
||||
REGISTER_OPTIMIZATION = ON;
|
||||
RESYNTHESIZE_NETWORK = ON;
|
||||
MULTI_LEVEL_FACTORING = ON;
|
||||
SUBFACTOR_EXTRACTION = OFF;
|
||||
REFACTORIZATION = OFF;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = ON;
|
||||
REDUCE_LOGIC = ON;
|
||||
DECOMPOSE_GATES = ON;
|
||||
SOFT_BUFFER_INSERTION = ON;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
MINIMIZATION = FULL;
|
||||
FAST_IO = OFF;
|
||||
IGNORE_SOFT_BUFFERS = OFF;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
PARALLEL_EXPANDERS = ON;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE FAST.CLASSIC
|
||||
BEGIN
|
||||
REGISTER_OPTIMIZATION = OFF;
|
||||
RESYNTHESIZE_NETWORK = ON;
|
||||
MULTI_LEVEL_FACTORING = OFF;
|
||||
SUBFACTOR_EXTRACTION = OFF;
|
||||
REFACTORIZATION = OFF;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = OFF;
|
||||
REDUCE_LOGIC = OFF;
|
||||
DECOMPOSE_GATES = ON;
|
||||
SOFT_BUFFER_INSERTION = ON;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
MINIMIZATION = FULL;
|
||||
FAST_IO = OFF;
|
||||
IGNORE_SOFT_BUFFERS = OFF;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
TURBO_BIT = ON;
|
||||
XOR_SYNTHESIS = OFF;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE FAST.FLEX8000
|
||||
BEGIN
|
||||
CARRY_CHAIN_LENGTH = 32;
|
||||
CASCADE_CHAIN_LENGTH = 2;
|
||||
REGISTER_OPTIMIZATION = ON;
|
||||
RESYNTHESIZE_NETWORK = ON;
|
||||
MULTI_LEVEL_FACTORING = ON;
|
||||
SUBFACTOR_EXTRACTION = OFF;
|
||||
REFACTORIZATION = OFF;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = ON;
|
||||
REDUCE_LOGIC = ON;
|
||||
DECOMPOSE_GATES = ON;
|
||||
SOFT_BUFFER_INSERTION = ON;
|
||||
CARRY_CHAIN = AUTO;
|
||||
CASCADE_CHAIN = AUTO;
|
||||
MINIMIZATION = FULL;
|
||||
IGNORE_SOFT_BUFFERS = ON;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
TURBO_BIT = OFF;
|
||||
XOR_SYNTHESIS = OFF;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE WYSIWYG.MAX5000
|
||||
BEGIN
|
||||
REGISTER_OPTIMIZATION = OFF;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
RESYNTHESIZE_NETWORK = OFF;
|
||||
MULTI_LEVEL_FACTORING = OFF;
|
||||
SUBFACTOR_EXTRACTION = OFF;
|
||||
REFACTORIZATION = OFF;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = OFF;
|
||||
REDUCE_LOGIC = OFF;
|
||||
DECOMPOSE_GATES = OFF;
|
||||
SOFT_BUFFER_INSERTION = OFF;
|
||||
FAST_IO = OFF;
|
||||
IGNORE_SOFT_BUFFERS = OFF;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
TURBO_BIT = OFF;
|
||||
XOR_SYNTHESIS = OFF;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
MINIMIZATION = PARTIAL;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE WYSIWYG.MAX7000
|
||||
BEGIN
|
||||
REGISTER_OPTIMIZATION = OFF;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
RESYNTHESIZE_NETWORK = OFF;
|
||||
MULTI_LEVEL_FACTORING = OFF;
|
||||
SUBFACTOR_EXTRACTION = OFF;
|
||||
REFACTORIZATION = OFF;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = OFF;
|
||||
REDUCE_LOGIC = OFF;
|
||||
DECOMPOSE_GATES = OFF;
|
||||
SOFT_BUFFER_INSERTION = OFF;
|
||||
FAST_IO = OFF;
|
||||
IGNORE_SOFT_BUFFERS = OFF;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
TURBO_BIT = ON;
|
||||
XOR_SYNTHESIS = OFF;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
MINIMIZATION = PARTIAL;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE WYSIWYG.CLASSIC
|
||||
BEGIN
|
||||
REGISTER_OPTIMIZATION = OFF;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
RESYNTHESIZE_NETWORK = ON;
|
||||
MULTI_LEVEL_FACTORING = OFF;
|
||||
SUBFACTOR_EXTRACTION = OFF;
|
||||
REFACTORIZATION = OFF;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = OFF;
|
||||
REDUCE_LOGIC = OFF;
|
||||
DECOMPOSE_GATES = ON;
|
||||
SOFT_BUFFER_INSERTION = OFF;
|
||||
FAST_IO = OFF;
|
||||
IGNORE_SOFT_BUFFERS = OFF;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
TURBO_BIT = ON;
|
||||
XOR_SYNTHESIS = OFF;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
MINIMIZATION = PARTIAL;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE WYSIWYG.FLEX8000
|
||||
BEGIN
|
||||
REGISTER_OPTIMIZATION = OFF;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
RESYNTHESIZE_NETWORK = OFF;
|
||||
MULTI_LEVEL_FACTORING = OFF;
|
||||
SUBFACTOR_EXTRACTION = OFF;
|
||||
REFACTORIZATION = OFF;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = OFF;
|
||||
REDUCE_LOGIC = OFF;
|
||||
DECOMPOSE_GATES = OFF;
|
||||
SOFT_BUFFER_INSERTION = ON;
|
||||
IGNORE_SOFT_BUFFERS = ON;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
TURBO_BIT = OFF;
|
||||
XOR_SYNTHESIS = OFF;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
MINIMIZATION = PARTIAL;
|
||||
CARRY_CHAIN_LENGTH = 32;
|
||||
CARRY_CHAIN = MANUAL;
|
||||
CASCADE_CHAIN_LENGTH = 2;
|
||||
CASCADE_CHAIN = MANUAL;
|
||||
END;
|
||||
|
||||
BIN
src/altera/max/7064/SP2_MAX.SCF
Normal file
BIN
src/altera/max/7064/SP2_MAX.SCF
Normal file
Binary file not shown.
470
src/altera/max/7064/SP2_MAX.TDF
Normal file
470
src/altera/max/7064/SP2_MAX.TDF
Normal file
@ -0,0 +1,470 @@
|
||||
|
||||
TITLE "SINC_controller";
|
||||
|
||||
PARAMETERS
|
||||
(
|
||||
G_MODE = 1, -- 1 on LCELL, 0 - on EXP
|
||||
|
||||
NUM = "NO",
|
||||
NUMBER1 = B"00100000X", -- 0 - sinc
|
||||
NUMBER2 = B"00110111X", -- 7
|
||||
NUMBER3 = B"01001101X", -- D
|
||||
NUMBER4 = B"01010010X", -- 2
|
||||
NUMBER5 = B"00100000X", --
|
||||
NUMBER6 = B"00100000X", --
|
||||
NUMBER7 = B"00100000X" --
|
||||
);
|
||||
|
||||
SUBDESIGN SP2_MAX
|
||||
(
|
||||
|
||||
TG42_IN : INPUT;
|
||||
TG42_OUT : OUTPUT;
|
||||
TG42_BUF : OUTPUT;
|
||||
CLKZZ : BIDIR;
|
||||
CLK14 : OUTPUT;
|
||||
|
||||
AUD : OUTPUT; -- clk for timers
|
||||
BEEP : OUTPUT;
|
||||
|
||||
CMOS_DRD : OUTPUT;
|
||||
CMOS_AS : OUTPUT;
|
||||
CMOS_DWR : OUTPUT;
|
||||
|
||||
WR_PDOS : OUTPUT;
|
||||
WD : INPUT;
|
||||
WSTB : INPUT;
|
||||
SR,SL : INPUT;
|
||||
RSTB : INPUT;
|
||||
TR43 : INPUT;
|
||||
CLK_WG : OUTPUT;
|
||||
FDAT : OUTPUT;
|
||||
QDAT : OUTPUT;
|
||||
RDAT : INPUT;
|
||||
/WG_WR : OUTPUT;
|
||||
/WG_RD : OUTPUT;
|
||||
STE : INPUT;
|
||||
DENS_X : OUTPUT;
|
||||
WDAT : OUTPUT;
|
||||
|
||||
|
||||
-- XA[2..0] : BIDIR;
|
||||
XA[2..0] : INPUT;
|
||||
XACS : INPUT;
|
||||
-- SINC_1 : OUTPUT;
|
||||
SINC_1 : BIDIR;
|
||||
SINC_2 : BIDIR;
|
||||
|
||||
HDD_C[3..0] : INPUT;
|
||||
FDD_C[2..0] : INPUT;
|
||||
|
||||
HD_DIR : OUTPUT;
|
||||
HD_CS : OUTPUT;
|
||||
|
||||
/CONF_X : BIDIR;
|
||||
10K_CLK : OUTPUT;
|
||||
WR_CNF : INPUT;
|
||||
10K_D0 : OUTPUT;
|
||||
D0 : INPUT;
|
||||
|
||||
VGA_IN : INPUT;
|
||||
-- WR_COL : INPUT;
|
||||
SINC_V : OUTPUT;
|
||||
SINC_H : OUTPUT;
|
||||
SINC : OUTPUT;
|
||||
SINC_IN : INPUT;
|
||||
|
||||
XHD_RES : OUTPUT;
|
||||
XHD_WR : OUTPUT;
|
||||
XHD_RD : OUTPUT;
|
||||
|
||||
XHD1_CS[2..1] : OUTPUT;
|
||||
XHD2_CS[2..1] : OUTPUT;
|
||||
XHR_RDY : INPUT;
|
||||
|
||||
EPM_RES : INPUT;
|
||||
PW_GOOD : INPUT;
|
||||
|
||||
GND65 : INPUT;
|
||||
GND33 : INPUT;
|
||||
|
||||
)
|
||||
VARIABLE
|
||||
|
||||
XCT[2..0] : DFF;
|
||||
CNF_ON : NODE;
|
||||
CNF_OFF : NODE;
|
||||
|
||||
CLK42 : NODE;
|
||||
|
||||
CT[3..0] : DFF;
|
||||
CTH[5..0] : DFF;
|
||||
CTV[8..0] : DFFE;
|
||||
|
||||
SINC_HT : DFF;
|
||||
SINC_VT : DFFE;
|
||||
|
||||
TURBING : NODE;
|
||||
FDD_1440 : NODE;
|
||||
NFDD_1440 : NODE;
|
||||
|
||||
CT_WG : NODE;
|
||||
CT_WG1 : NODE;
|
||||
|
||||
STWG[2..0] : DFF;
|
||||
CLK_PRC : NODE;
|
||||
WGR[4..0] : DFF;
|
||||
RDAT_X : NODE;
|
||||
|
||||
REG_P[2..0] : DFF;
|
||||
|
||||
/RESET : NODE;
|
||||
|
||||
|
||||
S144,S720 : NODE;
|
||||
|
||||
SHDD1,SHDD2 : NODE;
|
||||
THDD : NODE;
|
||||
NTHDD : NODE;
|
||||
|
||||
NO_HDD : NODE;
|
||||
|
||||
S320,S312 : NODE;
|
||||
T320 : NODE;
|
||||
NT320 : NODE;
|
||||
|
||||
SOFT_RESET : NODE;
|
||||
SOFT_RESET2 : NODE;
|
||||
|
||||
HDD_CLK : NODE;
|
||||
|
||||
LR_T[1..0] : DFF;
|
||||
|
||||
EXP_X : NODE;
|
||||
EXP_Y : NODE;
|
||||
|
||||
CTV8M : DFF;
|
||||
|
||||
CTV8C : NODE;
|
||||
|
||||
FN_NUM : NODE;
|
||||
|
||||
BEGIN
|
||||
|
||||
/RESET = DFF((EPM_RES & XHD_RES),!CT3,SOFT_RESET,);
|
||||
|
||||
-- /RESET = (EXP(!EPM_RES & EXP(EXP(EXP(EPM_RES)))) & SOFT_RESET);
|
||||
|
||||
EXP_X = EXP(TG42_IN);
|
||||
EXP_Y = EXP(TG42_IN);
|
||||
|
||||
IF (G_MODE == 0) GENERATE
|
||||
TG42_OUT = LCELL(EXP_X);
|
||||
ELSE GENERATE
|
||||
TG42_OUT = LCELL(TG42_BUF);
|
||||
END GENERATE;
|
||||
|
||||
TG42_BUF = LCELL(!TG42_IN);
|
||||
|
||||
CLK42 = TG42_IN;
|
||||
|
||||
-- CT[].clk = CLK14;
|
||||
CT[].clk = XCT1;
|
||||
CT[] = CT[] + 1;
|
||||
|
||||
-- === horizontal sinc =====
|
||||
|
||||
CTH[].clk = !CT3;
|
||||
SINC_HT.clk = !CT3;
|
||||
|
||||
IF !((CTH[] == B"XXXX11") & SINC_HT) THEN
|
||||
CTH[] = CTH[] + 1;
|
||||
ELSE
|
||||
CTH[] = GND;
|
||||
END IF;
|
||||
|
||||
-- SINC_1 = CTH5;
|
||||
SINC_1 = TRI(CTH5,VCC);
|
||||
SINC_2 = TRI(CTV8,VCC);
|
||||
|
||||
SINC_HT.d = (CTH[] == B"1101XX");
|
||||
|
||||
SINC_H = SINC_HT;
|
||||
|
||||
-- === vertical sinc =======
|
||||
|
||||
-- CTV[].clk = !CT3;
|
||||
-- SINC_VT.clk = !CT3;
|
||||
|
||||
CTV[].clk = SINC_HT;
|
||||
SINC_VT.clk = SINC_HT;
|
||||
|
||||
CTV8M.clk = SINC_HT;
|
||||
|
||||
-- CTV[].ena = (CTH[] == B"110111");
|
||||
-- SINC_VT.ena = (CTH[] == B"110111");
|
||||
CTV[].ena = VCC;
|
||||
SINC_VT.ena = VCC;
|
||||
|
||||
-- IF (CTV[] == B"100111111") THEN
|
||||
|
||||
IF (NUM == "YES") GENERATE
|
||||
|
||||
FN_NUM =(
|
||||
(CTV[8..0] == NUMBER1) or
|
||||
(CTV[8..0] == NUMBER2) or
|
||||
(CTV[8..0] == NUMBER3) or
|
||||
(CTV[8..0] == NUMBER4) or
|
||||
(CTV[8..0] == NUMBER5) or
|
||||
(CTV[8..0] == NUMBER6) or
|
||||
(CTV[8..0] == NUMBER7)
|
||||
) & !NO_HDD;
|
||||
|
||||
ELSE GENERATE
|
||||
|
||||
FN_NUM = GND;
|
||||
|
||||
END GENERATE;
|
||||
|
||||
|
||||
IF EXP((CTV[] == B"XXXXXXX11") & SINC_VT) THEN
|
||||
|
||||
(CTV[8..0]) = ((CTV[8..0]) + 1) xor (CTV8M,B"00000000");
|
||||
CTV8M = FN_NUM;
|
||||
|
||||
ELSE
|
||||
CTV[7..0] = GND;
|
||||
CTV8M = GND;
|
||||
CTV8 = GND;
|
||||
END IF;
|
||||
|
||||
SINC_VT.d = ((CTV[8..0] == B"1001111XX") or ((CTV[8..0] == B"1001101XX")) & NT320);
|
||||
|
||||
SINC_V = SINC_VT;
|
||||
|
||||
SINC = SINC_V xor SINC_H;
|
||||
|
||||
-- =============================
|
||||
|
||||
-- =========================================
|
||||
-- divide by 6
|
||||
|
||||
XCT[].clk = (TG42_IN xor !XCT1);
|
||||
XCT[].d = XCT[] + 1;
|
||||
|
||||
-- CLKZZ = 14 MHz
|
||||
|
||||
CLKZZ = TRI(XCT1,CNF_OFF);
|
||||
CLK14 = DFF(!CLK14,XCT0,,);
|
||||
|
||||
-- test exists
|
||||
|
||||
-- CNF_OFF = EXP(CNF_ON & /RESET);
|
||||
-- CNF_ON = EXP(CNF_OFF & XACS);
|
||||
|
||||
CNF_OFF = DFF(GND,GND,XACS,/RESET);
|
||||
CNF_ON = !CNF_OFF;
|
||||
|
||||
-- =========================================
|
||||
|
||||
-- ======== FDD controller ==================
|
||||
|
||||
TURBING = EXP(EXP(TURBING & !WSTB & !RSTB) & !STE & NFDD_1440);
|
||||
-- TURBING = GND;
|
||||
|
||||
CT_WG = TFF(VCC,(XCT1 xor (CT_WG & TURBING)),,);
|
||||
|
||||
STWG[].clk = (CT_WG xor STWG2);
|
||||
STWG[].d = STWG[] + 1;
|
||||
|
||||
CLK_WG = STWG2;
|
||||
|
||||
-- CLK_PRC = STWG0;
|
||||
CLK_PRC = CT_WG;
|
||||
|
||||
CT_WG1 = EXP(EXP(XCT1 & FDD_1440) & EXP(CT0 & NFDD_1440));
|
||||
|
||||
WGR[].clk = CT_WG1;
|
||||
|
||||
IF !FDAT THEN
|
||||
TABLE WGR[3..0] => WGR[3..0].d;
|
||||
0 => 4; 1 => 5; 2 => 4; 3 => 5;
|
||||
4 => 6; 5 => 7; 6 => 8; 7 => 8;
|
||||
8 => 9; 9 => 9; 10 => 10; 11 => 11;
|
||||
12 => 12; 13 => 13; 14 => 14; 15 => 15;
|
||||
END TABLE;
|
||||
WGR4.d = WGR4;
|
||||
ELSE
|
||||
IF WGR[3..0] == 0 THEN
|
||||
WGR[3..0].d = 3;
|
||||
WGR4.d = WGR4;
|
||||
ELSE
|
||||
WGR[].d = WGR[] + 1;
|
||||
END IF;
|
||||
END IF;
|
||||
|
||||
QDAT = WGR4;
|
||||
RDAT_X = EXP(EXP(RDAT_X & EXP(!RDAT & !CT_WG1)) & EXP(RDAT & !CT_WG1));
|
||||
-- FDAT = DFF((RDAT_X or !DFF(RDAT_X,CT_WG1,,)),CT_WG1,,);
|
||||
FDAT = DFF((RDAT_X or EXP(DFF(RDAT_X,CT_WG1,,))),CT_WG1,,);
|
||||
-- ==========================================================
|
||||
-- now not complete!
|
||||
|
||||
AUD = CT3;
|
||||
BEEP = GND;
|
||||
|
||||
-- /CONF_X = TRI(GND,!/RESET);
|
||||
|
||||
/CONF_X = OPNDRN(/RESET);
|
||||
|
||||
-- 10K_CLK = WR_CNF; -- now not protect!
|
||||
|
||||
10K_CLK = DFF((WR_CNF & CNF_OFF) or ((HDD_C0 or FDD_C2) & CNF_ON),CLK42,,);
|
||||
|
||||
10K_D0 = DFFE(D0,10K_CLK,S720,(S144 & /RESET),CNF_OFF);
|
||||
|
||||
DENS_X = VCC;
|
||||
|
||||
-- === now NOT PRECOMP! =====
|
||||
|
||||
-- WDAT = WD;
|
||||
|
||||
WDAT = REG_P2;
|
||||
|
||||
REG_P[].clk = !CLK_PRC;
|
||||
|
||||
-- CASE WD IS
|
||||
-- WHEN 1 => REG_P[].d = (GND,SL,!(SL or SR),SR);
|
||||
-- WHEN 0 => REG_P[].d = (EXP(EXP(REG_P2)),REG_P[1..0],GND);
|
||||
-- END CASE;
|
||||
|
||||
-- CASE (DFF(WD,CLK_WG,,),DFF((SL & TR43),CLK_WG,,),DFF((SR & TR43),CLK_WG,,)) IS
|
||||
|
||||
LR_T[].clk = STWG2;
|
||||
-- LR_T[].clk = CLK_WG;
|
||||
|
||||
LR_T[].d = ((WD & !(SL & TR43)),(WD & !(SR & TR43)));
|
||||
|
||||
CASE LR_T[] IS
|
||||
WHEN 0 => REG_P[1..0] = (REG_P[1..0] - 1) & EXP(REG_P[1..0] == 0);
|
||||
REG_P[2] = EXP(EXP(REG_P[1..0] == 1));
|
||||
-- REG_P[2] = (REG_P[1..0] == 1);
|
||||
WHEN 1 => REG_P[1..0] = 1; REG_P[2] = GND;
|
||||
WHEN 2 => REG_P[1..0] = 3; REG_P[2] = GND;
|
||||
WHEN 3 => REG_P[1..0] = 2; REG_P[2] = GND;
|
||||
END CASE;
|
||||
%
|
||||
CASE (WD,DFF((SL & TR43),CLK_WG,,),DFF((SR & TR43),CLK_WG,,)) IS
|
||||
WHEN B"0XX" => REG_P[1..0] = (REG_P[1..0] - 1) & EXP(REG_P[1..0] == 0);
|
||||
WHEN B"100" => REG_P[1..0] = 2;
|
||||
WHEN B"110" => REG_P[1..0] = 1;
|
||||
WHEN B"101" => REG_P[1..0] = 3;
|
||||
WHEN B"111" => REG_P[1..0] = 2;
|
||||
END CASE;
|
||||
%
|
||||
|
||||
%
|
||||
CASE WD IS
|
||||
WHEN 0 => REG_P[3] = EXP(EXP(REG_P[1..0] == 1));
|
||||
WHEN 1 => REG_P[3] = GND;
|
||||
END CASE;
|
||||
%
|
||||
|
||||
-- === Port Controls ====================================
|
||||
%
|
||||
FDD_C0 - 0 - WG93 / 1 - kmps/ p_dos
|
||||
FDD_C1 - 0 - write / 1 - read
|
||||
FDD_C2 - 0 - no / 1 - CS_WG/ strobe
|
||||
|
||||
HDD_C0 - strobe
|
||||
HDD_C[2..1] = 00 - SYS_FN, 01 - SYS_FN, 10 - HDD1/2, 11 - CMOS
|
||||
HDD_C3 - 0 - HD_CS1, 1 HD_CS3 / 0 CMOS_DAT, 1 - CMOS_ADR
|
||||
|
||||
HDD_C[3..0] = 0001, FDD_C[2..1] = 00; -> FDD_C0 = 1/0 -> set 1.44/720
|
||||
HDD_C[3..0] = 1001, FDD_C[2..1] = 00; -> FDD_C0 = 1/0 -> set 320/312 lines
|
||||
HDD_C[3..0] = 0011, FDD_C[2..1] = 00; -> FDD_C0 = 1/0 -> set HDD1/HDD2
|
||||
HDD_C[3..0] = 1011, FDD_C[2..1] = 00; -> FDD_C0 = 0 -> soft_reset!
|
||||
HDD_C[3..0] = X101, FDD_C[2..1] = XX; -> HDD1/2 rd/wr
|
||||
|
||||
%
|
||||
|
||||
SOFT_RESET = !((HDD_C[] == B"1011") & (FDD_C[] == B"000"));
|
||||
SOFT_RESET2 = !((HDD_C[] == B"1011") & (FDD_C[] == B"001"));
|
||||
|
||||
-- FDD switch
|
||||
|
||||
-- NFDD_1440 = EXP(FDD_1440 & S720 & /RESET);
|
||||
-- FDD_1440 = EXP(NFDD_1440 & S144);
|
||||
FDD_1440 = 10K_D0;
|
||||
NFDD_1440 = !10K_D0;
|
||||
|
||||
S144 = EXP((HDD_C[] == B"0001") & (FDD_C[] == B"001"));
|
||||
S720 = EXP((HDD_C[] == B"0001") & (FDD_C[] == B"000"));
|
||||
|
||||
-- Screen Switch
|
||||
|
||||
T320 = EXP(NT320 & S320 & /RESET);
|
||||
NT320 = EXP(T320 & S312);
|
||||
|
||||
S312 = EXP((HDD_C[] == B"1001") & (FDD_C[] == B"001"));
|
||||
S320 = EXP((HDD_C[] == B"1001") & (FDD_C[] == B"000"));
|
||||
|
||||
-- HDD Switch
|
||||
|
||||
-- THDD = EXP(NTHDD & SHDD2 & /RESET);
|
||||
-- NTHDD = EXP(THDD & SHDD1);
|
||||
|
||||
THDD = EXP(NTHDD & NO_HDD & SHDD2 & /RESET & SOFT_RESET2);
|
||||
NTHDD = EXP(THDD & NO_HDD & SHDD1 & /RESET & SOFT_RESET2);
|
||||
NO_HDD = EXP(NTHDD & THDD & SHDD1 & SHDD2);
|
||||
|
||||
SHDD2 = EXP((HDD_C[] == B"0011") & (FDD_C[] == B"001"));
|
||||
SHDD1 = EXP((HDD_C[] == B"0011") & (FDD_C[] == B"000"));
|
||||
|
||||
-- Control signals
|
||||
|
||||
WR_PDOS = DFF(!((HDD_C[] == 0) & (FDD_C[] == B"X01")),HDD_CLK,,FDD_C2);
|
||||
/WG_WR = DFF(!((HDD_C[] == 0) & (FDD_C[] == B"X00")),HDD_CLK,,FDD_C2);
|
||||
/WG_RD = DFF(!((HDD_C[] == 0) & (FDD_C[] == B"X10")),HDD_CLK,,FDD_C2);
|
||||
|
||||
CMOS_DWR = DFF(!((HDD_C[] == B"1110") & (FDD_C[] == B"X01")),HDD_CLK,,FDD_C2);
|
||||
CMOS_AS =!DFF(!((HDD_C[] == B"0110") & (FDD_C[] == B"X01")),HDD_CLK,,FDD_C2);
|
||||
CMOS_DRD = DFF(!((HDD_C[] == B"1110") & (FDD_C[] == B"X10")),HDD_CLK,,FDD_C2);
|
||||
|
||||
-- HD_DIR = !HDD_C1; -- ????????????
|
||||
HD_DIR = XHD_RD;
|
||||
|
||||
-- HD_CS = GND;
|
||||
HD_CS = CTV8M;
|
||||
|
||||
-- HD_CS = !/RESET;
|
||||
|
||||
-- XHD_RES = VCC;
|
||||
|
||||
XHD_RES = DFF(PW_GOOD,SINC_V,,);
|
||||
|
||||
-- XHD_WR = DFF((!(HDD_C[] == B"X101") or FDD_C1),CLK42,,);
|
||||
-- XHD_RD = DFF((!(HDD_C[] == B"X101") or !FDD_C1),CLK42,,);
|
||||
|
||||
-- HDD_CLK = EXP(EXP(HDD_C0));
|
||||
HDD_CLK = 10K_CLK;
|
||||
|
||||
-- XHD_WR = DFF((!(HDD_C[] == B"X101") or FDD_C1 or !HDD_CLK),CLK42,,HDD_C0);
|
||||
-- XHD_RD = DFF((!(HDD_C[] == B"X101") or !FDD_C1 or !HDD_CLK),CLK42,,HDD_C0);
|
||||
XHD_WR = DFF((!(HDD_C[] == B"X101") or FDD_C1),HDD_CLK,,HDD_C0);
|
||||
XHD_RD = DFF((!(HDD_C[] == B"X101") or !FDD_C1),HDD_CLK,,HDD_C0);
|
||||
|
||||
-- XHD1_CS1 = DFF(!((HDD_C[] == B"010X") & NTHDD),CLK42,,);
|
||||
-- XHD1_CS2 = DFF(!((HDD_C[] == B"110X") & NTHDD),CLK42,,);
|
||||
|
||||
-- XHD2_CS1 = DFF(!((HDD_C[] == B"010X") & THDD),CLK42,,);
|
||||
-- XHD2_CS2 = DFF(!((HDD_C[] == B"110X") & THDD),CLK42,,);
|
||||
|
||||
XHD1_CS1 = DFF((!(HDD_C[] == B"010X") or THDD),CLK42,,);
|
||||
XHD1_CS2 = DFF((!(HDD_C[] == B"110X") or THDD),CLK42,,);
|
||||
|
||||
XHD2_CS1 = DFF((!(HDD_C[] == B"010X") or NTHDD),CLK42,,);
|
||||
XHD2_CS2 = DFF((!(HDD_C[] == B"110X") or NTHDD),CLK42,,);
|
||||
|
||||
END;
|
||||
|
||||
BIN
src/altera/max/7064/scf/SP2_MAX.SCF
Normal file
BIN
src/altera/max/7064/scf/SP2_MAX.SCF
Normal file
Binary file not shown.
653
src/altera/max/7128/SP2_MAX.ACF
Normal file
653
src/altera/max/7128/SP2_MAX.ACF
Normal file
@ -0,0 +1,653 @@
|
||||
--
|
||||
-- Copyright (C) 1988-2000 Altera Corporation
|
||||
-- Any megafunction design, and related net list (encrypted or decrypted),
|
||||
-- support information, device programming or simulation file, and any other
|
||||
-- associated documentation or information provided by Altera or a partner
|
||||
-- under Altera's Megafunction Partnership Program may be used only to
|
||||
-- program PLD devices (but not masked PLD devices) from Altera. Any other
|
||||
-- use of such megafunction design, net list, support information, device
|
||||
-- programming or simulation file, or any other related documentation or
|
||||
-- information is prohibited for any other purpose, including, but not
|
||||
-- limited to modification, reverse engineering, de-compiling, or use with
|
||||
-- any other silicon devices, unless such use is explicitly licensed under
|
||||
-- a separate agreement with Altera or a megafunction partner. Title to
|
||||
-- the intellectual property, including patents, copyrights, trademarks,
|
||||
-- trade secrets, or maskworks, embodied in any such megafunction design,
|
||||
-- net list, support information, device programming or simulation file, or
|
||||
-- any other related documentation or information provided by Altera or a
|
||||
-- megafunction partner, remains with Altera, the megafunction partner, or
|
||||
-- their respective licensors. No other licenses, including any licenses
|
||||
-- needed under any third party's intellectual property, are provided herein.
|
||||
--
|
||||
CHIP SP2_MAX
|
||||
BEGIN
|
||||
DEVICE = EPM7128STC100-10;
|
||||
|GND65 : INPUT_PIN = 65;
|
||||
|GND33 : INPUT_PIN = 33;
|
||||
|/CONF_X : BIDIR_PIN = 54;
|
||||
|10K_D0 : OUTPUT_PIN = 58;
|
||||
|CLKZZ : BIDIR_PIN = 32;
|
||||
|10K_CLK : OUTPUT_PIN = 56;
|
||||
|XHD2_CS2 : OUTPUT_PIN = 83;
|
||||
|XHD2_CS1 : OUTPUT_PIN = 81;
|
||||
|XHD1_CS2 : OUTPUT_PIN = 80;
|
||||
|XHD1_CS1 : OUTPUT_PIN = 79;
|
||||
|XHD_WR : OUTPUT_PIN = 75;
|
||||
|XHD_RES : OUTPUT_PIN = 71;
|
||||
|XHD_RD : OUTPUT_PIN = 76;
|
||||
|WR_PDOS : OUTPUT_PIN = 8;
|
||||
|/WG_WR : OUTPUT_PIN = 93;
|
||||
|/WG_RD : OUTPUT_PIN = 97;
|
||||
|WDAT : OUTPUT_PIN = 98;
|
||||
|TG42_OUT : OUTPUT_PIN = 85;
|
||||
|TG42_BUF : OUTPUT_PIN = 36;
|
||||
|SINC_2 : OUTPUT_PIN = 19;
|
||||
|SINC_1 : OUTPUT_PIN = 20;
|
||||
|SINC_V : OUTPUT_PIN = 64;
|
||||
|SINC_H : OUTPUT_PIN = 68;
|
||||
|SINC : OUTPUT_PIN = 67;
|
||||
|QDAT : OUTPUT_PIN = 16;
|
||||
|HD_DIR : OUTPUT_PIN = 48;
|
||||
|HD_CS : OUTPUT_PIN = 52;
|
||||
|FDAT : OUTPUT_PIN = 14;
|
||||
|DENS_X : OUTPUT_PIN = 96;
|
||||
|CMOS_DWR : OUTPUT_PIN = 100;
|
||||
|CMOS_DRD : OUTPUT_PIN = 99;
|
||||
|CMOS_AS : OUTPUT_PIN = 6;
|
||||
|CLK14 : OUTPUT_PIN = 31;
|
||||
|CLK_WG : OUTPUT_PIN = 13;
|
||||
|BEEP : OUTPUT_PIN = 84;
|
||||
|AUD : OUTPUT_PIN = 35;
|
||||
|XHR_RDY : INPUT_PIN = 88;
|
||||
|XA2 : INPUT_PIN = 23;
|
||||
|XA1 : INPUT_PIN = 21;
|
||||
|XA0 : INPUT_PIN = 17;
|
||||
|XACS : INPUT_PIN = 37;
|
||||
|WSTB : INPUT_PIN = 10;
|
||||
|WR_CNF : INPUT_PIN = 57;
|
||||
|WD : INPUT_PIN = 9;
|
||||
|VGA_IN : INPUT_PIN = 61;
|
||||
|TR43 : INPUT_PIN = 12;
|
||||
|TG42_IN : INPUT_PIN = 87;
|
||||
|STE : INPUT_PIN = 94;
|
||||
|SR : INPUT_PIN = 29;
|
||||
|SL : INPUT_PIN = 30;
|
||||
|SINC_IN : INPUT_PIN = 69;
|
||||
|RSTB : INPUT_PIN = 25;
|
||||
|RDAT : INPUT_PIN = 92;
|
||||
|PW_GOOD : INPUT_PIN = 90;
|
||||
|HDD_C3 : INPUT_PIN = 40;
|
||||
|HDD_C2 : INPUT_PIN = 41;
|
||||
|HDD_C1 : INPUT_PIN = 42;
|
||||
|HDD_C0 : INPUT_PIN = 47;
|
||||
|FDD_C2 : INPUT_PIN = 46;
|
||||
|FDD_C1 : INPUT_PIN = 45;
|
||||
|FDD_C0 : INPUT_PIN = 44;
|
||||
|EPM_RES : INPUT_PIN = 89;
|
||||
|D0 : INPUT_PIN = 60;
|
||||
END;
|
||||
|
||||
DEFAULT_DEVICES
|
||||
BEGIN
|
||||
AUTO_DEVICE = EPM7256SQC208-7;
|
||||
AUTO_DEVICE = EPM7256SRC208-7;
|
||||
AUTO_DEVICE = EPM7192SQC160-7;
|
||||
AUTO_DEVICE = EPM7160SQC160-6;
|
||||
AUTO_DEVICE = EPM7160STC100-6;
|
||||
AUTO_DEVICE = EPM7160SLC84-6;
|
||||
AUTO_DEVICE = EPM7128SQC160-6;
|
||||
AUTO_DEVICE = EPM7128STC100-6;
|
||||
AUTO_DEVICE = EPM7128SQC100-6;
|
||||
AUTO_DEVICE = EPM7128SLC84-6;
|
||||
AUTO_DEVICE = EPM7064STC100-5;
|
||||
AUTO_DEVICE = EPM7064SLC84-5;
|
||||
AUTO_DEVICE = EPM7064STC44-5;
|
||||
AUTO_DEVICE = EPM7064SLC44-5;
|
||||
AUTO_DEVICE = EPM7032STC44-5;
|
||||
AUTO_DEVICE = EPM7032SLC44-5;
|
||||
ASK_BEFORE_ADDING_EXTRA_DEVICES = ON;
|
||||
END;
|
||||
|
||||
TIMING_POINT
|
||||
BEGIN
|
||||
DEVICE_FOR_TIMING_SYNTHESIS = EPM7128STC100-10;
|
||||
FREQUENCY = 100MHz;
|
||||
MAINTAIN_STABLE_SYNTHESIS = OFF;
|
||||
CUT_ALL_CLEAR_PRESET = ON;
|
||||
CUT_ALL_BIDIR = ON;
|
||||
END;
|
||||
|
||||
IGNORED_ASSIGNMENTS
|
||||
BEGIN
|
||||
FIT_IGNORE_TIMING = ON;
|
||||
DEMOTE_SPECIFIC_LCELL_ASSIGNMENTS_TO_LAB_ASSIGNMENTS = OFF;
|
||||
IGNORE_LOCAL_ROUTING_ASSIGNMENTS = OFF;
|
||||
IGNORE_DEVICE_ASSIGNMENTS = OFF;
|
||||
IGNORE_LC_ASSIGNMENTS = OFF;
|
||||
IGNORE_PIN_ASSIGNMENTS = OFF;
|
||||
IGNORE_CHIP_ASSIGNMENTS = OFF;
|
||||
IGNORE_TIMING_ASSIGNMENTS = OFF;
|
||||
IGNORE_LOGIC_OPTION_ASSIGNMENTS = OFF;
|
||||
IGNORE_CLIQUE_ASSIGNMENTS = OFF;
|
||||
END;
|
||||
|
||||
LOGIC_OPTIONS
|
||||
BEGIN
|
||||
|LR_T1 : TURBO_BIT = ON;
|
||||
|LR_T0 : TURBO_BIT = ON;
|
||||
|CLK_WG : TURBO_BIT = ON;
|
||||
|TG42_BUF : STYLE = WYSIWYG;
|
||||
|TG42_OUT : STYLE = WYSIWYG;
|
||||
|XHD_RD : TURBO_BIT = OFF;
|
||||
|XHD_RES : TURBO_BIT = OFF;
|
||||
|XHD_WR : TURBO_BIT = OFF;
|
||||
|XHD1_CS1 : TURBO_BIT = OFF;
|
||||
|XHD1_CS2 : TURBO_BIT = OFF;
|
||||
|XHD2_CS1 : TURBO_BIT = OFF;
|
||||
|XHD2_CS2 : TURBO_BIT = OFF;
|
||||
|10K_CLK : TURBO_BIT = OFF;
|
||||
|10K_D0 : TURBO_BIT = OFF;
|
||||
|REG_P0 : TURBO_BIT = ON;
|
||||
|REG_P1 : TURBO_BIT = ON;
|
||||
|REG_P2 : TURBO_BIT = ON;
|
||||
|TG42_BUF : TURBO_BIT = ON;
|
||||
|TG42_OUT : TURBO_BIT = ON;
|
||||
|STWG0 : TURBO_BIT = ON;
|
||||
|STWG1 : TURBO_BIT = ON;
|
||||
|STWG2 : TURBO_BIT = ON;
|
||||
|XCT0 : TURBO_BIT = ON;
|
||||
|XCT1 : TURBO_BIT = ON;
|
||||
END;
|
||||
|
||||
GLOBAL_PROJECT_DEVICE_OPTIONS
|
||||
BEGIN
|
||||
MULTIVOLT_IO = OFF;
|
||||
SECURITY_BIT = ON;
|
||||
MAX7000B_ENABLE_VREFB = OFF;
|
||||
MAX7000B_ENABLE_VREFA = OFF;
|
||||
MAX7000B_VCCIO_IOBANK2 = 3.3V;
|
||||
MAX7000B_VCCIO_IOBANK1 = 3.3V;
|
||||
CONFIG_EPROM_PULLUP_RESISTOR = ON;
|
||||
CONFIG_EPROM_USER_CODE = FFFFFFFF;
|
||||
FLEX_CONFIGURATION_EPROM = AUTO;
|
||||
MAX7000AE_ENABLE_JTAG = ON;
|
||||
MAX7000AE_USER_CODE = FFFFFFFF;
|
||||
FLEX6000_USE_LOW_VOLTAGE_CONFIGURATION_EPROM = OFF;
|
||||
FLEX10KA_USE_LOW_VOLTAGE_CONFIGURATION_EPROM = ON;
|
||||
FLEX10K_USE_LOW_VOLTAGE_CONFIGURATION_EPROM = OFF;
|
||||
FLEX6000_ENABLE_JTAG = OFF;
|
||||
CONFIG_SCHEME_FLEX_6000 = PASSIVE_SERIAL;
|
||||
MAX7000S_ENABLE_JTAG = ON;
|
||||
FLEX10K_ENABLE_LOCK_OUTPUT = OFF;
|
||||
MAX7000S_USER_CODE = FFFF;
|
||||
CONFIG_SCHEME_10K = PASSIVE_SERIAL;
|
||||
FLEX10K_JTAG_USER_CODE = 7F;
|
||||
ENABLE_INIT_DONE_OUTPUT = OFF;
|
||||
ENABLE_CHIP_WIDE_OE = OFF;
|
||||
ENABLE_CHIP_WIDE_RESET = OFF;
|
||||
nCEO = UNRESERVED;
|
||||
CLKUSR = UNRESERVED;
|
||||
ADD17 = UNRESERVED;
|
||||
ADD16 = UNRESERVED;
|
||||
ADD15 = UNRESERVED;
|
||||
ADD14 = UNRESERVED;
|
||||
ADD13 = UNRESERVED;
|
||||
ADD0_TO_ADD12 = UNRESERVED;
|
||||
SDOUT = RESERVED_DRIVES_OUT;
|
||||
RDCLK = UNRESERVED;
|
||||
RDYnBUSY = UNRESERVED;
|
||||
nWS_nRS_nCS_CS = UNRESERVED;
|
||||
DATA1_TO_DATA7 = UNRESERVED;
|
||||
DATA0 = RESERVED_TRI_STATED;
|
||||
FLEX8000_ENABLE_JTAG = OFF;
|
||||
CONFIG_SCHEME = ACTIVE_SERIAL;
|
||||
DISABLE_TIME_OUT = OFF;
|
||||
ENABLE_DCLK_OUTPUT = OFF;
|
||||
RELEASE_CLEARS = OFF;
|
||||
AUTO_RESTART = OFF;
|
||||
USER_CLOCK = OFF;
|
||||
RESERVED_PINS_PERCENT = 0;
|
||||
RESERVED_LCELLS_PERCENT = 0;
|
||||
END;
|
||||
|
||||
GLOBAL_PROJECT_SYNTHESIS_ASSIGNMENT_OPTIONS
|
||||
BEGIN
|
||||
STYLE = NORMAL;
|
||||
AUTO_GLOBAL_CLEAR = OFF;
|
||||
AUTO_GLOBAL_CLOCK = OFF;
|
||||
DEVICE_FAMILY = MAX7000S;
|
||||
MULTI_LEVEL_SYNTHESIS_MAX9000 = ON;
|
||||
AUTO_IMPLEMENT_IN_EAB = OFF;
|
||||
AUTO_OPEN_DRAIN_PINS = ON;
|
||||
ONE_HOT_STATE_MACHINE_ENCODING = OFF;
|
||||
AUTO_REGISTER_PACKING = OFF;
|
||||
AUTO_FAST_IO = OFF;
|
||||
AUTO_GLOBAL_OE = ON;
|
||||
AUTO_GLOBAL_PRESET = ON;
|
||||
MULTI_LEVEL_SYNTHESIS_MAX5000_7000 = OFF;
|
||||
OPTIMIZE_FOR_SPEED = 5;
|
||||
END;
|
||||
|
||||
COMPILER_PROCESSING_CONFIGURATION
|
||||
BEGIN
|
||||
FITTER_SETTINGS = ADVANCED;
|
||||
USE_QUARTUS_FITTER = OFF;
|
||||
PRESERVE_ALL_NODE_NAME_SYNONYMS = OFF;
|
||||
SMART_RECOMPILE = OFF;
|
||||
GENERATE_AHDL_TDO_FILE = OFF;
|
||||
RPT_FILE_USER_ASSIGNMENTS = ON;
|
||||
RPT_FILE_LCELL_INTERCONNECT = ON;
|
||||
RPT_FILE_HIERARCHY = ON;
|
||||
RPT_FILE_EQUATIONS = ON;
|
||||
LINKED_SNF_EXTRACTOR = OFF;
|
||||
OPTIMIZE_TIMING_SNF = OFF;
|
||||
TIMING_SNF_EXTRACTOR = ON;
|
||||
FUNCTIONAL_SNF_EXTRACTOR = OFF;
|
||||
DESIGN_DOCTOR_RULES = EPLD;
|
||||
DESIGN_DOCTOR = OFF;
|
||||
END;
|
||||
|
||||
COMPILER_INTERFACES_CONFIGURATION
|
||||
BEGIN
|
||||
NETLIST_OUTPUT_TIME_SCALE = 0.1ns;
|
||||
EDIF_INPUT_SHOW_LMF_MAPPING_MESSAGES = OFF;
|
||||
EDIF_BUS_DELIMITERS = [];
|
||||
EDIF_FLATTEN_BUS = OFF;
|
||||
EDIF_OUTPUT_FORCE_0NS_DELAYS = OFF;
|
||||
EDIF_OUTPUT_INCLUDE_SPECIAL_PRIM = OFF;
|
||||
EDIF_OUTPUT_MAP_ILLEGAL_CHAR = OFF;
|
||||
EDIF_OUTPUT_DELAY_CONSTRUCTS = EDO_FILE;
|
||||
EDIF_OUTPUT_USE_EDC = OFF;
|
||||
EDIF_INPUT_USE_LMF2 = OFF;
|
||||
EDIF_INPUT_USE_LMF1 = OFF;
|
||||
EDIF_OUTPUT_GND = GND;
|
||||
EDIF_OUTPUT_VCC = VCC;
|
||||
EDIF_INPUT_GND = GND;
|
||||
EDIF_INPUT_VCC = VCC;
|
||||
EDIF_OUTPUT_EDC_FILE = *.edc;
|
||||
EDIF_INPUT_LMF2 = *.lmf;
|
||||
EDIF_INPUT_LMF1 = *.lmf;
|
||||
VHDL_GENERATE_CONFIGURATION_DECLARATION = OFF;
|
||||
VHDL_OUTPUT_DELAY_CONSTRUCTS = VHO_FILE;
|
||||
VERILOG_OUTPUT_DELAY_CONSTRUCTS = VO_FILE;
|
||||
VHDL_FLATTEN_BUS = OFF;
|
||||
VERILOG_FLATTEN_BUS = OFF;
|
||||
EDIF_TRUNCATE_HIERARCHY_PATH = OFF;
|
||||
VHDL_TRUNCATE_HIERARCHY_PATH = OFF;
|
||||
VERILOG_TRUNCATE_HIERARCHY_PATH = OFF;
|
||||
VERILOG_OUTPUT_MAP_ILLEGAL_CHAR = OFF;
|
||||
VHDL_WRITER_VERSION = VHDL87;
|
||||
VHDL_READER_VERSION = VHDL87;
|
||||
SYNOPSYS_MAPPING_EFFORT = MEDIUM;
|
||||
SYNOPSYS_BOUNDARY_OPTIMIZATION = OFF;
|
||||
SYNOPSYS_HIERARCHICAL_COMPILATION = ON;
|
||||
SYNOPSYS_DESIGNWARE = OFF;
|
||||
SYNOPSYS_COMPILER = DESIGN;
|
||||
USE_SYNOPSYS_SYNTHESIS = OFF;
|
||||
VHDL_NETLIST_WRITER = OFF;
|
||||
VERILOG_NETLIST_WRITER = OFF;
|
||||
XNF_GENERATE_AHDL_TDX_FILE = ON;
|
||||
XNF_TRANSLATE_INTERNAL_NODE_NAMES = ON;
|
||||
XNF_EMULATE_TRI_STATE_BUSES = INTERNAL_LOGIC;
|
||||
EDIF_OUTPUT_VERSION = 200;
|
||||
EDIF_NETLIST_WRITER = OFF;
|
||||
END;
|
||||
|
||||
CUSTOM_DESIGN_DOCTOR_RULES
|
||||
BEGIN
|
||||
MASTER_RESET = OFF;
|
||||
EXPANDER_NETWORKS = ON;
|
||||
RACE_CONDITIONS = ON;
|
||||
DELAY_CHAINS = ON;
|
||||
ASYNCHRONOUS_INPUTS = ON;
|
||||
PRESET_CLEAR_NETWORKS = ON;
|
||||
STATIC_HAZARDS_AFTER_SYNTHESIS = OFF;
|
||||
STATIC_HAZARDS_BEFORE_SYNTHESIS = ON;
|
||||
MULTI_CLOCK_NETWORKS = ON;
|
||||
MULTI_LEVEL_CLOCKS = ON;
|
||||
GATED_CLOCKS = ON;
|
||||
RIPPLE_CLOCKS = ON;
|
||||
END;
|
||||
|
||||
SIMULATOR_CONFIGURATION
|
||||
BEGIN
|
||||
END_TIME = 25.0us;
|
||||
BIDIR_PIN = STRONG;
|
||||
START_TIME = 0.0ns;
|
||||
GLITCH_TIME = 0.0ns;
|
||||
GLITCH = OFF;
|
||||
OSCILLATION_TIME = 0.0ns;
|
||||
OSCILLATION = OFF;
|
||||
CHECK_OUTPUTS = OFF;
|
||||
SETUP_HOLD = OFF;
|
||||
USE_DEVICE = OFF;
|
||||
END;
|
||||
|
||||
TIMING_ANALYZER_CONFIGURATION
|
||||
BEGIN
|
||||
ANALYSIS_MODE = REGISTERED_PERFORMANCE;
|
||||
CUT_OFF_RAM_REGISTERED_WE_PATHS = OFF;
|
||||
LIST_PATH_FREQUENCY = 10MHz;
|
||||
LIST_PATH_COUNT = 10;
|
||||
REGISTERED_PERFORMANCE_OPTIONS = NUMBER_OF_PATHS;
|
||||
INCLUDE_PATHS_LESS_THAN_VALUE = 214.7483647ms;
|
||||
INCLUDE_PATHS_LESS_THAN = OFF;
|
||||
INCLUDE_PATHS_GREATER_THAN_VALUE = 0.0ns;
|
||||
INCLUDE_PATHS_GREATER_THAN = OFF;
|
||||
DELAY_MATRIX_OPTIONS = SHOW_ALL_PATHS;
|
||||
CELL_WIDTH = 18;
|
||||
LIST_ONLY_LONGEST_PATH = ON;
|
||||
CUT_OFF_CLEAR_AND_PRESET_PATHS = ON;
|
||||
CUT_OFF_IO_PIN_FEEDBACK = ON;
|
||||
AUTO_RECALCULATE = OFF;
|
||||
END;
|
||||
|
||||
OTHER_CONFIGURATION
|
||||
BEGIN
|
||||
LAST_MAXPLUS2_VERSION = 10.0;
|
||||
ROW_PINS_LCELL_INSERT = ON;
|
||||
CARRY_OUT_PINS_LCELL_INSERT = OFF;
|
||||
NORMAL_LCELL_INSERT = ON;
|
||||
EXPLICIT_FAMILY = 1;
|
||||
FLEX_10K_52_COLUMNS = 40;
|
||||
DEFAULT_9K_EXP_PER_LCELL = 1/2;
|
||||
LOCAL_INTERCONNECT_PER_LAB_PERCENT = 100;
|
||||
LCELLS_PER_ROW_PERCENT = 100;
|
||||
FAN_IN_PER_LCELL_PERCENT = 100;
|
||||
EXP_PER_LCELL_PERCENT = 100;
|
||||
ROW_PINS_PERCENT = 50;
|
||||
ORIGINAL_MAXPLUS2_VERSION = 9.6;
|
||||
COMPILER_DATA = "1,1,0,1,0,0,0,1,1,1,1,0,1,1,1";
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE NORMAL.MAX5000
|
||||
BEGIN
|
||||
REGISTER_OPTIMIZATION = ON;
|
||||
RESYNTHESIZE_NETWORK = ON;
|
||||
MULTI_LEVEL_FACTORING = ON;
|
||||
SUBFACTOR_EXTRACTION = ON;
|
||||
REFACTORIZATION = ON;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = ON;
|
||||
REDUCE_LOGIC = ON;
|
||||
DECOMPOSE_GATES = ON;
|
||||
SOFT_BUFFER_INSERTION = ON;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
MINIMIZATION = FULL;
|
||||
FAST_IO = OFF;
|
||||
IGNORE_SOFT_BUFFERS = OFF;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
TURBO_BIT = OFF;
|
||||
XOR_SYNTHESIS = ON;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE NORMAL.MAX7000
|
||||
BEGIN
|
||||
TURBO_BIT = ON;
|
||||
REGISTER_OPTIMIZATION = ON;
|
||||
RESYNTHESIZE_NETWORK = ON;
|
||||
MULTI_LEVEL_FACTORING = ON;
|
||||
SUBFACTOR_EXTRACTION = ON;
|
||||
REFACTORIZATION = ON;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = ON;
|
||||
REDUCE_LOGIC = ON;
|
||||
DECOMPOSE_GATES = ON;
|
||||
SOFT_BUFFER_INSERTION = ON;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
MINIMIZATION = FULL;
|
||||
FAST_IO = OFF;
|
||||
IGNORE_SOFT_BUFFERS = OFF;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
XOR_SYNTHESIS = ON;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE NORMAL.CLASSIC
|
||||
BEGIN
|
||||
REGISTER_OPTIMIZATION = OFF;
|
||||
RESYNTHESIZE_NETWORK = ON;
|
||||
MULTI_LEVEL_FACTORING = OFF;
|
||||
SUBFACTOR_EXTRACTION = OFF;
|
||||
REFACTORIZATION = OFF;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = OFF;
|
||||
REDUCE_LOGIC = OFF;
|
||||
DECOMPOSE_GATES = ON;
|
||||
SOFT_BUFFER_INSERTION = ON;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
MINIMIZATION = FULL;
|
||||
FAST_IO = OFF;
|
||||
IGNORE_SOFT_BUFFERS = OFF;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
TURBO_BIT = ON;
|
||||
XOR_SYNTHESIS = OFF;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE NORMAL.FLEX8000
|
||||
BEGIN
|
||||
CARRY_CHAIN_LENGTH = 32;
|
||||
CASCADE_CHAIN_LENGTH = 2;
|
||||
REGISTER_OPTIMIZATION = ON;
|
||||
RESYNTHESIZE_NETWORK = ON;
|
||||
MULTI_LEVEL_FACTORING = ON;
|
||||
SUBFACTOR_EXTRACTION = ON;
|
||||
REFACTORIZATION = ON;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = ON;
|
||||
REDUCE_LOGIC = ON;
|
||||
DECOMPOSE_GATES = ON;
|
||||
SOFT_BUFFER_INSERTION = ON;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
MINIMIZATION = FULL;
|
||||
IGNORE_SOFT_BUFFERS = ON;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
TURBO_BIT = OFF;
|
||||
XOR_SYNTHESIS = OFF;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE FAST.MAX5000
|
||||
BEGIN
|
||||
REGISTER_OPTIMIZATION = ON;
|
||||
RESYNTHESIZE_NETWORK = ON;
|
||||
MULTI_LEVEL_FACTORING = ON;
|
||||
SUBFACTOR_EXTRACTION = OFF;
|
||||
REFACTORIZATION = OFF;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = ON;
|
||||
REDUCE_LOGIC = ON;
|
||||
DECOMPOSE_GATES = ON;
|
||||
SOFT_BUFFER_INSERTION = ON;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
MINIMIZATION = FULL;
|
||||
FAST_IO = OFF;
|
||||
IGNORE_SOFT_BUFFERS = OFF;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
TURBO_BIT = OFF;
|
||||
XOR_SYNTHESIS = ON;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE FAST.MAX7000
|
||||
BEGIN
|
||||
TURBO_BIT = ON;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
XOR_SYNTHESIS = ON;
|
||||
REGISTER_OPTIMIZATION = ON;
|
||||
RESYNTHESIZE_NETWORK = ON;
|
||||
MULTI_LEVEL_FACTORING = ON;
|
||||
SUBFACTOR_EXTRACTION = OFF;
|
||||
REFACTORIZATION = OFF;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = ON;
|
||||
REDUCE_LOGIC = ON;
|
||||
DECOMPOSE_GATES = ON;
|
||||
SOFT_BUFFER_INSERTION = ON;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
MINIMIZATION = FULL;
|
||||
FAST_IO = OFF;
|
||||
IGNORE_SOFT_BUFFERS = OFF;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
PARALLEL_EXPANDERS = ON;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE FAST.CLASSIC
|
||||
BEGIN
|
||||
REGISTER_OPTIMIZATION = OFF;
|
||||
RESYNTHESIZE_NETWORK = ON;
|
||||
MULTI_LEVEL_FACTORING = OFF;
|
||||
SUBFACTOR_EXTRACTION = OFF;
|
||||
REFACTORIZATION = OFF;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = OFF;
|
||||
REDUCE_LOGIC = OFF;
|
||||
DECOMPOSE_GATES = ON;
|
||||
SOFT_BUFFER_INSERTION = ON;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
MINIMIZATION = FULL;
|
||||
FAST_IO = OFF;
|
||||
IGNORE_SOFT_BUFFERS = OFF;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
TURBO_BIT = ON;
|
||||
XOR_SYNTHESIS = OFF;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE FAST.FLEX8000
|
||||
BEGIN
|
||||
CARRY_CHAIN_LENGTH = 32;
|
||||
CASCADE_CHAIN_LENGTH = 2;
|
||||
REGISTER_OPTIMIZATION = ON;
|
||||
RESYNTHESIZE_NETWORK = ON;
|
||||
MULTI_LEVEL_FACTORING = ON;
|
||||
SUBFACTOR_EXTRACTION = OFF;
|
||||
REFACTORIZATION = OFF;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = ON;
|
||||
REDUCE_LOGIC = ON;
|
||||
DECOMPOSE_GATES = ON;
|
||||
SOFT_BUFFER_INSERTION = ON;
|
||||
CARRY_CHAIN = AUTO;
|
||||
CASCADE_CHAIN = AUTO;
|
||||
MINIMIZATION = FULL;
|
||||
IGNORE_SOFT_BUFFERS = ON;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
TURBO_BIT = OFF;
|
||||
XOR_SYNTHESIS = OFF;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE WYSIWYG.MAX5000
|
||||
BEGIN
|
||||
REGISTER_OPTIMIZATION = OFF;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
RESYNTHESIZE_NETWORK = OFF;
|
||||
MULTI_LEVEL_FACTORING = OFF;
|
||||
SUBFACTOR_EXTRACTION = OFF;
|
||||
REFACTORIZATION = OFF;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = OFF;
|
||||
REDUCE_LOGIC = OFF;
|
||||
DECOMPOSE_GATES = OFF;
|
||||
SOFT_BUFFER_INSERTION = OFF;
|
||||
FAST_IO = OFF;
|
||||
IGNORE_SOFT_BUFFERS = OFF;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
TURBO_BIT = OFF;
|
||||
XOR_SYNTHESIS = OFF;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
MINIMIZATION = PARTIAL;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE WYSIWYG.MAX7000
|
||||
BEGIN
|
||||
REGISTER_OPTIMIZATION = OFF;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
RESYNTHESIZE_NETWORK = OFF;
|
||||
MULTI_LEVEL_FACTORING = OFF;
|
||||
SUBFACTOR_EXTRACTION = OFF;
|
||||
REFACTORIZATION = OFF;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = OFF;
|
||||
REDUCE_LOGIC = OFF;
|
||||
DECOMPOSE_GATES = OFF;
|
||||
SOFT_BUFFER_INSERTION = OFF;
|
||||
FAST_IO = OFF;
|
||||
IGNORE_SOFT_BUFFERS = OFF;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
TURBO_BIT = ON;
|
||||
XOR_SYNTHESIS = OFF;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
MINIMIZATION = PARTIAL;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE WYSIWYG.CLASSIC
|
||||
BEGIN
|
||||
REGISTER_OPTIMIZATION = OFF;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
RESYNTHESIZE_NETWORK = ON;
|
||||
MULTI_LEVEL_FACTORING = OFF;
|
||||
SUBFACTOR_EXTRACTION = OFF;
|
||||
REFACTORIZATION = OFF;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = OFF;
|
||||
REDUCE_LOGIC = OFF;
|
||||
DECOMPOSE_GATES = ON;
|
||||
SOFT_BUFFER_INSERTION = OFF;
|
||||
FAST_IO = OFF;
|
||||
IGNORE_SOFT_BUFFERS = OFF;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
TURBO_BIT = ON;
|
||||
XOR_SYNTHESIS = OFF;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
MINIMIZATION = PARTIAL;
|
||||
CARRY_CHAIN = IGNORE;
|
||||
CASCADE_CHAIN = IGNORE;
|
||||
END;
|
||||
|
||||
DEFINE_LOGIC_SYNTHESIS_STYLE WYSIWYG.FLEX8000
|
||||
BEGIN
|
||||
REGISTER_OPTIMIZATION = OFF;
|
||||
USE_LPM_FOR_AHDL_OPERATORS = OFF;
|
||||
RESYNTHESIZE_NETWORK = OFF;
|
||||
MULTI_LEVEL_FACTORING = OFF;
|
||||
SUBFACTOR_EXTRACTION = OFF;
|
||||
REFACTORIZATION = OFF;
|
||||
NOT_GATE_PUSH_BACK = ON;
|
||||
DUPLICATE_LOGIC_EXTRACTION = OFF;
|
||||
REDUCE_LOGIC = OFF;
|
||||
DECOMPOSE_GATES = OFF;
|
||||
SOFT_BUFFER_INSERTION = ON;
|
||||
IGNORE_SOFT_BUFFERS = ON;
|
||||
PARALLEL_EXPANDERS = OFF;
|
||||
TURBO_BIT = OFF;
|
||||
XOR_SYNTHESIS = OFF;
|
||||
SLOW_SLEW_RATE = OFF;
|
||||
MINIMIZATION = PARTIAL;
|
||||
CARRY_CHAIN_LENGTH = 32;
|
||||
CARRY_CHAIN = MANUAL;
|
||||
CASCADE_CHAIN_LENGTH = 2;
|
||||
CASCADE_CHAIN = MANUAL;
|
||||
END;
|
||||
|
||||
BIN
src/altera/max/7128/scf/SP2_MAX.SCF
Normal file
BIN
src/altera/max/7128/scf/SP2_MAX.SCF
Normal file
Binary file not shown.
480
src/altera/max/SP2_MAX.TDF
Normal file
480
src/altera/max/SP2_MAX.TDF
Normal file
@ -0,0 +1,480 @@
|
||||
|
||||
TITLE "SINC_controller";
|
||||
|
||||
PARAMETERS
|
||||
(
|
||||
G_MODE = 1, -- 1 on LCELL, 0 - on EXP
|
||||
|
||||
NUM = "NO",
|
||||
NUMBER1 = B"00100000X", -- 0 - sinc
|
||||
NUMBER2 = B"00110111X", -- 7
|
||||
NUMBER3 = B"01001101X", -- D
|
||||
NUMBER4 = B"01010010X", -- 2
|
||||
NUMBER5 = B"00100000X", --
|
||||
NUMBER6 = B"00100000X", --
|
||||
NUMBER7 = B"00100000X" --
|
||||
);
|
||||
|
||||
SUBDESIGN SP2_MAX
|
||||
(
|
||||
|
||||
TG42_IN : INPUT;
|
||||
TG42_OUT : OUTPUT;
|
||||
TG42_BUF : OUTPUT;
|
||||
CLKZZ : BIDIR;
|
||||
CLK14 : OUTPUT;
|
||||
|
||||
AUD : OUTPUT; -- clk for timers
|
||||
BEEP : OUTPUT;
|
||||
|
||||
CMOS_DRD : OUTPUT;
|
||||
CMOS_AS : OUTPUT;
|
||||
CMOS_DWR : OUTPUT;
|
||||
|
||||
WR_PDOS : OUTPUT;
|
||||
WD : INPUT;
|
||||
WSTB : INPUT;
|
||||
SR,SL : INPUT;
|
||||
RSTB : INPUT;
|
||||
TR43 : INPUT;
|
||||
CLK_WG : OUTPUT;
|
||||
FDAT : OUTPUT;
|
||||
QDAT : OUTPUT;
|
||||
RDAT : INPUT;
|
||||
/WG_WR : OUTPUT;
|
||||
/WG_RD : OUTPUT;
|
||||
STE : INPUT;
|
||||
DENS_X : OUTPUT;
|
||||
WDAT : OUTPUT;
|
||||
|
||||
|
||||
-- XA[2..0] : BIDIR;
|
||||
XA[2..0] : INPUT;
|
||||
XACS : INPUT;
|
||||
-- SINC_1 : OUTPUT;
|
||||
SINC_1 : BIDIR;
|
||||
SINC_2 : BIDIR;
|
||||
|
||||
HDD_C[3..0] : INPUT;
|
||||
FDD_C[2..0] : INPUT;
|
||||
|
||||
HD_DIR : OUTPUT;
|
||||
HD_CS : OUTPUT;
|
||||
|
||||
/CONF_X : BIDIR;
|
||||
10K_CLK : OUTPUT;
|
||||
WR_CNF : INPUT;
|
||||
10K_D0 : OUTPUT;
|
||||
D0 : INPUT;
|
||||
|
||||
VGA_IN : INPUT;
|
||||
-- WR_COL : INPUT;
|
||||
SINC_V : OUTPUT;
|
||||
SINC_H : OUTPUT;
|
||||
SINC : OUTPUT;
|
||||
SINC_IN : INPUT;
|
||||
|
||||
XHD_RES : OUTPUT;
|
||||
XHD_WR : OUTPUT;
|
||||
XHD_RD : OUTPUT;
|
||||
|
||||
XHD1_CS[2..1] : OUTPUT;
|
||||
XHD2_CS[2..1] : OUTPUT;
|
||||
XHR_RDY : INPUT;
|
||||
|
||||
EPM_RES : INPUT;
|
||||
PW_GOOD : INPUT;
|
||||
|
||||
GND65 : INPUT;
|
||||
GND33 : INPUT;
|
||||
|
||||
)
|
||||
VARIABLE
|
||||
|
||||
XCT[2..0] : DFF;
|
||||
CNF_ON : NODE;
|
||||
CNF_OFF : NODE;
|
||||
|
||||
CLK42 : NODE;
|
||||
|
||||
CT[3..0] : DFF;
|
||||
CTH[5..0] : DFF;
|
||||
CTV[8..0] : DFFE;
|
||||
|
||||
SINC_HT : DFF;
|
||||
SINC_VT : DFFE;
|
||||
|
||||
TURBING : NODE;
|
||||
FDD_1440 : NODE;
|
||||
NFDD_1440 : NODE;
|
||||
|
||||
CT_WG : NODE;
|
||||
CT_WG1 : NODE;
|
||||
|
||||
STWG[2..0] : DFF;
|
||||
CLK_PRC : NODE;
|
||||
WGR[4..0] : DFF;
|
||||
RDAT_X : NODE;
|
||||
|
||||
REG_P[2..0] : DFF;
|
||||
|
||||
/RESET : NODE;
|
||||
|
||||
|
||||
S144,S720 : NODE;
|
||||
|
||||
SHDD1,SHDD2 : NODE;
|
||||
THDD : NODE;
|
||||
NTHDD : NODE;
|
||||
|
||||
NO_HDD : NODE;
|
||||
|
||||
S320,S312 : NODE;
|
||||
T320 : NODE;
|
||||
NT320 : NODE;
|
||||
|
||||
SOFT_RESET : NODE;
|
||||
SOFT_RESET2 : NODE;
|
||||
|
||||
HDD_CLK : NODE;
|
||||
|
||||
LR_T[1..0] : DFF;
|
||||
|
||||
EXP_X : NODE;
|
||||
EXP_Y : NODE;
|
||||
|
||||
CTV8M : DFF;
|
||||
|
||||
CTV8C : NODE;
|
||||
|
||||
FN_NUM : NODE;
|
||||
|
||||
BEGIN
|
||||
|
||||
/RESET = DFF((EPM_RES & XHD_RES),!CT3,SOFT_RESET,);
|
||||
|
||||
-- /RESET = (EXP(!EPM_RES & EXP(EXP(EXP(EPM_RES)))) & SOFT_RESET);
|
||||
|
||||
EXP_X = EXP(TG42_IN);
|
||||
EXP_Y = EXP(TG42_IN);
|
||||
|
||||
IF (G_MODE == 0) GENERATE
|
||||
TG42_OUT = LCELL(EXP_X);
|
||||
ELSE GENERATE
|
||||
TG42_OUT = LCELL(TG42_BUF);
|
||||
END GENERATE;
|
||||
|
||||
TG42_BUF = LCELL(!TG42_IN);
|
||||
|
||||
CLK42 = TG42_IN;
|
||||
|
||||
-- CT[].clk = CLK14;
|
||||
CT[].clk = XCT1;
|
||||
CT[] = CT[] + 1;
|
||||
|
||||
-- === horizontal sinc =====
|
||||
|
||||
CTH[].clk = !CT3;
|
||||
SINC_HT.clk = !CT3;
|
||||
|
||||
IF !((CTH[] == B"XXXX11") & SINC_HT) THEN
|
||||
CTH[] = CTH[] + 1;
|
||||
ELSE
|
||||
CTH[] = GND;
|
||||
END IF;
|
||||
|
||||
-- SINC_1 = CTH5;
|
||||
SINC_1 = TRI(CTH5,VCC);
|
||||
SINC_2 = TRI(CTV8,VCC);
|
||||
|
||||
SINC_HT.d = (CTH[] == B"1101XX");
|
||||
|
||||
SINC_H = SINC_HT;
|
||||
|
||||
-- === vertical sinc =======
|
||||
|
||||
-- CTV[].clk = !CT3;
|
||||
-- SINC_VT.clk = !CT3;
|
||||
|
||||
CTV[].clk = SINC_HT;
|
||||
SINC_VT.clk = SINC_HT;
|
||||
|
||||
CTV8M.clk = SINC_HT;
|
||||
|
||||
-- CTV[].ena = (CTH[] == B"110111");
|
||||
-- SINC_VT.ena = (CTH[] == B"110111");
|
||||
CTV[].ena = VCC;
|
||||
SINC_VT.ena = VCC;
|
||||
|
||||
-- IF (CTV[] == B"100111111") THEN
|
||||
|
||||
IF (NUM == "YES") GENERATE
|
||||
|
||||
FN_NUM =(
|
||||
(CTV[8..0] == NUMBER1) or
|
||||
(CTV[8..0] == NUMBER2) or
|
||||
(CTV[8..0] == NUMBER3) or
|
||||
(CTV[8..0] == NUMBER4) or
|
||||
(CTV[8..0] == NUMBER5) or
|
||||
(CTV[8..0] == NUMBER6) or
|
||||
(CTV[8..0] == NUMBER7)
|
||||
) & !NO_HDD;
|
||||
|
||||
ELSE GENERATE
|
||||
|
||||
FN_NUM = GND;
|
||||
|
||||
END GENERATE;
|
||||
|
||||
|
||||
IF EXP((CTV[] == B"XXXXXXX11") & SINC_VT) THEN
|
||||
|
||||
(CTV[8..0]) = ((CTV[8..0]) + 1) xor (CTV8M,B"00000000");
|
||||
CTV8M = FN_NUM;
|
||||
|
||||
ELSE
|
||||
CTV[7..0] = GND;
|
||||
CTV8M = GND;
|
||||
CTV8 = GND;
|
||||
END IF;
|
||||
|
||||
SINC_VT.d = ((CTV[8..0] == B"1001111XX") or ((CTV[8..0] == B"1001101XX")) & NT320);
|
||||
|
||||
SINC_V = SINC_VT;
|
||||
|
||||
SINC = SINC_V xor SINC_H;
|
||||
|
||||
-- =============================
|
||||
|
||||
-- =========================================
|
||||
-- divide by 6
|
||||
|
||||
XCT[].clk = (TG42_IN xor !XCT1);
|
||||
XCT[].d = XCT[] + 1;
|
||||
|
||||
-- CLKZZ = 14 MHz
|
||||
|
||||
CLKZZ = TRI(XCT1,CNF_OFF);
|
||||
CLK14 = DFF(!CLK14,XCT0,,);
|
||||
|
||||
-- test exists
|
||||
|
||||
-- CNF_OFF = EXP(CNF_ON & /RESET);
|
||||
-- CNF_ON = EXP(CNF_OFF & XACS);
|
||||
|
||||
CNF_OFF = DFF(GND,GND,XACS,/RESET);
|
||||
CNF_ON = !CNF_OFF;
|
||||
|
||||
-- =========================================
|
||||
|
||||
-- ======== FDD controller ==================
|
||||
|
||||
TURBING = EXP(EXP(TURBING & !WSTB & !RSTB) & !STE & NFDD_1440);
|
||||
-- TURBING = GND;
|
||||
|
||||
CT_WG = TFF(VCC,(XCT1 xor (CT_WG & TURBING)),,);
|
||||
|
||||
STWG[].clk = (CT_WG xor STWG2);
|
||||
STWG[].d = STWG[] + 1;
|
||||
|
||||
CLK_WG = STWG2;
|
||||
|
||||
-- CLK_PRC = STWG0;
|
||||
CLK_PRC = CT_WG;
|
||||
|
||||
CT_WG1 = EXP(EXP(XCT1 & FDD_1440) & EXP(CT0 & NFDD_1440));
|
||||
|
||||
WGR[].clk = CT_WG1;
|
||||
|
||||
IF !FDAT THEN
|
||||
TABLE WGR[3..0] => WGR[3..0].d;
|
||||
0 => 4; 1 => 5; 2 => 4; 3 => 5;
|
||||
4 => 6; 5 => 7; 6 => 8; 7 => 8;
|
||||
8 => 9; 9 => 9; 10 => 10; 11 => 11;
|
||||
12 => 12; 13 => 13; 14 => 14; 15 => 15;
|
||||
END TABLE;
|
||||
WGR4.d = WGR4;
|
||||
ELSE
|
||||
IF WGR[3..0] == 0 THEN
|
||||
WGR[3..0].d = 3;
|
||||
WGR4.d = WGR4;
|
||||
ELSE
|
||||
WGR[].d = WGR[] + 1;
|
||||
END IF;
|
||||
END IF;
|
||||
|
||||
QDAT = WGR4;
|
||||
RDAT_X = EXP(EXP(RDAT_X & EXP(!RDAT & !CT_WG1)) & EXP(RDAT & !CT_WG1));
|
||||
-- FDAT = DFF((RDAT_X or !DFF(RDAT_X,CT_WG1,,)),CT_WG1,,);
|
||||
FDAT = DFF((RDAT_X or EXP(DFF(RDAT_X,CT_WG1,,))),CT_WG1,,);
|
||||
-- ==========================================================
|
||||
-- now not complete!
|
||||
|
||||
AUD = CT3;
|
||||
BEEP = GND;
|
||||
|
||||
-- /CONF_X = TRI(GND,!/RESET);
|
||||
|
||||
/CONF_X = OPNDRN(/RESET);
|
||||
|
||||
-- 10K_CLK = WR_CNF; -- now not protect!
|
||||
|
||||
10K_CLK = DFF((WR_CNF & CNF_OFF) or ((HDD_C0 or FDD_C2) & CNF_ON),CLK42,,);
|
||||
|
||||
10K_D0 = DFFE(D0,10K_CLK,S720,(S144 & /RESET),CNF_OFF);
|
||||
|
||||
DENS_X = VCC;
|
||||
|
||||
-- === now NOT PRECOMP! =====
|
||||
|
||||
-- WDAT = WD;
|
||||
|
||||
WDAT = REG_P2;
|
||||
|
||||
REG_P[].clk = !CLK_PRC;
|
||||
|
||||
-- CASE WD IS
|
||||
-- WHEN 1 => REG_P[].d = (GND,SL,!(SL or SR),SR);
|
||||
-- WHEN 0 => REG_P[].d = (EXP(EXP(REG_P2)),REG_P[1..0],GND);
|
||||
-- END CASE;
|
||||
|
||||
-- CASE (DFF(WD,CLK_WG,,),DFF((SL & TR43),CLK_WG,,),DFF((SR & TR43),CLK_WG,,)) IS
|
||||
|
||||
LR_T[].clk = STWG2;
|
||||
-- LR_T[].clk = CLK_WG;
|
||||
|
||||
LR_T[].d = ((WD & !(SL & TR43)),(WD & !(SR & TR43)));
|
||||
|
||||
CASE LR_T[] IS
|
||||
WHEN 0 => REG_P[1..0] = (REG_P[1..0] - 1) & EXP(REG_P[1..0] == 0);
|
||||
REG_P[2] = EXP(EXP(REG_P[1..0] == 1));
|
||||
-- REG_P[2] = (REG_P[1..0] == 1);
|
||||
WHEN 1 => REG_P[1..0] = 1; REG_P[2] = GND;
|
||||
WHEN 2 => REG_P[1..0] = 3; REG_P[2] = GND;
|
||||
WHEN 3 => REG_P[1..0] = 2; REG_P[2] = GND;
|
||||
END CASE;
|
||||
%
|
||||
CASE (WD,DFF((SL & TR43),CLK_WG,,),DFF((SR & TR43),CLK_WG,,)) IS
|
||||
WHEN B"0XX" => REG_P[1..0] = (REG_P[1..0] - 1) & EXP(REG_P[1..0] == 0);
|
||||
WHEN B"100" => REG_P[1..0] = 2;
|
||||
WHEN B"110" => REG_P[1..0] = 1;
|
||||
WHEN B"101" => REG_P[1..0] = 3;
|
||||
WHEN B"111" => REG_P[1..0] = 2;
|
||||
END CASE;
|
||||
%
|
||||
|
||||
%
|
||||
CASE WD IS
|
||||
WHEN 0 => REG_P[3] = EXP(EXP(REG_P[1..0] == 1));
|
||||
WHEN 1 => REG_P[3] = GND;
|
||||
END CASE;
|
||||
%
|
||||
|
||||
-- === Port Controls ====================================
|
||||
%
|
||||
FDD_C0 - 0 - WG93 / 1 - kmps/ p_dos
|
||||
FDD_C1 - 0 - write / 1 - read
|
||||
FDD_C2 - 0 - no / 1 - CS_WG/ strobe
|
||||
|
||||
HDD_C0 - strobe
|
||||
HDD_C[2..1] = 00 - SYS_FN, 01 - SYS_FN, 10 - HDD1/2, 11 - CMOS
|
||||
HDD_C3 - 0 - HD_CS1, 1 HD_CS3 / 0 CMOS_DAT, 1 - CMOS_ADR
|
||||
|
||||
HDD_C[3..0] = 0001, FDD_C[2..1] = 00; -> FDD_C0 = 1/0 -> set 1.44/720
|
||||
HDD_C[3..0] = 1001, FDD_C[2..1] = 00; -> FDD_C0 = 1/0 -> set 320/312 lines
|
||||
HDD_C[3..0] = 0011, FDD_C[2..1] = 00; -> FDD_C0 = 1/0 -> set HDD1/HDD2
|
||||
HDD_C[3..0] = 1011, FDD_C[2..1] = 00; -> FDD_C0 = 0 -> soft_reset!
|
||||
HDD_C[3..0] = X101, FDD_C[2..1] = XX; -> HDD1/2 rd/wr
|
||||
|
||||
%
|
||||
|
||||
SOFT_RESET = !((HDD_C[] == B"1011") & (FDD_C[] == B"000"));
|
||||
SOFT_RESET2 = !((HDD_C[] == B"1011") & (FDD_C[] == B"001"));
|
||||
|
||||
-- FDD switch
|
||||
|
||||
-- NFDD_1440 = EXP(FDD_1440 & S720 & /RESET);
|
||||
-- FDD_1440 = EXP(NFDD_1440 & S144);
|
||||
FDD_1440 = 10K_D0;
|
||||
NFDD_1440 = !10K_D0;
|
||||
|
||||
S144 = EXP((HDD_C[] == B"0001") & (FDD_C[] == B"001"));
|
||||
S720 = EXP((HDD_C[] == B"0001") & (FDD_C[] == B"000"));
|
||||
|
||||
-- Screen Switch
|
||||
|
||||
T320 = EXP(NT320 & S320 & /RESET);
|
||||
NT320 = EXP(T320 & S312);
|
||||
|
||||
S312 = EXP((HDD_C[] == B"1001") & (FDD_C[] == B"001"));
|
||||
S320 = EXP((HDD_C[] == B"1001") & (FDD_C[] == B"000"));
|
||||
|
||||
-- HDD Switch
|
||||
|
||||
-- THDD = EXP(NTHDD & SHDD2 & /RESET);
|
||||
-- NTHDD = EXP(THDD & SHDD1);
|
||||
|
||||
THDD = EXP(NTHDD & NO_HDD & SHDD2 & /RESET & SOFT_RESET2);
|
||||
NTHDD = EXP(THDD & NO_HDD & SHDD1 & /RESET & SOFT_RESET2);
|
||||
NO_HDD = EXP(NTHDD & THDD & SHDD1 & SHDD2);
|
||||
|
||||
SHDD2 = EXP((HDD_C[] == B"0011") & (FDD_C[] == B"001"));
|
||||
SHDD1 = EXP((HDD_C[] == B"0011") & (FDD_C[] == B"000"));
|
||||
|
||||
-- Control signals
|
||||
|
||||
WR_PDOS = DFF(!((HDD_C[] == 0) & (FDD_C[] == B"X01")),HDD_CLK,,FDD_C2);
|
||||
/WG_WR = DFF(!((HDD_C[] == 0) & (FDD_C[] == B"X00")),HDD_CLK,,FDD_C2);
|
||||
/WG_RD = DFF(!((HDD_C[] == 0) & (FDD_C[] == B"X10")),HDD_CLK,,FDD_C2);
|
||||
|
||||
CMOS_DWR = DFF(!((HDD_C[] == B"1110") & (FDD_C[] == B"X01")),HDD_CLK,,FDD_C2);
|
||||
CMOS_AS =!DFF(!((HDD_C[] == B"0110") & (FDD_C[] == B"X01")),HDD_CLK,,FDD_C2);
|
||||
CMOS_DRD = DFF(!((HDD_C[] == B"1110") & (FDD_C[] == B"X10")),HDD_CLK,,FDD_C2);
|
||||
|
||||
-- HD_DIR = !HDD_C1; -- ????????????
|
||||
HD_DIR = XHD_RD;
|
||||
|
||||
-- HD_CS = GND;
|
||||
-- HD_CS = CTV8M;
|
||||
HD_CS = (CTV8M and /RESET);
|
||||
|
||||
|
||||
-- HD_CS = !/RESET;
|
||||
|
||||
-- XHD_RES = VCC;
|
||||
|
||||
-- XHD_RES = DFF(PW_GOOD,SINC_V,,);
|
||||
XHD_RES = DFF(PW_GOOD,SINC_V,EPM_RES,);
|
||||
|
||||
-- XHD_WR = DFF((!(HDD_C[] == B"X101") or FDD_C1),CLK42,,);
|
||||
-- XHD_RD = DFF((!(HDD_C[] == B"X101") or !FDD_C1),CLK42,,);
|
||||
|
||||
-- HDD_CLK = EXP(EXP(HDD_C0));
|
||||
HDD_CLK = 10K_CLK;
|
||||
|
||||
-- XHD_WR = DFF((!(HDD_C[] == B"X101") or FDD_C1 or !HDD_CLK),CLK42,,HDD_C0);
|
||||
-- XHD_RD = DFF((!(HDD_C[] == B"X101") or !FDD_C1 or !HDD_CLK),CLK42,,HDD_C0);
|
||||
-- XHD_WR = DFF((!(HDD_C[] == B"X101") or FDD_C1),HDD_CLK,,HDD_C0);
|
||||
-- XHD_RD = DFF((!(HDD_C[] == B"X101") or !FDD_C1),HDD_CLK,,HDD_C0);
|
||||
XHD_WR = DFF((!(HDD_C[] == B"X101") or FDD_C1),HDD_CLK,,(HDD_C0 and /RESET));
|
||||
XHD_RD = DFF((!(HDD_C[] == B"X101") or !FDD_C1),HDD_CLK,,(HDD_C0 and /RESET));
|
||||
|
||||
-- XHD1_CS1 = DFF(!((HDD_C[] == B"010X") & NTHDD),CLK42,,);
|
||||
-- XHD1_CS2 = DFF(!((HDD_C[] == B"110X") & NTHDD),CLK42,,);
|
||||
|
||||
-- XHD2_CS1 = DFF(!((HDD_C[] == B"010X") & THDD),CLK42,,);
|
||||
-- XHD2_CS2 = DFF(!((HDD_C[] == B"110X") & THDD),CLK42,,);
|
||||
|
||||
-- XHD1_CS1 = DFF((!(HDD_C[] == B"010X") or THDD),CLK42,,);
|
||||
-- XHD1_CS2 = DFF((!(HDD_C[] == B"110X") or THDD),CLK42,,);
|
||||
XHD1_CS1 = DFF((!(HDD_C[] == B"010X") or THDD),CLK42,,/RESET);
|
||||
XHD1_CS2 = DFF((!(HDD_C[] == B"110X") or THDD),CLK42,,/RESET);
|
||||
|
||||
-- XHD2_CS1 = DFF((!(HDD_C[] == B"010X") or NTHDD),CLK42,,);
|
||||
-- XHD2_CS2 = DFF((!(HDD_C[] == B"110X") or NTHDD),CLK42,,);
|
||||
XHD2_CS1 = DFF((!(HDD_C[] == B"010X") or NTHDD),CLK42,,/RESET);
|
||||
XHD2_CS2 = DFF((!(HDD_C[] == B"110X") or NTHDD),CLK42,,/RESET);
|
||||
|
||||
|
||||
END;
|
||||
|
||||
BIN
src/altera/max/SP2_MAX_7064.pof
Normal file
BIN
src/altera/max/SP2_MAX_7064.pof
Normal file
Binary file not shown.
BIN
src/altera/max/SP2_MAX_7128.pof
Normal file
BIN
src/altera/max/SP2_MAX_7128.pof
Normal file
Binary file not shown.
28
src/altera/max/clean.bat
Normal file
28
src/altera/max/clean.bat
Normal file
@ -0,0 +1,28 @@
|
||||
@echo off
|
||||
|
||||
del *.txt
|
||||
del *.bak
|
||||
del *.cnf
|
||||
del *.db?
|
||||
|
||||
del *.hif
|
||||
del *.mmf
|
||||
del *.mtf
|
||||
del *.mtb
|
||||
del *.hex
|
||||
del *.ndb
|
||||
del *.pin
|
||||
rem del *.pof
|
||||
del *.snf
|
||||
del *.fit
|
||||
del *.jam
|
||||
del *.jbc
|
||||
del *.log
|
||||
del *.rpt
|
||||
|
||||
del *.SCF
|
||||
del *.ACF
|
||||
rem del *.TDF
|
||||
del *.INC
|
||||
del *.MIF
|
||||
|
||||
1
src/altera/max/compile.log
Normal file
1
src/altera/max/compile.log
Normal file
@ -0,0 +1 @@
|
||||
06.07.2022 05:20: [2/2] ALTERA MAX-7128 STREAM
|
||||
49
src/altera/max/make.cmd
Normal file
49
src/altera/max/make.cmd
Normal file
@ -0,0 +1,49 @@
|
||||
@set BIN=..\..\bin\
|
||||
@set CHIP=7128
|
||||
|
||||
@echo STEP 0, Task [2/2] ALTERA MAX-%CHIP% STREAM
|
||||
|
||||
@if exist SP2_MAX_%CHIP%.pof goto quit
|
||||
|
||||
@copy %CHIP%\*.ACF .\*.*
|
||||
|
||||
@C:\MAXPLUS2\MAXPLUS2.EXE -compile SP2_MAX
|
||||
|
||||
@del *.txt
|
||||
@del *.bak
|
||||
@del *.cnf
|
||||
@del *.db?
|
||||
|
||||
@del *.hif
|
||||
@del *.mmf
|
||||
@del *.mtf
|
||||
@del *.mtb
|
||||
@del *.hex
|
||||
@del *.ndb
|
||||
@del *.pin
|
||||
@rem del *.pof
|
||||
@del *.snf
|
||||
@del *.fit
|
||||
@del *.jam
|
||||
@del *.jbc
|
||||
|
||||
@del *.SCF
|
||||
@del *.ACF
|
||||
@rem del *.TDF
|
||||
@del *.INC
|
||||
@del *.MIF
|
||||
|
||||
@ren SP2_MAX.pof SP2_MAX_%CHIP%.pof
|
||||
@if errorlevel 1 goto error
|
||||
|
||||
:quit
|
||||
@echo [OK ]
|
||||
@echo --------------------------------------------------------------------------[Compiling bitstreams DONE]
|
||||
@goto :eof
|
||||
|
||||
:error
|
||||
@color 04
|
||||
@echo ---------------------------------------------------------------------[Compiling bitstream ERROR!!!]
|
||||
@echo.
|
||||
@pause 0
|
||||
@exit 3
|
||||
1471
src/altera/max/sp2_max.rpt
Normal file
1471
src/altera/max/sp2_max.rpt
Normal file
File diff suppressed because it is too large
Load Diff
88
src/bin/Altera0pak.c
Normal file
88
src/bin/Altera0pak.c
Normal file
@ -0,0 +1,88 @@
|
||||
/* Altera zero packer and depacker by Shaos (2017,2021) */
|
||||
|
||||
#include <stdio.h>
|
||||
#include <stdlib.h>
|
||||
#include <string.h>
|
||||
|
||||
int main(int argc, char** argv)
|
||||
{
|
||||
int b,i,n;
|
||||
long l,maxzero,nonzero,nzero,sz,current=0;
|
||||
FILE *f,*fo;
|
||||
if(argc<3)
|
||||
{
|
||||
printf("\n\t%s imgfilename packedfilename\nor",argv[0]);
|
||||
printf("\n\t%s -d packedfilename depackedfile\n",argv[0]);
|
||||
return 0;
|
||||
}
|
||||
if(argv[1][0]=='-' && argv[1][1]=='d')
|
||||
{
|
||||
f = fopen(argv[2],"rb");
|
||||
if(f==NULL) return -1;
|
||||
if(argc==3) fo = fopen("Altera.bin","wb");
|
||||
else fo = fopen(argv[3],"wb");
|
||||
if(fo==NULL){fclose(f);return -2;}
|
||||
fseek(f,0,SEEK_END);
|
||||
sz = ftell(f);
|
||||
printf("Size=%li\n",sz);
|
||||
fseek(f,0,SEEK_SET);
|
||||
printf("Depack %s (size=%li)\n",argv[2],sz);
|
||||
for(l=0;l<sz;l++)
|
||||
{
|
||||
b = fgetc(f);
|
||||
if(b) fputc(b,fo);
|
||||
else
|
||||
{
|
||||
l++;
|
||||
n = fgetc(f);
|
||||
for(i=0;i<n;i++) fputc(0,fo);
|
||||
}
|
||||
}
|
||||
fclose(fo);
|
||||
fclose(f);
|
||||
return 0;
|
||||
}
|
||||
f = fopen(argv[1],"rb");
|
||||
if(f==NULL) return -1;
|
||||
fseek(f,0,SEEK_END);
|
||||
sz = ftell(f);
|
||||
printf("Size=%li\n",sz);
|
||||
fseek(f,0,SEEK_SET);
|
||||
fo = fopen(argv[2],"wb");
|
||||
if(fo==NULL){fclose(f);return -2;}
|
||||
maxzero = nonzero = current = nzero = 0;
|
||||
for(l=0;l<sz;l++)
|
||||
{
|
||||
b = fgetc(f);
|
||||
if(b || nzero==255)
|
||||
{
|
||||
if(nzero)
|
||||
{
|
||||
if(nzero>maxzero) maxzero=nzero;
|
||||
current+=2;
|
||||
fputc(0,fo);
|
||||
fputc(nzero,fo);
|
||||
}
|
||||
if(b)
|
||||
{
|
||||
nzero = 0;
|
||||
nonzero++;
|
||||
current++;
|
||||
fputc(b,fo);
|
||||
}
|
||||
else nzero = 1;
|
||||
}
|
||||
else nzero++;
|
||||
}
|
||||
if(nzero)
|
||||
{
|
||||
if(nzero>maxzero) maxzero=nzero;
|
||||
current+=2;
|
||||
fputc(0,fo);
|
||||
fputc(nzero,fo);
|
||||
}
|
||||
printf("maxzero=%li nonzero=%li current=%li\n",maxzero,nonzero,current);
|
||||
fclose(fo);
|
||||
fclose(f);
|
||||
return 0;
|
||||
}
|
||||
BIN
src/bin/Altera0pak.exe
Normal file
BIN
src/bin/Altera0pak.exe
Normal file
Binary file not shown.
BIN
src/bin/_SPRIN.BIN
Normal file
BIN
src/bin/_SPRIN.BIN
Normal file
Binary file not shown.
233
src/bin/bmp_extract.dpr
Normal file
233
src/bin/bmp_extract.dpr
Normal file
@ -0,0 +1,233 @@
|
||||
program bmp_extract;
|
||||
|
||||
{$APPTYPE CONSOLE}
|
||||
|
||||
uses
|
||||
SysUtils;
|
||||
|
||||
|
||||
const
|
||||
RGB3 = 3;
|
||||
RGB4 = 4;
|
||||
|
||||
type
|
||||
|
||||
BITMAPFILEHEADER = packed record
|
||||
bfType: word;
|
||||
bfSize: longint;
|
||||
bfReserved1: word;
|
||||
bfReserved2: word;
|
||||
bfOffBits: longint;
|
||||
end;
|
||||
|
||||
BITMAPINFOHEADER = packed record
|
||||
biSize: longint;
|
||||
biWidth: longint;
|
||||
biHeight: longint;
|
||||
biPlanes: word;
|
||||
biBitCount: word;
|
||||
biCompression: longint;
|
||||
biSizeImage: longint;
|
||||
biXPelsPerMeter: longint;
|
||||
biYPelsPerMeter: longint;
|
||||
biClrUsed: longint;
|
||||
biClrImportant: longint;
|
||||
end;
|
||||
|
||||
RGBQUAD = record
|
||||
rgbBlue: byte;
|
||||
rgbGreen: byte;
|
||||
rgbRed: byte;
|
||||
rgbReserved: byte;
|
||||
end;
|
||||
|
||||
procedure MsgHelp;
|
||||
begin
|
||||
writeln('Usage:');
|
||||
writeln(' bmp_extract.exe <BMP FILE> <params> ...');
|
||||
writeln('<params>:');
|
||||
writeln(' /pn <file name> - output palette file-name');
|
||||
writeln(' /dn <file name> - output data file-name');
|
||||
writeln(' /pt <3 or 4> - palette type');
|
||||
writeln;
|
||||
end;
|
||||
procedure MsgWrong;
|
||||
begin
|
||||
writeln('Unsupported BMP format');
|
||||
writeln('Accept only 128x72 px, 8-bit colors, no compression');
|
||||
writeln;
|
||||
end;
|
||||
procedure SavePalette(var buf: array of byte; fn: string; pal_type: longint);
|
||||
var
|
||||
f: file of byte;
|
||||
i: longint;
|
||||
buf4: array [0..3] of byte;
|
||||
begin
|
||||
{$I-}
|
||||
AssignFile(f, fn);
|
||||
rewrite(f);
|
||||
|
||||
case pal_type of
|
||||
|
||||
RGB3:
|
||||
for i:= 0 to 255 do
|
||||
begin
|
||||
move(buf[i*4], buf4[0], 4);
|
||||
BlockWrite(f, buf4[0], 3);
|
||||
end;
|
||||
|
||||
RGB4:
|
||||
BlockWrite(f, buf[0], length(buf));
|
||||
|
||||
end;
|
||||
|
||||
CloseFile(f);
|
||||
{$I+}
|
||||
IOResult;
|
||||
end;
|
||||
procedure SaveBuf(var buf: array of byte; fn: string);
|
||||
var
|
||||
f: file of byte;
|
||||
begin
|
||||
{$I-}
|
||||
AssignFile(f, fn);
|
||||
rewrite(f);
|
||||
BlockWrite(f, buf[0], length(buf));
|
||||
CloseFile(f);
|
||||
{$I+}
|
||||
IOResult;
|
||||
end;
|
||||
function PalTypeToStr(t: longint): string;
|
||||
begin
|
||||
case t of
|
||||
RGB3: result:= 'RGB3';
|
||||
RGB4: result:= 'RGB4';
|
||||
else result:= 'RGB unknown';
|
||||
end;
|
||||
end;
|
||||
|
||||
var
|
||||
TFileHeader: BITMAPFILEHEADER;
|
||||
TInfoHeader: BITMAPINFOHEADER;
|
||||
f: file of byte;
|
||||
bmp_file_name, pal_file_name, dat_file_name: string;
|
||||
i: longint;
|
||||
pal_type: byte;
|
||||
buf: array of byte;
|
||||
begin
|
||||
ExitCode:= 0;
|
||||
|
||||
writeln('Extractor BMP-files for Sprinter BIOS logo');
|
||||
writeln('Copyright (c) 2022 Sprinter Team');
|
||||
|
||||
// default params
|
||||
bmp_file_name:= 'logo.bmp';
|
||||
pal_file_name:= 'logo_pal.bin';
|
||||
dat_file_name:= 'logo_dat.bin';
|
||||
pal_type:= RGB4;
|
||||
|
||||
if ParamStr(1) = '/?' then
|
||||
begin
|
||||
MsgHelp;
|
||||
exit;
|
||||
end;
|
||||
|
||||
// override params
|
||||
if ParamStr(1) <> '' then
|
||||
bmp_file_name:= ParamStr(1);
|
||||
|
||||
for i:= 2 to ParamCount do
|
||||
begin
|
||||
// palette file name
|
||||
if LowerCase(ParamStr(i)) = '/pn' then
|
||||
pal_file_name:= trim(ParamStr(i+1));
|
||||
|
||||
// data file name
|
||||
if LowerCase(ParamStr(i)) = '/dn' then
|
||||
dat_file_name:= trim(ParamStr(i+1));
|
||||
|
||||
if (LowerCase(ParamStr(i)) = '/pt') and (ParamStr(i+1) = '3') then
|
||||
pal_type:= RGB3;
|
||||
end;
|
||||
|
||||
// ---------------------------------------------------------------------------
|
||||
|
||||
AssignFile(f, bmp_file_name);
|
||||
|
||||
{$I-}
|
||||
Reset(f);
|
||||
{$I+}
|
||||
i:= IOResult;
|
||||
if i <> 0 then
|
||||
begin
|
||||
writeln('IO error ', i, ' during open ['+bmp_file_name+'] file');
|
||||
MsgHelp;
|
||||
ExitCode:= 1;
|
||||
exit;
|
||||
end;
|
||||
|
||||
{$I-}
|
||||
BlockRead(f, TFileHeader, SizeOf(TFileHeader));
|
||||
BlockRead(f, TInfoHeader, SizeOf(TInfoHeader));
|
||||
{$I+}
|
||||
i:= IOResult;
|
||||
if i <> 0 then
|
||||
begin
|
||||
writeln('IO error ', i, ' during open ['+bmp_file_name+'] file');
|
||||
ExitCode:= 1;
|
||||
exit;
|
||||
end;
|
||||
|
||||
// writeln('FILE, ', SizeOf(TFileHeader));
|
||||
// writeln('bfType: ', TFileHeader.bfType);
|
||||
// writeln('bfSize: ', TFileHeader.bfSize);
|
||||
// writeln('bfReserved1: ', TFileHeader.bfReserved1);
|
||||
// writeln('bfReserved2: ', TFileHeader.bfReserved2);
|
||||
// writeln('bfOffBits: ', TFileHeader.bfOffBits);
|
||||
//
|
||||
// writeln('INFO, ', SizeOf(TInfoHeader));
|
||||
// writeln('biSize: ', TInfoHeader.biSize);
|
||||
// writeln('biWidth: ', TInfoHeader.biWidth);
|
||||
// writeln('biHeight: ', TInfoHeader.biHeight);
|
||||
// writeln('biPlanes: ', TInfoHeader.biPlanes);
|
||||
// writeln('biBitCount: ', TInfoHeader.biBitCount);
|
||||
// writeln('biCompression: ', TInfoHeader.biCompression);
|
||||
// writeln('biSizeImage: ', TInfoHeader.biSizeImage);
|
||||
// writeln('biXPelsPerMeter: ', TInfoHeader.biXPelsPerMeter);
|
||||
// writeln('biYPelsPerMeter: ', TInfoHeader.biYPelsPerMeter);
|
||||
// writeln('biClrUsed: ', TInfoHeader.biClrUsed);
|
||||
// writeln('biClrImportant: ', TInfoHeader.biClrImportant);
|
||||
|
||||
// check acceptable bmp format
|
||||
if (TFileHeader.bfType <> $4D42)
|
||||
or (TInfoHeader.biWidth <> 128)
|
||||
or (TInfoHeader.biHeight <> 72)
|
||||
or (TInfoHeader.biBitCount <> 8)
|
||||
or (TInfoHeader.biCompression <> 0)
|
||||
then
|
||||
begin
|
||||
MsgWrong;
|
||||
ExitCode:= 1;
|
||||
exit;
|
||||
end;
|
||||
|
||||
with TInfoHeader do
|
||||
writeln('File ['+bmp_file_name+'], found ',biBitCount,' bit BMP ',biWidth,'x',biHeight,', output '+PalTypeToStr(pal_type)+' ['+pal_file_name+'] and ['+dat_file_name+']');
|
||||
|
||||
// make palette
|
||||
SetLength(buf, 1024);
|
||||
FillChar(buf[0], length(buf), 0);
|
||||
BlockRead(f, buf[0], (TFileHeader.bfOffBits - SizeOf(TFileHeader) - SizeOf(TInfoHeader)) );
|
||||
SavePalette(buf, pal_file_name, pal_type);
|
||||
|
||||
// make data
|
||||
SetLength(buf, TInfoHeader.biWidth * TInfoHeader.biHeight);
|
||||
FillChar(buf[0], length(buf), 0);
|
||||
BlockRead(f, buf[0], length(buf));
|
||||
SaveBuf(buf, dat_file_name);
|
||||
|
||||
CloseFile(f);
|
||||
|
||||
writeln('Done.');
|
||||
|
||||
end.
|
||||
BIN
src/bin/bmp_extract.exe
Normal file
BIN
src/bin/bmp_extract.exe
Normal file
Binary file not shown.
172
src/bin/disk3.dpr
Normal file
172
src/bin/disk3.dpr
Normal file
@ -0,0 +1,172 @@
|
||||
program disk3;
|
||||
|
||||
{$APPTYPE CONSOLE}
|
||||
|
||||
uses
|
||||
Classes,
|
||||
SysUtils;
|
||||
|
||||
function vall(s: string): longint;
|
||||
begin
|
||||
try
|
||||
result:= strtoint(s);
|
||||
except
|
||||
result:= 0;
|
||||
end;
|
||||
end;
|
||||
function strr(n: longint): string;
|
||||
begin
|
||||
try
|
||||
result:= inttostr(n);
|
||||
except
|
||||
result:= '0';
|
||||
end;
|
||||
end;
|
||||
procedure SplitParams(const splitter: string; const params: string; var dest: TStringList);
|
||||
var
|
||||
p: longint;
|
||||
tmp: string;
|
||||
begin
|
||||
if not Assigned(dest) then
|
||||
exit;
|
||||
|
||||
dest.Clear;
|
||||
tmp:= params;
|
||||
p:= pos(splitter, tmp);
|
||||
|
||||
while (p > 0) do
|
||||
begin
|
||||
dest.Add(copy(tmp, 1, p-1));
|
||||
tmp:= copy(tmp, p+1, length(tmp) - p);
|
||||
p:= pos(splitter, tmp);
|
||||
end;
|
||||
dest.Add(tmp);
|
||||
end;
|
||||
|
||||
procedure help;
|
||||
begin
|
||||
writeln('DISK3: Sprinter FW builder');
|
||||
writeln('Copyright (c) 2021 Sprinter Team');
|
||||
writeln('Usage:');
|
||||
writeln(' disk3.exe <OUTPUT FILE> <INPUT FILE> <OUTPUT_OFFSET, DATA_LENGTH, INPUT_OFFSET>');
|
||||
writeln('Offsets and data length could be in dec or hex values: 16384 or 4000H');
|
||||
writeln;
|
||||
end;
|
||||
|
||||
const
|
||||
MAX_BUF_SIZE = 1024 * 512;
|
||||
|
||||
var
|
||||
items_list: TStringList;
|
||||
s: string;
|
||||
o_ofs, data_len, i_ofs: longint;
|
||||
o_file_name, i_file_name: string;
|
||||
o_file, i_file: file of byte;
|
||||
i, readed: longint;
|
||||
|
||||
buf: array of byte;
|
||||
|
||||
begin
|
||||
// DISK3.COM OUTPUT_FILE INPUT_FILE OUTPUT_OFFSET,LENGHT,INPUT_OFFSET
|
||||
|
||||
// check incoming values
|
||||
if ParamCount < 3 then
|
||||
begin
|
||||
help;
|
||||
exit;
|
||||
end;
|
||||
|
||||
o_file_name:= ParamStr(1);
|
||||
if trim(o_file_name) = '' then
|
||||
begin
|
||||
writeln('ERROR: output file name is not specified');
|
||||
exit;
|
||||
end;
|
||||
|
||||
i_file_name:= ParamStr(2);
|
||||
if trim(o_file_name) = '' then
|
||||
begin
|
||||
writeln('ERROR: input file name is not specified');
|
||||
exit;
|
||||
end;
|
||||
|
||||
// parse offsets
|
||||
items_list:= TStringList.Create;
|
||||
|
||||
SplitParams(',', ParamStr(3), items_list);
|
||||
|
||||
s:= '0';
|
||||
if items_list.Count >= 1 then
|
||||
s:= items_list[0];
|
||||
if UpperCase(s[length(s)]) = 'H' then
|
||||
s:= '$' + copy(s, 1, length(s)-1);
|
||||
o_ofs:= vall(s);
|
||||
|
||||
s:= '0';
|
||||
if items_list.Count >= 2 then
|
||||
s:= items_list[1];
|
||||
if UpperCase(s[length(s)]) = 'H' then
|
||||
s:= '$' + copy(s, 1, length(s)-1);
|
||||
data_len:= vall(s);
|
||||
|
||||
s:= '0';
|
||||
if items_list.Count >= 3 then
|
||||
s:= items_list[2];
|
||||
if UpperCase(s[length(s)]) = 'H' then
|
||||
s:= '$' + copy(s, 1, length(s)-1);
|
||||
i_ofs:= vall(s);
|
||||
|
||||
items_list.Free;
|
||||
|
||||
// work params
|
||||
write('<'+o_file_name+'> <'+i_file_name+'> <'+inttohex(o_ofs,1)+'h, '+inttohex(data_len,1)+'h, '+inttohex(i_ofs,1)+'h>');
|
||||
|
||||
// check buffer size
|
||||
if (data_len > MAX_BUF_SIZE) then
|
||||
begin
|
||||
writeln('ERROR: DATA_LENGTH='+strr(data_len)+', MAX_BUF_SIZE='+strr(MAX_BUF_SIZE));
|
||||
exit;
|
||||
end;
|
||||
|
||||
// create new buffer
|
||||
SetLength(buf, MAX_BUF_SIZE);
|
||||
FillChar(buf[0], length(buf), $FF);
|
||||
|
||||
// load src file
|
||||
{$I-}
|
||||
FileMode:= fmOpenRead;
|
||||
AssignFile(i_file, i_file_name);
|
||||
reset(i_file);
|
||||
Seek(i_file, i_ofs);
|
||||
BlockRead(i_file, buf[0], data_len, readed);
|
||||
CloseFile(i_file);
|
||||
{$I+}
|
||||
i:= IOResult;
|
||||
if (i > 0) then
|
||||
begin
|
||||
writeln('ERROR: IOResult='+strr(i)+' during loading input file. Readed '+inttohex(readed,1)+'h');
|
||||
exit;
|
||||
end;
|
||||
write(', readed '+inttohex(readed,1)+'h');
|
||||
|
||||
// write buffer to output file
|
||||
{$I-}
|
||||
FileMode:= fmOpenReadWrite;
|
||||
AssignFile(o_file, o_file_name);
|
||||
reset(o_file);
|
||||
if IOResult <> 0 then
|
||||
rewrite(o_file);
|
||||
Seek(o_file, o_ofs);
|
||||
BlockWrite(o_file, buf[0], data_len);
|
||||
CloseFile(o_file);
|
||||
{$I+}
|
||||
i:= IOResult;
|
||||
if (i > 0) then
|
||||
begin
|
||||
writeln('ERROR: IOResult='+strr(i)+' during writing to output file');
|
||||
exit;
|
||||
end;
|
||||
|
||||
// finish
|
||||
writeln(', OK');
|
||||
end.
|
||||
BIN
src/bin/disk3.exe
Normal file
BIN
src/bin/disk3.exe
Normal file
Binary file not shown.
BIN
src/bin/hrust.exe
Normal file
BIN
src/bin/hrust.exe
Normal file
Binary file not shown.
BIN
src/bin/lz4ultra
Normal file
BIN
src/bin/lz4ultra
Normal file
Binary file not shown.
41
src/bin/make_num.c
Normal file
41
src/bin/make_num.c
Normal file
@ -0,0 +1,41 @@
|
||||
#include <stdio.h>
|
||||
#include <stdlib.h>
|
||||
|
||||
int main(int argc, char** argv)
|
||||
{
|
||||
FILE *f;
|
||||
unsigned int l,sz,bb,ll;
|
||||
unsigned short b[4];
|
||||
f = fopen(argv[1],"rb");
|
||||
if(f==NULL) return -1;
|
||||
fseek(f,0,SEEK_END);
|
||||
sz = ftell(f);
|
||||
fseek(f,0,SEEK_SET);
|
||||
printf("SIZE: %u\n",sz);
|
||||
b[0] = b[1] = b[2] = b[3] = 0;
|
||||
for(l=0;l<sz;l++)
|
||||
{
|
||||
bb = fgetc(f);
|
||||
b[0] += bb;
|
||||
if(b[0] >= 0x100)
|
||||
{
|
||||
b[0] &= 0xFF;
|
||||
b[1] += bb;
|
||||
if(b[1] >= 0x100)
|
||||
{
|
||||
b[1] &= 0xFF;
|
||||
b[2] += bb;
|
||||
if(b[2] >= 0x100)
|
||||
{
|
||||
b[2] &= 0xFF;
|
||||
b[3] += bb;
|
||||
if(b[3] >= 0x100)
|
||||
b[3] &= 0xFF;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
fclose(f);
|
||||
printf("SUM: %2.2X %2.2X %2.2X %2.2X\n",b[0],b[1],b[2],b[3]);
|
||||
return 0;
|
||||
}
|
||||
BIN
src/bin/make_num.exe
Normal file
BIN
src/bin/make_num.exe
Normal file
Binary file not shown.
BIN
src/bin/mhmt
Normal file
BIN
src/bin/mhmt
Normal file
Binary file not shown.
BIN
src/bin/sjasmplus.exe
Normal file
BIN
src/bin/sjasmplus.exe
Normal file
Binary file not shown.
77
src/bin/transttf.dpr
Normal file
77
src/bin/transttf.dpr
Normal file
@ -0,0 +1,77 @@
|
||||
program transttf;
|
||||
|
||||
{$APPTYPE CONSOLE}
|
||||
|
||||
uses
|
||||
Convert,
|
||||
CLasses;
|
||||
|
||||
var
|
||||
fb: file;
|
||||
f: textfile;
|
||||
s: string;
|
||||
tsl: TStringList;
|
||||
i, k: longint;
|
||||
b: byte;
|
||||
buf: array[0..1000] of byte;
|
||||
begin
|
||||
writeln('transform ttf-file to binary');
|
||||
writeln('Copyright (c) 2021 Sprinter Team');
|
||||
|
||||
if ParamCount < 1 then
|
||||
begin
|
||||
writeln('usage:');
|
||||
writeln(' transttf.exe <in_file> <out_file>');
|
||||
exit;
|
||||
end;
|
||||
|
||||
{$I-}
|
||||
if ParamStr(2) <> '' then
|
||||
AssignFile(fb, ParamStr(2))
|
||||
else
|
||||
AssignFile(fb, ParamStr(1)+'.bin');
|
||||
rewrite(fb, 1);
|
||||
|
||||
AssignFile(f, ParamStr(1));
|
||||
reset(f);
|
||||
|
||||
i:= 1;
|
||||
while not EOF(f) do
|
||||
begin
|
||||
readln(f, s);
|
||||
|
||||
if s[length(s)] <> ',' then
|
||||
s:= s + ',';
|
||||
|
||||
tsl:= TStringList.Create;
|
||||
tsl.Delimiter:= ','; //comma delimiter
|
||||
tsl.QuoteChar:= #0;
|
||||
tsl.StrictDelimiter := True;
|
||||
tsl.DelimitedText:= s;
|
||||
|
||||
// writeln('count: '+strr(tsl.Count)+', s=['+s+']');
|
||||
|
||||
for k:= 0 to sizeof(buf) do
|
||||
buf[k]:= 0;
|
||||
|
||||
for k:= 0 to tsl.Count-1 do
|
||||
begin
|
||||
b:= vall(tsl.Strings[k]);
|
||||
buf[k]:= b;
|
||||
end;
|
||||
|
||||
BlockWrite(fb, buf, tsl.Count-1);
|
||||
|
||||
inc(i);
|
||||
end;
|
||||
|
||||
|
||||
CloseFile(f);
|
||||
|
||||
CloseFile(fb);
|
||||
|
||||
IOResult;
|
||||
{$I+}
|
||||
|
||||
writeln('transform done.');
|
||||
end.
|
||||
BIN
src/bin/transttf.exe
Normal file
BIN
src/bin/transttf.exe
Normal file
Binary file not shown.
141
src/bios/BIOS.asm
Normal file
141
src/bios/BIOS.asm
Normal file
@ -0,0 +1,141 @@
|
||||
;
|
||||
;----------------[TO DO]----------------
|
||||
; DEFINE path to rom, exp, build, etc.
|
||||
; DEFINE path to including files for rom, exp, loader, etc...
|
||||
; ...
|
||||
;---------------------------------------
|
||||
|
||||
;=======================================
|
||||
; DEFDEVICE SPRINTER, #4000, 256
|
||||
DEVICE SPRINTER
|
||||
; ENCODING "DOS"
|
||||
;=======================================
|
||||
|
||||
;------------[LUA functions]------------;
|
||||
includelua 'Shared_includes/lua/Functions.lua'
|
||||
;---------------------------------------;
|
||||
|
||||
;-----------[Shared Includes]-----------
|
||||
INCLUDE 'src/bios/shared/includes.inc' ; Includes
|
||||
;---------------------------------------
|
||||
|
||||
IF PACKED_MAIN
|
||||
;------------[MAIN prebuild]------------;
|
||||
LUA PASS1
|
||||
-- áâà ¨¢ ¥¬ ¯ãâì ¤® 㯠ª®¢é¨ª
|
||||
detected_os = Detect_os()
|
||||
print ("OS detected:", detected_os)
|
||||
print ()
|
||||
|
||||
if detected_os == "Windows" then
|
||||
pack_prog = "src\\bin\\hrust.exe Build\\Bin\\temp\\MAIN.PAK Build\\Bin\\temp\\MAIN.BIN"
|
||||
elseif detected_os == "MacOS" then
|
||||
pack_prog = "src/bin/mhmt -hst -zxh Build/Bin/temp/MAIN.BIN Build/Bin/temp/MAIN.PAK"
|
||||
elseif detected_os == "Linux" then
|
||||
pack_prog = "src/bin/mhmt -hst -zxh Build/Bin/temp/MAIN.BIN Build/Bin/temp/MAIN.PAK"
|
||||
end
|
||||
|
||||
|
||||
-- ª®¬¯¨«ïæ¨ï ¤«ï ¯®«ã票ï ᦠ⮣® ä ©« MAIN ¨ 宫®á⮩ ¯à®å®¤ Set_Pictures.asm
|
||||
if (os.execute("sjasmplus -DPREBUILD=1 -Wall --msg=war --nologo --syntax=w --fullpath --lst=Build/Prebuilds.LST SRC/BIOS/ROM/SETUP/MAIN.ASM")) then
|
||||
print("--[ MAIN.ASM Prebuild DONE ]--")
|
||||
if (os.execute(pack_prog)) then
|
||||
print("--[ Hrusting MAIN.BIN DONE ]--")
|
||||
print(" ")
|
||||
else
|
||||
print("--[ Hrusting MAIN.BIN ERROR!!! ]--")
|
||||
os.exit(1)
|
||||
end
|
||||
else
|
||||
print("--[ MAIN.ASM Prebuild ERROR!!! ]--")
|
||||
os.exit(1)
|
||||
end
|
||||
ENDLUA
|
||||
;---------------------------------------;
|
||||
ENDIF
|
||||
|
||||
IF PACKED_MAIN
|
||||
;----------[MAIN's referenses]----------; Š®¬¯¨«ïæ¨ï ¤«ï ¯®«ãç¥¨ï ¤à¥á®¢ ¬¥â®ª ¨ ¯à®æ¥¤ãà
|
||||
MMU 2 e, 18 ; áâà ¨æ 18 ¢ ¡ ªã 2 ¨ ¯à®¢¥àª £à ¨æë.
|
||||
ORG COMPILE_ADDR.MAIN
|
||||
INCLUDE 'src/bios/ROM/SETUP/MAIN.asm'
|
||||
;---------------------------------------
|
||||
ENDIF
|
||||
|
||||
|
||||
; Building page 8 of Sprinter ROM
|
||||
;-----------------[EXP]-----------------
|
||||
MMU 0 e, 8 ; áâà ¨æ 8 ¢ ¡ ªã 0 ¨ ¯à®¢¥àª £à ¨æë
|
||||
ORG COMPILE_ADDR.EXP
|
||||
OUTPUT 'Build/Bin/EXP.BIN'
|
||||
ShowInfo 'EXP block Start', 0 ; !!!!! test
|
||||
INCLUDE 'src/bios/EXP/EXP.asm'
|
||||
ShowInfo 'EXP block End', 0 ; !!!!! test
|
||||
OUTEND
|
||||
;---------------------------------------
|
||||
|
||||
|
||||
|
||||
; Building page 0 of Sprinter ROM
|
||||
;-----------------[ROM]-----------------
|
||||
MMU 0 e, 0 ; áâà ¨æ 0 ¢ ¡ ªã 0 ¨ ¯à®¢¥àª £à ¨æë.
|
||||
ORG ROM_MAP.ROM
|
||||
OUTPUT 'Build/Bin/ROM.BIN'
|
||||
ShowInfo 'ROM block Start', 0 ; !!!!! test
|
||||
INCLUDE 'src/bios/ROM/ROM.asm'
|
||||
ShowInfo 'ROM block End', 0 ; !!!!! test
|
||||
OUTEND
|
||||
;---------------------------------------
|
||||
;
|
||||
|
||||
|
||||
|
||||
; Building page 12 of Sprinter ROM
|
||||
;------[Loader with bitstream K30]------
|
||||
MMU 0 3, 12 ; áâà ¨æë 12-15 ¢ ¡ ª¨ 0-3.
|
||||
ORG ROM_MAP.LOADER
|
||||
OUTPUT 'Build/Bin/LOADER_K30.BIN'
|
||||
Conf_loader K30
|
||||
BLOCK #10000-$,#FF
|
||||
OUTEND
|
||||
;---------------------------------------
|
||||
|
||||
|
||||
|
||||
; Building page 22 of Sprinter ROM
|
||||
;------[Loader with bitstream K50]------
|
||||
MMU 0 3, 22 ; áâà ¨æë 22-25 ¢ ¡ ª¨ 0-3.
|
||||
ORG ROM_MAP.LOADER
|
||||
OUTPUT 'Build/Bin/LOADER_K50.BIN'
|
||||
;!TODO ᤥ« âì 㯠ª®¢é¨ª ¡¨âáâਬ âãâ LUA
|
||||
Conf_loader K50
|
||||
BLOCK #10000-$,#FF
|
||||
OUTEND
|
||||
;---------------------------------------
|
||||
;
|
||||
|
||||
; Building page 1 of Sprinter ROM
|
||||
;-----------------[LOGO]-----------------
|
||||
MMU 1 e, 1 ; áâà ¨æ 1 ¢ ¡ ªã 1 ¨ ¯à®¢¥àª £à ¨æë.
|
||||
ORG ROM_MAP.LOGO
|
||||
OUTPUT 'Build/Bin/LOGO.BIN'
|
||||
INCLUDE 'src/bios/logo/Set_Pictures.asm'
|
||||
OUTEND
|
||||
;---------------------------------------
|
||||
;
|
||||
EXPORT ID_Version
|
||||
EXPORT ID_SPRINTER.bitstream_ver
|
||||
EXPORT bitstream_ver_hex
|
||||
EXPORT Disk_subsystem_ver_hex
|
||||
EXPORT EXP_ID.VER
|
||||
EXPORT EXP_ID.MOD
|
||||
EXPORT ROM_ID.VER
|
||||
EXPORT ROM_ID.MOD
|
||||
EXPORT BoardID.start
|
||||
EXPORT BoardID.end
|
||||
EXPORT ROM_NUMBER ; !FIXIT part1, part2 ¤«ï Flasher
|
||||
|
||||
; LUA ALLPASS
|
||||
; print ("DEPACKER", sj.get_label("DEPACKER.PackedMAIN"))
|
||||
; print ("UnPacker", sj.get_label("UnPacker.PackedMAIN"))
|
||||
; ENDLUA
|
||||
125
src/bios/BUILD.a80
Normal file
125
src/bios/BUILD.a80
Normal file
@ -0,0 +1,125 @@
|
||||
/*
|
||||
;------------[LUA functions]------------;
|
||||
includelua 'Shared_Includes/LUA/Functions.lua'
|
||||
;---------------------------------------;
|
||||
DEFINE PICTURE_FILE './src/bios/logo/psfathers.bmp'
|
||||
|
||||
|
||||
LUA PASS1
|
||||
-- <20>஢¥à塞 BMP, ¤®áâ ñ¬ ¨§ ¥£® ¯ à ¬¥âàë, ०¥¬ ªã᪨
|
||||
bmp_width, bmp_height, bmp_image_size, bmp_image_offset, bmp_colors = Get_bmp8bit_values (sj.get_define("PICTURE_FILE"))
|
||||
|
||||
if bmp_width ~= 128 then sj.error("Invalid BMP width", bmp_width) end
|
||||
if bmp_height ~= 72 then sj.error("Invalid BMP height", bmp_height) end
|
||||
if bmp_colors ~= 256 then sj.error("Invalid BMP number of colors", bmp_colors) end
|
||||
|
||||
if not File_save(sj.get_define("PICTURE_FILE"), "./Build/Bin/LOGO_PAL.BIN", bmp_image_offset-1024, 1024) then sj.error("Palete save error!") end
|
||||
if not File_save(sj.get_define("PICTURE_FILE"), "./Build/Bin/LOGO_DAT.BIN", bmp_image_offset, bmp_image_size) then sj.error("Image data save error!") end
|
||||
|
||||
ENDLUA
|
||||
*/
|
||||
INCLUDE 'shared/defines.inc'
|
||||
|
||||
DEFINE IMG_RECOVERY 'src/bios/shared/recovery.img'
|
||||
;DEFINE IMG_RECOVERY 'src/bios/shared/recovery_tst.img'
|
||||
|
||||
;
|
||||
;[--------------------------------------------------------------------------]
|
||||
MACRO Set_Block text, blk_addr
|
||||
.tmp equ $
|
||||
BLOCK blk_addr-.tmp,#FF
|
||||
DISPLAY text, /H, $-.tmp
|
||||
ENDM
|
||||
;[--------------------------------------------------------------------------]
|
||||
|
||||
|
||||
;[--------------------------------------------------------------------------]
|
||||
MACRO ROM_BUILD bitstream
|
||||
|
||||
;PAGE 0
|
||||
INCBIN 'Build/Bin/ROM.BIN'
|
||||
Set_Block 'ROM free space: ', #4000
|
||||
;
|
||||
;PAGE 1
|
||||
; INCBIN 'Build/Bin/LOGO_PAL.BIN'
|
||||
; INCBIN 'Build/Bin/LOGO_DAT.BIN'
|
||||
INCBIN 'Build/Bin/LOGO.BIN'
|
||||
Set_Block 'LOGO free space: ', #8000
|
||||
;
|
||||
|
||||
;
|
||||
;PAGE 2 ZX Page - #42
|
||||
INCBIN 'src/ZX_ROMS/SP_128.BIN'
|
||||
Set_Block 'SP_128 free space: ', #C000
|
||||
;
|
||||
;PAGE 3 ZX Page - #43
|
||||
INCBIN 'src/ZX_ROMS/SP__48.BIN'
|
||||
Set_Block 'SP_48 free space: ', #10000
|
||||
;
|
||||
;PAGE 4 ZX Page - #44
|
||||
INCBIN 'src/ZX_ROMS/SP_TRD.BIN'
|
||||
Set_Block 'SP_TRD free space: ', #14000
|
||||
;
|
||||
;PAGE 5 ZX Page - #45
|
||||
INCBIN 'src/ZX_ROMS/SP_EXP.BIN'
|
||||
Set_Block 'SP_EXP free space: ', #18000
|
||||
|
||||
IF SetFullZXromLoader
|
||||
;
|
||||
;PAGE 6 ZX Page - #46
|
||||
INCBIN 'src/ZX_ROMS/SP_EXP.BIN'
|
||||
Set_Block 'SP_EXP (duble) free space: ', #1C000
|
||||
;
|
||||
;PAGE 7 ZX Page - #47
|
||||
INCBIN 'src/ZX_ROMS/SP_EXP2.BIN'
|
||||
Set_Block 'SP_EXP2 free space: ', #20000
|
||||
ELSE
|
||||
INCBIN IMG_RECOVERY,0,#8000
|
||||
DISPLAY "ROM Disk recovery part1, pages 6..7: #20000..#28000"
|
||||
;Set_Block 'Empty space: ', #1C000 ; 6
|
||||
;Set_Block 'Empty space: ', #20000 ; 7
|
||||
ENDIF
|
||||
;
|
||||
|
||||
|
||||
;
|
||||
;PAGE 8
|
||||
INCBIN 'Build/Bin/EXP.BIN'
|
||||
Set_Block 'EXP free space: ', #24000
|
||||
;
|
||||
;PAGE 9-11 (#09, #0A, #0B)
|
||||
INCBIN IMG_RECOVERY,#8000,#C000
|
||||
DISPLAY "ROM Disk recovery part2, pages 9..11: #24000..#30000"
|
||||
; Set_Block 'Empty space: ', #28000
|
||||
; Set_Block 'Empty space: ', #2C000
|
||||
; Set_Block 'Empty space: ', #30000
|
||||
;
|
||||
;PAGE 12-15 (#0C, #0D, #0E, #0F)
|
||||
INCBIN bitstream
|
||||
Set_Block 'Loader & Bitstream free space: ', #40000
|
||||
;
|
||||
ENDM
|
||||
;[--------------------------------------------------------------------------]
|
||||
|
||||
|
||||
|
||||
|
||||
;[--------------------------------------------------------------------------]
|
||||
ORG 0
|
||||
DISPLAY '[ Building ROM for 1K30 ]'
|
||||
OUTPUT 'Build/_SPRIN.BIN'
|
||||
ROM_BUILD 'Build/Bin/LOADER_K30.BIN'
|
||||
OUTEND
|
||||
DISPLAY '[ Building ROM for 1K30 done ]'
|
||||
DISPLAY ' '
|
||||
|
||||
|
||||
DISP 0
|
||||
DISPLAY '[ Building ROM for 1K50 ]'
|
||||
OUTPUT 'Build/_SPRIN50.BIN'
|
||||
ROM_BUILD 'Build/Bin/LOADER_K50.BIN'
|
||||
OUTEND
|
||||
DISPLAY '[ Building ROM for 1K50 done ]'
|
||||
ENT
|
||||
;[--------------------------------------------------------------------------]
|
||||
;
|
||||
346
src/bios/Test/IDE_BIOS.as
Normal file
346
src/bios/Test/IDE_BIOS.as
Normal file
@ -0,0 +1,346 @@
|
||||
|
||||
;========================================================
|
||||
;55H READH LOAD SECTORS
|
||||
;56H WRITEH SAVE SECTORS
|
||||
;57H VERIFYH VERIFY SECTORS
|
||||
|
||||
Y_PORT EQU 089H
|
||||
;Write
|
||||
HDW_COM EQU 4153H ;1F7H Command
|
||||
HDW_DRV EQU 4152H ;1F6H Drive Control
|
||||
|
||||
HDW_CLH EQU 0155H ;1F5H Cylinder High
|
||||
HDW_CLL EQU 0154H ;1F4H Cylinder Low
|
||||
HDW_SEC EQU 0153H ;1F3H Sector
|
||||
HDW_CNT EQU 0152H ;1F2H Counter
|
||||
HDW_ERR EQU 0151H ;1F1H Error
|
||||
HDW_DAT EQU 0150H ;1F0H Data
|
||||
;Read
|
||||
HDR_CTL EQU 4053H ;1F7H Status (Control)
|
||||
HDR_DRV EQU 4052H ;1F6H Drive Control
|
||||
|
||||
HDR_CLH EQU 0055H ;1F5H Cylinder High
|
||||
HDR_CLL EQU 0054H ;1F4H Cylinder Low
|
||||
HDR_SEC EQU 0053H ;1F3H Sector
|
||||
HDR_CNT EQU 0052H ;1F2H Counter
|
||||
HDR_ERR EQU 0051H ;1F1H Error
|
||||
HDR_DAT EQU 0050H ;1F0H Data
|
||||
|
||||
BSY EQU 7
|
||||
RDY EQU 6
|
||||
DRQ EQU 3
|
||||
ERR EQU 0
|
||||
|
||||
;EQU FOR IY+
|
||||
DRVHD_H EQU 0
|
||||
SC_PT_H EQU 1
|
||||
HEADS_H EQU 2
|
||||
CYL_L_H EQU 3
|
||||
CYL_H_H EQU 4
|
||||
SPCLL_H EQU 5
|
||||
SPCLH_H EQU 6
|
||||
|
||||
IDE0 EQU 0C1C0H
|
||||
IDE1 EQU 0C1C8H
|
||||
|
||||
;IDE0 DEFB #FF ;DRIVE/HEAD REGISTER ;00
|
||||
; DEFB #FF ;SECTORS PER TRACK ;01
|
||||
; DEFB #FF ;HEADS ;02
|
||||
; DEFB #FF ;CYLINDERS LOW ;03
|
||||
; DEFB #FF ;CYLINDERS HIGH ;04
|
||||
; DEFB #FF ;SECTOR PER CYLINDER LOW ;05
|
||||
; DEFB #FF ;SECTOR PER CYLINDER HIGH ;06
|
||||
; DEFB #FF ;RESERVED ;07
|
||||
|
||||
;IDE1 DEFB #FF ;DRIVE/HEAD REGISTER ;00
|
||||
; DEFB #FF ;SECTORS PER TRACK ;01
|
||||
; DEFB #FF ;HEADS ;02
|
||||
; DEFB #FF ;CYLINDERS LOW ;03
|
||||
; DEFB #FF ;CYLINDERS HIGH ;04
|
||||
; DEFB #FF ;SECTOR PER CYLINDER LOW ;05
|
||||
; DEFB #FF ;SECTOR PER CYLINDER HIGH ;06
|
||||
; DEFB #FF ;RESERVED ;07
|
||||
|
||||
;HL:IX - SECTOR
|
||||
; DE - ADDRESS
|
||||
; B - SECTORS
|
||||
|
||||
;READ SECTOR(S)
|
||||
READH: PUSH IY
|
||||
EXX
|
||||
LD C,Y_PORT
|
||||
IN B,(C)
|
||||
PUSH BC
|
||||
LD E,0C0H
|
||||
OUT (C),E
|
||||
EXX
|
||||
CALL RDS000
|
||||
EXX
|
||||
POP BC
|
||||
OUT (C),B
|
||||
EXX
|
||||
POP IY
|
||||
RET NC
|
||||
LD A,4 ;NOT READY
|
||||
RET
|
||||
|
||||
;READ SECTOR(S)
|
||||
RDS000: AND 1
|
||||
LD IY,IDE0
|
||||
JR Z,RDS001
|
||||
LD IY,IDE1
|
||||
RDS001: EXX
|
||||
LD DE,0C040H
|
||||
LD BC,HDR_CTL
|
||||
CALL WAITPRT
|
||||
EXX
|
||||
RET C
|
||||
PUSH DE
|
||||
CALL PRESET
|
||||
POP HL
|
||||
LD BC,HDW_COM
|
||||
LD A,020H ;READ WITH RETRY
|
||||
OUT (C),A
|
||||
;SAVE HL!
|
||||
RDS002: EXX
|
||||
LD DE,08908H ;WAIT BUSY=0 & DRQ=1 & ERR=0
|
||||
LD BC,HDR_CTL
|
||||
CALL WAITPRT
|
||||
EXX
|
||||
RET C
|
||||
LD BC,HDR_DAT
|
||||
INIR
|
||||
INIR
|
||||
;
|
||||
LD A,H
|
||||
OR L
|
||||
JR NZ,W44
|
||||
LD HL,0C000H
|
||||
W44
|
||||
;
|
||||
LD BC,HDR_CTL
|
||||
IN A,(C)
|
||||
BIT DRQ,A
|
||||
JR NZ,RDS002
|
||||
XOR A
|
||||
RET
|
||||
|
||||
;HL:IX - SECTOR
|
||||
; DE - ADDRESS
|
||||
; B - SECTORS
|
||||
|
||||
;WRITE SECTOR(S)
|
||||
WRITEH: PUSH IY
|
||||
EXX
|
||||
LD C,Y_PORT
|
||||
IN B,(C)
|
||||
PUSH BC
|
||||
LD E,0C0H
|
||||
OUT (C),E
|
||||
EXX
|
||||
CALL WRS000
|
||||
EXX
|
||||
POP BC
|
||||
OUT (C),B
|
||||
EXX
|
||||
POP IY
|
||||
RET NC
|
||||
LD A,4 ;NOT READY
|
||||
RET
|
||||
|
||||
;WRITE SECTOR(S)
|
||||
WRS000: AND 1
|
||||
LD IY,IDE0
|
||||
JR Z,WRS001
|
||||
LD IY,IDE1
|
||||
WRS001: EXX
|
||||
LD DE,0C040H
|
||||
LD BC,HDR_CTL
|
||||
CALL WAITPRT
|
||||
EXX
|
||||
RET C
|
||||
PUSH DE
|
||||
CALL PRESET
|
||||
POP HL
|
||||
LD BC,HDW_COM
|
||||
LD A,030H ;WRITE WITH RETRY
|
||||
OUT (C),A
|
||||
;SAVE HL!
|
||||
WRS002: EXX
|
||||
LD DE,08908H ;WAIT BUSY=0 & DRQ=1 & ERR=0
|
||||
LD BC,HDR_CTL
|
||||
CALL WAITPRT
|
||||
EXX
|
||||
RET C
|
||||
LD BC,HDW_DAT
|
||||
OTIR
|
||||
OTIR
|
||||
;
|
||||
LD A,H
|
||||
OR L
|
||||
JR NZ,W33
|
||||
LD HL,0C000H
|
||||
W33:
|
||||
;
|
||||
LD BC,HDR_CTL
|
||||
IN A,(C)
|
||||
BIT DRQ,A
|
||||
JR NZ,WRS002
|
||||
XOR A
|
||||
RET
|
||||
|
||||
;HL:IX - SECTOR
|
||||
; B - SECTORS
|
||||
|
||||
;VERIFY SECTOR(S)
|
||||
VERIFYH:
|
||||
PUSH IY
|
||||
EXX
|
||||
LD C,Y_PORT
|
||||
IN B,(C)
|
||||
PUSH BC
|
||||
LD E,0C0H
|
||||
OUT (C),E
|
||||
EXX
|
||||
CALL VRS000
|
||||
EXX
|
||||
POP BC
|
||||
OUT (C),B
|
||||
EXX
|
||||
POP IY
|
||||
RET NC
|
||||
LD A,4 ;NOT READY
|
||||
RET
|
||||
|
||||
;VERIFY SECTOR(S)
|
||||
VRS000: AND 1
|
||||
LD IY,IDE0
|
||||
JR Z,VRS001
|
||||
LD IY,IDE1
|
||||
VRS001: EXX
|
||||
LD DE,0C040H
|
||||
LD BC,HDR_CTL
|
||||
CALL WAITPRT
|
||||
EXX
|
||||
RET C
|
||||
PUSH DE
|
||||
CALL PRESET
|
||||
POP HL
|
||||
LD BC,HDW_COM
|
||||
LD A,040H ;VERIFY WITH RETRY
|
||||
OUT (C),A
|
||||
VRS002: LD BC,HDR_CTL
|
||||
IN A,(C)
|
||||
BIT ERR,A
|
||||
JR Z,VRS003
|
||||
SCF
|
||||
RET
|
||||
VRS003: LD DE,08100H ;WAIT BUSY=0 & ERR=0
|
||||
LD BC,HDR_CTL
|
||||
CALL WAITPRT
|
||||
RET C
|
||||
XOR A
|
||||
RET
|
||||
|
||||
; HL:IX - LBA SECTOR
|
||||
; B - SECTOR COUNTER
|
||||
|
||||
PRESET: LD A,B
|
||||
LD BC,HDW_CNT
|
||||
OUT (C),A
|
||||
IN A,(0E2H)
|
||||
EX AF,AF'
|
||||
LD A,0FEH
|
||||
OUT (0E2H),A
|
||||
LD A,(IY+DRVHD_H)
|
||||
LD BC,HDW_DRV
|
||||
OUT (C),A
|
||||
BIT 6,A
|
||||
LD E,LX
|
||||
LD D,HX
|
||||
CALL Z,LBA_CHS
|
||||
LD BC,HDW_SEC
|
||||
OUT (C),E ;LBA 0..7
|
||||
LD BC,HDW_CLL
|
||||
OUT (C),D ;LBA 8..15
|
||||
LD BC,HDW_CLH
|
||||
OUT (C),L ;LBA 16..23
|
||||
LD BC,HDW_DRV
|
||||
DEC B
|
||||
IN A,(C)
|
||||
AND 0F0H
|
||||
OR H ;LBA 24..27
|
||||
INC B
|
||||
OUT (C),A
|
||||
EX AF,AF'
|
||||
OUT (0E2H),A
|
||||
AND A
|
||||
RET
|
||||
|
||||
; HL:DE - SECTOR OFFSET
|
||||
|
||||
LBA_CHS:
|
||||
LD C,(IY+SPCLL_H)
|
||||
LD B,(IY+SPCLH_H)
|
||||
; HL:DE / BC => DE:IX HL-OSTATOK
|
||||
DIV32X: LD HX,D
|
||||
LD LX,E
|
||||
EX DE,HL
|
||||
LD HL,0
|
||||
LD A,020H
|
||||
DIV011: ADD IX,IX
|
||||
EX DE,HL
|
||||
ADC HL,HL
|
||||
EX DE,HL
|
||||
ADC HL,HL
|
||||
SBC HL,BC
|
||||
JR NC,DIV012
|
||||
ADD HL,BC
|
||||
DEC A
|
||||
JR NZ,DIV011
|
||||
JR DIV014
|
||||
DIV012: INC IX
|
||||
DEC A
|
||||
JR NZ,DIV011
|
||||
DIV014: LD E,(IY+SC_PT_H)
|
||||
LD D,0
|
||||
XOR A
|
||||
CHS005: INC A
|
||||
SBC HL,DE
|
||||
JR NC,CHS005
|
||||
ADD HL,DE
|
||||
DEC A
|
||||
LD H,A
|
||||
LD E,L
|
||||
INC E
|
||||
LD D,LX
|
||||
LD A,HX
|
||||
LD L,A
|
||||
RET
|
||||
|
||||
; D - MASK
|
||||
; E - PATTERN
|
||||
; BC - PORT
|
||||
|
||||
WAITPRT:
|
||||
LD HL,0000H
|
||||
WAITP0: IN A,(C)
|
||||
CP 0FFH
|
||||
JR Z,WAITP1
|
||||
AND D
|
||||
CP E
|
||||
JR NZ,WAITP2
|
||||
AND A
|
||||
RET
|
||||
|
||||
WAITP2: DEC HL
|
||||
LD A,L
|
||||
OR H
|
||||
JP NZ,WAITP0
|
||||
WAITP1: SCF
|
||||
RET
|
||||
|
||||
;=======================================================
|
||||
|
||||
|
||||
|
||||
2252
src/bios/backup/EXP.as
Normal file
2252
src/bios/backup/EXP.as
Normal file
File diff suppressed because it is too large
Load Diff
841
src/bios/backup/EXP_FN.as
Normal file
841
src/bios/backup/EXP_FN.as
Normal file
@ -0,0 +1,841 @@
|
||||
;
|
||||
_mInfoALIGN 256,0
|
||||
TAB_FNS: ; !FIXIT ¯®¯à ¢¨âì ¢ ¤®ª¥ §¢ ¨ï äãªæ¨©, ç áâì ¥ ᮢ¯ ¤ ¥â
|
||||
; 8x
|
||||
/* 80 */ DW LP_OPEN_S ; ®âªàë⨥ ®ª
|
||||
/* 81 */ DW LP_PRINT_ALL ; ¯¥ç âì ᨬ¢®« ¢ ®ª®
|
||||
/* 82 */ DW LP_PRINT_SYM ; ¯¥ç âì ᨬ¢®« ¡¥§ âà
|
||||
/* 83 */ DW LP_PRINT_ATR ; ¯¥ç âì ⮫쪮 âਡãâ
|
||||
/* 84 */ DW LP_SET_PLACE ; ãáâ ®¢ª ¯®§¨æ¨¨ ¯¥ç â¨
|
||||
/* 85 */ DW LP_PRINT_LINE ; ¯¥ç âì áâப¨ ¤«¨®© B
|
||||
/* 86 */ DW LP_PRINT_LINE2 ; ¯¥ç âì áâப¨ -//- ¡¥§ âਡã⮢
|
||||
/* 87 */ DW LP_PRINT_LINE3 ; ¯¥ç âì áâப¨ ¤«¨®© B ¤® D
|
||||
/* 88 */ DW LP_PRINT_LINE4 ; ¯¥ç âì áâப¨ -//- ¡¥§ âਡã⮢
|
||||
/* 89 */ DW LP_CLS_WIN
|
||||
/* 8A */ DW LP_SCROLL_UD
|
||||
/* 8B */ DW LP_PRINT_LINE5
|
||||
/* 8C */ DW LP_PRINT_LINE6
|
||||
/* 8D */ DW LP_CLS_WIN2
|
||||
/* 8E */ DW LP_GET_PLACE
|
||||
/* 8F */ DW FN_TURBO
|
||||
; 9x
|
||||
/* 90 */ DW EMM.GetMemSize ; ¥à §àãè î饥 ®¯à¥¤¥«¥¨¥ ®¡ê¥¬ އ“.
|
||||
/* 91 */ DW EMM.InitMem ; ¨¨æ¨ «¨§ æ¨ï à á¯à¥¤¥«¥¨ï ¯ ¬ïâ¨
|
||||
/* 92 */ DW EMM.GetMemRMD ; ¯®«ãç¨âì ¡«®ª ¯ ¬ï⨠¤«ï à ¬¤¨áª
|
||||
/* 93 */ DW EMM.FreeMemRMD ; ®á¢®¡®¤¨âì ¡«®ª ¯ ¬ïâ¨ à ¬¤¨áª
|
||||
/* 94 */ DW EMM.GetMemPageRMD ; ¯®«ãç¨âì ®¬¥àa áâà ¨æ RAM-Disk
|
||||
/* 95 */ DW EMM.GetMemPageNext ; ¯®«ãç¨âì á«¥¤ãîéãî áâà ¨æã
|
||||
/* 96 */ DW EMM.GetBanksPorts ; ¯®«ãç¨âì ¤à¥á ¯®à⮢
|
||||
/* 97 */ DW EMM.CheckColdInit ; ¯à®¢¥àª 宫®¤ë© áâ àâ ¨ ¨¨æ¨ «¨§ 樨 ¥á«¨ ® ;????? 㦠«¨ ª ª API?
|
||||
/* 98 */ DW RAMD_CALC_PAGE ; Fn 98h ;?????
|
||||
/* 99 */ DW SET_DISK_TYPE ; ;?????
|
||||
/* 9A */ DW DISK_REDIR ; ;?????
|
||||
/* 9B */ DW FN_NO ;GET_RAMD_NUM ; ¯®«ãç¨âì ®¬¥à ram disk ¯® ¥£® block id
|
||||
/* 9C */ DW FN_NO ;
|
||||
/* 9D */ DW EMM.DivMemBlocks ; à §¤¥«¥¨ï ¡«®ª ¤¢ .
|
||||
/* 9E */ DW EMM.MergeMemBlocks ; ᫨逸 ¤¢ãå ¡«®ª®¢
|
||||
/* 9F */ DW EMM.FullInit ; ¨¨æ¨ «¨§ æ¨ï ¢á¥© ¯ ¬ïâ¨, á¨á⥬ëå ¯¥à¥¬¥ëå
|
||||
; Ax
|
||||
/* A0 */ DW PIC_FN0 ; Ž’Š<EFBFBD>›’ˆ… ŽŠ<EFBFBD>€ - Fn 0A0h
|
||||
/* A1 */ DW PIC_FN1 ; ‚›‚…‘’ˆ ’Ž—Š“
|
||||
/* A2 */ DW PIC_FN2 ; ‚›‚Ž„ ‹ˆ<EFBFBD>ˆˆ COPY
|
||||
/* A3 */ DW PIC_FN3 ; ‚›‚Ž„ ‹ˆ<EFBFBD>ˆˆ FILL
|
||||
/* A4 */ DW PIC_FN4 ; ‚›‚Ž„ <EFBFBD>€‹ˆ’<EFBFBD>›
|
||||
/* A5 */ DW PIC_FN5 ; “‘’€<EFBFBD>ނЀ RGMOD
|
||||
/* A6 */ DW PIC_FN6 ; A - page_pal, E - ®¬¥à ¯ «¨âàë, B - ⨯ ¯ «¨âàë
|
||||
/* A7 */ DW PIC_FN7 ; <EFBFBD>¨á®¢ ¨¥ «¨¨¨ ®¤®£® 梥â
|
||||
/* A8 */ DW PIC_FN8 ; <EFBFBD>¨á®¢ ¨¥ à §®æ¢¥â®© «¨¨¨
|
||||
/* A9 */ DW PIC_FN9 ; ¥â
|
||||
/* AA */ DW PIC_FN10 ; ¥â
|
||||
/* AB */ DW PIC_FN11 ; ¥â
|
||||
/* AC */ DW PIC_FN12 ; ¥â
|
||||
/* AD */ DW PIC_FN14 ; ¥â
|
||||
/* AE */ DW PIC_FN14 ; ¥â
|
||||
/* AF */ DW PIC_FN15 ; ¥â
|
||||
; Bx
|
||||
/* B0 */ DW WIN_OPEN ; ®âªàë⨥ ®ª ¯® ®¯¨á ⥫î
|
||||
/* B1 */ DW WIN_CLOSE ; § ªàë⨥ ®ª
|
||||
/* B2 */ DW WIN_COPY ; á®åà ¥¨¥ ⥪á⮢®£® ®ª ¢ ¯ ¬ïâ¨
|
||||
/* B3 */ DW WIN_RESTORE ; ¢®ááâ ®¢«¥¨¥ ⥪á⮢®£® ®ª ¨§ ¯ ¬ïâ¨
|
||||
/* B4 */ DW WIN_GET_SYM ; ¢§ïâì ᨬ¢®«
|
||||
/* B5 */ DW WIN_PUT_SYM ; ¯®«®¦¨âì ᨬ¢®«
|
||||
/* B6 */ DW WIN_SET_ZG ; § £à㧪 § ª®£¥¥à â®à
|
||||
/* B7 */ DW WIN_MOVE ; ¯¥à¥¬¥áâ¨âì ®ª®
|
||||
/* B8 */ DW WIN_GET_ZG ; ¯®«ãç¨âì § ª®£¥¥à â®à
|
||||
/* B9 */ DW FN_NO
|
||||
/* BA */ DW FN_NO
|
||||
/* BB */ DW FN_NO
|
||||
/* BC */ DW FN_NO
|
||||
/* BD */ DW FN_NO
|
||||
/* BE */ DW FN_NO
|
||||
/* BF */ DW FN_NO
|
||||
; Cx
|
||||
/* C0 */ DW EMM.GetMemSize ; ¯®«ãç¨âì ¤ ë¥ ®¡ ®¡ê¥¬¥ ¯ ¬ï⨠¨ ª®«-¢® ᢮¡. áâà.
|
||||
/* C1 */ DW EMM.InitMem ; ¨¨æ¨ «¨§ æ¨ï à á¯à¥¤¥«¥¨ï ¯ ¬ïâ¨
|
||||
/* C2 */ DW EMM.GetMem ; ¯®«ãç¨âì ¡«®ª ¯ ¬ïâ¨
|
||||
/* C3 */ DW EMM.FreeMem ; ®á¢®¡®¤¨âì ¡«®ª ¯ ¬ïâ¨
|
||||
/* C4 */ DW EMM.GetMemPage ; ¯®«ãç¨âì ®¬¥à áâà ¨æë ¢ ¡«®ª¥ ¯ ¬ïâ¨
|
||||
/* C5 */ DW EMM.GetMemBlkPages ; ¯®«ãç¨âì ᯨ᮪ áâà ¨æ ¡«®ª ¯ ¬ïâ¨
|
||||
/* C6 */ DW EMM.GetBanksPorts ; ¯®«ãç¨âì ¤à¥á ¯®à⮢ ®ª®
|
||||
/* C7 */ DW EMM.GetMemPageNext ; ¯®«ãç¨âì á«¥¤ãîéãî áâà ¨æã ¡«®ª
|
||||
/* C8 */ DW BLK_RD_WR ; äãªæ¨ï ç⥨ï/§ ¯¨á¨ ¢ ¡«®ª ¯ ¬ïâ¨
|
||||
/* C9 */ DW BLK_TO_RAMD ; § ç¨âì ¡«®ª RAM-Disk-ã
|
||||
/* CA */ DW RAMD_CLEAR ; ®á¢®¡®¤¨âì RAM-Disk
|
||||
/* CB */ DW RAMD_TO_DRV ; § ç¨âì RAM-Disk ¤¨áª®¢®¤
|
||||
/* CC */ DW FDD_TO_DRV ; § ç¨âì REAL_DRIVE ¤¨áª®¢®¤
|
||||
/* CD */ DW HDD_TO_DRV ; § ç¨âì HDD ¤¨áª®¢®¤
|
||||
/* CE */ DW GET_RAMD_ST ; ¯®«ãç¨âì ⨯ § 票ï RAM-Disk
|
||||
/* CF */ DW GET_DRV_ST ; ¯®«ãç¨âì ⨯ § ç¥¨ï ¤¨áª®¢®¤
|
||||
; Dx
|
||||
/* D0 */ DW FN_LIB
|
||||
/* D1 */ DW FN_LIB
|
||||
/* D2 */ DW FN_LIB
|
||||
/* D3 */ DW FN_LIB
|
||||
/* D4 */ DW FN_LIB
|
||||
/* D5 */ DW FN_LIB
|
||||
/* D6 */ DW FN_LIB
|
||||
/* D7 */ DW FN_LIB
|
||||
/* D8 */ DW FN_LIB
|
||||
/* D9 */ DW FN_LIB
|
||||
/* DA */ DW FN_LIB
|
||||
/* DB */ DW FN_LIB
|
||||
/* DC */ DW FN_LIB
|
||||
/* DD */ DW FN_LIB
|
||||
/* DE */ DW FN_LIB
|
||||
/* DF */ DW FN_LIB
|
||||
; Ex
|
||||
/* E0 */ DW LP_PRINT_LINE_DIR
|
||||
/* E1 */ DW FN_NO
|
||||
/* E2 */ DW FN_NO
|
||||
/* E3 */ DW FN_NO
|
||||
/* E4 */ DW FN_NO
|
||||
/* E5 */ DW FN_NO
|
||||
/* E6 */ DW FN_NO
|
||||
/* E7 */ DW FN_NO
|
||||
/* E8 */ DW FN_SEND_BYTE ; ¯®á« âì ¡ ©â ç¥à¥§ PC_link
|
||||
/* E9 */ DW FN_RESEIVE_B ; ¯à¨ïâì ¡ ©â ç¥à¥§ PC_link
|
||||
/* EA */ DW FN_KBD_OUT ; ¯®á« âì ¡ ©â ¢ ª« ¢¨ âãàã
|
||||
/* EB */ DW FN_NO
|
||||
/* EC */ DW FN_NO
|
||||
/* ED */ DW FN_CRIPT
|
||||
/* EE */ DW AY8910
|
||||
/* EF */ DW FN_VERSION
|
||||
; Fx
|
||||
/* F0 */ DW SPRINTER_1
|
||||
/* F1 */ DW SPRINTER_2
|
||||
/* F2 */ DW FN_SINC
|
||||
/* F3 */ DW SPRINTER_ALL
|
||||
/* F4 */ DW DCP_FN0
|
||||
/* F5 */ DW CMOS_TEST
|
||||
/* F6 */ DW CMOS_RD
|
||||
/* F7 */ DW CMOS_WR
|
||||
/* F8 */ DW SET_ROM_PAGES
|
||||
/* F9 */ DW READ_PORTS ; !TODO
|
||||
/* FA */ DW WRITE_PORTS ; !TODO
|
||||
/* FB */ DW GOTO_SPEC ; Goto Spectrum!
|
||||
/* FC */ DW FN_NO
|
||||
/* FD */ DW FN_RESET
|
||||
/* FE */ DW FN_NO ; SAVE_AUTOSTART
|
||||
/* FF */ DW FN_VERSION
|
||||
|
||||
EXP_FNS: ; ‚室 ¢ äãªæ¨î ¨§ DOS
|
||||
POP AF
|
||||
CALL APIfrom80toFF ; !TEST new_api
|
||||
CALL DOS_ON
|
||||
JP EXP_FNS_RET
|
||||
|
||||
;************************************
|
||||
; ‚室 ¢ äãªæ¨î ¯® RST18 ¨ RST8
|
||||
EXP_FNS_RST18:
|
||||
BIT 7,C
|
||||
JR NZ,APIfrom80toFF ; !TEST new_api
|
||||
;.APIfrom40to5F:
|
||||
BIT 6,C
|
||||
RES 6,C
|
||||
JP NZ,EXP_HDD_NEW
|
||||
SCF
|
||||
RET
|
||||
;**********************************
|
||||
|
||||
;-----------------------------------------------------------------------
|
||||
FN_CRIPT:
|
||||
DEC B
|
||||
SCF
|
||||
RET NZ
|
||||
LD HL,(ROM_NUMBER.part1) ;rdlow-ok
|
||||
LD A,(ROM_NUMBER.part2) ;rdlow-ok
|
||||
LD BC,(BoardID.start) ;rdlow-ok
|
||||
LD DE,(BoardID.end) ;rdlow-ok
|
||||
AND A
|
||||
RET
|
||||
; BoardID_start old address #312A
|
||||
; BoardID_end old address #312D
|
||||
;-----------------------------------------------------------------------
|
||||
|
||||
;**********************************
|
||||
;!!!!! £«ïãâì
|
||||
; START_DI:
|
||||
; PUSH AF
|
||||
; LD A,R
|
||||
; JP PE,XX_DI
|
||||
; LD A,R
|
||||
; XX_DI: LD A,#80
|
||||
; JP PE,XX_DI2
|
||||
; XOR A
|
||||
; XX_DI2: LD R,A
|
||||
; DI
|
||||
; POP AF
|
||||
; RET
|
||||
|
||||
; END_DI: PUSH AF
|
||||
; LD A,R
|
||||
; BIT 7,A
|
||||
; JR Z,XX_DI3
|
||||
; EI
|
||||
; POP AF ; PE
|
||||
; RET
|
||||
|
||||
; XX_DI3: DI
|
||||
; POP AF ; PO
|
||||
; RET
|
||||
;**********************************
|
||||
|
||||
|
||||
APIfrom80toFF:
|
||||
PUSH HL
|
||||
LD L,C
|
||||
SLA L
|
||||
LD H,high TAB_FNS
|
||||
LD C,(HL) // LD A,(HL)
|
||||
INC L
|
||||
LD H,(HL)
|
||||
LD L,C // LD L,A
|
||||
EX (SP),HL
|
||||
RET
|
||||
|
||||
;! ! ! ! ! ! ! !
|
||||
; !TODO ᤥ« âì
|
||||
READ_PORTS:
|
||||
WRITE_PORTS:
|
||||
FN_NO: SCF
|
||||
RET
|
||||
;! ! ! ! ! ! ! !
|
||||
|
||||
; ????? ¬®¦¥â ¯¥à¥¤¥« âì ¢å®¤?
|
||||
; CALL from 3D13h!
|
||||
; in A - page, B - new ROM-page
|
||||
; out B - old ROM-page
|
||||
SET_ROM_PAGES:
|
||||
EX AF,AF'
|
||||
LD A,CNF_0
|
||||
OUT (SYS_PORT.ON),A
|
||||
|
||||
LD C,SLOT2 ; ¯®«ãç¨âì áâà ¨æã
|
||||
IN D,(C)
|
||||
|
||||
LD A,DCP_PAGE ; ãáâ ®¢¨âì ®¢ãî
|
||||
OUT (C),A
|
||||
|
||||
LD A,(#8000) ; á®åà ¨âì â® çâ® ¡ë«®
|
||||
LD L,A
|
||||
LD A,(#8200)
|
||||
LD H,A
|
||||
EX AF,AF' ; áâà ¨æ
|
||||
|
||||
LD (#8000),A ; ãáâ ®¢¨âì ¯®àâ ROM TR-DOS
|
||||
LD (#8200),A
|
||||
|
||||
EX AF,AF'
|
||||
LD A,B
|
||||
LD BC,0
|
||||
EX AF,AF'
|
||||
|
||||
IN A,(C)
|
||||
|
||||
EX AF,AF'
|
||||
OUT (C),A ; ãáâ ®¢¨âì ®¢ë© TR-DOS
|
||||
EX AF,AF'
|
||||
|
||||
LD B,A
|
||||
LD A,L
|
||||
LD (#8000),A ; ¢¥àãâì ¯®àâ
|
||||
LD A,H
|
||||
LD (#8200),A ; ¢¥àãâì ¯®àâ
|
||||
|
||||
LD C,SLOT2
|
||||
LD A,SYS_PAGE
|
||||
OUT (C),A
|
||||
LD A,(SYS_PAGE.CONFIG_DE-#4000)
|
||||
OUT (C),D ; ¢¥àãâì áâà ¨æã
|
||||
OUT (SYS_PORT.ON),A
|
||||
|
||||
AND A
|
||||
RET
|
||||
;TAB_SIZE EQU $-TAB_FNS
|
||||
|
||||
;*****************************************
|
||||
|
||||
;*****************************************
|
||||
; ”ãªæ¨ï ¤¥è¨äà â®à ¯®à⮢.
|
||||
; HL - ¤à¥á
|
||||
; DE - ¬ ᪠- 0 ¨§¬¥ï¥¬ë¥ ¡¨âë, 1 ¥¨§¬¥ï¥¬ë¥
|
||||
; B - ¯®àâ
|
||||
;
|
||||
; ALL STACKS, DI
|
||||
;*****************************************
|
||||
DCP_FN0: ; !FIXIT § ¯®¬¨ âì âãâ á®áâ®ï¨¥ ¯à¥àë¢ ¨© ¨ ¢ëàã¡ âì
|
||||
AND A
|
||||
JP Z,PORTS_INIT
|
||||
|
||||
PUSH IX
|
||||
LD IX,.RET_DCP_FN0
|
||||
|
||||
IN A,(SLOT3)
|
||||
EX AF,AF'
|
||||
LD A,DCP_PAGE
|
||||
OUT (SLOT3),A
|
||||
|
||||
JR DCP_FN0M
|
||||
|
||||
.RET_DCP_FN0:
|
||||
EX AF,AF'
|
||||
OUT (SLOT3),A
|
||||
AND A
|
||||
POP IX
|
||||
; !FIXIT ¢®ááâ ¢«¨¢ âì ¯à¥àë¢ ¨ï
|
||||
RET
|
||||
|
||||
;-----------------------------------------------------------------------;
|
||||
; ”ãªæ¨ï ¤¥è¨äà â®à ¯®à⮢.
|
||||
; HL - ¤à¥á
|
||||
; DE - ¬ ᪠- 0 ¨§¬¥ï¥¬ë¥ ¡¨âë, 1 ¥¨§¬¥ï¥¬ë¥
|
||||
; B - ¯®àâ
|
||||
DCP_FN0M:
|
||||
LD A,L
|
||||
AND E
|
||||
LD L,A
|
||||
|
||||
LD A,H
|
||||
AND D
|
||||
; AND #3F
|
||||
OR #C0
|
||||
LD H,A
|
||||
|
||||
LD A,D
|
||||
OR #C0
|
||||
LD D,A
|
||||
|
||||
.loop: LD (HL),B
|
||||
|
||||
LD A,L ; § ¬ ᪨஢ âì ¥¨§¬¥ï¥¬ë¥ ¡¨âë 1-¬¨
|
||||
OR E ; ¤«ï ¯à®å®¦¤¥¨ï ¯¥à¥®á
|
||||
INC A ; 㢥«¨ç¨âì ¤à¥á
|
||||
JR Z,.carry ; ¢®§¨ª ¯¥à¥®á
|
||||
|
||||
OR E
|
||||
XOR E ; ®¡ã«¨âì ¥¨§¬¥ï¥¬ë¥ ¡¨âë
|
||||
LD C,A ; ¨§¬¥ï¥¬ ï ç áâì
|
||||
|
||||
LD A,L
|
||||
AND E ; ¢ë¤¥«¨âì ¥¨§¬¥ï¥¬ãî
|
||||
OR C
|
||||
LD L,A ; ¤®¡ ¢¨âì ¨§¬¥ï¥¬ãî ç áâì
|
||||
|
||||
JR .loop ; 横«
|
||||
|
||||
.carry: ; A = 0
|
||||
; OR E
|
||||
; XOR E
|
||||
; LD C,A
|
||||
LD A,L ; § ¡¨âì ¨§¬¥ï¥¬ë¥ ¡¨âë ã«ï¬¨
|
||||
AND E
|
||||
; OR C
|
||||
LD L,A
|
||||
|
||||
LD A,H ; § ¬ ᪨஢ âì ¥¨§¬¥ï¥¬ë¥ ¡¨âë 1-¬¨
|
||||
OR D ; ¤«ï ¯à®å®¦¤¥¨ï ¯¥à¥®á
|
||||
INC A ; 㢥«¨ç¨âì ¤à¥á
|
||||
JR Z,.exit
|
||||
|
||||
OR D
|
||||
XOR D
|
||||
LD C,A ; ¨§¬¥ï¥¬ ï ç áâì
|
||||
|
||||
LD A,H
|
||||
AND D ; ¢ë¤¥«¨âì ¥¨§¬¥ï¥¬ãî
|
||||
OR C
|
||||
LD H,A ; ¤®¡ ¢¨âì ¨§¬¥ï¥¬ãî ç áâì
|
||||
JR .loop
|
||||
|
||||
.exit: JP (IX)
|
||||
;-----------------------------------------------------------------------;
|
||||
|
||||
|
||||
; RAM-Disk A, BLK - B
|
||||
BLK_TO_RAMD:
|
||||
CP SYS_PAGE.RAMD_KEYS.NUM
|
||||
CCF
|
||||
RET C
|
||||
|
||||
PUSH HL
|
||||
LD L,A
|
||||
|
||||
IN A,(SLOT2)
|
||||
LD C,A
|
||||
LD A,SYS_PAGE
|
||||
OUT (SLOT2),A
|
||||
LD A,L
|
||||
LD HL,SYS_PAGE.RAMD_KEYS-#4000
|
||||
ADD A,L
|
||||
LD L,A
|
||||
LD A,(HL) ; ª«îç ¡«®ª
|
||||
AND A
|
||||
JR NZ,BLK_BUSY ; RAM-Disk § ïâ - ®è¨¡ª
|
||||
LD (HL),B
|
||||
|
||||
LD A,C
|
||||
OUT (SLOT2),A
|
||||
|
||||
LD A,B
|
||||
AND A
|
||||
POP HL
|
||||
RET
|
||||
|
||||
BLK_BUSY:
|
||||
LD A,C
|
||||
OUT (SLOT2),A
|
||||
|
||||
SCF
|
||||
POP HL
|
||||
RET
|
||||
|
||||
; RAM-Disk A
|
||||
RAMD_CLEAR:
|
||||
CP SYS_PAGE.RAMD_KEYS.NUM
|
||||
CCF
|
||||
RET C
|
||||
|
||||
PUSH HL
|
||||
LD L,A
|
||||
|
||||
IN A,(SLOT2)
|
||||
LD C,A
|
||||
LD A,SYS_PAGE
|
||||
OUT (SLOT2),A
|
||||
LD A,L
|
||||
LD HL,SYS_PAGE.RAMD_KEYS-#4000 ; RAM-Disk ᢮¡®¤¥
|
||||
ADD A,L
|
||||
LD L,A
|
||||
LD B,A ; § ¯®¬¨âì 㤠«ï¥¬ë© à ¬¤¨áª
|
||||
LD A,(HL)
|
||||
AND A
|
||||
JR Z,BLK_BUSY ; ¢®§¢à â á ®è¨¡ª®©
|
||||
LD (HL),0
|
||||
LD A,C
|
||||
OUT (SLOT2),A
|
||||
|
||||
AND A
|
||||
POP HL
|
||||
RET
|
||||
|
||||
; RAM-Disk A, DRV - B
|
||||
RAMD_TO_DRV:
|
||||
CP SYS_PAGE.RAMD_KEYS.NUM
|
||||
CCF
|
||||
RET C
|
||||
LD C,A
|
||||
LD A,B
|
||||
CP 4
|
||||
CCF
|
||||
RET C
|
||||
|
||||
LD HL,SYS_PAGE.DISK_TYPE-#4000
|
||||
LD L,B
|
||||
|
||||
IN A,(SLOT2)
|
||||
LD B,A
|
||||
LD A,SYS_PAGE
|
||||
OUT (SLOT2),A
|
||||
LD A,C
|
||||
ADD A,4
|
||||
LD (HL),A
|
||||
LD A,B
|
||||
OUT (SLOT2),A
|
||||
AND A
|
||||
RET
|
||||
|
||||
; Disk A, DRV - B
|
||||
FDD_TO_DRV:
|
||||
CP 4
|
||||
CCF
|
||||
RET C
|
||||
LD C,A
|
||||
|
||||
LD A,B
|
||||
CP 4
|
||||
CCF
|
||||
RET C
|
||||
|
||||
LD HL,SYS_PAGE.DISK_TYPE-#4000
|
||||
LD L,B
|
||||
|
||||
IN A,(SLOT2)
|
||||
LD B,A
|
||||
LD A,SYS_PAGE
|
||||
OUT (SLOT2),A
|
||||
LD (HL),C
|
||||
LD A,B
|
||||
OUT (SLOT2),A
|
||||
|
||||
AND A
|
||||
RET
|
||||
|
||||
; HDD A, DRV - B
|
||||
HDD_TO_DRV:
|
||||
AND 0FH
|
||||
LD C,A
|
||||
LD A,B
|
||||
CP 4
|
||||
CCF
|
||||
RET C
|
||||
|
||||
LD HL,SYS_PAGE.DISK_TYPE-#4000
|
||||
LD L,B
|
||||
|
||||
IN A,(SLOT2)
|
||||
LD B,A
|
||||
LD A,SYS_PAGE
|
||||
OUT (SLOT2),A
|
||||
LD A,C
|
||||
ADD A,40H
|
||||
LD (HL),A
|
||||
LD A,B
|
||||
OUT (SLOT2),A
|
||||
|
||||
AND A
|
||||
RET
|
||||
|
||||
; ‚室:
|
||||
; A - RAM Disk ID
|
||||
; ‚ë室:
|
||||
; A - Number (0..15)
|
||||
; GET_RAMD_NUM:
|
||||
; EX AF,AF'
|
||||
; IN A,(SLOT2)
|
||||
; EX AF,AF'
|
||||
; LD BC,SYS_PAGE * 256 + SLOT2
|
||||
; OUT (C),B
|
||||
|
||||
; LD HL,SYS_PAGE.RAMD_KEYS-#4000
|
||||
; LD BC,SYS_PAGE.RAMD_KEYS.NUM
|
||||
; CPIR
|
||||
|
||||
; EX AF,AF'
|
||||
; OUT (SLOT2),A
|
||||
; EX AF,AF'
|
||||
|
||||
; SCF
|
||||
; RET PE
|
||||
|
||||
; DEC L
|
||||
; LD A,L
|
||||
; SUB low SYS_PAGE.RAMD_KEYS
|
||||
; RET
|
||||
|
||||
; ¢ë室¥ ¯à¨ € = 0 ¤®«¦¥ ¡ëâì ãáâ ®¢«¥ ä« £ Z
|
||||
GET_RAMD_ST: ; DSS ¤¥¥âáï, çâ® íâ äãªæ¨ï ¥ £à®å ¥â DE
|
||||
CP SYS_PAGE.RAMD_KEYS.NUM
|
||||
CCF
|
||||
RET C
|
||||
|
||||
PUSH BC
|
||||
|
||||
LD HL,SYS_PAGE.RAMD_KEYS-#4000
|
||||
ADD A,L
|
||||
LD L,A
|
||||
|
||||
IN A,(SLOT2)
|
||||
LD B,A
|
||||
LD A,SYS_PAGE
|
||||
OUT (SLOT2),A
|
||||
LD C,(HL)
|
||||
LD A,B
|
||||
OUT (SLOT2),A
|
||||
LD A,C
|
||||
POP BC
|
||||
AND A
|
||||
RET
|
||||
|
||||
GET_DRV_ST:
|
||||
CP 4
|
||||
CCF
|
||||
RET C
|
||||
|
||||
PUSH BC
|
||||
|
||||
LD HL,SYS_PAGE.DISK_TYPE-#4000
|
||||
ADD A,L
|
||||
LD L,A
|
||||
|
||||
IN A,(SLOT2)
|
||||
LD B,A
|
||||
LD A,SYS_PAGE
|
||||
OUT (SLOT2),A
|
||||
LD C,(HL)
|
||||
LD A,B
|
||||
OUT (SLOT2),A
|
||||
|
||||
LD A,C
|
||||
|
||||
POP BC
|
||||
|
||||
AND A
|
||||
RET
|
||||
|
||||
;***********************************************
|
||||
; ????? çñ § å¥àï ¯à® ¡¥©á¨ª? âãâ ¥ â® ¨¦¥
|
||||
;
|
||||
; CMOS - 35h,36h - ãáâ ®¢ª¨ ¡¥©á¨ª
|
||||
;
|
||||
;***********************************************
|
||||
CMOS_EMU_WR:
|
||||
PUSH DE
|
||||
|
||||
LD C,SLOT3
|
||||
IN B,(C)
|
||||
LD E,SYS_PAGE
|
||||
OUT (C),E
|
||||
LD E,D
|
||||
LD D,#FF
|
||||
LD (DE),A
|
||||
OUT (C),B
|
||||
|
||||
POP DE
|
||||
RET
|
||||
|
||||
; § ¯¨áì ¢ CMOS
|
||||
CMOS_WR:
|
||||
CALL CMOS_TEST
|
||||
JR C,CMOS_EMU_WR
|
||||
XWR_CMOS:
|
||||
LD BC,CMOS.Port.Address.Write
|
||||
OUT (C),D
|
||||
LD BC,CMOS.Port.Data.Write
|
||||
OUT (C),A
|
||||
RET
|
||||
|
||||
CMOS_EMU_RD:
|
||||
PUSH DE
|
||||
|
||||
LD C,SLOT3
|
||||
IN B,(C)
|
||||
LD E,SYS_PAGE
|
||||
OUT (C),E
|
||||
LD E,D
|
||||
LD D,#FF
|
||||
LD A,(DE)
|
||||
OUT (C),B
|
||||
|
||||
POP DE
|
||||
RET
|
||||
|
||||
; ç⥨¥ ¨§ CMOS
|
||||
CMOS_RD:
|
||||
CALL CMOS_TEST
|
||||
JR C,CMOS_EMU_RD
|
||||
XRD_CMOS:
|
||||
LD BC,CMOS.Port.Address.Write
|
||||
OUT (C),D
|
||||
LD BC,CMOS.Port.Data.Read
|
||||
IN A,(C)
|
||||
RET
|
||||
|
||||
CMOS_TEST:
|
||||
|
||||
PUSH DE
|
||||
PUSH BC
|
||||
PUSH AF
|
||||
|
||||
LD D,3FH ; !HARDCODE
|
||||
CALL XRD_CMOS
|
||||
LD E,A
|
||||
CPL
|
||||
CALL XWR_CMOS
|
||||
CALL XRD_CMOS
|
||||
CPL
|
||||
CP E
|
||||
JR NZ,CMOS_ERR
|
||||
LD A,E
|
||||
CALL XWR_CMOS
|
||||
|
||||
POP AF
|
||||
POP BC
|
||||
POP DE
|
||||
AND A
|
||||
RET
|
||||
|
||||
CMOS_ERR:
|
||||
LD A,E
|
||||
CALL XWR_CMOS
|
||||
POP AF
|
||||
POP BC
|
||||
POP DE
|
||||
SCF
|
||||
RET
|
||||
|
||||
;
|
||||
;DE - ªã¤ - áâà ¨æ ®âªàëâ !
|
||||
;BC - ᪮«ìª®
|
||||
;HL - ¡ãä¥à
|
||||
;
|
||||
; PUSH BC
|
||||
; LD H,D
|
||||
; LD L,E
|
||||
; ADD HL,BC
|
||||
; JR C,CUT
|
||||
; LD HL,BUFER
|
||||
; LDIR
|
||||
; POP BC
|
||||
; RET
|
||||
;CUT:
|
||||
; PUSH HL
|
||||
; LD A,L
|
||||
; LD L,C
|
||||
; LD C,A
|
||||
; LD A,H
|
||||
; LD H,B
|
||||
; LD B,A
|
||||
;
|
||||
; AND A
|
||||
; SBC HL,BC
|
||||
; LD B,H
|
||||
; LD C,L
|
||||
; LD HL,BUFER
|
||||
; LDIR
|
||||
; CALL NEXT_BANK
|
||||
; POP BC
|
||||
; LD A,B
|
||||
; OR C
|
||||
; JR Z,LAB
|
||||
; LDIR
|
||||
;LAB: POP BC
|
||||
; RET
|
||||
;
|
||||
|
||||
FN_TURBO:
|
||||
CP 2
|
||||
JR Z,.FN_TB_ONOFF
|
||||
CP 3
|
||||
JR Z,.FN_TB_ONOFF
|
||||
CP #12
|
||||
JR Z,.SET_FDD_720
|
||||
CP #13
|
||||
JR Z,.SET_FDD_1440
|
||||
SCF
|
||||
RET
|
||||
|
||||
;!FIXIT ¬¥ï¥¬ ¯«®â®áâì - ¬¥ï¥¬ ¢ á¨á⥬®© áâà ¨æ¥ ¨äã ®¡ í⮬
|
||||
.SET_FDD_720:
|
||||
LD A,1
|
||||
OUT (#BD),A ; !HARDCODE
|
||||
AND A
|
||||
RET
|
||||
;!FIXIT ¬¥ï¥¬ ¯«®â®áâì - ¬¥ï¥¬ ¢ á¨á⥬®© áâà ¨æ¥ ¨äã ®¡ í⮬
|
||||
.SET_FDD_1440:
|
||||
LD A,#21
|
||||
OUT (#BD),A ; !HARDCODE
|
||||
AND A
|
||||
RET
|
||||
|
||||
.FN_TB_ONOFF:
|
||||
LD C,A
|
||||
IN A,(SLOT3)
|
||||
LD B,A
|
||||
LD A,SYS_PAGE
|
||||
OUT (SLOT3),A
|
||||
LD DE,(SYS_PAGE.CONFIG_DE)
|
||||
LD A,E
|
||||
AND #FC
|
||||
OR C
|
||||
LD E,A
|
||||
OUT (SYS_PORT.ON),A
|
||||
LD (SYS_PAGE.CONFIG_DE),DE
|
||||
LD A,B
|
||||
OUT (SLOT3),A
|
||||
AND A
|
||||
RET
|
||||
|
||||
|
||||
; à §¤¥«¨âì ¡«®ª ¯ ¬ï⨠¤¢ ¡«®ª
|
||||
; A - ¡«®ª, B - ¤«¨ ¯¥à¢®£® ¡«®ª ¯®á«¥ à §¤¥«¥¨ï
|
||||
; ¢ë室: A - ¡«®ª 1, B - ¡«®ª 2
|
||||
EMM.DivMemBlocks:
|
||||
INC B
|
||||
DEC B
|
||||
SCF
|
||||
RET Z
|
||||
DEC B
|
||||
LD E,A
|
||||
CALL EMM.GetMemPage ; ¯®«ãç¨âì ®¬¥à áâà ¨æë ¡«®ª
|
||||
RET C
|
||||
LD D,A
|
||||
|
||||
IN A,(SLOT2)
|
||||
EX AF,AF'
|
||||
LD A,SYS_PAGE
|
||||
OUT (SLOT2),A
|
||||
|
||||
LD H,high (SYS_PAGE.RAMD_FAT - #4000)
|
||||
LD L,D
|
||||
LD A,(HL)
|
||||
LD (HL),0FFH
|
||||
LD B,A
|
||||
|
||||
EX AF,AF'
|
||||
OUT (SLOT2),A
|
||||
|
||||
LD A,E
|
||||
AND A
|
||||
RET
|
||||
|
||||
; ᫨âì ¤¢ ¡«®ª ¯ ¬ï⨠¢ ®¤¨
|
||||
; € - ¡«®ª 1, B - ¡«®ª 2
|
||||
; ¢ë室: € - ¡«®ª
|
||||
EMM.MergeMemBlocks:
|
||||
LD E,A
|
||||
IN A,(SLOT2)
|
||||
EX AF,AF'
|
||||
LD A,SYS_PAGE
|
||||
OUT (SLOT2),A
|
||||
LD H,high (SYS_PAGE.RAMD_FAT - #4000)
|
||||
LD L,E
|
||||
LD C,B
|
||||
LD B,0
|
||||
EMM_ADD_L:
|
||||
LD A,(HL)
|
||||
AND A
|
||||
JR Z,EMM_ADD_ERR
|
||||
CP 0FFH
|
||||
JR Z,EMM_ADD_NEXT
|
||||
LD L,A
|
||||
DJNZ EMM_ADD_L
|
||||
EMM_ADD_ERR:
|
||||
EX AF,AF'
|
||||
OUT (SLOT2),A
|
||||
SCF
|
||||
RET
|
||||
|
||||
EMM_ADD_NEXT:
|
||||
LD A,C
|
||||
AND A
|
||||
JR Z,EMM_ADD_ERR
|
||||
LD (HL),A
|
||||
EX AF,AF'
|
||||
OUT (SLOT2),A
|
||||
AND A
|
||||
LD A,E
|
||||
RET
|
||||
;
|
||||
|
||||
|
||||
|
||||
824
src/bios/backup/EXP_HDD.as
Normal file
824
src/bios/backup/EXP_HDD.as
Normal file
@ -0,0 +1,824 @@
|
||||
|
||||
;
|
||||
; DISPLAY "HDD utility"
|
||||
/*
|
||||
P_HD_CS HDW_DRV #4152
|
||||
P_CMD HDW_COM #4153
|
||||
P_HDST HDR_CTL #4053
|
||||
P_S_CNT HDW_CNT #0152
|
||||
*/
|
||||
;HDD_TYPE EQU 1 ; ????? çñ íâ®???
|
||||
|
||||
MACRO WAIT_HDD
|
||||
.loop:
|
||||
LD BC,IDE.Read.Status
|
||||
IN A,(C)
|
||||
BIT IDE.ControlBit.Busy,A
|
||||
JR NZ,.loop
|
||||
ENDM
|
||||
|
||||
;**************************************
|
||||
;!TEST ¥ 㦮 ¥á«¨ new_api_table
|
||||
EXP_HDD_NEW:
|
||||
PUSH AF
|
||||
LD A,C
|
||||
CP #10
|
||||
;JR C,EXP_4X.HDD_CMD
|
||||
JR C,HDD_CMD.4x
|
||||
POP AF
|
||||
JP EXP_HDD ; !FIXIT ¤ «ìè¥ ¢ ROM ¡ã¤ãâ ®¯ïâì ¯à®¢¥àª¨ áâ àè¨å ¡¨â®¢ ॣ. C, ã©â¨ ª ª-â® ®â í⮣®
|
||||
|
||||
; MODULE EXP_4X
|
||||
; !TODO ®¯â¨¬¨§¨à®¢ âì HD_CMD_X
|
||||
; C - COMAND ( 5 - RD, 6 - WR )
|
||||
; 0 - INIT, 1 - DIAG
|
||||
;HDD_CMD:
|
||||
;!TEST ¥ 㦮 ¥á«¨ new_api_table
|
||||
HDD_CMD.4x:
|
||||
LD A,C ; !!!!! ¬®¦® ã¡à âì, ¢ A ¨ â ª â®, çâ® ¢ C
|
||||
|
||||
AND A
|
||||
JP Z,FN_HDD_INIT ; #40 ˆ¨æ¨ «¨§ æ¨ï ¢¨ç¥áâ¥à
|
||||
DEC A
|
||||
JP Z,FN_HDD_RECAL ; #41 <EFBFBD>¥ª «¨¡à®¢ª ¢¨ç¥áâ¥à
|
||||
DEC A
|
||||
JP Z,FN_HDD_TEST_IDE ; #42 ’¥áâ «¨ç¨ï ¨â¥à䥩á IDE
|
||||
DEC A
|
||||
JP Z,FN_HDD_PREPARE ; #43 <EFBFBD>®¤£®â®¢ª ¢¨ç¥áâ¥à ª ®¯¥à 樨 ç⥨ï/§ ¯¨á¨
|
||||
DEC A
|
||||
JP Z,FN_HDD_READ_BPB ; #44 —¨â âì BPB ¯¥à¢®£® à §¤¥«
|
||||
DEC A
|
||||
JP Z,FN_HDD_READ ; #45 —¨â âì ᥪâ®à á ¢¨ç¥áâ¥à
|
||||
DEC A
|
||||
JP Z,FN_HDD_WRITE ; #46 <EFBFBD>¨á âì ᥪâ®à ¢¨ç¥áâ¥à
|
||||
DEC A
|
||||
JP Z,FN_HDD_PART ; #47 set IDE number (<EFBFBD> áâனª ¯ àâ¨æ¨© ¨ master/slave)???
|
||||
DEC A
|
||||
JP Z,FN_HDD_READ_NEXT ; #48 —¨â âì á«¥¤ãî騩 ᥪâ®à (ONLY FOR LBA!)
|
||||
|
||||
POP AF ;!TEST ¥ 㦮 ¥á«¨ new_api_table
|
||||
SCF
|
||||
RET
|
||||
;=======================================
|
||||
|
||||
;-----------------------------------[OK]
|
||||
HD_BPB_PREP:
|
||||
LD D,A
|
||||
IN A,(SLOT3)
|
||||
EX AF,AF'
|
||||
LD A,SYS_PAGE
|
||||
OUT (SLOT3),A
|
||||
LD A,(SYS_PAGE.HD_IDF_ADR.sectors)
|
||||
LD E,A
|
||||
EX AF,AF'
|
||||
OUT (SLOT3),A
|
||||
LD A,D
|
||||
LD D,#00
|
||||
LD IX,#0000
|
||||
LD B,#01
|
||||
;---------------------------------------
|
||||
|
||||
;-----------------------------------[OK]
|
||||
HD_PREPARE:
|
||||
PUSH AF
|
||||
PUSH HL
|
||||
CALL HD_CALC_SECS
|
||||
JR NC,HD_PREP_L1
|
||||
POP HL
|
||||
POP AF
|
||||
SCF
|
||||
RET
|
||||
;---------------------------------------
|
||||
|
||||
;-----------------------------------[OK]
|
||||
HD_PREP_L1:
|
||||
LD A,B
|
||||
LD BC,IDE.Write.Counter ; “áâ ®¢¨âì ç¨á«® ᥪâ®à®¢ ¤«ï § ¯¨á¨
|
||||
OUT (C),A
|
||||
|
||||
IF IDE_Optimization
|
||||
INC C ; IDE.Write.Sector
|
||||
OUT (C),L ; ‘…Š’Ž<EFBFBD>
|
||||
INC C ; IDE.Write.CylinderLow
|
||||
OUT (C),E ; ¤®à®¦ª low
|
||||
INC C ; IDE.Write.CylinderHigh
|
||||
OUT (C),D
|
||||
ELSE
|
||||
LD BC,IDE.Write.Sector
|
||||
OUT (C),L ; ‘…Š’Ž<EFBFBD>
|
||||
LD BC,IDE.Write.CylinderLow
|
||||
OUT (C),E ; ¤®à®¦ª low
|
||||
LD BC,IDE.Write.CylinderHigh
|
||||
OUT (C),D ; ¤®à®¦ª high
|
||||
ENDIF
|
||||
|
||||
LD BC,IDE.Read.Control
|
||||
; DEC B
|
||||
IN A,(C)
|
||||
AND #F0 ; !!!!! ¯®á¬®âà¥âì
|
||||
OR H
|
||||
INC B ; IDE.Write.DriveCtrl
|
||||
|
||||
OUT (C),A
|
||||
|
||||
POP HL ; BUFER & PAGE
|
||||
POP AF
|
||||
AND A
|
||||
RET
|
||||
;---------------------------------------
|
||||
|
||||
|
||||
NEXT_ADD_SEC:
|
||||
PUSH AF
|
||||
|
||||
LD A,B
|
||||
LD BC,IDE.Write.Counter ; “áâ ®¢¨âì ç¨á«® ᥪâ®à®¢ ¤«ï § ¯¨á¨
|
||||
OUT (C),A
|
||||
|
||||
IF IDE_Optimization
|
||||
DEC B
|
||||
INC C
|
||||
IN A,(C) ; IDE.Read.Sector
|
||||
ADC A,E
|
||||
INC B
|
||||
OUT (C),A ; IDE.Write.Sector
|
||||
|
||||
DEC B
|
||||
INC C
|
||||
IN A,(C) ; IDE.Read.CylinderLow
|
||||
ADC A,D
|
||||
INC B
|
||||
OUT (C),A ; IDE.Write.CylinderLow
|
||||
|
||||
DEC B
|
||||
INC C
|
||||
IN A,(C) ; IDE.Read.CylinderHigh
|
||||
ADC A,0
|
||||
INC B
|
||||
OUT (C),A ; IDE.Write.CylinderHigh
|
||||
|
||||
LD BC,IDE.Read.Control
|
||||
IN A,(C)
|
||||
ELSE
|
||||
LD BC,IDE.Read.Sector
|
||||
IN A,(C)
|
||||
ADC A,E
|
||||
INC B
|
||||
OUT (C),A ; IDE.Write.Sector
|
||||
|
||||
LD BC,IDE.Read.CylinderLow
|
||||
IN A,(C)
|
||||
ADC A,D
|
||||
INC B
|
||||
OUT (C),A ; IDE.Write.CylinderLow
|
||||
|
||||
LD BC,IDE.Read.CylinderHigh
|
||||
IN A,(C)
|
||||
ADC A,0
|
||||
INC B
|
||||
OUT (C),A ; IDE.Write.CylinderHigh
|
||||
|
||||
LD BC,IDE.Read.Control
|
||||
IN A,(C)
|
||||
ENDIF
|
||||
|
||||
LD D,A
|
||||
ADC A,0
|
||||
AND #0F
|
||||
LD E,A
|
||||
LD A,D
|
||||
AND #F0
|
||||
OR E
|
||||
INC B
|
||||
OUT (C),A ; ????? HEADS?! IDE.Write.DriveCtrl
|
||||
|
||||
POP AF
|
||||
RET
|
||||
|
||||
|
||||
;-----------------------------------[OK]
|
||||
FN_HDD_PREPARE: ; <EFBFBD>Ž„ƒŽ’ނЀ Š ‚<EFBFBD>…˜<EFBFBD>ˆŒ Ž<EFBFBD>…<EFBFBD>€–ˆŸŒ R/W
|
||||
POP AF
|
||||
AND A
|
||||
INC B
|
||||
DEC B
|
||||
RET Z
|
||||
|
||||
CALL HD_WAIT
|
||||
RET C
|
||||
|
||||
CALL HD_PREPARE
|
||||
RET C
|
||||
|
||||
EXX
|
||||
LD C,SLOT3
|
||||
IN B,(C)
|
||||
EXX
|
||||
OUT (SLOT3),A
|
||||
EX AF,AF'
|
||||
|
||||
SAFE_PORTY
|
||||
|
||||
LD BC,IDE.Write.Command ; ?????
|
||||
LD A,#20 ; ?????
|
||||
; OUT (C),A
|
||||
AND A ; ?????
|
||||
|
||||
RET
|
||||
;---------------------------------------
|
||||
|
||||
;-----------------------------------[OK]
|
||||
FN_HDD_READ_BPB:
|
||||
POP AF
|
||||
CALL HD_WAIT
|
||||
RET C
|
||||
CALL HD_BPB_PREP
|
||||
RET C
|
||||
|
||||
JR HD_RD_L1
|
||||
;---------------------------------------
|
||||
|
||||
|
||||
; FOR LBA ONLY - NEXT_READ
|
||||
FN_HDD_READ_NEXT:
|
||||
; HL - bufer, A - page
|
||||
; B - numer of sectors
|
||||
; DE - add_par (next+DE) (d.b. 1 for NEXT)
|
||||
POP AF
|
||||
AND A
|
||||
INC B
|
||||
DEC B
|
||||
RET Z ; ret if 0 sectors
|
||||
CALL HD_WAIT
|
||||
RET C
|
||||
CALL NEXT_ADD_SEC
|
||||
JR HD_RD_L1
|
||||
|
||||
|
||||
;-----------------------------------[OK]
|
||||
FN_HDD_READ:
|
||||
POP AF ; HL - BUFER, A - PAGE !!!
|
||||
|
||||
HD_RD_CMD:
|
||||
AND A
|
||||
INC B
|
||||
DEC B
|
||||
RET Z
|
||||
CALL HD_WAIT
|
||||
RET C
|
||||
|
||||
CALL HD_PREPARE
|
||||
RET C
|
||||
|
||||
HD_RD_L1:
|
||||
EXX
|
||||
LD C,SLOT3
|
||||
IN B,(C)
|
||||
EXX
|
||||
OUT (SLOT3),A
|
||||
EX AF,AF'
|
||||
|
||||
SAFE_PORTY
|
||||
|
||||
LD BC,IDE.Write.Command
|
||||
LD A,#20
|
||||
OUT (C),A
|
||||
|
||||
HD_RD_L2:
|
||||
|
||||
WAIT_HDD
|
||||
|
||||
BIT IDE.ControlBit.DataRequest,A
|
||||
JR NZ,HD_READ_CONT
|
||||
|
||||
ZERO_PORTY
|
||||
|
||||
HD_RET:
|
||||
EXX
|
||||
OUT (C),B
|
||||
EXX
|
||||
LD BC,IDE.Read.Error
|
||||
IN A,(C)
|
||||
AND A
|
||||
SCF
|
||||
RET NZ
|
||||
|
||||
EX AF,AF'
|
||||
AND A
|
||||
RET
|
||||
;---------------------------------------
|
||||
|
||||
;-----------------------------------[OK]
|
||||
HD_READ_CONT:
|
||||
LD BC,IDE.Read.Data
|
||||
|
||||
.loop_read1:
|
||||
DUP 16
|
||||
INI ; ¢á¥£® 16 à § INI - ®¯â¨¬ «ì®.
|
||||
EDUP
|
||||
JP NZ,.loop_read1
|
||||
.loop_read2:
|
||||
DUP 16
|
||||
INI ; ¢á¥£® 16 à § INI - ®¯â¨¬ «ì®.
|
||||
EDUP
|
||||
JP NZ,.loop_read2
|
||||
|
||||
LD A,H
|
||||
OR L
|
||||
JR NZ,HD_RD_L2
|
||||
|
||||
LD A,SYS_PAGE
|
||||
OUT (SLOT3),A
|
||||
EX AF,AF'
|
||||
LD HL,SYS_PAGE.RAMD_FAT
|
||||
LD L,A
|
||||
LD A,(HL)
|
||||
OUT (SLOT3),A
|
||||
EX AF,AF'
|
||||
LD HL,#C000 ; !!!!!
|
||||
JR HD_RD_L2
|
||||
;---------------------------------------
|
||||
|
||||
;-----------------------------------[OK]
|
||||
FN_HDD_WRITE:
|
||||
POP AF ; HL - BUFER, A - PAGE !!!
|
||||
|
||||
HD_WR_CMD:
|
||||
AND A
|
||||
INC B
|
||||
DEC B
|
||||
RET Z
|
||||
|
||||
CALL HD_WAIT
|
||||
RET C
|
||||
CALL HD_PREPARE
|
||||
RET C
|
||||
|
||||
EXX
|
||||
LD C,SLOT3
|
||||
IN B,(C)
|
||||
EXX
|
||||
OUT (SLOT3),A
|
||||
EX AF,AF'
|
||||
|
||||
LD BC,IDE.Write.Command
|
||||
LD A,#30
|
||||
OUT (C),A
|
||||
|
||||
HD_WR_L2:
|
||||
WAIT_HDD
|
||||
|
||||
BIT IDE.ControlBit.DataRequest,A
|
||||
JP Z,HD_RET
|
||||
|
||||
; IF HDD_TYPE = 1
|
||||
LD BC,IDE.Write.Data
|
||||
LD D,32
|
||||
HD_WR_LOOP:
|
||||
DUP 16
|
||||
OUTI ; ¢á¥£® 16 à § OUTI - ®¯â¨¬ «ì®.
|
||||
EDUP
|
||||
|
||||
DEC D
|
||||
JP NZ,HD_WR_LOOP
|
||||
/*
|
||||
ELSE
|
||||
LD BC,P_DATS+#100
|
||||
LD D,64
|
||||
HD_WR_LOOP:
|
||||
DUP 4
|
||||
INC HL
|
||||
OUTI
|
||||
DEC HL
|
||||
DEC HL
|
||||
OUTI
|
||||
INC HL
|
||||
EDUP
|
||||
|
||||
DEC D
|
||||
JR NZ,HD_WR_LOOP
|
||||
ENDIF
|
||||
*/
|
||||
LD A,H
|
||||
OR L
|
||||
JR NZ,HD_WR_L2
|
||||
|
||||
LD A,SYS_PAGE
|
||||
OUT (SLOT3),A
|
||||
EX AF,AF'
|
||||
LD HL,SYS_PAGE.RAMD_FAT
|
||||
LD L,A
|
||||
LD A,(HL)
|
||||
OUT (SLOT3),A
|
||||
EX AF,AF'
|
||||
LD HL,#C000 ;!!!!!
|
||||
JR HD_WR_L2
|
||||
;---------------------------------------
|
||||
|
||||
;-----------------------------------[OK]
|
||||
FN_HDD_RECAL:
|
||||
POP AF
|
||||
HD_CMD1_EX:
|
||||
LD A,#A0
|
||||
LD BC,IDE.Write.DriveCtrl
|
||||
OUT (C),A
|
||||
LD A,#90 ; DIAGNOSTICS
|
||||
CALL HD_CMD_EXE
|
||||
AND A
|
||||
BIT IDE.ControlBit.Error,A
|
||||
RET Z
|
||||
LD BC,IDE.Read.Error
|
||||
IN A,(C)
|
||||
CP 1 ; !!!!! £«ïãâì
|
||||
RET Z
|
||||
SCF
|
||||
RET
|
||||
;---------------------------------------
|
||||
|
||||
;-----------------------------------[OK]
|
||||
FN_HDD_TEST_IDE:
|
||||
POP AF
|
||||
LD E,#00
|
||||
LD BC,IDE.Write.DriveCtrl
|
||||
LD A,#A0 ; !!!!! £«ïãâì
|
||||
OUT (C),A
|
||||
|
||||
CALL TEST_HDD_DRV
|
||||
|
||||
JR NZ,NO_HDD1
|
||||
SET 0,E
|
||||
NO_HDD1:
|
||||
LD BC,IDE.Write.DriveCtrl
|
||||
LD A,#B0 ; !!!!! £«ïãâì
|
||||
OUT (C),A
|
||||
|
||||
CALL TEST_HDD_DRV
|
||||
|
||||
JR NZ,NO_HDD2
|
||||
SET 1,E
|
||||
NO_HDD2:
|
||||
LD A,E
|
||||
AND A
|
||||
SCF
|
||||
RET Z ; HDD absent !
|
||||
AND A
|
||||
RET
|
||||
;---------------------------------------
|
||||
|
||||
|
||||
;-----------------------------------[DIFFERENT]
|
||||
; <EFBFBD>¥ ¤®«¦ ¯®àâ¨âì ॣ¨áâà E!!!
|
||||
TEST_HDD_DRV:
|
||||
; EXP_HDD.ASM variant
|
||||
LD HL,#01FE ; ?????
|
||||
LD BC,IDE.Write.Counter
|
||||
OUT (C),L
|
||||
IF IDE_Optimization
|
||||
INC C
|
||||
OUT (C),H ; IDE.Write.Sector
|
||||
|
||||
DEC C
|
||||
INC B
|
||||
IN A,(C) ; ????? IDE.Write.Counter+#100
|
||||
CP L
|
||||
RET NZ
|
||||
INC C
|
||||
|
||||
ELSE
|
||||
LD BC,IDE.Write.Sector
|
||||
OUT (C),H
|
||||
LD BC,IDE.Write.Counter+#100
|
||||
IN A,(C)
|
||||
CP L
|
||||
RET NZ
|
||||
LD BC,IDE.Write.Sector+#100
|
||||
ENDIF
|
||||
|
||||
IN A,(C) ; ????? IDE.Write.Sector+#100
|
||||
CP H
|
||||
RET
|
||||
/*
|
||||
TEST_HDD_DRV:
|
||||
; EXTENDED.ASM variant
|
||||
LD HL,#00FF ;???!!!!
|
||||
LD BC,IDE.Write.CylinderLow
|
||||
OUT (C),L
|
||||
IF IDE_Optimization
|
||||
INC C
|
||||
OUT (C),H ; IDE.Write.CylinderHigh
|
||||
|
||||
INC B
|
||||
DEC C
|
||||
IN A,(C) ; ????? ’ãâ ॣ¨áâà BC = #0254 - çâ® § ¯®àâ â ª®© ¨ çâ® ®ââ㤠¯à®ç¨â ¥âáï?
|
||||
CP L
|
||||
RET NZ
|
||||
INC C
|
||||
|
||||
ELSE
|
||||
LD BC,IDE.Write.CylinderHigh
|
||||
OUT (C),H
|
||||
LD BC,#0254 ;???!!!!
|
||||
IN A,(C)
|
||||
CP L
|
||||
RET NZ
|
||||
LD BC,#0255 ;???!!!!
|
||||
ENDIF
|
||||
|
||||
IN A,(C) ; ????? ’ãâ ॣ¨áâà BC = #0255 - çâ® § ¯®àâ â ª®© ¨ çâ® ®ââ㤠¯à®ç¨â ¥âáï?
|
||||
CP H
|
||||
RET
|
||||
*/
|
||||
;---------------------------------------
|
||||
|
||||
|
||||
;-----------------------------------[OK]
|
||||
FN_HDD_INIT:
|
||||
POP AF
|
||||
LD BC,IDE.Write.DriveCtrl
|
||||
LD A,#A0
|
||||
OUT (C),A
|
||||
CALL TEST_HDD_DRV
|
||||
JR NZ,HD_ABSENT
|
||||
HD_C0_L3:
|
||||
WAIT_HDD
|
||||
|
||||
LD BC,IDE.Write.Command
|
||||
LD A,#EC ; !HARDCODE
|
||||
OUT (C),A
|
||||
|
||||
WAIT_HDD
|
||||
|
||||
BIT IDE.ControlBit.DataRequest,A
|
||||
JR NZ,HD_C0_L2
|
||||
SCF
|
||||
RET
|
||||
;---------------------------------------
|
||||
|
||||
;-----------------------------------[OK]
|
||||
HD_ABSENT:
|
||||
LD BC,IDE.Write.DriveCtrl
|
||||
LD A,#B0 ; !HARDCODE
|
||||
OUT (C),A
|
||||
CALL TEST_HDD_DRV
|
||||
JR Z,HD_C0_L3
|
||||
SCF
|
||||
RET
|
||||
;---------------------------------------
|
||||
|
||||
;-----------------------------------[OK]
|
||||
HD_C0_L2:
|
||||
LD BC,IDE.Read.Data
|
||||
LD HL,SYS_PAGE.HD_IDF_ADR
|
||||
IN A,(SLOT3)
|
||||
LD D,A
|
||||
LD A,SYS_PAGE
|
||||
OUT (SLOT3),A
|
||||
INIR
|
||||
INIR
|
||||
LD A,(SYS_PAGE.HD_IDF_ADR.sectors) ; ç¨á«® ᥪâ®à®¢
|
||||
LD C,A
|
||||
LD HL,0
|
||||
LD B,H
|
||||
LD A,(SYS_PAGE.HD_IDF_ADR.heads) ; ç¨á«® £®«®¢®ª
|
||||
.loop:
|
||||
ADD HL,BC
|
||||
DEC A
|
||||
JR NZ,.loop
|
||||
LD (SYS_PAGE.HD_IDF_ADR.sec_cyl),HL
|
||||
|
||||
WAIT_HDD
|
||||
|
||||
LD BC,IDE.Read.Control
|
||||
; DEC B
|
||||
IN A,(C)
|
||||
AND #10
|
||||
LD B,A
|
||||
LD A,(SYS_PAGE.HD_IDF_ADR.heads) ; ç¨á«® £®«®¢®ª
|
||||
|
||||
DEC A
|
||||
AND #0F
|
||||
OR #A0
|
||||
OR B
|
||||
|
||||
LD H,A
|
||||
LD A,(SYS_PAGE.HD_IDF_ADR+99) ; ????? LBA?
|
||||
BIT 1,A
|
||||
JR Z,HD_C0_NO_LBA
|
||||
SET 6,H
|
||||
|
||||
HD_C0_NO_LBA:
|
||||
LD BC,IDE.Write.DriveCtrl
|
||||
OUT (C),H
|
||||
|
||||
LD A,(SYS_PAGE.HD_IDF_ADR.sectors) ; ç¨á«® ᥪâ®à®¢
|
||||
|
||||
LD BC,IDE.Write.Counter
|
||||
OUT (C),A
|
||||
LD A,D
|
||||
OUT (SLOT3),A
|
||||
|
||||
LD A,#91 ; SET HDD PARAMETERS
|
||||
CALL HD_CMD_EXE
|
||||
RET
|
||||
|
||||
; RET C
|
||||
; LD A,1FH ; RECALIBRATE
|
||||
; CALL HD_CMD_EXE
|
||||
; RET
|
||||
;---------------------------------------
|
||||
|
||||
;-----------------------------------[OK]
|
||||
HD_CMD_EXE:
|
||||
CALL HD_WAIT
|
||||
RET C
|
||||
LD BC,IDE.Write.Command
|
||||
OUT (C),A
|
||||
HD_WAIT:
|
||||
PUSH DE
|
||||
PUSH BC
|
||||
PUSH AF
|
||||
LD DE,0
|
||||
HD_WAIT1:
|
||||
LD BC,IDE.Read.Status
|
||||
IN A,(C)
|
||||
BIT IDE.ControlBit.Busy,A
|
||||
JR Z,HD_W_EXIT
|
||||
DEC DE
|
||||
LD A,D
|
||||
OR E
|
||||
JR NZ,HD_WAIT1
|
||||
POP AF
|
||||
POP BC
|
||||
POP DE
|
||||
SCF
|
||||
RET
|
||||
;---------------------------------------
|
||||
|
||||
;-----------------------------------[OK]
|
||||
HD_W_EXIT:
|
||||
POP AF
|
||||
POP BC
|
||||
POP DE
|
||||
AND A
|
||||
RET
|
||||
;---------------------------------------
|
||||
|
||||
|
||||
;-----------------------------------[DIFFERENT]
|
||||
/*
|
||||
;EXTENDED.ASM Version
|
||||
|
||||
HDD_LBA: ;???!!!!
|
||||
POP BC
|
||||
LD L,E
|
||||
LD E,D
|
||||
LD D,XL
|
||||
XOR A
|
||||
LD H,A
|
||||
RET
|
||||
|
||||
HD_CALC_SECS:
|
||||
LD A,XH
|
||||
AND A
|
||||
SCF
|
||||
RET NZ ; ®è¨¡ª , ᫨誮¬ ¡®«ì让 HDD
|
||||
|
||||
PUSH BC
|
||||
LD BC,IDE.Write.DriveCtrl
|
||||
DEC B
|
||||
IN A,(C)
|
||||
BIT 6,A
|
||||
JR NZ,HDD_LBA
|
||||
; POP BC ;!!!!! ¯®á¬®âà¥âì
|
||||
*/
|
||||
|
||||
;EXP_HDD.ASM Version
|
||||
HDD_LBA:
|
||||
POP BC
|
||||
LD L,E
|
||||
LD E,D
|
||||
LD D,XL
|
||||
LD A,XH
|
||||
AND #0F ; XOR A ????? à §®¡à âìáï
|
||||
LD H,A
|
||||
RET
|
||||
|
||||
HD_CALC_SECS:
|
||||
PUSH BC
|
||||
LD BC,IDE.Read.Control
|
||||
; DEC B
|
||||
IN A,(C)
|
||||
BIT 6,A
|
||||
JR NZ,HDD_LBA
|
||||
POP BC ; ᨬ ¥¬ § 票¥ ¤«ï ª®à४⮣® ret
|
||||
|
||||
LD A,XH
|
||||
AND A
|
||||
SCF
|
||||
RET NZ ; ®è¨¡ª , ᫨誮¬ ¡®«ì让 HDD
|
||||
;---------------------------------------
|
||||
|
||||
|
||||
;-----------------------------------[OK]
|
||||
; IX,DE - ¡á®«îâë© ®¬¥à ᥪâ®à
|
||||
PUSH IX
|
||||
POP HL
|
||||
|
||||
IN A,(SLOT3)
|
||||
LD C,A
|
||||
LD A,SYS_PAGE
|
||||
OUT (SLOT3),A
|
||||
LD A,C
|
||||
LD (SYS_PAGE.COPY_SLOT3),A
|
||||
|
||||
; HL,DE - ®¬¥à ᥪâ®à
|
||||
; BC - ç¨á«® ᥪâ®à®¢ 樫¨¤à¥
|
||||
LD BC,(SYS_PAGE.HD_IDF_ADR.sec_cyl) ; ç¨á«® ᥪâ®à®¢ 樫¨¤à¥
|
||||
LD A,16 ; HL,DE à §¤¥«¨âì BC
|
||||
SCF
|
||||
DIV_LOOP:
|
||||
EX DE,HL
|
||||
ADD HL,HL
|
||||
EX DE,HL
|
||||
ADC HL,HL
|
||||
|
||||
SBC HL,BC ; áà ¢¨âì HL ¨ BC
|
||||
JR NC,NO_ADD ; ¯¥à¥®á ¥ ¡ë«® - +1!
|
||||
ADD HL,BC
|
||||
DEC A
|
||||
JR NZ,DIV_LOOP
|
||||
JR DIV_END
|
||||
NO_ADD:
|
||||
INC DE
|
||||
DEC A
|
||||
JR NZ,DIV_LOOP
|
||||
DIV_END:
|
||||
; DE - १ã«ìâ â, HL - ®áâ ⮪
|
||||
; DE - 樫¨¤à
|
||||
LD A,(SYS_PAGE.HD_IDF_ADR+12) ; !HARDCODE .sectors
|
||||
; A - ç¨á«® ᥪâ®à®¢ ¤®à®¦ª¥
|
||||
; HL - ®¬¥à ᥪâ®à ¢ 樫¨¤à¥
|
||||
LD B,0
|
||||
LD C,A
|
||||
; LD BC,(MS_BPB+S_P_T) ; —ˆ‘‹Ž ‘…Š’Ž<EFBFBD>Ž‚ <EFBFBD>€ „Ž<EFBFBD>ކЅ
|
||||
XOR A
|
||||
HD_CALC_LOOP2:
|
||||
SBC HL,BC
|
||||
INC A
|
||||
JR NC,HD_CALC_LOOP2
|
||||
|
||||
DEC A ; A - £®«®¢ª
|
||||
ADD HL,BC ; L - ᥪâ®à
|
||||
INC L
|
||||
LD H,A ; HL - HEAD,SEC
|
||||
|
||||
LD A,(SYS_PAGE.COPY_SLOT3)
|
||||
OUT (SLOT3),A
|
||||
|
||||
AND A
|
||||
RET
|
||||
;---------------------------------------
|
||||
|
||||
|
||||
FN_HDD_PART:
|
||||
POP AF
|
||||
BIT 0,A
|
||||
LD A,#21 ; !HARDCODE
|
||||
JR Z,IDE_1
|
||||
LD A,#01 ; !HARDCODE
|
||||
IDE_1:
|
||||
OUT (#BC),A ;!!!!! ¯®á¬®âà¥âì
|
||||
RET
|
||||
|
||||
; ENDMODULE
|
||||
;************************************************
|
||||
|
||||
; ?????
|
||||
; DB 'HDD_DRV_END'
|
||||
; ‚室:
|
||||
; C - ª®¬ ¤
|
||||
; 0 - INIT - ¢å®¤ëå ¯ à ¥â => A - ç¨á«® ¯®¤¤¥à¦¨¢ ¥¬ëå ¤¨áª®¢.
|
||||
; 1 - RESET - ¢ë¡®à ¤¨áª A - ®¬¥à ¤¨áª ®â 0 =>
|
||||
; 2 - (STATUS) !!!!! TEST?
|
||||
; 3 - MEDIA CHECK - A - ®¬¥à ¤¨áª => A = 0 - old. #FF - new (¢á¥£¤ #FF) !!!!! PREPARE???
|
||||
; 4 - READ BPB - A - ¤¨áª HL - ¤à¥á ¢ ⥪ã饩 áâà ¨æ¥.
|
||||
; 5 - READ - A - ¤¨áª, IX:DE ᥪâ®à, HL - ¤à¥á, B - ç¨á«® ᥪâ®à®¢
|
||||
; 6 - WRITE - '' -
|
||||
; 7 - PART
|
||||
; 8 - READ_NEXT
|
||||
;
|
||||
; ®è¨¡ª¨ - CF - A - ®è¨¡ª
|
||||
;
|
||||
; 0 - ¥â ®è¨¡ª¨
|
||||
; 1 - ¥¢¥à ï ª®¬ ¤
|
||||
; 2 - ¥¢¥àë© ®¬¥à ¤¨áª
|
||||
; 3 - ¥¢¥àë© ä®à¬ â (¥ MS-DOS)
|
||||
; 4 - ¥â £®â®¢®áâ¨
|
||||
; 5 - ®è¨¡ª ¯®§¨æ¨®¨à®¢ ¨ï
|
||||
; 6 - ᥪâ®à ¥ ©¤¥
|
||||
; 7 - ®è¨¡ª CRC
|
||||
; 8 - § é¨â § ¯¨á¨
|
||||
; 9 - ®è¨¡ª ç⥨ï
|
||||
; 10 - ®è¨¡ª § ¯¨á¨
|
||||
; 11 - ƒ‹žŠ
|
||||
;
|
||||
474
src/bios/backup/EXTENDED.as
Normal file
474
src/bios/backup/EXTENDED.as
Normal file
@ -0,0 +1,474 @@
|
||||
|
||||
;
|
||||
; It's disk drive BIOS extender for functions 5xh.
|
||||
;---------------------------------------------------------------
|
||||
;Version! Description
|
||||
;---------------------------------------------------------------
|
||||
; 2.32 ! Removed `DI' Disabled Interupt instruction in HDRIVER6
|
||||
; ! function load sectors.
|
||||
; ! Fixed bug waiting slave device in AUTOIDE.
|
||||
|
||||
;SPRINTER EQU 97
|
||||
;SPRINTER EQU 2000
|
||||
; DEVICE ZXSPECTRUM4096
|
||||
|
||||
/*
|
||||
;HDD_TYPE EQU 1
|
||||
MACRO WAIT_HDD
|
||||
.LL1:
|
||||
LD BC,P_HDST
|
||||
IN A,(C)
|
||||
BIT 7,A
|
||||
JR NZ,.LL1
|
||||
ENDM
|
||||
*/
|
||||
|
||||
; ORG #0000
|
||||
|
||||
; INCLUDE '../VERSION.INC'
|
||||
; INCLUDE '../BIOS.INC'
|
||||
|
||||
;VER EQU 2 ;Version disk subsystem
|
||||
;MOD EQU 40
|
||||
|
||||
;PAGE1 EQU #A2
|
||||
;PAGE2 EQU #C2
|
||||
;INT_ADRESS EQU #C124
|
||||
;INT_PAGE EQU #C126
|
||||
;INT_ID EQU #C127
|
||||
;BIOS EQU #3FD0
|
||||
; DS #3FD0,#FF
|
||||
|
||||
;------------[Begin of ROM]-------------
|
||||
ROM_START:
|
||||
DI
|
||||
HALT
|
||||
;---------------------------------------
|
||||
|
||||
;--------------[checksum]---------------
|
||||
BLOCK 4-$,#FF
|
||||
Check_Sum:
|
||||
DB #FF,#FF,#FF,#FF ; ¬¥áâ® ¤«ï ª®â஫쮩 á㬬ë
|
||||
;---------------------------------------
|
||||
BLOCK #10-$,#FF
|
||||
RET
|
||||
;---------------------------------------
|
||||
|
||||
;----------------[int]------------------
|
||||
BLOCK #38-$,#FF
|
||||
|
||||
INT:
|
||||
PUSH HL
|
||||
PUSH BC
|
||||
PUSH AF
|
||||
LD C,SLOT3
|
||||
IN B,(C)
|
||||
LD A,SYS_PAGE
|
||||
OUT (C),A
|
||||
|
||||
LD A,(SYS_PAGE.INT_ID)
|
||||
CP #AA
|
||||
JR Z,YESINT
|
||||
OUT (C),B
|
||||
JR NOINT
|
||||
YESINT:
|
||||
LD HL,(SYS_PAGE.INT_ADRESS)
|
||||
LD A,H
|
||||
OR L
|
||||
LD A,(SYS_PAGE.INT_PAGE)
|
||||
OUT (C),B
|
||||
CALL NZ,EXTINT
|
||||
NOINT:
|
||||
POP AF
|
||||
POP BC
|
||||
POP HL
|
||||
EI
|
||||
RETI
|
||||
;---------------------------------------
|
||||
|
||||
;----------------[NMI]------------------
|
||||
_mInfoBLOCK #66-$,#FF
|
||||
NMI:
|
||||
RETN
|
||||
;---------------------------------------
|
||||
|
||||
;----------------[int]------------------
|
||||
EXTINT:
|
||||
OR A
|
||||
RET Z
|
||||
LD C,SLOT1
|
||||
BIT 7,H
|
||||
JR Z,L1
|
||||
LD C,SLOT2
|
||||
BIT 6,H
|
||||
JR Z,L1
|
||||
LD C,SLOT3
|
||||
L1:
|
||||
IN B,(C)
|
||||
PUSH BC
|
||||
OUT (C),A
|
||||
CALL JPHL
|
||||
POP BC
|
||||
OUT (C),B
|
||||
RET
|
||||
JPHL:
|
||||
JP (HL)
|
||||
;---------------------------------------
|
||||
|
||||
;
|
||||
;!TEST ¥ 㦮 ¥á«¨ new_api_table
|
||||
HDD_FN_5x:
|
||||
POP AF
|
||||
CALL HDD_CMD.FN5X
|
||||
JP RET_TO_EXP
|
||||
|
||||
;HD_CMD_X
|
||||
;!TEST ¥ 㦮 ¥á«¨ new_api_table
|
||||
HDD_CMD_4X:
|
||||
SET 6,C
|
||||
CALL ToBIOS_FromEXT
|
||||
RET
|
||||
|
||||
|
||||
|
||||
; !TODO ; !FIXIT
|
||||
; ; SCF
|
||||
; ; BIT 7,C
|
||||
; !FIXIT
|
||||
;!TEST ¥ 㦮 ¥á«¨ new_api_table
|
||||
HDD_CMD:
|
||||
push af ; RET NZ
|
||||
ld a,%00011111 ; BIT 6,C
|
||||
sub c ; RET NZ
|
||||
jp c,.exit ; BIT 5,C
|
||||
pop af ; RET NZ
|
||||
BIT 4,C
|
||||
JP Z,HDD_CMD_4X ; 4xh functions ;C < #10 ; !TEST new_api
|
||||
; 5xh functions #C0 - CD ROM, #80 - HARD DISK, #60 - RAM DISK, #00 - FLOPPY DISK
|
||||
.FN5X:
|
||||
RES 4,C ;C >= #10
|
||||
INC C
|
||||
DEC C
|
||||
JP Z,.RESERVED ;#50
|
||||
DEC C
|
||||
JP Z,DRV_RESET ;#51 - Reset drive
|
||||
DEC C
|
||||
JP Z,DRV_READ_LONG ;#52 - Long read
|
||||
DEC C
|
||||
JP Z,DRV_WRITE_LONG ;#53 - Long write
|
||||
DEC C
|
||||
JP Z,DRV_VERIFY ;#54 - Verify sectors
|
||||
DEC C
|
||||
JP Z,DRV_READ ;#55 - Read sectors
|
||||
DEC C
|
||||
JP Z,DRV_WRITE ;#56 - Write sectors
|
||||
DEC C
|
||||
JP Z,DRV_DETECT ;#57 - Detect
|
||||
DEC C
|
||||
JP Z,DRV_GET_PAR ;#58 - Get Media parameters
|
||||
DEC C
|
||||
JP Z,DRV_SET_PAR ;#59 - Set Media parameters
|
||||
DEC C
|
||||
JP Z,DRV_VERSION ;#5A - Version number
|
||||
DEC C
|
||||
JP Z,.RESERVED ;#5B
|
||||
DEC C
|
||||
JP Z,.RESERVED ;#5C
|
||||
DEC C
|
||||
JP Z,.RESERVED ;#5D
|
||||
DEC C
|
||||
JP Z,.RESERVED ;#5E
|
||||
DEC C
|
||||
JP Z,DRV_CONFIG ;#5F - Configuration
|
||||
.RESERVED:
|
||||
LD A,1 ;!HARDCODE error code
|
||||
SCF
|
||||
RET
|
||||
.exit: POP AF
|
||||
SCF
|
||||
RET
|
||||
|
||||
DRV_VERSION:
|
||||
LD HL,0
|
||||
LD BC,0
|
||||
LD DE,Disk_subsystem_ver_hex
|
||||
AND A
|
||||
RET
|
||||
|
||||
DRV_CONFIG: ; ????? çâ® § äãªæ¨ï ¨ ªã¤ 㪠§ë¢ ¥â IX
|
||||
IN A,(SLOT3)
|
||||
PUSH AF
|
||||
PUSH IY
|
||||
LD A,SYS_PAGE
|
||||
OUT (SLOT3),A
|
||||
LD (IX+0),#04
|
||||
LD (IX+1),#00 ;FDD COUNT
|
||||
LD (IX+2),#00 ;HDD COUNT
|
||||
LD (IX+3),#00 ;CDD COUNT
|
||||
LD (IX+4),#00 ;END CODE
|
||||
;Calculating FDD devices
|
||||
LD HL,FDD_INI_TABLE.FDD_0
|
||||
INC (IX+1)
|
||||
LD B,8
|
||||
LD A,#FF
|
||||
TFD0:
|
||||
CP (HL)
|
||||
INC HL
|
||||
JR NZ,YYYFD0
|
||||
DJNZ TFD0
|
||||
DEC (IX+1)
|
||||
YYYFD0:
|
||||
LD HL,FDD_INI_TABLE.FDD_1
|
||||
INC (IX+1)
|
||||
LD B,8
|
||||
LD A,#FF
|
||||
TFD1:
|
||||
CP (HL)
|
||||
INC HL
|
||||
JR NZ,YYYFD1
|
||||
DJNZ TFD1
|
||||
DEC (IX+1)
|
||||
YYYFD1:
|
||||
;Calculating IDE devices
|
||||
LD IY,IDE.INIT_TBL_IDE0
|
||||
LD A,(IY+IDE.HDD_INIT_TABLE.DriveType) ;IDE TYPE 1-HDD, 2-CD-ROM
|
||||
CP #FF
|
||||
JR Z,ABSIDE0
|
||||
CP IDE.Device.HDD
|
||||
JR NZ,NOT_HD0
|
||||
INC (IX+2)
|
||||
NOT_HD0:
|
||||
CP IDE.Device.CDROM
|
||||
JR NZ,NOT_CD0
|
||||
INC (IX+3)
|
||||
NOT_CD0:
|
||||
ABSIDE0:
|
||||
LD IY,IDE.INIT_TBL_IDE1
|
||||
LD A,(IY+IDE.HDD_INIT_TABLE.DriveType) ;IDE TYPE 1-HDD, 2-CD-ROM
|
||||
CP #FF
|
||||
JR Z,ABSIDE1
|
||||
CP IDE.Device.HDD
|
||||
JR NZ,NOT_HD1
|
||||
INC (IX+2)
|
||||
|
||||
NOT_HD1:
|
||||
CP IDE.Device.CDROM
|
||||
JR NZ,NOT_CD1
|
||||
INC (IX+3)
|
||||
NOT_CD1:
|
||||
ABSIDE1:
|
||||
LD IY,IDE.INIT_TBL_IDE2
|
||||
LD A,(IY+IDE.HDD_INIT_TABLE.DriveType) ;IDE TYPE 1-HDD, 2-CD-ROM
|
||||
CP #FF
|
||||
JR Z,ABSIDE2
|
||||
CP IDE.Device.HDD
|
||||
JR NZ,NOT_HD2
|
||||
INC (IX+2)
|
||||
NOT_HD2:
|
||||
CP IDE.Device.CDROM
|
||||
JR NZ,NOT_CD2
|
||||
INC (IX+3)
|
||||
NOT_CD2:
|
||||
ABSIDE2:
|
||||
LD IY,IDE.INIT_TBL_IDE3
|
||||
LD A,(IY+IDE.HDD_INIT_TABLE.DriveType) ;IDE TYPE 1-HDD, 2-CD-ROM
|
||||
CP #FF
|
||||
JR Z,check_exit
|
||||
CP IDE.Device.HDD
|
||||
JR NZ,NOT_HD3
|
||||
INC (IX+2)
|
||||
NOT_HD3:
|
||||
CP IDE.Device.CDROM
|
||||
JR NZ,check_exit
|
||||
INC (IX+3)
|
||||
check_exit:
|
||||
POP IY
|
||||
POP AF
|
||||
OUT (SLOT3),A
|
||||
XOR A
|
||||
RET
|
||||
|
||||
DRV_RESET:
|
||||
CP #10
|
||||
JP C,FDD_5x.RESET
|
||||
; CP #60
|
||||
; JP C,.error
|
||||
; CP #70
|
||||
; JP C,RESETR
|
||||
CP #80
|
||||
JP C,.error
|
||||
CP #90
|
||||
JP C,HDD_5x.RESET
|
||||
CP #C0
|
||||
JP C,.error
|
||||
CP #D0
|
||||
JP C,CD_5x.RESET
|
||||
.error:
|
||||
LD A,#AA
|
||||
SCF
|
||||
RET
|
||||
|
||||
DRV_READ_LONG:
|
||||
CP #10
|
||||
JP C,FDD_5x.LONG_READ
|
||||
CP #60
|
||||
JP C,.error
|
||||
CP #70
|
||||
JP C,RMD_5x.LONG_READ
|
||||
CP #80
|
||||
JP C,.error
|
||||
CP #90
|
||||
JP C,HDD_5x.LONG_READ
|
||||
CP #C0
|
||||
JP C,.error
|
||||
CP #D0
|
||||
JP C,CD_5x.LONG_READ
|
||||
.error:
|
||||
LD A,#AA
|
||||
SCF
|
||||
RET
|
||||
|
||||
DRV_WRITE_LONG:
|
||||
CP #10
|
||||
JP C,FDD_5x.LONG_WRITE
|
||||
CP #60
|
||||
JP C,.error
|
||||
CP #70
|
||||
JP C,RMD_5x.LONG_WRITE
|
||||
CP #80
|
||||
JP C,.error
|
||||
CP #90
|
||||
JP C,HDD_5x.LONG_WRITE
|
||||
; CP #C0
|
||||
; JP C,.error
|
||||
; CP #D0
|
||||
; JP C,LWRITEC
|
||||
.error:
|
||||
LD A,#AA
|
||||
SCF
|
||||
RET
|
||||
|
||||
DRV_READ:
|
||||
CP #10 ; !HARDCODE ¯® §ë¢ âì ¡ë ¢á¥ ID
|
||||
JP C,FDD_5x.READ
|
||||
CP #60
|
||||
JP C,.error
|
||||
CP #70
|
||||
JP C,RMD_5x.READ
|
||||
CP #80
|
||||
JP C,.error
|
||||
CP #90
|
||||
JP C,HDD_5x.READ
|
||||
CP #C0
|
||||
JP C,.error
|
||||
CP #D0
|
||||
JP C,CD_5x.READ
|
||||
.error:
|
||||
LD A,#AA
|
||||
SCF
|
||||
RET
|
||||
|
||||
DRV_WRITE:
|
||||
CP #10
|
||||
JP C,FDD_5x.WRITE
|
||||
CP #60
|
||||
JP C,.error
|
||||
CP #70
|
||||
JP C,RMD_5x.WRITE
|
||||
CP #80
|
||||
JP C,.error
|
||||
CP #90
|
||||
JP C,HDD_5x.WRITE
|
||||
; CP #C0
|
||||
; JP C,.error
|
||||
; CP #D0
|
||||
; JP C,WRITEC
|
||||
.error:
|
||||
LD A,#AA
|
||||
SCF
|
||||
RET
|
||||
|
||||
DRV_VERIFY:
|
||||
; CP #10
|
||||
; JP C,VERIFYD
|
||||
; CP #60
|
||||
; JP C,.error
|
||||
; CP #70
|
||||
; JP C,VERIFYR
|
||||
CP #80
|
||||
JP C,.error
|
||||
CP #90
|
||||
JP C,HDD_5x.VERIFY
|
||||
; CP #C0
|
||||
; JP C,.error
|
||||
; CP #D0
|
||||
; JP C,VERIFYC
|
||||
.error:
|
||||
LD A,#AA
|
||||
SCF
|
||||
RET
|
||||
|
||||
DRV_DETECT:
|
||||
CP #10
|
||||
JP C,FDD_5x.DETECT
|
||||
; CP #60
|
||||
; JP C,.error
|
||||
; CP #70
|
||||
; JP C,DETECTR
|
||||
; CP #80
|
||||
; JP C,.error
|
||||
; CP #90
|
||||
; JP C,DETECTH
|
||||
CP #C0
|
||||
JP C,.error
|
||||
CP #D0
|
||||
JP C,CD_5x.DETECT
|
||||
.error:
|
||||
LD A,#AA
|
||||
SCF
|
||||
RET
|
||||
|
||||
DRV_GET_PAR:
|
||||
CP #10
|
||||
JP C,FDD_5x.GETMED
|
||||
CP #60
|
||||
JP C,.error
|
||||
CP #70
|
||||
JP C,RMD_5x.GETMED
|
||||
CP #80
|
||||
JP C,.error
|
||||
CP #90
|
||||
JP C,HDD_5x.GETMED
|
||||
.error:
|
||||
LD A,#AA
|
||||
SCF
|
||||
RET
|
||||
|
||||
DRV_SET_PAR:
|
||||
CP #10
|
||||
JP C,FDD_5x.SETMED
|
||||
CP #60
|
||||
JP C,.error
|
||||
CP #70
|
||||
JP C,RMD_5x.SETMED
|
||||
CP #80
|
||||
JP C,.error
|
||||
CP #90
|
||||
JP C,HDD_5x.SETMED
|
||||
.error:
|
||||
LD A,#AA
|
||||
SCF
|
||||
RET
|
||||
;
|
||||
|
||||
INCLUDE 'src/bios/ROM/EXTENDED/FDD_DRIVER_2.asm'
|
||||
INCLUDE 'src/bios/ROM/EXTENDED/RAM_DISK_DRIVER_1.asm'
|
||||
INCLUDE 'src/bios/ROM/EXTENDED/HDD_DRIVER_6.asm'
|
||||
INCLUDE 'src/bios/ROM/EXTENDED/CD_DRIVER_0.asm'
|
||||
|
||||
;01000h SETUP
|
||||
|
||||
; ORG #9000
|
||||
; INCBIN "BSETUP.BIN"
|
||||
; INCLUDE "ENDROM.ASM"
|
||||
;
|
||||
135
src/bios/backup/ROM.as
Normal file
135
src/bios/backup/ROM.as
Normal file
@ -0,0 +1,135 @@
|
||||
;-----------[#0000 Extended]------------
|
||||
INCLUDE 'src/bios/rom/EXTENDED/EXTENDED.asm'
|
||||
;---------------------------------------
|
||||
DISPLAY " EXTENDED end addr: ", /A, $
|
||||
|
||||
;-------------[#1000 SETUP]-------------
|
||||
ShowInfo 'Setup block of ROM start', 0 ; !!!!! test
|
||||
|
||||
BLOCK_Setup EQU $
|
||||
|
||||
IF PACKED_MAIN
|
||||
BLOCK ROM_MAP.SETUP-$,#FF
|
||||
|
||||
DISP COMPILE_ADDR.SETUP
|
||||
|
||||
; Depacker version
|
||||
SETUP_MAIN:
|
||||
LD HL,DEPACKER.UnpackedEXECaddr; â®çª ¢å®¤ ¢ à ᯠª®¢ ®¬ ª®¤¥
|
||||
PUSH HL
|
||||
LD DE,DEPACKER.WorkAddr ; ¤à¥á ¯à®æ¥¤ãàë ¤¥¯ ª¥à
|
||||
PUSH DE
|
||||
|
||||
LD HL,DEPACKER.Addr
|
||||
LD BC,DEPACKER.Length
|
||||
LDIR
|
||||
|
||||
LD HL,DEPACKER.PackedMAIN ; £¤¥ à娢
|
||||
LD DE,DEPACKER.UnpackAddr ; ªã¤ à ᯠª®¢ë¢ âì
|
||||
RET
|
||||
|
||||
.Depacker EQU $
|
||||
ENT
|
||||
|
||||
;-----------------[v]
|
||||
DEPACK_DATA:
|
||||
DISP DEPACKER.WorkAddr
|
||||
MODULE UnPacker
|
||||
INCLUDE 'src/bios/ROM/SETUP/DEHRUST.asm' ; !TODO ᤥ« âì LUA ¢â®¢ë¡®à ¤¥ª®¬¯à¥áá®à ¨ ª®¬¯à¥áá®à
|
||||
PackedMAIN: INCBIN 'Build/Bin/temp/MAIN.PAK'
|
||||
ENDMODULE
|
||||
ENT
|
||||
DEPACK_DATA.length EQU $-DEPACK_DATA
|
||||
;-----------------[^]
|
||||
|
||||
|
||||
ELSE
|
||||
DISP COMPILE_ADDR.SETUP
|
||||
ShowInfo 'Setup block DISP start', 1 ; !!!!! test
|
||||
SETUP_MAIN: INCLUDE 'src/bios/ROM/SETUP/Main.asm'
|
||||
ShowInfo 'Setup block DISP end', 1 ; !!!!! test
|
||||
ENT
|
||||
ENDIF
|
||||
|
||||
|
||||
ShowInfo 'Setup block of ROM end', 0 ; !!!!! test
|
||||
BLOCK_Setup.Length EQU $-BLOCK_Setup
|
||||
;---------------------------------------
|
||||
|
||||
|
||||
;***************************************
|
||||
;
|
||||
; !TODO ¬®¦® ®¯à¨å®¤®¢ âì âãâ ᪮«ìª®-â® ¡ ©â®¢
|
||||
; DISPLAY 'Address in ROM with ', /D, ToBIOS_FromEXT-$, ' free bytes: ',/H,$
|
||||
;***************************************
|
||||
;
|
||||
;---------------[SET EXP]---------------
|
||||
_mInfoBLOCK ToBIOS_FromEXT-$,#FF ; #3FD0
|
||||
; call exp bios from setup
|
||||
;RST18h:
|
||||
PUSH AF
|
||||
LD A,ROM.EXT ; set exp-rom to slot0
|
||||
OUT (SYS_PORT.ON),A
|
||||
POP AF
|
||||
RET
|
||||
;---------------------------------------
|
||||
|
||||
|
||||
|
||||
;--------[ From TR-DOS to HDD part2]--------
|
||||
_mInfoBLOCK #3FD8-$,#FF
|
||||
TRDOS_HD_CMD:
|
||||
// JP L0107
|
||||
POP AF
|
||||
CALL HDD_CMD ; !TEST new_api
|
||||
JP RET_TO_TRDOS
|
||||
;---------------------------------------
|
||||
|
||||
|
||||
|
||||
;-------------[SND_TEST_RET]-------------
|
||||
_mInfoBLOCK #3FE0-$,#FF
|
||||
SND_TEST_RET:
|
||||
LD A,ROM.EXT
|
||||
OUT (SYS_PORT.OFF),A
|
||||
; JP SOUND_TEST
|
||||
JP #0000
|
||||
;---------------------------------------
|
||||
|
||||
|
||||
;!TEST ¥ 㦮 ¥á«¨ new_api_table
|
||||
;------------[HDD_5x portal]------------
|
||||
; â®çª ¢å®¤ /¢ë室 ¤«ï äãªæ¨© 5å ¨§ EXP
|
||||
_mInfoBLOCK #3FE8-$,#FF
|
||||
RET_TO_EXP:
|
||||
PUSH AF
|
||||
LD A,ROM.EXT
|
||||
OUT (SYS_PORT.ON),A
|
||||
JP HDD_FN_5x
|
||||
;---------------------------------------
|
||||
|
||||
|
||||
;!FIXIT íâ â®çª ¢å®¤ ®ç¥ì áâà ï ¨§ áâà ¨æë ¢ áâà ¨æã ¯àë£ ¥â
|
||||
;---------[ From TR-DOS to HDD ]--------
|
||||
_mInfoBLOCK #3FF0-$,255
|
||||
RET_TO_TRDOS:
|
||||
PUSH AF
|
||||
DI
|
||||
LD A,ROM.EXT
|
||||
OUT (SYS_PORT.OFF),A
|
||||
JR TRDOS_HD_CMD ; âãâ ¥ å¢ â¨«® ¬¥áâ ¢ 1 ¡ ©â, ç⮡ áà §ã ᤥ« âì JP
|
||||
;---------------------------------------
|
||||
|
||||
|
||||
|
||||
;-----[???????????????????????????]-----
|
||||
_mInfoBLOCK #3FF8-$,255
|
||||
A3FF8: PUSH AF
|
||||
LD A,ROM.EXT
|
||||
OUT (SYS_PORT.OFF),A
|
||||
; !FIXIT ¬®¦¥â ã¡à âì § £«ãèªã ¨ ᤥ« âì, ç⮡ ¯¥à¥ª«îç «®áì EXP ¨ ¤ «ìè¥ ª ª ¢ EXP_FNS_RET ?
|
||||
; ¨«¨ ᢮¥£® 祣®-¨¡ã¤ì ¤®¡ ¢¨âì.
|
||||
JP #0000
|
||||
;---------------------------------------
|
||||
; $ = #4000
|
||||
;=======================================
|
||||
724
src/bios/exp/BIOS_FUNC.asm
Normal file
724
src/bios/exp/BIOS_FUNC.asm
Normal file
@ -0,0 +1,724 @@
|
||||
;
|
||||
MACRO _mNoDrive_5xTable numberOFdrives, byteOFword
|
||||
IF byteOFword
|
||||
DUP numberOFdrives
|
||||
DB high FN_RESERVED_5x ;#50 - „ã¡«ì. <20> íâã äãªæ¨î ¯àë£ ¥â ¨§ ®á®¢®£® ®¡à ¡®â稪
|
||||
|
||||
DB high FN_5x_Parser_1 ;#51
|
||||
DB high FN_5x_Parser_2 ;#52
|
||||
DB high FN_5x_Parser_3 ;#53
|
||||
DB high FN_5x_Parser_4 ;#54
|
||||
DB high FN_5x_Parser_5 ;#55
|
||||
DB high FN_5x_Parser_6 ;#56
|
||||
DB high FN_5x_Parser_7 ;#57
|
||||
DB high FN_5x_Parser_8 ;#58
|
||||
DB high FN_5x_Parser_9 ;#59
|
||||
|
||||
DB high DRV_VERSION ;#5A - „ã¡«ì. <20> íâã äãªæ¨î ¯àë£ ¥â ¨§ ®á®¢®£® ®¡à ¡®â稪
|
||||
DB high FN_RESERVED_5x ;#5B - „ã¡«ì. <20> íâã äãªæ¨î ¯àë£ ¥â ¨§ ®á®¢®£® ®¡à ¡®â稪
|
||||
DB high FN_RESERVED_5x ;#5C - „ã¡«ì. <20> íâã äãªæ¨î ¯àë£ ¥â ¨§ ®á®¢®£® ®¡à ¡®â稪
|
||||
DB high FN_RESERVED_5x ;#5D - „ã¡«ì. <20> íâã äãªæ¨î ¯àë£ ¥â ¨§ ®á®¢®£® ®¡à ¡®â稪
|
||||
DB high FN_RESERVED_5x ;#5E - „ã¡«ì. <20> íâã äãªæ¨î ¯àë£ ¥â ¨§ ®á®¢®£® ®¡à ¡®â稪
|
||||
DB high DRV_CONFIG ;#5F - „ã¡«ì. <20> íâã äãªæ¨î ¯àë£ ¥â ¨§ ®á®¢®£® ®¡à ¡®â稪
|
||||
EDUP
|
||||
ELSE
|
||||
DUP numberOFdrives
|
||||
DB low FN_RESERVED_5x ;#50 - „ã¡«ì. <20> íâã äãªæ¨î ¯àë£ ¥â ¨§ ®á®¢®£® ®¡à ¡®â稪
|
||||
|
||||
DB low FN_5x_Parser_1 ;#51
|
||||
DB low FN_5x_Parser_2 ;#52
|
||||
DB low FN_5x_Parser_3 ;#53
|
||||
DB low FN_5x_Parser_4 ;#54
|
||||
DB low FN_5x_Parser_5 ;#55
|
||||
DB low FN_5x_Parser_6 ;#56
|
||||
DB low FN_5x_Parser_7 ;#57
|
||||
DB low FN_5x_Parser_8 ;#58
|
||||
DB low FN_5x_Parser_9 ;#59
|
||||
|
||||
DB low DRV_VERSION ;#5A - „ã¡«ì. <20> íâã äãªæ¨î ¯àë£ ¥â ¨§ ®á®¢®£® ®¡à ¡®â稪
|
||||
DB low FN_RESERVED_5x ;#5B - „ã¡«ì. <20> íâã äãªæ¨î ¯àë£ ¥â ¨§ ®á®¢®£® ®¡à ¡®â稪
|
||||
DB low FN_RESERVED_5x ;#5C - „ã¡«ì. <20> íâã äãªæ¨î ¯àë£ ¥â ¨§ ®á®¢®£® ®¡à ¡®â稪
|
||||
DB low FN_RESERVED_5x ;#5D - „ã¡«ì. <20> íâã äãªæ¨î ¯àë£ ¥â ¨§ ®á®¢®£® ®¡à ¡®â稪
|
||||
DB low FN_RESERVED_5x ;#5E - „ã¡«ì. <20> íâã äãªæ¨î ¯àë£ ¥â ¨§ ®á®¢®£® ®¡à ¡®â稪
|
||||
DB low DRV_CONFIG ;#5F - „ã¡«ì. <20> íâã äãªæ¨î ¯àë£ ¥â ¨§ ®á®¢®£® ®¡à ¡®â稪
|
||||
EDUP
|
||||
ENDIF
|
||||
ENDM
|
||||
;
|
||||
|
||||
_mInfoALIGN 256,0
|
||||
;=========================================================[ MAIN TABLE ]
|
||||
; !FIXIT ¯®¯à ¢¨âì ¢ ¤®ª¥ §¢ ¨ï äãªæ¨©, ç áâì ¥ ᮢ¯ ¤ ¥â
|
||||
TAB_FNS:
|
||||
|
||||
; 00 - #3F
|
||||
DUP #40
|
||||
DB low FN_RESERVED
|
||||
EDUP
|
||||
;
|
||||
|
||||
; #4x
|
||||
;--------------
|
||||
DB low FN_HDD_INIT ; #40 ˆ¨æ¨ «¨§ æ¨ï ¢¨ç¥áâ¥à
|
||||
DB low FN_HDD_RECAL ; #41 <20>¥ª «¨¡à®¢ª ¢¨ç¥áâ¥à
|
||||
DB low FN_HDD_TEST_IDE ; #42 ’¥áâ «¨ç¨ï ¨â¥à䥩á IDE
|
||||
DB low FN_HDD_PREPARE ; #43 <20>®¤£®â®¢ª ¢¨ç¥áâ¥à ª ®¯¥à 樨 ç⥨ï/§ ¯¨á¨
|
||||
DB low FN_HDD_READ_BPB ; #44 —¨â âì BPB ¯¥à¢®£® à §¤¥«
|
||||
DB low FN_HDD_READ ; #45 —¨â âì ᥪâ®à á ¢¨ç¥áâ¥à
|
||||
DB low FN_HDD_WRITE ; #46 <20>¨á âì ᥪâ®à ¢¨ç¥áâ¥à
|
||||
DB low FN_HDD_PART ; #47 set IDE number (<28> áâனª ¯ àâ¨æ¨© ¨ master/slave)???
|
||||
DB low FN_HDD_READ_NEXT ; #48 —¨â âì á«¥¤ãî騩 ᥪâ®à (ONLY FOR LBA!)
|
||||
DB low FN_RESERVED ; #49
|
||||
DB low FN_RESERVED ; #4A
|
||||
DB low FN_RESERVED ; #4B
|
||||
DB low FN_RESERVED ; #4C
|
||||
DB low FN_RESERVED ; #4D
|
||||
DB low FN_RESERVED ; #4E
|
||||
DB low FN_RESERVED ; #4F
|
||||
;--------------
|
||||
;
|
||||
|
||||
; 5x
|
||||
;--------------
|
||||
DB low FN_RESERVED_5x ;#50
|
||||
|
||||
DB low FN_5x_Parser_1 ;#51 - Reset drive
|
||||
DB low FN_5x_Parser_2 ;#52 - Long read
|
||||
DB low FN_5x_Parser_3 ;#53 - Long write
|
||||
DB low FN_5x_Parser_4 ;#54 - Verify sectors
|
||||
DB low FN_5x_Parser_5 ;#55 - Read sectors
|
||||
DB low FN_5x_Parser_6 ;#56 - Write sectors
|
||||
DB low FN_5x_Parser_7 ;#57 - Detect
|
||||
DB low FN_5x_Parser_8 ;#58 - Get Media parameters
|
||||
DB low FN_5x_Parser_9 ;#59 - Set Media parameters
|
||||
|
||||
DB low DRV_VERSION ;#5A - Version number
|
||||
DB low FN_RESERVED_5x ;#5B
|
||||
DB low FN_RESERVED_5x ;#5C
|
||||
DB low FN_RESERVED_5x ;#5D
|
||||
DB low FN_RESERVED_5x ;#5E
|
||||
DB low DRV_CONFIG ;#5F - Configuration
|
||||
;--------------
|
||||
|
||||
; 60 - #7F
|
||||
DUP #20
|
||||
DB low FN_RESERVED
|
||||
EDUP
|
||||
|
||||
|
||||
; 8x
|
||||
DB low LP_OPEN_S ; #80 ®âªàë⨥ ®ª
|
||||
DB low LP_PRINT_ALL ; #81 ¯¥ç âì ᨬ¢®« ¢ ®ª®
|
||||
DB low LP_PRINT_SYM ; #82 ¯¥ç âì ᨬ¢®« ¡¥§ âà
|
||||
DB low LP_PRINT_ATR ; #83 ¯¥ç âì ⮫쪮 âਡãâ
|
||||
DB low LP_SET_PLACE ; #84 ãáâ ®¢ª ¯®§¨æ¨¨ ¯¥ç â¨
|
||||
DB low LP_PRINT_LINE ; #85 ¯¥ç âì áâப¨ ¤«¨®© B
|
||||
DB low LP_PRINT_LINE2 ; #86 ¯¥ç âì áâப¨ -//- ¡¥§ âਡã⮢
|
||||
DB low LP_PRINT_LINE3 ; #87 ¯¥ç âì áâப¨ ¤«¨®© B ¤® D
|
||||
DB low LP_PRINT_LINE4 ; #88 ¯¥ç âì áâப¨ -//- ¡¥§ âਡã⮢
|
||||
DB low LP_CLS_WIN ; #89
|
||||
DB low LP_SCROLL_UD ; #8A
|
||||
DB low LP_PRINT_LINE5 ; #8B
|
||||
DB low LP_PRINT_LINE6 ; #8C
|
||||
DB low LP_CLS_WIN2 ; #8D
|
||||
DB low LP_GET_PLACE ; #8E
|
||||
DB low FN_TURBO ; #8F
|
||||
; 9x
|
||||
DB low EMM.GetMemSize ; #90 ¥à §àãè î饥 ®¯à¥¤¥«¥¨¥ ®¡ê¥¬ އ“.
|
||||
DB low EMM.InitMem ; #91 ¨¨æ¨ «¨§ æ¨ï à á¯à¥¤¥«¥¨ï ¯ ¬ïâ¨
|
||||
DB low EMM.GetMemRMD ; #92 ¯®«ãç¨âì ¡«®ª ¯ ¬ï⨠¤«ï à ¬¤¨áª
|
||||
DB low EMM.FreeMemRMD ; #93 ®á¢®¡®¤¨âì ¡«®ª ¯ ¬ïâ¨ à ¬¤¨áª
|
||||
DB low EMM.GetMemPageRMD ; #94 ¯®«ãç¨âì ®¬¥àa áâà ¨æ RAM-Disk
|
||||
DB low EMM.GetMemPageNext ; #95 ¯®«ãç¨âì á«¥¤ãîéãî áâà ¨æã
|
||||
DB low EMM.GetBanksPorts ; #96 ¯®«ãç¨âì ¤à¥á ¯®à⮢
|
||||
DB low EMM.CheckColdInit ; #97 ¯à®¢¥àª 宫®¤ë© áâ àâ ¨ ¨¨æ¨ «¨§ 樨 ¥á«¨ ® ;????? 㦠«¨ ª ª API?
|
||||
DB low RAMD_CALC_PAGE ; #98 Fn 98h ;?????
|
||||
DB low SET_DISK_TYPE ; #99 ;?????
|
||||
DB low DISK_REDIR ; #9A ;?????
|
||||
DB low GET_RAMD_NUM ; #9B ¯®«ãç¨âì ®¬¥à ram disk ¯® ¥£® block id
|
||||
DB low FN_RESERVED ; #9C
|
||||
DB low EMM.DivMemBlocks ; #9D à §¤¥«¥¨ï ¡«®ª ¤¢ .
|
||||
DB low EMM.MergeMemBlocks ; #9E ᫨逸 ¤¢ãå ¡«®ª®¢
|
||||
DB low EMM.FullInit ; #9F ¨¨æ¨ «¨§ æ¨ï ¢á¥© ¯ ¬ïâ¨, á¨á⥬ëå ¯¥à¥¬¥ëå
|
||||
; Ax
|
||||
DB low PIC_FN0 ; #A0 Ž’Š<E28099>›’ˆ… ŽŠ<C5BD>€ - Fn 0A0h
|
||||
DB low PIC_FN1 ; #A1 ‚›‚…‘’ˆ ’Ž—Š“
|
||||
DB low PIC_FN2 ; #A2 ‚›‚Ž„ ‹ˆ<E280B9>ˆˆ COPY
|
||||
DB low PIC_FN3 ; #A3 ‚›‚Ž„ ‹ˆ<E280B9>ˆˆ FILL
|
||||
DB low PIC_SET_PAL ; #A4 ‚›‚Ž„ <20>€‹ˆ’<CB86>›
|
||||
DB low PIC_FN5 ; #A5 “‘’€<E28099>ނЀ RGMOD
|
||||
DB low PIC_FN6 ; #A6 A - page_pal, E - ®¬¥à ¯ «¨âàë, B - ⨯ ¯ «¨âàë
|
||||
DB low PIC_FN7 ; #A7 <20>¨á®¢ ¨¥ «¨¨¨ ®¤®£® 梥â
|
||||
DB low PIC_FN8 ; #A8 <20>¨á®¢ ¨¥ à §®æ¢¥â®© «¨¨¨
|
||||
DB low PIC_FN9 ; #A9 ¥â
|
||||
DB low PIC_FN10 ; #AA ¥â
|
||||
DB low PIC_FN11 ; #AB ¥â
|
||||
DB low PIC_FN12 ; #AC ¥â
|
||||
DB low PIC_FN14 ; #AD ¥â
|
||||
DB low PIC_FN14 ; #AE ¥â
|
||||
DB low PIC_FN15 ; #AF ¥â
|
||||
; Bx
|
||||
DB low WIN_OPEN ; #B0 ®âªàë⨥ ®ª ¯® ®¯¨á ⥫î
|
||||
DB low WIN_CLOSE ; #B1 § ªàë⨥ ®ª
|
||||
DB low WIN_COPY ; #B2 á®åà ¥¨¥ ⥪á⮢®£® ®ª ¢ ¯ ¬ïâ¨
|
||||
DB low WIN_RESTORE ; #B3 ¢®ááâ ®¢«¥¨¥ ⥪á⮢®£® ®ª ¨§ ¯ ¬ïâ¨
|
||||
DB low WIN_GET_SYM ; #B4 ¢§ïâì ᨬ¢®«
|
||||
DB low WIN_PUT_SYM ; #B5 ¯®«®¦¨âì ᨬ¢®«
|
||||
DB low WIN_SET_ZG ; #B6 § £à㧪 § ª®£¥¥à â®à
|
||||
DB low WIN_MOVE ; #B7 ¯¥à¥¬¥áâ¨âì ®ª®
|
||||
DB low WIN_GET_ZG ; #B8 ¯®«ãç¨âì § ª®£¥¥à â®à
|
||||
DB low FN_RESERVED ; #B9
|
||||
DB low FN_RESERVED ; #BA
|
||||
DB low FN_RESERVED ; #BB
|
||||
DB low FN_RESERVED ; #BC
|
||||
DB low FN_RESERVED ; #BD
|
||||
DB low FN_RESERVED ; #BE
|
||||
DB low FN_RESERVED ; #BF
|
||||
; Cx
|
||||
DB low EMM.GetMemSize ; #C0 ¯®«ãç¨âì ¤ ë¥ ®¡ ®¡ê¥¬¥ ¯ ¬ï⨠¨ ª®«-¢® ᢮¡. áâà.
|
||||
DB low EMM.InitMem ; #C1 ¨¨æ¨ «¨§ æ¨ï à á¯à¥¤¥«¥¨ï ¯ ¬ïâ¨
|
||||
DB low EMM.GetMem ; #C2 ¯®«ãç¨âì ¡«®ª ¯ ¬ïâ¨
|
||||
DB low EMM.FreeMem ; #C3 ®á¢®¡®¤¨âì ¡«®ª ¯ ¬ïâ¨
|
||||
DB low EMM.GetMemPage ; #C4 ¯®«ãç¨âì ®¬¥à áâà ¨æë ¢ ¡«®ª¥ ¯ ¬ïâ¨
|
||||
DB low EMM.GetMemBlkPages ; #C5 ¯®«ãç¨âì ᯨ᮪ áâà ¨æ ¡«®ª ¯ ¬ïâ¨
|
||||
DB low EMM.GetBanksPorts ; #C6 ¯®«ãç¨âì ¤à¥á ¯®à⮢ ®ª®
|
||||
DB low EMM.GetMemPageNext ; #C7 ¯®«ãç¨âì á«¥¤ãîéãî áâà ¨æã ¡«®ª
|
||||
DB low BLK_RD_WR ; #C8 äãªæ¨ï ç⥨ï/§ ¯¨á¨ ¢ ¡«®ª ¯ ¬ïâ¨
|
||||
DB low BLK_TO_RAMD ; #C9 § ç¨âì ¡«®ª RAM-Disk-ã
|
||||
DB low RAMD_CLEAR ; #CA ®á¢®¡®¤¨âì RAM-Disk
|
||||
DB low RAMD_TO_DRV ; #CB § ç¨âì RAM-Disk ¤¨áª®¢®¤
|
||||
DB low FDD_TO_DRV ; #CC § ç¨âì REAL_DRIVE ¤¨áª®¢®¤
|
||||
DB low HDD_TO_DRV ; #CD § ç¨âì HDD ¤¨áª®¢®¤
|
||||
DB low GET_RAMD_ST ; #CE ¯®«ãç¨âì ⨯ § 票ï RAM-Disk
|
||||
DB low GET_DRV_ST ; #CF ¯®«ãç¨âì ⨯ § ç¥¨ï ¤¨áª®¢®¤
|
||||
; Dx
|
||||
DB low FN_LIB ; #D0
|
||||
DB low FN_LIB ; #D1
|
||||
DB low FN_LIB ; #D2
|
||||
DB low FN_LIB ; #D3
|
||||
DB low FN_LIB ; #D4
|
||||
DB low FN_LIB ; #D5
|
||||
DB low FN_LIB ; #D6
|
||||
DB low FN_LIB ; #D7
|
||||
DB low FN_LIB ; #D8
|
||||
DB low FN_LIB ; #D9
|
||||
DB low FN_LIB ; #DA
|
||||
DB low FN_LIB ; #DB
|
||||
DB low FN_LIB ; #DC
|
||||
DB low FN_LIB ; #DD
|
||||
DB low FN_LIB ; #DE
|
||||
DB low FN_LIB ; #DF
|
||||
; Ex
|
||||
DB low LP_PRINT_LINE_DIR ; #E0
|
||||
DB low FN_RESERVED ; #E1
|
||||
DB low FN_RESERVED ; #E2
|
||||
DB low FN_RESERVED ; #E3
|
||||
DB low FN_RESERVED ; #E4
|
||||
DB low FN_RESERVED ; #E5
|
||||
DB low FN_RESERVED ; #E6
|
||||
DB low FN_RESERVED ; #E7
|
||||
DB low FN_SEND_BYTE ; #E8 ¯®á« âì ¡ ©â ç¥à¥§ PC_link
|
||||
DB low FN_RESEIVE_B ; #E9 ¯à¨ïâì ¡ ©â ç¥à¥§ PC_link
|
||||
DB low FN_KBD_OUT ; #EA ¯®á« âì ¡ ©â ¢ ª« ¢¨ âãàã
|
||||
DB low FN_RESERVED ; #EB
|
||||
DB low FN_RESERVED ; #EC
|
||||
DB low FN_CRIPT ; #ED
|
||||
DB low RST_CONF.AY8910 ; #EE ¤«ï ᮢ¬¥á⨬®á⨠á á®ä⮬ Sp97
|
||||
DB low FN_VERSION ; #EF
|
||||
; Fx
|
||||
DB low RST_CONF.SP97_1 ; #F0 ¤«ï ᮢ¬¥á⨬®á⨠á á®ä⮬ Sp97
|
||||
DB low RST_CONF.SP97_2 ; #F1 ¤«ï ᮢ¬¥á⨬®á⨠á á®ä⮬ Sp97
|
||||
DB low FN_SYNC ; #F2
|
||||
DB low RST_CONF.CUSTOM ; #F3 ¤«ï ᮢ¬¥á⨬®á⨠á á®ä⮬ Sp97 ;!TODO ᤥ« âì ¥ñ ¨ ¤«ï ¯¥à¥§ «¨¢ª¨ ª®äë Sp2000
|
||||
DB low DCP_CONFIG ; #F4
|
||||
DB low CMOS_TEST ; #F5
|
||||
DB low CMOS_RD ; #F6
|
||||
DB low CMOS_WR ; #F7
|
||||
DB low SET_PORTS ; #F8
|
||||
DB low READ_PORTS ; #F9 !TODO
|
||||
DB low WRITE_PORTS ; #FA !TODO
|
||||
DB low GOTO_SPEC ; #FB Goto Spectrum!
|
||||
DB low FN_RESERVED ; #FC
|
||||
DB low REINIT ; #FD
|
||||
DB low FN_RESERVED ; #FE SAVE_AUTOSTART ;!!!!!
|
||||
DB low FN_VERSION ; #FF
|
||||
|
||||
;****************----------------------------************************-----------------
|
||||
|
||||
|
||||
; 00 - #3F
|
||||
DUP #40
|
||||
DB high FN_RESERVED
|
||||
EDUP
|
||||
;
|
||||
|
||||
;--------------
|
||||
DB high FN_HDD_INIT
|
||||
DB high FN_HDD_RECAL
|
||||
DB high FN_HDD_TEST_IDE
|
||||
DB high FN_HDD_PREPARE
|
||||
DB high FN_HDD_READ_BPB
|
||||
DB high FN_HDD_READ
|
||||
DB high FN_HDD_WRITE
|
||||
DB high FN_HDD_PART
|
||||
DB high FN_HDD_READ_NEXT
|
||||
DB high FN_RESERVED
|
||||
DB high FN_RESERVED
|
||||
DB high FN_RESERVED
|
||||
DB high FN_RESERVED
|
||||
DB high FN_RESERVED
|
||||
DB high FN_RESERVED
|
||||
DB high FN_RESERVED
|
||||
;--------------
|
||||
|
||||
;--------------
|
||||
DB high FN_RESERVED_5x
|
||||
|
||||
DB high FN_5x_Parser_1
|
||||
DB high FN_5x_Parser_2
|
||||
DB high FN_5x_Parser_3
|
||||
DB high FN_5x_Parser_4
|
||||
DB high FN_5x_Parser_5
|
||||
DB high FN_5x_Parser_6
|
||||
DB high FN_5x_Parser_7
|
||||
DB high FN_5x_Parser_8
|
||||
DB high FN_5x_Parser_9
|
||||
|
||||
DB high DRV_VERSION
|
||||
DB high FN_RESERVED_5x
|
||||
DB high FN_RESERVED_5x
|
||||
DB high FN_RESERVED_5x
|
||||
DB high FN_RESERVED_5x
|
||||
DB high DRV_CONFIG
|
||||
;--------------
|
||||
|
||||
; 60 - #7F
|
||||
DUP #20
|
||||
DB high FN_RESERVED
|
||||
EDUP
|
||||
|
||||
; 8x
|
||||
DB high LP_OPEN_S
|
||||
DB high LP_PRINT_ALL
|
||||
DB high LP_PRINT_SYM
|
||||
DB high LP_PRINT_ATR
|
||||
DB high LP_SET_PLACE
|
||||
DB high LP_PRINT_LINE
|
||||
DB high LP_PRINT_LINE2
|
||||
DB high LP_PRINT_LINE3
|
||||
DB high LP_PRINT_LINE4
|
||||
DB high LP_CLS_WIN
|
||||
DB high LP_SCROLL_UD
|
||||
DB high LP_PRINT_LINE5
|
||||
DB high LP_PRINT_LINE6
|
||||
DB high LP_CLS_WIN2
|
||||
DB high LP_GET_PLACE
|
||||
DB high FN_TURBO
|
||||
; 9x
|
||||
DB high EMM.GetMemSize
|
||||
DB high EMM.InitMem
|
||||
DB high EMM.GetMemRMD
|
||||
DB high EMM.FreeMemRMD
|
||||
DB high EMM.GetMemPageRMD
|
||||
DB high EMM.GetMemPageNext
|
||||
DB high EMM.GetBanksPorts
|
||||
DB high EMM.CheckColdInit
|
||||
DB high RAMD_CALC_PAGE
|
||||
DB high SET_DISK_TYPE
|
||||
DB high DISK_REDIR
|
||||
DB high FN_RESERVED
|
||||
DB high FN_RESERVED
|
||||
DB high EMM.DivMemBlocks
|
||||
DB high EMM.MergeMemBlocks
|
||||
DB high EMM.FullInit
|
||||
; Ax
|
||||
DB high PIC_FN0
|
||||
DB high PIC_FN1
|
||||
DB high PIC_FN2
|
||||
DB high PIC_FN3
|
||||
DB high PIC_SET_PAL
|
||||
DB high PIC_FN5
|
||||
DB high PIC_FN6
|
||||
DB high PIC_FN7
|
||||
DB high PIC_FN8
|
||||
DB high PIC_FN9
|
||||
DB high PIC_FN10
|
||||
DB high PIC_FN11
|
||||
DB high PIC_FN12
|
||||
DB high PIC_FN14
|
||||
DB high PIC_FN14
|
||||
DB high PIC_FN15
|
||||
; Bx
|
||||
DB high WIN_OPEN
|
||||
DB high WIN_CLOSE
|
||||
DB high WIN_COPY
|
||||
DB high WIN_RESTORE
|
||||
DB high WIN_GET_SYM
|
||||
DB high WIN_PUT_SYM
|
||||
DB high WIN_SET_ZG
|
||||
DB high WIN_MOVE
|
||||
DB high WIN_GET_ZG
|
||||
DB high FN_RESERVED
|
||||
DB high FN_RESERVED
|
||||
DB high FN_RESERVED
|
||||
DB high FN_RESERVED
|
||||
DB high FN_RESERVED
|
||||
DB high FN_RESERVED
|
||||
DB high FN_RESERVED
|
||||
; Cx
|
||||
DB high EMM.GetMemSize
|
||||
DB high EMM.InitMem
|
||||
DB high EMM.GetMem
|
||||
DB high EMM.FreeMem
|
||||
DB high EMM.GetMemPage
|
||||
DB high EMM.GetMemBlkPages
|
||||
DB high EMM.GetBanksPorts
|
||||
DB high EMM.GetMemPageNext
|
||||
DB high BLK_RD_WR
|
||||
DB high BLK_TO_RAMD
|
||||
DB high RAMD_CLEAR
|
||||
DB high RAMD_TO_DRV
|
||||
DB high FDD_TO_DRV
|
||||
DB high HDD_TO_DRV
|
||||
DB high GET_RAMD_ST
|
||||
DB high GET_DRV_ST
|
||||
; Dx
|
||||
DB high FN_LIB
|
||||
DB high FN_LIB
|
||||
DB high FN_LIB
|
||||
DB high FN_LIB
|
||||
DB high FN_LIB
|
||||
DB high FN_LIB
|
||||
DB high FN_LIB
|
||||
DB high FN_LIB
|
||||
DB high FN_LIB
|
||||
DB high FN_LIB
|
||||
DB high FN_LIB
|
||||
DB high FN_LIB
|
||||
DB high FN_LIB
|
||||
DB high FN_LIB
|
||||
DB high FN_LIB
|
||||
DB high FN_LIB
|
||||
; Ex
|
||||
DB high LP_PRINT_LINE_DIR
|
||||
DB high FN_RESERVED
|
||||
DB high FN_RESERVED
|
||||
DB high FN_RESERVED
|
||||
DB high FN_RESERVED
|
||||
DB high FN_RESERVED
|
||||
DB high FN_RESERVED
|
||||
DB high FN_RESERVED
|
||||
DB high FN_SEND_BYTE
|
||||
DB high FN_RESEIVE_B
|
||||
DB high FN_KBD_OUT
|
||||
DB high FN_RESERVED
|
||||
DB high FN_RESERVED
|
||||
DB high FN_CRIPT
|
||||
DB high RST_CONF.AY8910
|
||||
DB high FN_VERSION
|
||||
; Fx
|
||||
DB high RST_CONF.SP97_1
|
||||
DB high RST_CONF.SP97_2
|
||||
DB high FN_SYNC
|
||||
DB high RST_CONF.CUSTOM
|
||||
DB high DCP_CONFIG
|
||||
DB high CMOS_TEST
|
||||
DB high CMOS_RD
|
||||
DB high CMOS_WR
|
||||
DB high SET_PORTS
|
||||
DB high READ_PORTS
|
||||
DB high WRITE_PORTS
|
||||
DB high GOTO_SPEC
|
||||
DB high FN_RESERVED
|
||||
DB high REINIT
|
||||
DB high FN_RESERVED
|
||||
DB high FN_VERSION
|
||||
|
||||
|
||||
_mInfoALIGN 256,0
|
||||
;===========================================================[ 5x TABLE ]
|
||||
TAB_5xFNS:
|
||||
|
||||
; Drives Numbers:
|
||||
; 0 FDD
|
||||
; 1..5 reserved
|
||||
; 6 RAM-DRV
|
||||
; 7 reserved
|
||||
; 8 HDD
|
||||
; 9..B reserved
|
||||
; C CDROM
|
||||
; D..F reserved
|
||||
|
||||
; ‘⮫¡¥æ - ⨯ ¤à ©¢
|
||||
; áâப - ®¬¥à äãªæ¨¨
|
||||
|
||||
; --< LOW PART >--
|
||||
;-------------------------------------------------------------[ FDD #0 ]
|
||||
;
|
||||
DB low FN_RESERVED_5x ;#50 - „ã¡«ì. <20> íâã äãªæ¨î ¯àë£ ¥â ¨§ ®á®¢®£® ®¡à ¡®â稪
|
||||
DB low FDD_5x.RESET ;#51
|
||||
DB low FDD_5x.LONG_READ ;#52
|
||||
DB low FDD_5x.LONG_WRITE ;#53
|
||||
DB low FN_ABSENT_5x ;#54
|
||||
DB low FDD_5x.READ ;#55
|
||||
DB low FDD_5x.WRITE ;#56
|
||||
DB low FDD_5x.DETECT ;#57
|
||||
DB low FDD_5x.GETMED ;#58
|
||||
DB low FDD_5x.SETMED ;#59
|
||||
|
||||
DB low DRV_VERSION ;#5A - „ã¡«ì. <20> íâã äãªæ¨î ¯àë£ ¥â ¨§ ®á®¢®£® ®¡à ¡®â稪
|
||||
DB low FN_RESERVED_5x ;#5B - „ã¡«ì. <20> íâã äãªæ¨î ¯àë£ ¥â ¨§ ®á®¢®£® ®¡à ¡®â稪
|
||||
DB low FN_RESERVED_5x ;#5C - „ã¡«ì. <20> íâã äãªæ¨î ¯àë£ ¥â ¨§ ®á®¢®£® ®¡à ¡®â稪
|
||||
DB low FN_RESERVED_5x ;#5D - „ã¡«ì. <20> íâã äãªæ¨î ¯àë£ ¥â ¨§ ®á®¢®£® ®¡à ¡®â稪
|
||||
DB low FN_RESERVED_5x ;#5E - „ã¡«ì. <20> íâã äãªæ¨î ¯àë£ ¥â ¨§ ®á®¢®£® ®¡à ¡®â稪
|
||||
DB low DRV_CONFIG ;#5F - „ã¡«ì. <20> íâã äãªæ¨î ¯àë£ ¥â ¨§ ®á®¢®£® ®¡à ¡®â稪
|
||||
;
|
||||
;---------------------------------------------------------------------[]
|
||||
|
||||
_mNoDrive_5xTable 5, 0
|
||||
|
||||
;-------------------------------------------------------[ RAM DRIVE #6 ]
|
||||
;
|
||||
DB low FN_RESERVED_5x
|
||||
DB low FN_ABSENT_5x
|
||||
DB low RMD_5x.LONG_READ
|
||||
DB low RMD_5x.LONG_WRITE
|
||||
DB low FN_ABSENT_5x
|
||||
DB low RMD_5x.READ
|
||||
DB low RMD_5x.WRITE
|
||||
DB low FN_ABSENT_5x
|
||||
DB low RMD_5x.GETMED
|
||||
DB low RMD_5x.SETMED
|
||||
|
||||
DB low DRV_VERSION
|
||||
DB low FN_RESERVED_5x
|
||||
DB low FN_RESERVED_5x
|
||||
DB low FN_RESERVED_5x
|
||||
DB low FN_RESERVED_5x
|
||||
DB low DRV_CONFIG
|
||||
;
|
||||
;---------------------------------------------------------------------[]
|
||||
|
||||
_mNoDrive_5xTable 1, 0
|
||||
|
||||
;-------------------------------------------------------------[ HDD #8 ]
|
||||
;
|
||||
DB low FN_RESERVED_5x
|
||||
DB low HDD_5x.RESET
|
||||
DB low HDD_5x.LONG_READ
|
||||
DB low HDD_5x.LONG_WRITE
|
||||
DB low HDD_5x.VERIFY
|
||||
DB low HDD_5x.READ
|
||||
DB low HDD_5x.WRITE
|
||||
DB low FN_ABSENT_5x
|
||||
DB low HDD_5x.GETMED
|
||||
DB low HDD_5x.SETMED
|
||||
|
||||
DB low DRV_VERSION
|
||||
DB low FN_RESERVED_5x
|
||||
DB low FN_RESERVED_5x
|
||||
DB low FN_RESERVED_5x
|
||||
DB low FN_RESERVED_5x
|
||||
DB low DRV_CONFIG
|
||||
;
|
||||
;---------------------------------------------------------------------[]
|
||||
|
||||
_mNoDrive_5xTable 3, 0
|
||||
|
||||
;----------------------------------------------------------[ CDROM #C0 ]
|
||||
;
|
||||
DB low FN_RESERVED_5x
|
||||
DB low CD_5x.RESET
|
||||
DB low CD_5x.LONG_READ
|
||||
DB low FN_ABSENT_5x
|
||||
DB low FN_ABSENT_5x
|
||||
DB low CD_5x.READ
|
||||
DB low FN_ABSENT_5x
|
||||
DB low CD_5x.DETECT
|
||||
DB low FN_ABSENT_5x
|
||||
DB low FN_ABSENT_5x
|
||||
|
||||
DB low DRV_VERSION
|
||||
DB low FN_RESERVED_5x
|
||||
DB low FN_RESERVED_5x
|
||||
DB low FN_RESERVED_5x
|
||||
DB low FN_RESERVED_5x
|
||||
DB low DRV_CONFIG
|
||||
;
|
||||
;---------------------------------------------------------------------[]
|
||||
|
||||
_mNoDrive_5xTable 3, 0
|
||||
;
|
||||
|
||||
; --< HIGH PART >--
|
||||
;-------------------------------------------------------------[ FDD #0 ]
|
||||
;
|
||||
DB high FN_RESERVED_5x ;#50 - „ã¡«ì. <20> íâã äãªæ¨î ¯àë£ ¥â ¨§ ®á®¢®£® ®¡à ¡®â稪
|
||||
DB high FDD_5x.RESET ;#51
|
||||
DB high FDD_5x.LONG_READ ;#52
|
||||
DB high FDD_5x.LONG_WRITE ;#53
|
||||
DB high FN_ABSENT_5x ;#54
|
||||
DB high FDD_5x.READ ;#55
|
||||
DB high FDD_5x.WRITE ;#56
|
||||
DB high FDD_5x.DETECT ;#57
|
||||
DB high FDD_5x.GETMED ;#58
|
||||
DB high FDD_5x.SETMED ;#59
|
||||
|
||||
DB high DRV_VERSION ;#5A - „ã¡«ì. <20> íâã äãªæ¨î ¯àë£ ¥â ¨§ ®á®¢®£® ®¡à ¡®â稪
|
||||
DB high FN_RESERVED_5x ;#5B - „ã¡«ì. <20> íâã äãªæ¨î ¯àë£ ¥â ¨§ ®á®¢®£® ®¡à ¡®â稪
|
||||
DB high FN_RESERVED_5x ;#5C - „ã¡«ì. <20> íâã äãªæ¨î ¯àë£ ¥â ¨§ ®á®¢®£® ®¡à ¡®â稪
|
||||
DB high FN_RESERVED_5x ;#5D - „ã¡«ì. <20> íâã äãªæ¨î ¯àë£ ¥â ¨§ ®á®¢®£® ®¡à ¡®â稪
|
||||
DB high FN_RESERVED_5x ;#5E - „ã¡«ì. <20> íâã äãªæ¨î ¯àë£ ¥â ¨§ ®á®¢®£® ®¡à ¡®â稪
|
||||
DB high DRV_CONFIG ;#5F - „ã¡«ì. <20> íâã äãªæ¨î ¯àë£ ¥â ¨§ ®á®¢®£® ®¡à ¡®â稪
|
||||
;
|
||||
;---------------------------------------------------------------------[]
|
||||
|
||||
_mNoDrive_5xTable 5, 1
|
||||
|
||||
;-------------------------------------------------------[ RAM DRIVE #6 ]
|
||||
;
|
||||
DB high FN_RESERVED_5x
|
||||
DB high FN_ABSENT_5x
|
||||
DB high RMD_5x.LONG_READ
|
||||
DB high RMD_5x.LONG_WRITE
|
||||
DB high FN_ABSENT_5x
|
||||
DB high RMD_5x.READ
|
||||
DB high RMD_5x.WRITE
|
||||
DB high FN_ABSENT_5x
|
||||
DB high RMD_5x.GETMED
|
||||
DB high RMD_5x.SETMED
|
||||
|
||||
DB high DRV_VERSION
|
||||
DB high FN_RESERVED_5x
|
||||
DB high FN_RESERVED_5x
|
||||
DB high FN_RESERVED_5x
|
||||
DB high FN_RESERVED_5x
|
||||
DB high DRV_CONFIG
|
||||
;
|
||||
;---------------------------------------------------------------------[]
|
||||
|
||||
_mNoDrive_5xTable 1, 1
|
||||
|
||||
;-------------------------------------------------------------[ HDD #8 ]
|
||||
;
|
||||
DB high FN_RESERVED_5x
|
||||
DB high HDD_5x.RESET
|
||||
DB high HDD_5x.LONG_READ
|
||||
DB high HDD_5x.LONG_WRITE
|
||||
DB high HDD_5x.VERIFY
|
||||
DB high HDD_5x.READ
|
||||
DB high HDD_5x.WRITE
|
||||
DB high FN_ABSENT_5x
|
||||
DB high HDD_5x.GETMED
|
||||
DB high HDD_5x.SETMED
|
||||
|
||||
DB high DRV_VERSION
|
||||
DB high FN_RESERVED_5x
|
||||
DB high FN_RESERVED_5x
|
||||
DB high FN_RESERVED_5x
|
||||
DB high FN_RESERVED_5x
|
||||
DB high DRV_CONFIG
|
||||
;
|
||||
;---------------------------------------------------------------------[]
|
||||
|
||||
_mNoDrive_5xTable 3, 1
|
||||
|
||||
;----------------------------------------------------------[ CDROM #C0 ]
|
||||
;
|
||||
DB high FN_RESERVED_5x
|
||||
DB high CD_5x.RESET
|
||||
DB high CD_5x.LONG_READ
|
||||
DB high FN_ABSENT_5x
|
||||
DB high FN_ABSENT_5x
|
||||
DB high CD_5x.READ
|
||||
DB high FN_ABSENT_5x
|
||||
DB high CD_5x.DETECT
|
||||
DB high FN_ABSENT_5x
|
||||
DB high FN_ABSENT_5x
|
||||
|
||||
DB high DRV_VERSION
|
||||
DB high FN_RESERVED_5x
|
||||
DB high FN_RESERVED_5x
|
||||
DB high FN_RESERVED_5x
|
||||
DB high FN_RESERVED_5x
|
||||
DB high DRV_CONFIG
|
||||
;
|
||||
;---------------------------------------------------------------------[]
|
||||
|
||||
_mNoDrive_5xTable 3, 1
|
||||
|
||||
;=======================================================================;
|
||||
|
||||
;************************************
|
||||
; ‚室 ¢ äãªæ¨î ¯® RST18 ¨ RST8
|
||||
EXP_FNS_RST18:
|
||||
PUSH HL
|
||||
LD L,C
|
||||
LD H,high TAB_FNS
|
||||
LD C,(HL)
|
||||
INC H
|
||||
LD H,(HL)
|
||||
LD L,C
|
||||
EX (SP),HL
|
||||
RET
|
||||
|
||||
FN_5x_Parser_1:
|
||||
LD C,1
|
||||
JP FN_5x_Parser
|
||||
FN_5x_Parser_2:
|
||||
LD C,2
|
||||
JP FN_5x_Parser
|
||||
FN_5x_Parser_3:
|
||||
LD C,3
|
||||
JP FN_5x_Parser
|
||||
FN_5x_Parser_4:
|
||||
LD C,4
|
||||
JP FN_5x_Parser
|
||||
FN_5x_Parser_5:
|
||||
LD C,5
|
||||
JP FN_5x_Parser
|
||||
FN_5x_Parser_6:
|
||||
LD C,6
|
||||
JP FN_5x_Parser
|
||||
FN_5x_Parser_7:
|
||||
LD C,7
|
||||
JP FN_5x_Parser
|
||||
FN_5x_Parser_8:
|
||||
LD C,8
|
||||
JP FN_5x_Parser
|
||||
FN_5x_Parser_9:
|
||||
LD C,9
|
||||
FN_5x_Parser:
|
||||
PUSH HL
|
||||
LD H,A
|
||||
AND #F0
|
||||
OR C
|
||||
; âãâ ¢ A ®¬¥à “‘’<E28098>މ‘’‚€ + <20>ŽŒ…<C592> ”“<E2809D>Š–ˆˆ
|
||||
LD L,A
|
||||
LD A,H
|
||||
LD H,high TAB_5xFNS
|
||||
LD C,(HL)
|
||||
INC H
|
||||
LD H,(HL)
|
||||
LD L,C
|
||||
EX (SP),HL
|
||||
RET
|
||||
|
||||
EXP_FNS: ; ‚室 ¢ äãªæ¨î ¨§ TR-DOS
|
||||
POP AF
|
||||
CALL EXP_FNS_RST18
|
||||
CALL DOS_ON
|
||||
JP EXP_FNS_RET
|
||||
|
||||
;! ! ! ! ! ! ! !
|
||||
FN_RESERVED_5x:
|
||||
LD A,1 ;!HARDCODE error code
|
||||
FN_RESERVED:
|
||||
SCF
|
||||
RET
|
||||
FN_ABSENT_5x:
|
||||
LD A,#AA ;!HARDCODE error code
|
||||
SCF
|
||||
RET
|
||||
;! ! ! ! ! ! ! !
|
||||
;
|
||||
643
src/bios/exp/DCP.ASM
Normal file
643
src/bios/exp/DCP.ASM
Normal file
@ -0,0 +1,643 @@
|
||||
;-----------------------------------------------------------------------;
|
||||
; DATA FOR DCP
|
||||
; ¢¡¨¢ ¥¬ ¢ â ¡«¨æã DCP.XLSX ã¦ë© ¢¥è¨© ¯®àâ,
|
||||
; ᬮâਬ ᬥ饨¥ ¤«ï OUT (‘),x - íâ® ¤à¥á
|
||||
;
|
||||
;
|
||||
; C C E D / A A A A A A A A A
|
||||
; N N 1 O W 1 1 6 5 1 7 2 1 0
|
||||
; F F 2 S R 5 4 3
|
||||
; 1 0 8
|
||||
;
|
||||
; CCED/AAAAAAAAA
|
||||
; NN1OW116517210
|
||||
; FF2SR54 3
|
||||
;DCP_DATA: 108
|
||||
; ....0..11.1110
|
||||
; WORD %00000001101110 ; - ¤à¥á
|
||||
; WORD %00001001101111 ; - ¬ ᪠- 0 ¨§¬¥ï¥¬ë¥ ¡¨âë, 1 ¥¨§¬¥ï¥¬ë¥
|
||||
; BYTE Conf_port.Border_FE ; - ¯®àâ
|
||||
|
||||
; DCP END MARKER
|
||||
; DW 0,0,0
|
||||
;-----------------------------------------------------------------------;
|
||||
;
|
||||
|
||||
;
|
||||
;-----------------------------------------------------------------------;
|
||||
; VG93 Ports
|
||||
DW %00000000000111
|
||||
DW %00010001101111
|
||||
DB Conf_port.VG93_1F
|
||||
DW %11010000000111
|
||||
DW %11010001101111
|
||||
DB Conf_port.VG93_1F
|
||||
;ok
|
||||
DW %00000000100111
|
||||
DW %00010001101111
|
||||
DB Conf_port.VG93_3F
|
||||
DW %11010000100111
|
||||
DW %11010001101111
|
||||
DB Conf_port.VG93_3F
|
||||
;ok
|
||||
DW %00000001000111
|
||||
DW %00010001101111
|
||||
DB Conf_port.VG93_5F
|
||||
DW %11010001000111
|
||||
DW %11010001101111
|
||||
DB Conf_port.VG93_5F
|
||||
;ok
|
||||
DW %00000001100111
|
||||
DW %00010001101111
|
||||
DB Conf_port.VG93_7F
|
||||
DW %11010001100111
|
||||
DW %11010001101111
|
||||
DB Conf_port.VG93_7F
|
||||
;ok
|
||||
DW %00000001101111
|
||||
DW %00011001101111
|
||||
DB Conf_port.VG93_State
|
||||
DW %11010001101111
|
||||
DW %11011001101111
|
||||
DB Conf_port.VG93_State
|
||||
; For joystick
|
||||
DW %00011000000111
|
||||
DW %10011001101111
|
||||
DB Conf_port.JOY_VG93
|
||||
DW %10011000000111
|
||||
DW %11011001101111
|
||||
DB Conf_port.JOY_VG93
|
||||
|
||||
; For VG93 with dos on
|
||||
DW %00001001101111
|
||||
DW %00011001101111
|
||||
DB Conf_port.JOY_VG93
|
||||
|
||||
; For VG93 with dos off
|
||||
DW %11011001101111
|
||||
DW %11011001101111
|
||||
DB Conf_port.JOY_VG93
|
||||
;ok
|
||||
DW %00000000101101
|
||||
DW %11011111111111
|
||||
DB Conf_port.FDD720
|
||||
DW %11000000101101
|
||||
DW %11001111111111
|
||||
DB Conf_port.FDD720
|
||||
;ok
|
||||
DW %00000000111101
|
||||
DW %11011111111111
|
||||
DB Conf_port.FDD144
|
||||
DW %11000000111101
|
||||
DW %11001111111111
|
||||
DB Conf_port.FDD144
|
||||
|
||||
;!FIXIT UNKNOWN PORTS--------------------------------------------------; dos on, ⮫쪮 ç¥à¥§ BC, ç⥨¥/§ ¯¨áì
|
||||
;ok
|
||||
DW %10000100101101
|
||||
DW %11010111111111
|
||||
DB #18
|
||||
;ok
|
||||
DW %10000100111101
|
||||
DW %11010111111111
|
||||
DB #19
|
||||
;ok
|
||||
DW %10000110101101
|
||||
DW %11010111111111
|
||||
DB #1A
|
||||
;----------------------------------------------------------------------;
|
||||
;ok
|
||||
DW %00000100101101
|
||||
DW %11001111111111
|
||||
DB #1B
|
||||
DW %10000110111101
|
||||
DW %11010111111111
|
||||
DB #1B
|
||||
DW %11000100101101
|
||||
DW %11001111111111
|
||||
DB #1B
|
||||
;ok
|
||||
DW %00001100111101
|
||||
DW %11001101111111
|
||||
DB #1C
|
||||
DW %11001100111101
|
||||
DW %11001101111111
|
||||
DB #1C
|
||||
;ok
|
||||
DW %00000110101101
|
||||
DW %11001111111111
|
||||
DB #1D
|
||||
DW %11000110101101
|
||||
DW %11001111111111
|
||||
DB #1D
|
||||
;ok
|
||||
DW %00000100111101
|
||||
DW %11001101111111
|
||||
DB #1E
|
||||
DW %11000100111101
|
||||
DW %11001101111111
|
||||
DB #1E
|
||||
;ok
|
||||
DW %00000001000000
|
||||
DW %11000001101111
|
||||
DB #20
|
||||
DW %01000001000000
|
||||
DW %11010001101111
|
||||
DB #20
|
||||
;ok
|
||||
DW %10000001000000
|
||||
DW %11010001101111
|
||||
DB #20
|
||||
DW %11000001000000
|
||||
DW %11000001101111
|
||||
DB #20
|
||||
|
||||
;ok
|
||||
DW %00000001000001
|
||||
DW %00010111101111
|
||||
DB #21
|
||||
DW %00010001000001
|
||||
DW %11010111101111
|
||||
DB #21
|
||||
DW %11010001000001
|
||||
DW %11010111101111
|
||||
DB #21
|
||||
;ok
|
||||
DW %00000001000010
|
||||
DW %00010111101111
|
||||
DB #22
|
||||
DW %00010001000010
|
||||
DW %11010111101111
|
||||
DB #22
|
||||
DW %11010001000010
|
||||
DW %11010111101111
|
||||
DB #22
|
||||
;ok
|
||||
DW %00000001000011
|
||||
DW %00010111101111
|
||||
DB #23
|
||||
DW %00010001000011
|
||||
DW %11010111101111
|
||||
DB #23
|
||||
DW %11010001000011
|
||||
DW %11010111101111
|
||||
DB #23
|
||||
;ok
|
||||
DW %00000001000100
|
||||
DW %00010111101111
|
||||
DB #24
|
||||
DW %00010001000100
|
||||
DW %11010111101111
|
||||
DB #24
|
||||
DW %11010001000100
|
||||
DW %11010111101111
|
||||
DB #24
|
||||
|
||||
;ok
|
||||
DW %00000001000101
|
||||
DW %00010111101111
|
||||
DB #25
|
||||
DW %00010001000101
|
||||
DW %11010111101111
|
||||
DB #25
|
||||
DW %11010001000101
|
||||
DW %11010111101111
|
||||
DB #25
|
||||
|
||||
;ok
|
||||
DW %00000011000010
|
||||
DW %00010111101111
|
||||
DB #26
|
||||
DW %00010011000010
|
||||
DW %11010111101111
|
||||
DB #26
|
||||
DW %11010011000010
|
||||
DW %11010111101111
|
||||
DB #26
|
||||
;ok
|
||||
DW %00000011000011
|
||||
DW %00010111101111
|
||||
DB #27
|
||||
DW %00010011000011
|
||||
DW %11010111101111
|
||||
DB #27
|
||||
DW %11010011000011
|
||||
DW %11010111101111
|
||||
DB #27
|
||||
;ok
|
||||
DW %00000011000100
|
||||
DW %00010111101111
|
||||
DB Conf_port.IDE_CONTROL_3F6
|
||||
DW %00010011000100
|
||||
DW %11010111101111
|
||||
DB Conf_port.IDE_CONTROL_3F6
|
||||
DW %11010011000100
|
||||
DW %11010111101111
|
||||
DB Conf_port.IDE_CONTROL_3F6
|
||||
;ok
|
||||
DW %00000011000101
|
||||
DW %00010111101111
|
||||
DB Conf_port.IDE_STATUS_3F7
|
||||
DW %00010011000101
|
||||
DW %11010111101111
|
||||
DB Conf_port.IDE_STATUS_3F7
|
||||
DW %11010011000101
|
||||
DW %11010111101111
|
||||
DB Conf_port.IDE_STATUS_3F7
|
||||
;ok
|
||||
DW %00000000101100
|
||||
DW %11001111111111
|
||||
DB Conf_port.IDE_CHANEL_1
|
||||
DW %11000000101100
|
||||
DW %11001111111111
|
||||
DB Conf_port.IDE_CHANEL_1
|
||||
;ok
|
||||
DW %00000000111100
|
||||
DW %11001111111111
|
||||
DB Conf_port.IDE_CHANEL_2
|
||||
DW %11000000111100
|
||||
DW %11001111111111
|
||||
DB Conf_port.IDE_CHANEL_2
|
||||
;ok
|
||||
DW %00000010101101
|
||||
DW %11001111111111
|
||||
DB Conf_port.VSYNC320
|
||||
DW %11000010101101
|
||||
DW %11001111111111
|
||||
DB Conf_port.VSYNC320
|
||||
;ok
|
||||
DW %00000010111101
|
||||
DW %11001111111111
|
||||
DB Conf_port.VSYNC312
|
||||
DW %11000010111101
|
||||
DW %11001111111111
|
||||
DB Conf_port.VSYNC312
|
||||
;ok
|
||||
DW %00000010101100
|
||||
DW %11001111111111
|
||||
DB Conf_port.RESET
|
||||
DW %11000010101100
|
||||
DW %11001111111111
|
||||
DB Conf_port.RESET
|
||||
;ok
|
||||
DW %00000010111100
|
||||
DW %11001111111111
|
||||
DB Conf_port.UNKNOWN ;!FIXIT ¬®¦® ¯®ª ã¡à âì
|
||||
DW %11000010111100
|
||||
DW %11001111111111
|
||||
DB Conf_port.UNKNOWN ;!FIXIT ¬®¦® ¯®ª ã¡à âì
|
||||
;ok
|
||||
DW %00010000101011
|
||||
DW %11010001101011
|
||||
DB Conf_port.ISA_Control
|
||||
;ok
|
||||
DW %00011001101110
|
||||
DW %10011001101111
|
||||
DB Conf_port.ZX_Keyboard
|
||||
DW %10011001101110
|
||||
DW %11011001101111
|
||||
DB Conf_port.ZX_Keyboard
|
||||
;ok
|
||||
DW %00001111111101
|
||||
DW %00001111111111
|
||||
DB Conf_port.AY_FFFD_READ
|
||||
;ok
|
||||
DW %00001111011111
|
||||
DW %11001111111111
|
||||
DB Conf_port.Kempston_Mouse
|
||||
DW %11001111011111
|
||||
DW %11001111111111
|
||||
DB Conf_port.Kempston_Mouse
|
||||
;ok
|
||||
DW %00011001100011
|
||||
DW %11011001101111
|
||||
DB Conf_port.CBL_OUT
|
||||
DW %01010001100011
|
||||
DW %11010001101111
|
||||
DB Conf_port.CBL_OUT
|
||||
DW %10010001100011
|
||||
DW %11010001101111
|
||||
DB Conf_port.CBL_OUT
|
||||
DW %00010000000111
|
||||
DW %11011000001111
|
||||
DB Conf_port.CBL_OUT
|
||||
DW %00011000001000
|
||||
DW %11011001101111
|
||||
DB Conf_port.CBL_OUT
|
||||
DW %00010001101011
|
||||
DW %10010001101111
|
||||
DB Conf_port.CBL_OUT
|
||||
DW %10010001101011
|
||||
DW %11010001101111
|
||||
DB Conf_port.CBL_OUT
|
||||
;ok
|
||||
DW %00000001000110
|
||||
DW %11001111111111
|
||||
DB Conf_port.CBL_SYS_PORT
|
||||
DW %11000001000110
|
||||
DW %11001111111111
|
||||
DB Conf_port.CBL_SYS_PORT
|
||||
;ok
|
||||
DW %00000111111101
|
||||
DW %00001111111111
|
||||
DB Conf_port.AY_FFFD_WRITE
|
||||
;ok
|
||||
DW %00000101111101
|
||||
DW %00001111111111
|
||||
DB Conf_port.AY_BFFD
|
||||
;ok
|
||||
DW %00000001101101
|
||||
DW %10000111111111
|
||||
DB Conf_port.Scorp_1FFD
|
||||
DW %11000001101101
|
||||
DW %11000111111111
|
||||
DB Conf_port.Scorp_1FFD
|
||||
;ok
|
||||
DW %00000011101101
|
||||
DW %00100111101111
|
||||
DB Conf_port.Pent_7FFD
|
||||
DW %00100011101101
|
||||
DW %11110111101111
|
||||
DB Conf_port.Pent_7FFD
|
||||
DW %11100011101101
|
||||
DW %11100111101111
|
||||
DB Conf_port.Pent_7FFD
|
||||
DW %10000001101101
|
||||
DW %11100111101111
|
||||
DB Conf_port.Pent_7FFD
|
||||
;ok
|
||||
DW %00000001101110
|
||||
DW %00001001101111
|
||||
DB Conf_port.Border_FE
|
||||
;ok
|
||||
DW %00000001010110
|
||||
DW %11001111111111
|
||||
DB Conf_port.ALL_MODE
|
||||
DW %11000001010110
|
||||
DW %11001111111111
|
||||
DB Conf_port.ALL_MODE
|
||||
;ok
|
||||
DW %00000000001001
|
||||
DW %00010001101111
|
||||
DB Conf_port.PORT_Y
|
||||
DW %00010000001001
|
||||
DW %11010001101111
|
||||
DB Conf_port.PORT_Y
|
||||
DW %11010000001001
|
||||
DW %11010001101111
|
||||
DB Conf_port.PORT_Y
|
||||
;ok
|
||||
DW %00000001001001
|
||||
DW %00010001101111
|
||||
DB Conf_port.RGMOD
|
||||
DW %00010001001001
|
||||
DW %11010001101111
|
||||
DB Conf_port.RGMOD
|
||||
DW %11010001001001
|
||||
DW %11010001101111
|
||||
DB Conf_port.RGMOD
|
||||
;ok
|
||||
DW %00000000100100
|
||||
DW %00000000101111
|
||||
DB Conf_port.CNF_PORT
|
||||
|
||||
;!FIXIT ¬®¦® ã¡à âì
|
||||
DW %00000001101100
|
||||
DW %11001001101111
|
||||
DB Conf_port.SCALE
|
||||
DW %11000001101100
|
||||
DW %11001001101111
|
||||
DB Conf_port.SCALE
|
||||
;------------------------------
|
||||
|
||||
;ok
|
||||
DW %00000000001010
|
||||
DW %00010001101111
|
||||
DB #E8
|
||||
DW %00010000001010
|
||||
DW %11010001101111
|
||||
DB #E8
|
||||
DW %11010000001010
|
||||
DW %11010001101111
|
||||
DB #E8
|
||||
;ok
|
||||
DW %00000000101010
|
||||
DW %00010001101111
|
||||
DB #E9
|
||||
DW %00010000101010
|
||||
DW %11010001101111
|
||||
DB #E9
|
||||
DW %11010000101010
|
||||
DW %11010001101111
|
||||
DB #E9
|
||||
|
||||
;ok
|
||||
DW %00000001001010
|
||||
DW %00010001101111
|
||||
DB #EA
|
||||
DW %00010001001010
|
||||
DW %11010001101111
|
||||
DB #EA
|
||||
DW %11010001001010
|
||||
DW %11010001101111
|
||||
DB #EA
|
||||
;ok
|
||||
DW %00000001101010
|
||||
DW %00010001101111
|
||||
DB #F0
|
||||
DW %00010001101010
|
||||
DW %11010001101111
|
||||
DB #F0
|
||||
DW %11010001101010
|
||||
DW %11010001101111
|
||||
DB #F0
|
||||
; DCP END MARKER
|
||||
DW 0,0,0
|
||||
;-----------------------------------------------------------------------;
|
||||
;
|
||||
|
||||
;
|
||||
;----------------------------------------------------------------------;
|
||||
DCP_INIT:
|
||||
LD C,XL
|
||||
LD B,XH
|
||||
LD E,YL
|
||||
LD D,YH
|
||||
EXX
|
||||
|
||||
LD HL,#C000
|
||||
LD DE,#C001
|
||||
LD BC,#3FFF
|
||||
LD (HL),L
|
||||
LDIR
|
||||
|
||||
LD IY,DCP_DATA
|
||||
LD IX,.ret
|
||||
|
||||
.loop: LD L,(IY)
|
||||
LD H,(IY+1)
|
||||
LD E,(IY+2)
|
||||
LD D,(IY+3)
|
||||
LD B,(IY+4)
|
||||
JP DCP_CONFIG.PARSE_TABLE
|
||||
|
||||
.ret: LD BC,5
|
||||
ADD IY,BC
|
||||
LD A,(IY+2)
|
||||
OR (IY+3)
|
||||
JR NZ,.loop
|
||||
|
||||
EXX
|
||||
LD XL,C
|
||||
LD XH,B
|
||||
LD YL,E
|
||||
LD YH,D
|
||||
|
||||
; First IN command - OPEN DCP
|
||||
IN A,(SLOT3)
|
||||
JP (HL)
|
||||
;-----------------------------------------------------------------------;
|
||||
;
|
||||
|
||||
;
|
||||
;-----------------------------------------------------------------------;
|
||||
; ”ãªæ¨ï ¤¥è¨äà â®à ¯®à⮢.
|
||||
; HL - ¤à¥á
|
||||
; DE - ¬ ᪠- 0 ¨§¬¥ï¥¬ë¥ ¡¨âë, 1 ¥¨§¬¥ï¥¬ë¥
|
||||
; B - ¯®àâ
|
||||
;
|
||||
DCP_CONFIG:
|
||||
AND A
|
||||
JP Z,PORTS_INIT
|
||||
|
||||
LD A,R
|
||||
DI
|
||||
PUSH AF
|
||||
|
||||
PUSH IX
|
||||
LD IX,.exit
|
||||
|
||||
IN A,(SLOT3)
|
||||
EX AF,AF'
|
||||
LD A,DCP_PAGE
|
||||
OUT (SLOT3),A
|
||||
|
||||
JR .PARSE_TABLE
|
||||
|
||||
.exit: EX AF,AF'
|
||||
OUT (SLOT3),A
|
||||
AND A
|
||||
POP IX
|
||||
POP AF
|
||||
RET PO
|
||||
EI
|
||||
RET
|
||||
|
||||
.PARSE_TABLE:
|
||||
LD A,L
|
||||
AND E
|
||||
LD L,A
|
||||
|
||||
LD A,H
|
||||
AND D
|
||||
OR #C0
|
||||
LD H,A
|
||||
|
||||
LD A,D
|
||||
OR #C0
|
||||
LD D,A
|
||||
|
||||
.loop: LD (HL),B
|
||||
|
||||
LD A,L ; § ¬ ᪨஢ âì ¥¨§¬¥ï¥¬ë¥ ¡¨âë 1-¬¨
|
||||
OR E ; ¤«ï ¯à®å®¦¤¥¨ï ¯¥à¥®á
|
||||
INC A ; 㢥«¨ç¨âì ¤à¥á
|
||||
JR Z,.carry ; ¢®§¨ª ¯¥à¥®á
|
||||
|
||||
OR E
|
||||
XOR E ; ®¡ã«¨âì ¥¨§¬¥ï¥¬ë¥ ¡¨âë
|
||||
LD C,A ; ¨§¬¥ï¥¬ ï ç áâì
|
||||
|
||||
LD A,L
|
||||
AND E ; ¢ë¤¥«¨âì ¥¨§¬¥ï¥¬ãî
|
||||
OR C
|
||||
LD L,A ; ¤®¡ ¢¨âì ¨§¬¥ï¥¬ãî ç áâì
|
||||
|
||||
JR .loop ; 横«
|
||||
; A = 0
|
||||
.carry: LD A,L ; § ¡¨âì ¨§¬¥ï¥¬ë¥ ¡¨âë ã«ï¬¨
|
||||
AND E
|
||||
LD L,A
|
||||
|
||||
LD A,H ; § ¬ ᪨஢ âì ¥¨§¬¥ï¥¬ë¥ ¡¨âë 1-¬¨
|
||||
OR D ; ¤«ï ¯à®å®¦¤¥¨ï ¯¥à¥®á
|
||||
INC A ; 㢥«¨ç¨âì ¤à¥á
|
||||
JR Z,.return
|
||||
|
||||
OR D
|
||||
XOR D
|
||||
LD C,A ; ¨§¬¥ï¥¬ ï ç áâì
|
||||
|
||||
LD A,H
|
||||
AND D ; ¢ë¤¥«¨âì ¥¨§¬¥ï¥¬ãî
|
||||
OR C
|
||||
LD H,A ; ¤®¡ ¢¨âì ¨§¬¥ï¥¬ãî ç áâì
|
||||
JR .loop
|
||||
|
||||
.return: JP (IX)
|
||||
;-----------------------------------------------------------------------;
|
||||
;
|
||||
|
||||
;
|
||||
;-----------------------------------------------------------------------;
|
||||
; CALL from 3D13h! Žáâ®à®¦¥¥ á ¯à¥àë¢ ¨ï¬¨, «ãçè¥ £ á¨âì, ç⮡ ¥ ᡨâì ᨣ « DOS_ON
|
||||
; in: A - ¢ãâ२© ¯®àâ, B - § 票¥ ¤«ï § ¯¨á¨ ¢® ¢ãâ२© ¯®àâ
|
||||
; out: B - áâ ஥ § 票¥ ¢ãâ॥£® ¯®àâ ; <20>¥à¥¤ ¢ë室®¬ ¢®ááâ ¢«¨¢ ¥âáï ª®ä ¯à®¯¨á ï ¢ CONFIG_DE
|
||||
SET_PORTS:
|
||||
EX AF,AF'
|
||||
LD A,CNF_PORT.CNF_0 + ROM.BIOS
|
||||
OUT (SYS_PORT.ROM),A
|
||||
|
||||
LD C,SLOT2 ; ¯®«ãç¨âì áâà ¨æã
|
||||
IN D,(C)
|
||||
|
||||
LD A,DCP_PAGE ; ãáâ ®¢¨âì ®¢ãî
|
||||
OUT (C),A
|
||||
|
||||
LD A,(#8000) ; á®åà ¨âì â® çâ® ¡ë«®
|
||||
LD L,A
|
||||
LD A,(#8200)
|
||||
LD H,A
|
||||
EX AF,AF' ; áâà ¨æ
|
||||
|
||||
LD (#8000),A ; ãáâ ®¢¨âì ¢ãâ२© ¯®àâ
|
||||
LD (#8200),A
|
||||
|
||||
EX AF,AF'
|
||||
LD A,B
|
||||
LD BC,0
|
||||
EX AF,AF'
|
||||
|
||||
IN A,(C)
|
||||
|
||||
EX AF,AF'
|
||||
OUT (C),A ; ãáâ ®¢¨âì ®¢®¥ § 票¥ ¯®àâ
|
||||
EX AF,AF'
|
||||
|
||||
LD B,A
|
||||
LD A,L
|
||||
LD (#8000),A ; ¢¥àãâì ¯®àâ
|
||||
LD A,H
|
||||
LD (#8200),A ; ¢¥àãâì ¯®àâ
|
||||
|
||||
LD C,SLOT2
|
||||
LD A,SYS_PAGE
|
||||
OUT (C),A
|
||||
LD A,(SYS_PAGE.CONFIG_DE-#4000)
|
||||
OUT (C),D ; ¢¥àãâì áâà ¨æã
|
||||
OUT (SYS_PORT.ROM),A
|
||||
|
||||
AND A
|
||||
RET
|
||||
;-----------------------------------------------------------------------;
|
||||
;
|
||||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue
Block a user