- more const
- explicitly raise exceptions instead of leaving this to log.fatal()
- correct a number of cppcheck findings.
- dead code removal
- clang lint corrections, e.g. include order
Renamed cast member of the constants struct to magic to clearly identify
magic numbers.
Introduced nlconst struct inheriting from plib::constants<nl_fptype> to
make code better understandable.
The newly added RELTOL and VNTOL parameters implement Newton convergence
checks comparable following other SPICE implementations.
The ACCURACY solver parameter now is only used for convergence checks in
iterative solvers.
In addition, type safety was significantly improved and a lot of "magic"
numbers are identifiable now.
- solver: align matrix population along the various solvers
- solver: delete dead code
- renamed nl_double to nl_fptype and use nl_fptype where previously
double has been used.
- renamed param_double_t to param_fp_t
- Removed code no longer used
- Add noexcept where appropriate
- split pparser.[c|h] into ppreprocessor and ptokenizer
- smaller optimizations, e.g. use of std::size_t
- fix lint warnings
- Added support for line markers to the preprocessor and parser.
- Added support for include processing to the preprocessor.
- Moved sources base type to plib to be used for preprocessor includes.
This enables to include e.g. from rom memory regions.
- Renamed some defines
- solver now uses dynamic allocation on systems larger than 512x512
- fixed osx build
- moved nl_lists.h classes to plists.h
- fixed netlist makefile clint section
- readability and typos
- optimized the core queue dispatching logic. Minor performance
increase.
- fixed a number of bugs in parray. Now parray<double, 0> will be purely
dynamic allocation with the number of elements passed in the
constructor.
- Added noexpr where appropriate.
- Simplified the queue
Checked with gcc-7 (ubuntu), gcc-9, clang-10, macosx clang 10, mingw
cross compile on linux.
CMOS 40xx and 4316 power pins fixed.
Also fixed gcc-9 error. clang++ complains about unreachable code in
nl_base.cpp line 480 even if double parantheses are used. Assigning the
define to a local variable and testing this local variable works. Weird.
- converted NL_MAX_LINK_RESOLVE_LOOPS into a netlist parameter.
- Reduced potential bit-rot.
- nltool -v --version now displays values of all compile time defines.
There are still far too many compile time defines. However, most of them
ensure and test future scalability.
Protected defines in nl_config.h with ifdefs. Added a define to disable
queue statistics during compile. This is only needed during development.
Documented performance improvement efforts so I don't try this again.
Runtime performance statistics can now be enabled with nltool
option "-s". To enable those with MAME you need to run
NL_STATS=1 ./mamenl64 -v -oslog game
This fixes an over simplification. Logic devices implicitly assumed that
GND/VDD actually is connected to GND(i.e. 0V). There is no immediate
benefit from this change. It is a preparation for the future
scalability. Now all power terminals (typically 7/14, 8/16) have to be
explicitly connected to the supply rails.
Also added a validation mode to the netlist core. This is not
intended for running, but solely to better indentify pins which
are not properly connected.
mame -validate now also checks all netlist devices. It does this
by constructing a temporary netlist.
This commit also fixes some memory leaks and a bad bug which
surfaced in validation.
modelling. [Couriersud]
Added global NETLIST.DEFAULT_MOS_CAPMODEL parameter. Setting this to
zero disables using capitance modelling in mos models.
On a per mos device basis this can be achieved by adding CAPMODEL=0 to
the model definition, e.g. MOSFET(X, "NMOS(CAPMODEL=0)")
Improve MOSFET convergence by using log-stepping.
This is a significant improvement to the MOS transistor model. It adds
modelling of the Meyer capacitance model.
This is a somewhat academic addition since the effects occur on a
nanosecond time scale and have a huge impact on performance. I plan to
make the capacitance model selectable. Both on a model level as well as
by introducing a global solver parameter.
The model delivers comparable results to LTSpice.
This effectively reverts b380514764 and
c24473ddff, restoring the state at
598cd52272.
Before pushing, please check that what you're about to push is sane.
Check your local commit log and ensure there isn't anything out-of-place
before pushing to mainline. When things like this happen, it wastes
everyone's time. I really don't need this in a week when real work™ is
busting my balls and I'm behind where I want to be with preparing for
MAME release.
- added MOSFET model. Currently capacitances are not modelled.
This is a 3-pin model (Bulk connected to Source) with provisions to
extend it to 4-pin at a later stage.
- Add a capacitor generic model which is charge conserving.
Switch netlist to use this model instead of constant capacity model.
- Start putting constants into a central place.
Please expect minor timing differences due to a different numerical
path.
The cmos inverter example illustrates the analog implementation of a
cmos inverter gate. These were used a lot back in the 70s/80s to
generate sinus waves. The model should also be able to better emulate
4066 analog switches.
The addition of a relatively simple capacitor model is planned at a
later stage.
Expect everything from the MOSFET model at the current stage. Wrong
results as well as convergence issues and crashes.
