Commit Graph

30 Commits

Author SHA1 Message Date
Aaron Giles
32bc986ec0 Moved some of the CPU cores over to use get_safe_token like other devices.
Also cleaned them so they compile.
2009-03-12 16:54:49 +00:00
Aaron Giles
43730cc591 Fixed bug that caused 64-bit PowerPC systems to fetch opcodes in the wrong order. 2009-03-07 23:18:36 +00:00
Aaron Giles
aad099ad00 DRC frontends must do their own opcode fetching unfortunately. Updated all
DRC cores to do this. Also tweaked a few oddities in the SH2 DRC.
2009-01-18 00:39:40 +00:00
Aaron Giles
eb8366c740 Added new #define ENDIANNESS_NATIVE, which maps to either ENDIANNESS_LITTLE
or ENDIANNESS_BIG based on the LSB_FIRST definition. Unlink LSB_FIRST,
ENDIANNESS_NATIVE always exists and can be used in expressions without
invoking the preprocessor.

Added macro ENDIAN_VALUE_LE_BE() which selects one of two values based
on the endianness passed in. Also added NATIVE_ENDIAN_VALUE_LE_BE()
which calls ENDIAN_VALUE_LE_BE with ENDIANNESS_NATIVE.

Updated a number of drivers and call sites to use these macros in favor
of #ifdef LSB_FIRST.
2009-01-17 23:03:17 +00:00
Aaron Giles
320097d9fe Renamed CPUINFO_PTR_* to CPUINFO_FCT_* for function get infos.
Changed Z80 over to the new cpu_state_table mechanism.
2008-12-19 22:26:25 +00:00
Aaron Giles
5630547540 More device normalization:
cpu_get_info_* -> device_get_info_*
  cpu_set_info_* -> device_set_info_*
  cpu_reset      -> device_reset

Removed the cputype_get_* macros as they are not necessary.

Removed cpuintrf_init() which is no longer necessary.
2008-12-16 16:30:28 +00:00
Aaron Giles
85b961f5af CPU_IS_LE -> ENDIANNESS_LITTLE
CPU_IS_BE -> ENDIANNESS_BIG

Also fixed help for step over/in to specify correct keys.
2008-12-04 06:08:32 +00:00
Aaron Giles
513011179d change_pc? What change_pc? 2008-11-24 02:40:16 +00:00
Aaron Giles
f86d66dc97 Removed NO_LEGACY_MEMORY_HANDLERS defines. 2008-11-24 01:42:27 +00:00
Aaron Giles
9ee2f770aa Converted a bunch of CPU cores over to the new memory functions. 2008-11-22 18:38:41 +00:00
Aaron Giles
0801d1254c Converted change_pc() into a no-op. Changed memory_set_direct_region() to
return a boolean indicating whether the given address was successfully
located in a bank. Change raw/decrypted access to look at this result, and
if the given address is not in a bank, calls through to the standard read
handlers.

In theory, this should prevent crashes when accessing opcodes. It does in
fact prevent mp_col3 from crashing.

Fixed address space mapping handlers to invalidate direct access regions
if a change is made to the mapping. This is needed to prevent the Sega
dynamic memory mapping chips from falling over.
2008-11-19 06:36:01 +00:00
Aaron Giles
e7c418ef0f Generalized the concept of opbase access into "direct" access.
Removed opbase globals to the address_space structure.
Cleaned up names of pointers (decrypted and raw versus rom and ram).
Added inline functions to read/write data via any address space.
Added macros for existing functions to point them to the new functions.
Other related cleanups.
2008-11-17 18:33:10 +00:00
Aaron Giles
6f4ee44948 Added CPU device parameters to all CPU callbacks except for the
context ones (which are going away), the disassembler (which should
have no dependencies on the live CPU), and the validity check.

Removed global token from all pointer-ified CPU cores that don't
have internal read/write callbacks (which still need to reference it).
2008-11-10 08:51:06 +00:00
Aaron Giles
92f3053105 Major cpuintrf changes:
* added a set of cpu_* calls which accept a CPU device object;
  these are now the preferred means of manipulating a CPU

* removed the cpunum_* calls; added an array of cpu[] to the
  running_machine object; converted all existing cpunum_* calls
  to cpu_* calls, pulling the CPU device object from the new
  array in the running_machine

* removed the activecpu_* calls; added an activecpu member to
  the running_machine object; converted all existing activecpu_*
  calls to cpu_* calls, pulling the active CPU device object
  from the running_machine

* changed cpuintrf_push_context() to cpu_push_context(), taking
  a CPU object pointer; changed cpuintrf_pop_context() to
  cpu_pop_context(); eventually these will go away

* many other similar changes moving toward a model where all CPU
  references are done by the CPU object and not by index
2008-11-10 07:42:09 +00:00
Aaron Giles
9407fecd2d Populated tag and static_config parts of fake CPU device. Removed 'config'
parameter from CPU_INIT. Modified CPU cores to pull config from the device
static_config.
2008-11-09 07:12:24 +00:00
Aaron Giles
c4e5ae4e41 Fixed edge case in the DRC front-end that would incorrectly tag the
end of a sequence as "return to start" even if the last instruction
did not abet the starting instruction.
2008-07-13 07:03:30 +00:00
Aaron Giles
25abe2749d Hornet driver:
- connected EEPROM (doesn't seem to affect much)
 - cleaned up system register access

GTI Club driver:
 - altered network IRQ clear to fix several problems
 - added Guru readme
 - fixed crashes due to missing inputs
 - gticlub "works" again

ZR107 driver:
 - added Guru readme
 - cleaned up system register access
 - these games work again with altered network IRQ timing

NWK-TR driver:
 - added Guru readme

DRC frontend:
 - now passes pointer to previous instruction when describing

PPC frontend:
 - attempts to roughly take into account branch and CR logical
    folding in timing computations
2008-06-25 15:02:07 +00:00
Aaron Giles
5a162da3d4 Cleanups and version bump. 2008-06-12 19:59:19 +00:00
Aaron Giles
e852db663a x86/x64 back-ends:
* fixed adc/sbb so that they don't optimize out ever
 * fixed detection of special and/or/xor cases
 * fixed GETFLGS opcode so that it doesn't return anything other than requested flags
 * changed LZCNT/BSWAP to be more flexible in register selection

C back-end:
 * implemented flag variants of SEXT/ROLAND/ROLINS/LZCNT/BSWAP

PPC DRC:
 * added more symbols for debugging
 * fixed lmw/stmw if rA is one of the loaded/stored registers
 * removed unnecessary variables & structure members
 * optimized for the XER and CR0 case where XER doesn't need an overflow calculation
 *
2008-06-12 16:13:05 +00:00
Aaron Giles
156d61c760 DRC frontend:
* changed from tracking "live" registers to tracking "necessary" registers
 * genericized register tracking to be more flexible
 * added previous instruction pointer to opcode descriptions

PowerPC frontend/DRC:
 * cleaned up register tracking implementation
 * fixed numerous errors and shortcomings in the tracking
 * added support for removing unnecessary XER CA and CR0 computations
 * updated UML logging to output new frontend statistics

MIPS3 frontend/DRC:
 * tweaked register tracking to match new DRC frontend system
 * updated UML logging to output new frontend statistics
2008-06-10 07:34:48 +00:00
Aaron Giles
ed6ad8b4f9 PowerPC dynamic recompiler: [Aaron Giles]
- rewrote PowerPC implementation as a dynamic recompiler on top
    of the universal recompiler engine
 - wrote a front-end to analyze PowerPC code paths and register usage
 - wrote a common shared module with C implementations of tricky
    CPU behaviors
 - added separate CPU types for the variants supported, instead of
    relying on a hidden model enum
 - rewrote the serial port emulation for the 4xx series to be more
    accurate and not rely on separate DMA handlers
 - rewrote the MMU handling to implement a software TLB that faults
    in pages and handles changed bits appropriately
 - implemented emulation of the PowerPC 603's software TLB, which
    allows the model 3 games to run without a hack to disable the MMU

Updated the PowerPC disassembler to share constants with the rest of
the core, and to more aggressively use simplified mnemonics, especially
for branches. [Aaron Giles]

Universal recompiler:
 - fixed frontend to handle opcode widths different from bus width
 - added several new opcodes:
    * (D)GETFLGS - copies the UML flags to a destination operand
    * FDRNDS - rounds a double precision value to single precision
 - renamed several opcodes:
    * SETC   -> CARRY
    * XTRACT -> ROLAND
    * INSERT -> ROLINS
 - consolidated the following opcodes:
    * LOAD?U -> LOAD
    * LOAD?S -> LOADS
    * STORE? -> STORE
    * READ?U -> READ
    * READ?M -> READM
    * WRITE? -> WRITE
    * WRITM? -> WRITEM
    * SEXT?  -> SEXT
    * FTOI?? -> FTOINT
    * FFRI?  -> FFRINT
    * FFRF?  -> FFRFLT
 - removed some opcodes:
    * FLAGS - can be done with GETFLGS/LOAD4/ROLINS
    * ZEXT - can be achieved with AND
    * READ?S - can be achieved with READ/SEXT
 - updated C, x86, and x64 back-ends to support these opcode changes
 - updated disassembler to support these opcode changes
 
MIPS3 dynamic recompiler:
 - updated to use new/changed opcode forms
 - changed context switch so that it only swaps a single pointer

Konami Hornet changes: [Aaron Giles]
 - updated to new PowerPC configurations
 - updated some memory handlers to be native 8-bit handlers
 - cleaned up JVS implementation to work with new serial code
 - added fast RAM for the work RAM to give a small speed boost

Konami GTI Club changes: [Aaron Giles]
 - updated to new PowerPC configurations
 - updated some memory handlers to be native 8-bit handlers

Konami Viper/ZR107 changes: [Aaron Giles]
 - updated to new PowerPC configurations

Sega Model 3 changes: [Aaron Giles]
 - updated to new PowerPC configurations
 - reimplemented/centralized interrupt handling
 - these games are broken for the moment

Fixed crasher due to some Konami games using 8 layers in
the K056832 implementation, even though it was only written
for 4. [Aaron Giles]

Added fisttp opcode to i386 disassembler. [Aaron Giles]
2008-06-05 08:34:13 +00:00
Aaron Giles
c852c42952 Cleanups for 0.125u3. 2008-05-29 09:25:51 +00:00
Aaron Giles
eeb821032e Several miscellaneous changes:
1. In the MIPS core:
    - renamed struct mips3_config -> mips3_config
    - updated all drivers to the new names
    - removed MIPS3DRC_STRICT_COP0 flag, which is no longer used
    - a few minor cleanups

2. In the CPU interface:
    - added new 'intention' parameter to the translate callback to
       indicate read/write/fetch access, user/supervisor mode, and
       a flag for debugging
    - updated all call sites to pass an appropriate value
    - updated all CPU cores to the new prototype

3. In the UML:
    - added new opcode SETC to set the carry flag from a source bit
    - added new opcode BSWAP to swap bytes within a value
    - updated C, x86, x64 back-ends to support the new opcodes
    - updated disassembler to support the new opcodes

4. In the DRC frontend:
    - fixed bug in handling edge case with the PC near the 0 or ~0
2008-05-29 07:18:35 +00:00
Aaron Giles
3c6278aef8 Fix crasher in drcfe.c. 2008-05-20 00:59:20 +00:00
Aaron Giles
d411c2c74c Numerous MIPS3 DRC updates:
* Fixed front-end so that virtual no-op instructions are still targeted
as branch targets.

* Fixed front-end to mark the beginning of each sequence as needing TLB
validation, since any sequence can be jumped to from anywhere.

* Redid the MIPS3 TLB implementation. Fixed the exception vector and
type handling. Changed the bitfields to directly map from the MIPS TLB
format. Added distinction between TLB fill and TLB valid/modified
exceptions.

* Added separate modes for user, supervisor, and kernel modes. Each mode
does proper verification of addresses now and generates address errors
for invalid accesses.

* Fixed several bugs in the TLB implementation; not everything works
yet but it's a lot closer.

* Made COP0 access checking mandatory in non-kernel modes.

* Fixed several crashes when recompiling virtual no-ops.

* Fixed TLB bug where entries for virtual address 0 were present by 
default.

* Fixed bug in the map variable implementation that would sometimes
result in incorrectly recovered values.
2008-05-19 16:58:42 +00:00
Aaron Giles
271ac2a7a2 Added a quick & dirty attempt at implementing tlb_mismatch. It's likely wrong,
but it's better than nothing. Also added an assertion if you jump to unmapped
code and added handling for compile-time page faults.
2008-05-16 05:21:25 +00:00
Aaron Giles
b735b4be6c New universal dynamic recompiler system. The central module
is drcuml.c, which defines a universal machine language
syntax that can be generated by a frontend recompiler and
then retargeted via a generic backend interface to any of
a number of different architectures. A disassembler for the
UML is also included to allow examination of the generated
UML code.

Currently supported backend architectures include 32-bit x86,
64-bit x86, and a platform-neutral interpreted C backend that
can be used as a fallback for platforms without native 
support. The C backend also performs additional validation
to ensure assumptions are met.

Along with the new architecture is a new MIPS III/IV 
recompiler frontend. This frontend has been rewritten from 
the old x64-specific recompiler to generate UML opcodes
instead. This means that the single recompiler can be used
to target multiple backend architectures and should in
theory produce identical results across all of them.

The old 32-bit and 64-bit MIPS recompilers are now officially
retired. The new system provides similar performance (within
5% generally) to the old system and has similar compatibility.
The only currently known issues are some problems with the
two Gauntlet 3D games.
2008-05-11 22:15:13 +00:00
Aaron Giles
e31f9a6313 Normalized function pointer typedefs: they are now all
suffixed with _func. Did this throughout the core and
drivers I was familiar with.

Fixed gcc compiler error with recent render.c changes.
gcc does not like explicit (int) casts on float or
double functions. This is fracking annoying and stupid,
but there you have it.
2008-03-03 01:51:31 +00:00
Aaron Giles
ee9f88963c Copyright cleanup:
- removed years from copyright notices
 - removed redundant (c) from copyright notices
 - updated "the MAME Team" to be "Nicola Salmoria and the MAME Team"
2008-01-06 00:47:40 +00:00
Aaron Giles
7b77f12186 Initial checkin of MAME 0.121. 2007-12-17 15:19:59 +00:00