* unsp refactoring / tv game work (nw)
* unsp refactoring / tv game work (nw)
* srcclean (nw)
* more ops (nw)
* (nw)
* (nw)
* guesses (nw)
* more guesses (nw)
* (nw)
This effectively reverts b380514764 and
c24473ddff, restoring the state at
598cd52272.
Before pushing, please check that what you're about to push is sane.
Check your local commit log and ensure there isn't anything out-of-place
before pushing to mainline. When things like this happen, it wastes
everyone's time. I really don't need this in a week when real work™ is
busting my balls and I'm behind where I want to be with preparing for
MAME release.
.
A single 64K 2-way set associative cache
Used for both instructions and data
Enabled only for addresses in the first megabyte
Works always in writeback mode
.
It is needed by the nforce motherboard bios that uses it to simulate a
block of ram at address d0000 before ddr ram is configured
WIP checkpoint: while I believe it's largely accurate (and very slow), neither jazz nor sgi systems can fully boot yet using this device, so it remains experimental.
This implementation should go away when it has helped identify the improvements required for mips3.
-sound/discrete, okim6295: Removed MCFG macros. [Ryan Holtz]
-norautp, osi, audio/mario: Removed MACHINE_CONFIG macros. [Ryan Holtz]
-vsmile: Split into its own driver from vii.cpp. [Ryan Holtz]
-vii: Fixed broken controller inputs. [Ryan Holtz]
-konamim2: Massive update. Most games work, but are still marked non-working due to rare MAME crashes in the PPC DRC. [Phil Bennett, Ryan Holtz]
-mips3.cpp: Various changes: [Ryan Holtz]
* Added an #ifdef to display DPRINTF calls from the SGI O2 PROM.
* Switched R4000BE/LE, R4400BE, R4600BE, and R5000BE to 64-bit data bus.
* Fixed a bug that caused a crash with 64-bit data bus and the DRC.
-indy_indigo2.cpp: Moved a number of devices into HPC3. [Ryan Holtz]
-hpc3.cpp: Fixed an oversight with IRQs. [Ryan Holtz]
-change order of include files at top of i386.cpp
-move some routines between i386.cpp and i386priv.h
-move part of x87ops.hxx into new file x87priv.h
.
Now you only have to rename the hxx files to cpp and add the following
at the top of each one
.
#include "emu.h"
#include "i386.h"
#include "i386priv.h"
#include "x87priv.h"
#include "cycles.h"
#include "debugger.h"
#include "debug/debugcpu.h"
#undef i386
* Implement Mitsumi Amiga 500, 600, and 2000/3000/4000/CDTV keyboards
* Add unlabeled keys to UK layout
* Restrict available keyboards depending on system type
* Note that C-A-A reset is now broken on "big box" Amigas as MAME doesn't implement it properly, and the hack providing a fake dedicated reset line has been removed
6502 MCU: fix execute loop
6500/1: implement as device with onboard peripherals
Fix some bogus comments
* rewrote most of the execution for my tlcs870 core
* no longer the case (nw)
* note updates (nw)
* address concerns, const qualify more things where possible (nw)
* more const (nw)
* oops (nw)
* consistency (nw)
* proposal: move z80daisy* to devices/machine
Seems to me this is a machine, not a CPU? Main reason was to stop the Z80 CPU from being dragged into systems that don't have one just because they use a Z80 family peripheral.
* missed this one (nw)
* missed a spot (nw)
* start looking at the extra opcodes in the SSD 2000 type XaviX chip (seems some undocumented 6502 opcodes are replaced with more custom ones)
* (nw)
* the xavix memory mapping gets stranger with each piece of new evidence (nw)
* create derived 6502 type for XaviX because it has at least one custom 4-byte opcode that doesn't fit any other type.
treating that opcode as NOP for now.
have a feeling it might be something to do with the other integrated hardware, might be 'execute co-processor code chain at this address' or something similar
It isn't a standard JSL (Jump Subroutine Long) like the SNES cpu opcode in the same place as this, it seems to point at some code-like structures tho)
could also be a secondary operation mode with different encoding like ARM's Thumb mode tho I guess.
We currently only have a single XaviX based dump (taitons1) but there are more on the way. I'm going to see if the code flow makes any sense at all with these missing, or if any of it gives a clue as to what they should actually do.
* xavix - let's call these callf and retf then
after further investigation these are some kind of extra 'long jump' subroutine / task handlers, the 0x80 also being a custom opcode was throwing me off trying to identify them before.
looks like they might have been hacking 65816 features into the regular 6502 core?
* prepare for extra address bits (nw)
* better program flow (nw)
