Commit Graph

128 Commits

Author SHA1 Message Date
DavidHaywood
90fef4da16 add derived CPU type for AX51-CORE (used by AX208 and others) so that we can start to customize disassembly and execution 2018-12-14 11:54:49 +00:00
yz70s
bac960a725 i386.cpp: move cpuid and msr routines to new file cpuidmsrs.hxx ... (nw)
... and add placeholders for athlonxp msrs.
2018-12-09 13:57:13 +01:00
mooglyguy
7b4440920a -o2.cpp: Added CRIME and MACE skeleton devices. [Ryan Holtz]
-mips3.cpp: Various changes: [Ryan Holtz]
 * Added an #ifdef to display DPRINTF calls from the SGI O2 PROM.
 * Switched R4000BE/LE, R4400BE, R4600BE, and R5000BE to 64-bit data bus.
 * Fixed a bug that caused a crash with 64-bit data bus and the DRC.

-indy_indigo2.cpp: Moved a number of devices into HPC3. [Ryan Holtz]

-hpc3.cpp: Fixed an oversight with IRQs. [Ryan Holtz]
2018-11-18 21:51:53 +01:00
Patrick Mackinlay
9df6cfe087 r3000: call it like it is (nw) 2018-11-06 17:21:01 +07:00
yz70s
4f5f5c6c92 i386.cpp: prepare to change hxx files into regular cpp files (nw)
-change order of include files at top of i386.cpp
-move some routines between i386.cpp and i386priv.h
-move part of x87ops.hxx into new file x87priv.h
.
Now you only have to rename the hxx files to cpp and add the following
at the top of each one
.
 #include "emu.h"
 #include "i386.h"
 #include "i386priv.h"
 #include "x87priv.h"
 #include "cycles.h"
 #include "debugger.h"
 #include "debug/debugcpu.h"
 #undef i386
2018-11-03 10:25:11 +01:00
Patrick Mackinlay
8740d148c1 v53: final tidy (nw)
* changed copyright holder due to near-complete replacement
* name changed to v5x which better reflects actual use
* minor comment cleanup
2018-11-01 11:47:28 +07:00
mooglyguy
27ee4f3915 -sun4: Added a sun4c MMU device. Currently wraps the functionality of S4-buffer, S4-cache, and S4-MMU, will eventually be split. [Ryan Holtz]
-sun4: Significant optimization, from 150% -> 330% unthrottled on an i7-5930K. [Ryan Holtz]
2018-09-22 19:41:10 +02:00
mooglyguy
40efe9785f -st62xx: Added a skeleton driver for the STmicro ST6 series of microcontrollers. [Ryan Holtz]
New machines marked as NOT_WORKING
----------------------------------
Catherine Wheel [f205v, Ryan Holtz]
2018-08-25 00:18:07 +02:00
Olivier Galibert
6e0bf6736a tms57002: Trick to reduce the compiler memory usage [O. Galibert] 2018-08-23 19:20:33 +02:00
Vas Crabb
012cbee2c3 Amiga keyboard overhaul:
* Implement Mitsumi Amiga 500, 600, and 2000/3000/4000/CDTV keyboards
* Add unlabeled keys to UK layout
* Restrict available keyboards depending on system type
* Note that C-A-A reset is now broken on "big box" Amigas as MAME doesn't implement it properly, and the hack providing a fake dedicated reset line has been removed

6502 MCU: fix execute loop

6500/1: implement as device with onboard peripherals

Fix some bogus comments
2018-08-23 00:25:21 +10:00
arbee
31a32f451d h8: H8/3003 support [R. Belmont] 2018-08-02 20:27:11 -04:00
David Haywood
88b1546f30 Flesh out TLCS870 core (#3763)
* rewrote most of the execution for my tlcs870 core

* no longer the case (nw)

* note updates (nw)

* address concerns, const qualify more things where possible (nw)

* more const (nw)

* oops (nw)

* consistency (nw)
2018-07-23 10:24:10 +10:00
mooglyguy
eed782f1e3 ps2sony: Some basic VU1 support, major file reshuffling, nw 2018-07-21 10:07:00 +02:00
mooglyguy
5db11a5e02 ps2sony: Checkpoint, nw 2018-07-17 18:14:24 +02:00
Patrick Mackinlay
44d80b6fb0 proposal: move z80daisy* to devices/machine (#3572)
* proposal: move z80daisy* to devices/machine

Seems to me this is a machine, not a CPU? Main reason was to stop the Z80 CPU from being dragged into systems that don't have one just because they use a Z80 family peripheral.

* missed this one (nw)

* missed a spot (nw)
2018-05-15 17:53:07 +10:00
hap
0fae49dc31 sm5*: added sm530 disasm (nw) 2018-05-12 17:37:41 +02:00
David Haywood
6627a9e480 start looking at the extra opcodes in the SSD 2000 type XaviX chip (s… (#3514)
* start looking at the extra opcodes in the SSD 2000 type XaviX chip (seems some undocumented 6502 opcodes are replaced with more custom ones)

* (nw)

* the xavix memory mapping gets stranger with each piece of new evidence (nw)
2018-05-04 12:22:18 -04:00
Vas Crabb
08dde5eb0a srcclean and regenerate localisations (nw) 2018-03-25 02:03:24 +11:00
Vas Crabb
b787818d0c dsp16: move most core state into DRC cache - keeps a lot of details out of the main header (DRC is still stubbed out) (nw) 2018-03-21 21:01:36 +11:00
Vas Crabb
724c602fd5 prettier way of adding DRC framework on-demand (nw) 2018-03-20 20:27:49 +11:00
Vas Crabb
5976a48035 dsp16: start adding recompiler boilerplate (nw) 2018-03-17 06:51:50 +11:00
Vas Crabb
245f822e7d use more constexpr and literal classes in UML to give compiler more optimisation opportunities (nw) 2018-03-17 00:58:54 +11:00
angelosa
bb11fbd2bd Blind faith fixed long names for almost all CPUs (nw)
mb86235.cpp: renamed pcs_ptr into pcp, and added a file for future interpreter core (nw)
2018-03-15 18:07:39 +01:00
Vas Crabb
0bf88bda8f Cycle-accurate DSP16 core (disabled in QSound for performance reasons) 2018-03-15 19:02:43 +11:00
R. Belmont
5ffc8a79a4
Merge pull request #3266 from JoakimLarsson/diablo_1
WIP: Diablo printer CPU
2018-02-28 14:03:10 -05:00
Vas Crabb
8dad4881f6 srcclean (nw) 2018-02-25 01:34:04 +11:00
joakim
35a7f3e628 WIP: Diablo printer CPU 2018-02-24 02:32:36 +01:00
Olivier Galibert
109e2dadb8 NUON disassembler [O. Galibert] 2018-02-18 22:56:53 +01:00
David Haywood
1e09ab0ceb create derived 6502 type for XaviX because it has at least one custom… (#3154)
* create derived 6502 type for XaviX because it has at least one custom 4-byte opcode that doesn't fit any other type.
treating that opcode as NOP for now.

have a feeling it might be something to do with the other integrated hardware, might be 'execute co-processor code chain at this address' or something similar
It isn't a standard JSL (Jump Subroutine Long)  like the SNES cpu opcode in the same place as this, it seems to point at some code-like structures tho)
could also be a secondary operation mode with different encoding like ARM's Thumb mode tho I guess.

We currently only have a single XaviX based dump (taitons1) but there are more on the way.  I'm going to see if the code flow makes any sense at all with these missing, or if any of it gives a clue as to what they should actually do.

* xavix - let's call these callf and retf then

after further investigation these are some kind of extra 'long jump' subroutine / task handlers, the 0x80 also being a custom opcode was throwing me off trying to identify them before.

looks like they might have been hacking 65816 features into the regular 6502 core?

* prepare for extra address bits (nw)

* better program flow (nw)
2018-02-02 14:34:12 -05:00
mooglyguy
ce54579557 -e132xs: fix botched DRC merge, nw 2017-12-29 22:46:36 +01:00
mooglyguy
5d36ef2d30 fixed build errors, nw 2017-12-29 13:43:36 +01:00
hap
e08f42a74e tms1000c: added correct microinstructions pla (nw) 2017-12-21 23:50:29 +01:00
Firehawke
9ece34eb21 Revert "Revert "Merge branch 'master' of https://github.com/mamedev/mame""
This reverts commit 54155441e9.
2017-12-13 21:31:27 -07:00
Firehawke
54155441e9 Revert "Merge branch 'master' of https://github.com/mamedev/mame"
This reverts commit f537428e5a, reversing
changes made to 0d70d79810.
2017-12-13 21:01:10 -07:00
mooglyguy
5d51e91100 no help = no hyperstone drc, nw 2017-12-06 21:51:34 +01:00
mooglyguy
bccc962b69 e132xs: initial work on drc, nw 2017-12-02 04:02:37 +01:00
mooglyguy
495df45315 e132xs: initial drc work, and templated conditional db/b, nw 2017-12-02 04:02:37 +01:00
Olivier Galibert
6caef2579a dvdisasm: Overhaul [O. Galibert]
Disassemblers are now independant classes.  Not only the code is
cleaner, but unidasm has access to all the cpu cores again.  The
interface to the disassembly method has changed from byte buffers to
objects that give a result to read methods.  This also adds support
for lfsr and/or paged PCs.
2017-11-26 17:41:27 +01:00
hap
7a900dd692 i8085: moved opcode macros to main file, will convert these to functions (nw) 2017-11-14 16:55:12 +01:00
hap
2e857fa8bd rename misleading i8085cpu.h to i8085ops.hxx (nw) 2017-11-14 03:02:39 +01:00
Dirk Best
faeedc757c einstein: Major cleanup, add a ADC0844 device
The analogue joystick is now emulated. Also fixed a few minor issues
with the memory map.

This also adds a generic Z80 dasisy chain device, for use in drivers
with non-Z80 peripherals.
2017-11-06 20:47:38 +01:00
Vas Crabb
4c29419cab srcclean (nw) 2017-10-22 12:34:30 +11:00
David Haywood
7851b3786c Preliminary SH3 / SH4 recompiler [David Haywood] (#2711) 2017-10-11 22:23:26 +02:00
David Haywood
c0ee79f3db use 'sh' instead of 'superh' 2017-10-02 19:47:35 +01:00
David Haywood
48aabf4122 move sh2 / sh4 to a folder called superh 2017-10-02 17:31:38 +01:00
AJR
ac06279df0 Create explicit i386dasm include for x86 DRC (nw) 2017-08-01 00:55:59 -04:00
Vas Crabb
01decf78b0 need this for debug trace logging on DRC cores (nw) 2017-08-01 14:37:05 +10:00
AJR
3b4315a4b5 Fix single build for i386-based drivers (nw) 2017-07-31 19:53:12 -04:00
fulivi
5201a7f6bf Begin of HP80 emulation (#2448)
What works:
* HP85A machine with 16K of RAM
* Capricorn CPU works
* Keyboard works (with minor issues)
* CRT text / graphics modes work (correct speed is not emulated yet so service ROM complaints)
* BASIC is usable

What is missing (and I'll have hopefully working soon):
* HW timers
* Beeper
* Integral printer
* DC100 cassette drive
* Extension ROMs
* I/O modules (especially the HPIB interface so that we can hook up floppy drives)
* Other models in the family (e.g. HP86)
2017-07-08 19:31:42 +10:00
David Haywood
907115ed06 create c-chip device with correct CPU type in it and a bunch of notes (pinout etc.)
create a uPD78C11 derived CPU type for this purpose, with internal ROM map
use internal ROM map for other uPD78C10 chips as it's always present.
add missing NO_DUMP definitions to various games using C-Chips with correct size etc.
pump megablast through the device code as really all it ever does is bank the c-chip window and test the RAM.
2017-07-05 01:45:09 +01:00