- Fix a bug that deadlocked the emulation during WAI/SLP if a timed event had already occurred
- SLP is no longer disassembled as "illegal" on the HD6301
- Tentatively start to support the extra ports of the HD6301X/HD6301Y (nw)
* new clones
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Spider-Man (JAKKS Pacific TV Game) (older hardware, set 2) [Sean Riddle]
* (nw)
* sh6578 work (nw)
* new NOT WORKING
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Fox Sports 7 in 1 Sports Games Plug n' Play [Sean Riddle, David Haywood]
Ford Racing [Sean Riddle, David Haywood]
- some sh6578 work (nw)
* new NOT WORKING
----
Lazer Tag Video Game Module [Sean Riddle, David Haywood]
(quickly hits unimplemented 00F596: divq mr, r2)
* sh6578 input tweaks (nw)
* sh6578 gfx work (nw)
* sh6578 video work (nw)
* sh6578 - use m6502 type instead of n2a03 type as apparently most of these clones follow that pattern (nw)
* sh6578 - use logmacro (nw)
* sh6578 misc work (nw)
- Split "HD6301" and "HD63701" devices into several different types (functionally identical now, but won't be compatible once accuracy improves)
- Split the all-in-one m6801_io_r and m6801_io_w handlers into separate handlers for each register; use m() instead of rw() to map these for now
- Make all port direction registers write-only
- Delete the "unused" NOP mapping from $0020 to $007F in the MC6803 internal map (datasheets make clear that external accesses can be made here)
mc10.cpp: Remove a bizarre and seemingly useless DDR hack for an unused port (nw)
psion.cpp: Correct CPU types and clocks
* Added individual members for FR status flags.
* Added FR = Rd and Rd = FR opcodes.
* Added Ext A6 support.
* Fixed up LSR/LSROR/LSL/LSLOR/ASR/ASROR support.
* Cleaned up GOTO MR.
* Added Faction ON/OFF, SECBANK ON/OFF, and IRQNEST ON/OFF support.
* Disabled DRC for the time being.
* new NOT WORKING
----
Spider-Man Web Master (JAKKS Pacific TV Motion Game) [Sean Riddle, David Haywood]
* new WORKING machine
----
Who Wants To Be A Millionaire (UK, Character Options) [Sean Riddle, David Haywood]
* sh6578.work (nw)
* (nw)
* sh6578 work (nw)
* main screen turn on (nw)
* allow workram writes via DMA (nw)
This fixes the "invalid bank entry" error with d10. The schematics don't make it easy to correct this, since most of the banking and chip selection logic is embedded in custom gate arrays.
