from the CPU cores.
Disabled the use of PULSE_LINE for any input lines except NMI and RESET.
Added a helper function generic_pulse_irq_line() for doing a single-cycle
assert/deassert for those few drivers remaining that were trying to use
PULSE_LINE directly.
appropriate, and to keep all global variables hanging off the
machine structure. Once again, this means all state registration
call sites have been touched:
- state_save_register_global* now takes a machine parameter
- state_save_register_item* now takes a machine parameter
- added new state_save_register_device_item* which now uses
the device name and tag to generate the base name
Extended the fake sound devices to have more populated fields.
Modified sound cores to use tags from the devices and simplified
the start function.
Renumbered CPU and sound get/set info constants to align with
the device constants, and shared values where they were perfectly
aligned.
Set the type field in the fake device_configs for CPU and sound
chips to a get_info stub which calls through to the CPU and sound
specific get_info functions. This means the device_get_info()
functions work for CPU and sound cores, even in their fake state.
Changed device information getters from device_info() to
device_get_info() to match the CPU and sound macros.
works. Added callback parameters to the expression engine. Improved
CPU parsing so you can use a CPU tag or index in most commands that
take one. Switched to passing CPU and address space objects around
where appropriate. Lots of other minor tweaks.
Moved memory global state into a struct hanging off of the machine.
Updated almost all memory APIs to take an address_space * where
appropriate, and updated all callers. Changed memory internals to
use address spaces where appropriate. Changed accessors to point
to the memory_* functions instead of the address space-specific
functions. Improved internal handling of watchpoints.
Added cputag_* functions: cputag_reset(), cputag_get_index(),
cputag_get_address_space(). These just expand via macros to an
initial fetch of the CPU via cputag_get_cpu() followed by the
standard CPU call.
Added debugger_interrupt_hook() and debugger_exception_hook() calls
which intelligently look at the debugger flags before calling.
Did minimal cleanup of debugger, mainly moving CPU-specific data
to hang off of the CPU classdata for more direct access.
Removed opbase globals to the address_space structure.
Cleaned up names of pointers (decrypted and raw versus rom and ram).
Added inline functions to read/write data via any address space.
Added macros for existing functions to point them to the new functions.
Other related cleanups.
state_save_combine_module_and_tag() function in favor of passing
the tag when registering. Revisited all save state item registrations
and changed them to use the tag where appropriate.
are broken.
Changed READ/WRITE handlers to accept an address_space * instead of a
machine *. The address_space object was enhanced to contain a machine
and a pointer to the relevant CPU object.
Fixed a number of errors found by the compiler, mostly in the core and
CPU/sound handlers, but there is a lot remaining to fix.
Added new function cpu_get_address_space() to fetch the address space
for calling in manually to these functions. In some instances, code
which should eventually be converted to a device is hard-coding fetching
the program space of CPU #0 in order to have something valid to pass.
* added a set of cpu_* calls which accept a CPU device object;
these are now the preferred means of manipulating a CPU
* removed the cpunum_* calls; added an array of cpu[] to the
running_machine object; converted all existing cpunum_* calls
to cpu_* calls, pulling the CPU device object from the new
array in the running_machine
* removed the activecpu_* calls; added an activecpu member to
the running_machine object; converted all existing activecpu_*
calls to cpu_* calls, pulling the active CPU device object
from the running_machine
* changed cpuintrf_push_context() to cpu_push_context(), taking
a CPU object pointer; changed cpuintrf_pop_context() to
cpu_pop_context(); eventually these will go away
* many other similar changes moving toward a model where all CPU
references are done by the CPU object and not by index
Sent: Wednesday, November 05, 2008 8:22 AM
To: submit@mamedev.org
Cc: atariace@hotmail.com
Subject: [patch] Add ADDRESS_MAP_NAME macro
Hi mamedev,
In theory, MAME's interface macros should completely hide the naming
conventions from the drivers and sound/cpu cores. So as an
experiment, I renamed all the core apis and looked to see what broke.
The most common api coupling was with address maps in the CPU cores,
which this patch addresses by introducing a new macro,
ADDRESS_MAP_NAME (mimicing what is done in devintrf.h). There were a
handful of related problems in some drivers which this patch also
fixes. Some remaining issues I left alone (laserdisk apis reference
rom, video_update, machine_config, ksys573 use of nvram_handler,
megadriv use of ipt), in principle all the apis need _NAME variants to
encode the conventions.
~aa
working on something, hold off syncing.
Defined macros for core CPU functions: CPU_INIT, CPU_RESET, CPU_EXIT,
CPU_EXECUTE, along with macros for the name and for calling, in the
spirit of the devintrf.h macros. More will come later.
Changed init, reset, exit, and execute interfaces to be passed a
const device_config * object. This is a fake object for the moment,
but encapsulates the machine pointer and token. Eventually this will
be a real device.
Changed the CPU IRQ callbacks to a proper type, and added a device
parameter to them.
Updated all CPU cores to the new macros and parameters.
Note that this changes the way we "pointer"-ify cores. I'll send an
update shortly.
Subject: [patch] Conditional code cleanup resubmit
Hi mamedev,
This is a resubmit of a previous patch. The earlier version would not
compile with 32-bit MSVC, due to the fact that its linker required
external dependencies in dead code to be met before dead code
elimination was done, causing linker errors. The proper fix for this
would be to add the necessary dependencies, so I instead simply left
the conditional code in place in winalloc.c and chd.c.
~aa
Original submission email below:
----
Conditionally compiled code tends to bitrot, so MAME should try to
avoid it as much as possible. I sent a patch six months ago to
eliminate conditional code associated with logging, here's another
patch that does more of this. Some notes:
1. drc_ops.c: I couldn't find a LOG_CODE anywhere, so I used if (0).
2. romload.c: I converted all the users of debugload to use
LOG((...)) instead, following the traditional conditional logging
pattern.
3. windows/sound.c: I eliminated the separate sound log and directed
the few outputs to the error log.
~aa
macro from the source code. All MAME builds now include
the debugger, and it is enabled/disabled exclusively by
the runtime command-line/ini settings. This is a minor
speed hit for now, but will be further optimized going
forward.
Changed the 'd' suffix in the makefile to apply to DEBUG
builds (versus DEBUGGER builds as it did before).
Changed machine->debug_mode to machine->debug_flags.
These flags now indicate several things, such as whether
debugging is enabled, whether CPU cores should call the
debugger on each instruction, and whether there are live
watchpoints on each address space.
Redesigned a significant portion of debugcpu.c around
the concept of maintaining these flags globally and a
similar, more complete set of flags internally for each
CPU. All previous functionality should work as designed
but should be more robust and faster to work with.
Added new debugger hooks for starting/stopping CPU
execution. This allows the debugger to decide whether
or not a given CPU needs to call the debugger on each
instruction during the coming timeslice.
Added new debugger hook for reporting exceptions.
Proper exception breakpoints are not yet implemented.
Added new module debugger.c which is where global
debugger functions live.
direct byte, word, dword, and qword accessors for all bus sizes,
there are now masked word, dword, and qword accessors for all
bus sizes.
IMPORTANT: masks that are passed to the _masked_* functions are
NOT inverted. Although inverted masks are still passed to callback
functions, when you request a masked read or write the masks should
represent the bits you want.
Updated the various MIPS cores that use these functions to invert
their masks.
accordingly.
Added new functions for dynamically installing device memory
read/write handlers.
Updated install_memory_XXX_handler() functions to take a machine
parameter. Updated all drivers accordingly.
Merged installation of read and write handlers where appropriate.
Simplified memory.c code for dynamic installation so that a single
function handles all the work; a NULL read or write handler
indicates not to install anything for reads or writes.
only remaining form is the one that takes a pointer parameter.
Added macros for STATE_PRESAVE and STATE_POSTLOAD to define common
functions. Added machine parameter to these functions.
Updated all drivers and CPU/sound cores to use the new macros
and consolidate on the single function type. As a result pushed
the machine parameter through a few initialization stacks.
Removed unnecessary postload callbacks which only marked all tiles
dirty, since this is done automatically by the tilemap engine.
trace through in a debug build, yet should operate the same as before.
Created a complete set of functions for all databus sizes (8,16,32,64) and
all endiannesses. A few functions are redundant, but it is now very clear
which functions to use in which scenarios. It is also now possible to rely
on being able to access values of 8, 16, 32 or 64 bits via the built-in
accessors without fear of crashing.
Updated all cores using 8-bit handlers to explicitly call the 8-bit handlers
with the appropriate endianness.
Fixed a few games which were calling n-bit handlers directly to use the
generic forms. In the future, this is all the access drivers will have.
fixed reading from SXYP
fixed reading from IRGB
fixed writing to LZCR
fixed sign extension of GTE control registers
fixed writing to FLAG
New games added or promoted from NOT_WORKING status
---------------------------------------------------
1 on 1 Government (JAPAN)
Added ability to test the instruction/data cache ram. The scratchpad and BIU register are now handled internally to the CPU.
All writes are performed with masks. SWL/SWR used to be implemented with two writes ( one byte and one word ) when writing three bytes, now it only ever performs one. Byte and Word writes use masks as they leave the rest of the register on the bus, which can be picked up by larger registers.
The read/write functions to use are cached when the SR bits are updated, as are the bad address masks.
Added coprocessor 1 & 3 support, though they don't do anything useful.
All loads now go through the delay pipeline, a lwl/lwr will grab the value out of the pipeline if it's updating the same register.
Added undocumented behaviour of BLEZ/BGTZ. The comparison for zero can be changed by specifying an alternate register in the RT field ( the documentation says you should always use register 0 ).
Restricted to 16 COP0 registers & generate an exception if any of the 5 for the MMU are used.
Added BCF/BCT instructions, although I have found no conditions that affect them yet.
Generates an exception if any MMU instructions are executed.
Sets the CE instruction for all exceptions, not just those involving a coprocessor. The bits of the opcode that specify the coprocessor are grabbed no matter what the instruction.
Added TAR register and BT bit in SR. When an exception occurs during a branch, BT determines whether it was taken or not. The TAR register gets set to the destination of the branch.
Fixed the BD bit when you are in a branch delay slot and you didn't take the branch, this shows up in the pipeline as !pc.
Fixed branches within a branch delay slot.
Multiply & divide instructions can be aborted if you write to HI/LO before reading the result.
Added data breakpoints, you don't appear to be able to set breakpoints on any of the addresses internal to the CPU.
Multiply/divide/GTE instructions can execute when an exception is taken, although the EPC indicates that it hasn't. The BIOS avoids rerunning GTE instructions as they are destructive, so you have to make sure they run.
Added bus error handling, PSXCPU is limited to 8mb of ram & any access outside this range will trigger an exception. I believe this is to be an internal limit.
Added CXD8611R as a specific CPU type, System 12 appears to allow more than 8mb of ram & it's possible that this is different.
Mapped out all instructions to either generate an exception or ignore bits.
Updated the disassembler to match the decoding.
Fixed disassembling of branch instructions in a branch delay slot.
Lui checks for a ori/addiu following and will show you the result.
Added step over/out support.
Fixed standalone disassembler.
a new compile-time define (ENABLE_DEBUGGER). This means that MAME_DEBUG no longer means
"enable debugger", it simply enables debugging features such as assertions and debug code
in drivers.
Also removed the various levels of opbase protection in memory.h and always just turned
on full bounds checking.
Fixed build break due to missing ampoker.lay -> ampoker2.lay renaming.
The idea is to create extra work if a driver wants to use these and hopefully
gives an incentive to look for an alternate solution
- Added #include of deprecat.h that rely on these contructs
- Removed a bunch of unneccassary #include's from these files
The system 10 & 12 clock speeds have been raised as they run on an upgraded chipset.
All clocks are currently set to divide by 2 externally, I don't know if this is correct.
The clock is also divided internally as we have no wait states, incorrect dma timing, no gpu timing, no dma bus stealing and no gte timing.
Updated all CPU cores to return a CPUINFO_INT_CLOCK_MULTIPLIER of 1.
Changed the core to actually respect both CPUINFO_INT_CLOCK_MULTIPLIER and CPUINFO_INT_CLOCK_DIVIDER.
Updated a number of drivers to use cpunum_get_clock() instead of Machine->drv->cpu[x].clock.
***** Raw input clock speeds should now be specified for all CPUs in the MACHINE_DRIVER. *****
Removed explicit divisors from all drivers using the following CPU types,
which were already specifying non-1 values for CPUINFO_INT_CLOCK_DIVIDER:
* COP4x0
* I8039/8048 families
* M68(7)05, HD63705
* M6809E
* PIC16C5X
* TMS32010
* TMS340x0
In a few cases, it appears that the divisor was not being used, so I guessed in those cases whether or not
the specified clock speed was raw.
- removed years from copyright notices
- removed redundant (c) from copyright notices
- updated "the MAME Team" to be "Nicola Salmoria and the MAME Team"
This is an updated version of my earlier ATTR_PRINTF patch. It was
reviewed by Atari Ace to use ATTR_PRINTF properly and fixes even more
format errors. I also reviewed the whole source again and it is now
used in all possible places.
