specified when the device is added, and the clock is available in
the device_config directly via device->clock. Updated all devices
that have a clock to specify it when adding the device, rather than
as part of their configuration. As part of this work, also created
device-specific _ADD and _REMOVE macros to simplify configuration.
Dfined a generic device execute function callback, though it
is not used yet. The long term plan is that any device with an
execute callback will be scheduled along with the CPUs. Now that
CPUs are devices, their scheduling will be moved over to this
logic eventually.
Changed various NVRAM devices to fetch their default memory region
from the device->region rather than specifying it in the
configuration.
Moved a number of CPUINFO_PTR_* constants to CPUINFO_FCT_*.
Fixed several drivers that manually created their own gfx_elements
to fill in the machine object, so they no longer crash.
Fixed incorrect CPU display on info screen (recently broken).
Moved device startup to *before* the DRIVER_INIT is called. This
is to allow the DRIVER_INIT to configure devices that have been
properly allocated. So far I don't see any negative effects, but
be on the lookout if something weird shows up.
Rewrote the device iteration logic to make use of the typenext
field and the newly-introduced classnext field for iterating more
efficiently through devices of a given type or class.
Fixed behavior of MDRV_CPU_REPLACE so it does not delete and then
re-add a CPU (causing the order to change).
Sent: Thursday, December 11, 2008 6:52 PM
To: submit@mamedev.org
Cc: atariace@hotmail.com
Subject: [patch] deprecat.h cpu cleanup
Hi mamedev,
This patch purges the last few uses of deprecat.h from the cpu cores,
plus a handful of other Machine cases elsewhere that were found by
script inspection.
~aa
--
Hi mamedev,
This patch eliminates most uses of deprecat.h in the sound cores by
attaching the device to the state object and using it where
appropriate. Given that all the cpu objects use this convention, and
three sound cores already do this, this seemed an appropriate
approach.
~aa
from the CPU cores.
Disabled the use of PULSE_LINE for any input lines except NMI and RESET.
Added a helper function generic_pulse_irq_line() for doing a single-cycle
assert/deassert for those few drivers remaining that were trying to use
PULSE_LINE directly.
works. Added callback parameters to the expression engine. Improved
CPU parsing so you can use a CPU tag or index in most commands that
take one. Switched to passing CPU and address space objects around
where appropriate. Lots of other minor tweaks.
Moved memory global state into a struct hanging off of the machine.
Updated almost all memory APIs to take an address_space * where
appropriate, and updated all callers. Changed memory internals to
use address spaces where appropriate. Changed accessors to point
to the memory_* functions instead of the address space-specific
functions. Improved internal handling of watchpoints.
Added cputag_* functions: cputag_reset(), cputag_get_index(),
cputag_get_address_space(). These just expand via macros to an
initial fetch of the CPU via cputag_get_cpu() followed by the
standard CPU call.
Added debugger_interrupt_hook() and debugger_exception_hook() calls
which intelligently look at the debugger flags before calling.
Did minimal cleanup of debugger, mainly moving CPU-specific data
to hang off of the CPU classdata for more direct access.
related APIs now take a device pointer instead of an index.
All functions that take a CPU device are prefixed with cpu_*
All functions that are globally related to cpu execution
are prefixed with cpuexec_*. Below is a list of some of the
mappings:
cpu_boost_interleave -> cpuexec_boost_interleave
cpunum_suspend -> cpu_suspend
cpunum_resume -> cpu_resume
cpunum_is_suspended -> cpu_is_suspended
cpunum_get_clock -> cpu_get_clock
cpunum_set_clock -> cpu_set_clock
cpunum_get_clockscale -> cpu_get_clockscale
cpunum_set_clockscale -> cpu_set_clockscale
cpunum_get_localtime -> cpu_get_local_time
cpunum_gettotalcycles -> cpu_get_total_cycles
activecpu_eat_cycles -> cpu_eat_cycles
activecpu_adjust_icount -> cpu_adjust_icount
cpu_trigger -> cpuexec_trigger
cpu_triggertime -> cpuexec_triggertime
cpunum_set_input_line -> cpu_set_input_line
cpunum_set_irq_callback -> cpu_set_irq_callback
In addition, a number of functions retain the same name but
now require a specific CPU parameter to be passed in:
cpu_yield
cpu_spin
cpu_spinuntil_time
cpu_spinuntil_int
cpu_spinuntil_trigger
cpu_triggerint
Merged cpuint.c into cpuexec.c. One side-effect of this
change is that driver reset callbacks are called AFTER the
CPUs and devices are reset. This means that if you make
changes to the CPU state and expect the reset vectors to
recognize the changes in your reset routine, you will need
to manually reset the CPU after making the change (since it
has already been reset).
Added a number of inline helper functions to cpuintrf.h for
managing addresses
Removed cpu_gettotalcpu(). This information is rarely needed
outside of the core and can be obtained by looking at the
machine->cpu[] array.
Changed CPU interrupt acknowledge callbacks to pass a CPU
device instead of machine/cpunum pair.
Changed VBLANK and periodic timer callbacks to pass a CPU
device instead of machine/cpunum pair.
Renamed all information getters from cpu_* to cpu_get_* and
from cputype_* to cputype_get_*.
* added a set of cpu_* calls which accept a CPU device object;
these are now the preferred means of manipulating a CPU
* removed the cpunum_* calls; added an array of cpu[] to the
running_machine object; converted all existing cpunum_* calls
to cpu_* calls, pulling the CPU device object from the new
array in the running_machine
* removed the activecpu_* calls; added an activecpu member to
the running_machine object; converted all existing activecpu_*
calls to cpu_* calls, pulling the active CPU device object
from the running_machine
* changed cpuintrf_push_context() to cpu_push_context(), taking
a CPU object pointer; changed cpuintrf_pop_context() to
cpu_pop_context(); eventually these will go away
* many other similar changes moving toward a model where all CPU
references are done by the CPU object and not by index
working on something, hold off syncing.
Defined macros for core CPU functions: CPU_INIT, CPU_RESET, CPU_EXIT,
CPU_EXECUTE, along with macros for the name and for calling, in the
spirit of the devintrf.h macros. More will come later.
Changed init, reset, exit, and execute interfaces to be passed a
const device_config * object. This is a fake object for the moment,
but encapsulates the machine pointer and token. Eventually this will
be a real device.
Changed the CPU IRQ callbacks to a proper type, and added a device
parameter to them.
Updated all CPU cores to the new macros and parameters.
Note that this changes the way we "pointer"-ify cores. I'll send an
update shortly.
* marked IDT instructions for R4650 only
* accounted for time taken in throwaway likely branch slots
* fixed jalr to respect the correct link register
* fixed c.eq, c.lt, c.le to fail if unordered
* fixed swxc1, sdxc1 to use the correct source register (fixes many Gauntlet problems)
* fixed CCR31 display in debugger
macro from the source code. All MAME builds now include
the debugger, and it is enabled/disabled exclusively by
the runtime command-line/ini settings. This is a minor
speed hit for now, but will be further optimized going
forward.
Changed the 'd' suffix in the makefile to apply to DEBUG
builds (versus DEBUGGER builds as it did before).
Changed machine->debug_mode to machine->debug_flags.
These flags now indicate several things, such as whether
debugging is enabled, whether CPU cores should call the
debugger on each instruction, and whether there are live
watchpoints on each address space.
Redesigned a significant portion of debugcpu.c around
the concept of maintaining these flags globally and a
similar, more complete set of flags internally for each
CPU. All previous functionality should work as designed
but should be more robust and faster to work with.
Added new debugger hooks for starting/stopping CPU
execution. This allows the debugger to decide whether
or not a given CPU needs to call the debugger on each
instruction during the coming timeslice.
Added new debugger hook for reporting exceptions.
Proper exception breakpoints are not yet implemented.
Added new module debugger.c which is where global
debugger functions live.
* changed from tracking "live" registers to tracking "necessary" registers
* genericized register tracking to be more flexible
* added previous instruction pointer to opcode descriptions
PowerPC frontend/DRC:
* cleaned up register tracking implementation
* fixed numerous errors and shortcomings in the tracking
* added support for removing unnecessary XER CA and CR0 computations
* updated UML logging to output new frontend statistics
MIPS3 frontend/DRC:
* tweaked register tracking to match new DRC frontend system
* updated UML logging to output new frontend statistics
* Removed explicit flag requests from the shorthand opcodes
* Added optimization function to drcuml which is called at block end
* Added logic to compute the necessary flags based on upcoming opcodes
and only select those flags which are required
* Updated the PPC and MIPS3 DRCs to no longer explicitly specify flags
- rewrote PowerPC implementation as a dynamic recompiler on top
of the universal recompiler engine
- wrote a front-end to analyze PowerPC code paths and register usage
- wrote a common shared module with C implementations of tricky
CPU behaviors
- added separate CPU types for the variants supported, instead of
relying on a hidden model enum
- rewrote the serial port emulation for the 4xx series to be more
accurate and not rely on separate DMA handlers
- rewrote the MMU handling to implement a software TLB that faults
in pages and handles changed bits appropriately
- implemented emulation of the PowerPC 603's software TLB, which
allows the model 3 games to run without a hack to disable the MMU
Updated the PowerPC disassembler to share constants with the rest of
the core, and to more aggressively use simplified mnemonics, especially
for branches. [Aaron Giles]
Universal recompiler:
- fixed frontend to handle opcode widths different from bus width
- added several new opcodes:
* (D)GETFLGS - copies the UML flags to a destination operand
* FDRNDS - rounds a double precision value to single precision
- renamed several opcodes:
* SETC -> CARRY
* XTRACT -> ROLAND
* INSERT -> ROLINS
- consolidated the following opcodes:
* LOAD?U -> LOAD
* LOAD?S -> LOADS
* STORE? -> STORE
* READ?U -> READ
* READ?M -> READM
* WRITE? -> WRITE
* WRITM? -> WRITEM
* SEXT? -> SEXT
* FTOI?? -> FTOINT
* FFRI? -> FFRINT
* FFRF? -> FFRFLT
- removed some opcodes:
* FLAGS - can be done with GETFLGS/LOAD4/ROLINS
* ZEXT - can be achieved with AND
* READ?S - can be achieved with READ/SEXT
- updated C, x86, and x64 back-ends to support these opcode changes
- updated disassembler to support these opcode changes
MIPS3 dynamic recompiler:
- updated to use new/changed opcode forms
- changed context switch so that it only swaps a single pointer
Konami Hornet changes: [Aaron Giles]
- updated to new PowerPC configurations
- updated some memory handlers to be native 8-bit handlers
- cleaned up JVS implementation to work with new serial code
- added fast RAM for the work RAM to give a small speed boost
Konami GTI Club changes: [Aaron Giles]
- updated to new PowerPC configurations
- updated some memory handlers to be native 8-bit handlers
Konami Viper/ZR107 changes: [Aaron Giles]
- updated to new PowerPC configurations
Sega Model 3 changes: [Aaron Giles]
- updated to new PowerPC configurations
- reimplemented/centralized interrupt handling
- these games are broken for the moment
Fixed crasher due to some Konami games using 8 layers in
the K056832 implementation, even though it was only written
for 4. [Aaron Giles]
Added fisttp opcode to i386 disassembler. [Aaron Giles]
1. In the MIPS core:
- renamed struct mips3_config -> mips3_config
- updated all drivers to the new names
- removed MIPS3DRC_STRICT_COP0 flag, which is no longer used
- a few minor cleanups
2. In the CPU interface:
- added new 'intention' parameter to the translate callback to
indicate read/write/fetch access, user/supervisor mode, and
a flag for debugging
- updated all call sites to pass an appropriate value
- updated all CPU cores to the new prototype
3. In the UML:
- added new opcode SETC to set the carry flag from a source bit
- added new opcode BSWAP to swap bytes within a value
- updated C, x86, x64 back-ends to support the new opcodes
- updated disassembler to support the new opcodes
4. In the DRC frontend:
- fixed bug in handling edge case with the PC near the 0 or ~0
* Added new opcode LZCNT which returns the number of leading zeros in
a parameter.
* Added new opcode XTRACT which is a combined rotate/mask (basically
rlwinm from PowerPC)
* Added new opcode INSERT which is a combined rotate/mask/blend
(basically rlwimi from PowerPC). Best. Opcode. Ever.
* Updated all back-ends to support these new opcodes.
* Fixed several bugs relating to shifts/rotates and optimizing out
cases incorrectly.
MIPS3 DRC changes:
* Updated to use INSERT and XTRACT where appropriate
* Cleaned up register usage to enable an additional direct mapping;
this means Linux gets 1 now and Windows gets 3
machine registers if the machine supports it. Currently only x64 on
Windows has enough free registers to do so, though PowerPC will almost
certainly be able to take advantage of this. Gives a minor speedup.
* Fixed front-end so that virtual no-op instructions are still targeted
as branch targets.
* Fixed front-end to mark the beginning of each sequence as needing TLB
validation, since any sequence can be jumped to from anywhere.
* Redid the MIPS3 TLB implementation. Fixed the exception vector and
type handling. Changed the bitfields to directly map from the MIPS TLB
format. Added distinction between TLB fill and TLB valid/modified
exceptions.
* Added separate modes for user, supervisor, and kernel modes. Each mode
does proper verification of addresses now and generates address errors
for invalid accesses.
* Fixed several bugs in the TLB implementation; not everything works
yet but it's a lot closer.
* Made COP0 access checking mandatory in non-kernel modes.
* Fixed several crashes when recompiling virtual no-ops.
* Fixed TLB bug where entries for virtual address 0 were present by
default.
* Fixed bug in the map variable implementation that would sometimes
result in incorrectly recovered values.
This will be expanded in the future.
Added two new opcodes: SAVE and RESTORE to save and restore the entire
virtual machine state for examination/setup.
Added new back-end function get_info() which returns information from
the back-end about how many actual registers will be mapped.
Fixed a bug that mapped the high a low parts of registers to the same
address. This should help the C back-end run better on big-endian
architectures.
is drcuml.c, which defines a universal machine language
syntax that can be generated by a frontend recompiler and
then retargeted via a generic backend interface to any of
a number of different architectures. A disassembler for the
UML is also included to allow examination of the generated
UML code.
Currently supported backend architectures include 32-bit x86,
64-bit x86, and a platform-neutral interpreted C backend that
can be used as a fallback for platforms without native
support. The C backend also performs additional validation
to ensure assumptions are met.
Along with the new architecture is a new MIPS III/IV
recompiler frontend. This frontend has been rewritten from
the old x64-specific recompiler to generate UML opcodes
instead. This means that the single recompiler can be used
to target multiple backend architectures and should in
theory produce identical results across all of them.
The old 32-bit and 64-bit MIPS recompilers are now officially
retired. The new system provides similar performance (within
5% generally) to the old system and has similar compatibility.
The only currently known issues are some problems with the
two Gauntlet 3D games.
