Commit Graph

176 Commits

Author SHA1 Message Date
AJR
9abc6733ba Add H8/500 disassembler and skeleton CPU device family
alesis_qs.cpp: Document XTALs; replace legacy MCFG in comments (nw)

picno.cpp: Replace legacy MCFG in comments (nw)
2020-04-04 17:21:59 -04:00
Olivier Galibert
6e7fe63f60 upd177x disassembler [O. Galibert] 2020-04-04 12:42:48 +02:00
hap
ceabc2c798 cpu/alph8201 can be removed now (nw) 2020-04-03 21:58:40 +02:00
Olivier Galibert
d35c3977c9 unidasm: Add pic16 generic disassembler with extended instructions [O. Galibert] 2020-03-28 19:45:41 +01:00
Vas Crabb
f011a9134d clean up crud (nw) 2020-02-29 18:32:52 +11:00
Olivier Galibert
c849d1dc42 ks0164: First try at a disassembler [David Carne, O. Galibert] 2020-02-22 16:45:32 +01:00
cam900
21dae89c14
Add skeleton LZ8420M device (#6339)
* Add skeleton LZ8420M device
It has additional IO, Embedded RAM
Used in psikyo.cpp

* lz8420m.cpp : Fix copyright holder
2020-02-21 10:43:56 -05:00
Patrick Mackinlay
52d1a412fa romp: new device 2020-02-13 21:35:44 +07:00
AJR
9ce46c7cd5 New machines marked as NOT_WORKING
----------------------------------
Roland D-50 (Ver. 2.xx) [DBWBP, depblue]

New NOT_WORKING clones
----------------------
Roland D-50 (Ver. 1.xx) [DBWBP]
Roland D-550 [DBWBP]

Add disassembler for NEC 78K/III architecture [AJR]
2020-02-12 11:59:41 -05:00
AJR
d7db95aea9 Add disassemblers for NEC 78K/0, 78K/I and 78K/II MCU types
hotd2: Make "Gun Sense" board a separate device
2020-02-10 23:43:03 -05:00
Olivier Galibert
536652387f Oops (nw) 2020-02-07 21:35:46 +01:00
Olivier Galibert
23556e65f5 xavix2: First stab at the cpu [O. Galibert, N. Gilbert] 2020-02-07 21:31:25 +01:00
AJR
0f052a51f8 New machines marked as NOT_WORKING
----------------------------------
NCD19c [Don Maslin Archive]

Add disassemblers for Motorola MC88100 and MC88110 [AJR]
2020-01-23 16:45:51 -05:00
hap
685907679b gigatron: fix compile (nw) 2020-01-23 11:58:29 +01:00
Sterophonick
0ff7e2ea0d new NOT_WORKING machine (#5811)
* minor spelling fix

* new NOT_WORKING machine

Gigatron TTL Microcomputer [Sterophonick]

also add a skeleton cpu core

* Revert Minor Spelling Fix

* Make some fixes

thanks cuavas

* Fix resolution

* gigatron: update cpu device name

* update copyright

* fix part of gigatron disassembler

* Set screen refresh rate

* found a set of all the ROM files, update main ROM name

* Fix cpu.lua

* Whoops

* Update gigatron.cpp

* gigatron: clear execute_set_input

* Update gigatron.h

* Update gigatrondasm.cpp

* Update gigatrondasm.h

* clean up but doesnt compile ffs
2020-01-21 13:33:33 -05:00
AJR
96ec01a614 Add tentative VT61/VT62 disassembler and skeleton CPU device 2020-01-13 21:18:27 -05:00
AJR
cdb9578471 rx01: Dumped firmware PROMs [Lord Nightmare]
rx01: Add disassembler and skeleton CPU device for custom firmware architecture [AJR]
2020-01-06 09:21:09 -05:00
AJR
f48f57ef81 Add new disassembler for WE32100 architecture
New machines marked as NOT_WORKING
----------------------------------
AT&T 3B2/300 [Bitsavers]

New clones marked as NOT_WORKING
--------------------------------
AT&T 3B2/310 [Bitsavers]
AT&T 3B2/400 [Bitsavers]
2019-12-30 19:15:31 -05:00
AJR
14c4dcc643 Add new disassembler for PACE architecture
New machines marked as NOT_WORKING
----------------------------------
unknown INS8900 Multibus card (980305652) [Bitsavers]
2019-12-28 12:39:46 -05:00
AJR
5da18d7422 New machines marked as NOT_WORKING
----------------------------------
VT52 [Dalby Datormuseum]
2019-12-18 11:07:59 -05:00
AJR
e69ff59e42 New machines marked as NOT_WORKING
----------------------------------
Speedcom VD56SP [ClawGrip]

Add disassembler and basic execution core for Rockwell R65C19 [AJR]
2019-11-25 22:55:20 -05:00
mooglyguy
b54cb1804b -sun4c_mmu.cpp: Made generic to support sun4 MMU mode, and cleaned up save state usage. [Ryan Holtz]
-sun4.cpp: Various changes: [Ryan Holtz]
 * Split sun4 and sun4c hardware emulation into separate derived classes.
 * Hooked up Sbus IRQs.
 * Removed now-unnecessary duplicate MMU code.

-cgsix.cpp: Added VSync IRQ, cleaned up save state usage, and added THC MISC register. [Ryan Holtz]

-sparc.cpp: Renamed MB86901 to SPARCV7, and added a separate class for SPARCV8. [Ryan Holtz]

-bt45x.cpp: Made logmacro.h usage more consistent. [Ryan Holtz]
2019-11-18 17:31:09 +01:00
Patrick Mackinlay
f821d80e01 dsp56000: new disassembler 2019-11-18 18:15:09 +07:00
AJR
27ddae4ecf Preliminary SoC emulation for Sitronix ST2204 and ST2205U 2019-11-03 11:32:32 -05:00
Vas Crabb
d80e7f95eb cpu/saturn: clean up a little (nw) 2019-10-27 02:16:50 +11:00
AJR
41a333e791 Add Fujitsu FR disassembler and skeleton CPU device 2019-10-23 21:54:26 -04:00
AJR
12c08b06c8 Split generic Z180 device into several subtypes. HD647180X now has specific device emulation for the internal PROM, RAM and parallel ports. 2019-09-30 21:30:10 -04:00
mooglyguy
450a57568e -dsp56k: Renamed relevant classes, files and namespaces to indicate that it is a DSP56156 core, not a DSP5600x core. [Ryan Holtz] 2019-08-19 15:53:47 +02:00
DavidHaywood
639a5c1fe6 don't use my ill-conceived generator for arcompact, easier to work with as regular files (nw) 2019-08-15 14:42:48 +01:00
AJR
30afb4579d Add disassembler and skeleton CPU device for CompactRISC CR16B architecture
vtech_unk1.cpp: Driver moved to glcx.cpp (nw)
2019-07-05 19:02:43 -04:00
arbee
515bbedaf3 f2mc16: add MB90610A and MB90611A microcontrollers. [R. Belmont] 2019-07-03 20:56:10 -04:00
arbee
306f4e6884 Preliminary Fujitsu F2MC-16 CPU core, currently disassembly only [R. Belmont] 2019-07-01 22:21:00 -04:00
AJR
48f7db090f Add disassembler and skeleton device for DP8344 Biphase Communications Processor 2019-06-22 18:14:16 -04:00
AJR
81eec8d860 Preliminary disassembler and skeleton CPU device for Elan RISC II/RII series architecture 2019-06-20 17:01:38 -04:00
AJR
6fff18773b i386: Improve splitting of unaligned accesses (excluding program fetches)
(nw) This entails a major code reorganization just to keep the scale of it all halfway sane.
2019-05-19 17:41:50 -04:00
David Haywood
f8656d9246 TV Game Work (progress towards smartfp and wrlshunt) (#4956)
* unsp refactoring / tv game work (nw)

* unsp refactoring / tv game work (nw)

* srcclean (nw)

* more ops (nw)

* (nw)

* (nw)

* guesses (nw)

* more guesses (nw)

* (nw)
2019-04-30 19:04:53 -04:00
Olivier Galibert
ea9cd8aea1 m680x0: gratuitously convert the generator to python [O. Galibert] 2019-04-29 22:04:15 +02:00
Olivier Galibert
adc473b74d swp20, dspv: Skeletons [O. Galibert] 2019-04-09 08:53:40 +02:00
Vas Crabb
97b6717027 (nw) Clean up the mess on master
This effectively reverts b380514764 and
c24473ddff, restoring the state at
598cd52272.

Before pushing, please check that what you're about to push is sane.
Check your local commit log and ensure there isn't anything out-of-place
before pushing to mainline.  When things like this happen, it wastes
everyone's time.  I really don't need this in a week when real work™ is
busting my balls and I'm behind where I want to be with preparing for
MAME release.
2019-03-26 11:13:37 +11:00
andreasnaive
b380514764 Revert "conflict resolution (nw)"
This reverts commit c24473ddff, reversing
changes made to 009cba4fb8.
2019-03-25 23:13:40 +01:00
Nigel Barnes
9e122168ef ns32000: Skeleton CPU device with disassembler for NS32000 family.
bbc: Added preliminary Acorn 32016 2nd Processor, incomplete CPU emulation.
2019-03-23 11:55:09 +00:00
Olivier Galibert
b445d10135 ymmu100: Start adding the MEG [O. Galibert] 2019-03-23 12:09:54 +01:00
yz70s
a81cb8469e i386: add a simple cache to the athlon xp processor (nw)
.
A single 64K 2-way set associative cache
Used for both instructions and data
Enabled only for addresses in the first megabyte
Works always in writeback mode
.
It is needed by the nforce motherboard bios that uses it to simulate a
block of ram at address d0000 before ddr ram is configured
2019-03-14 21:03:12 +01:00
AJR
156619b401 Add skeleton CPU device and disassembler for HPC architecture 2019-03-03 16:56:13 -05:00
Patrick Mackinlay
ba8d7b1c8f r4000: experimental mips3 implementation (nw)
WIP checkpoint: while I believe it's largely accurate (and very slow), neither jazz nor sgi systems can fully boot yet using this device, so it remains experimental.

This implementation should go away when it has helped identify the improvements required for mips3.
2019-02-01 15:27:13 +07:00
Patrick Mackinlay
bb0702d2d5 alpha: new cpu, disassembler only 2019-01-24 15:03:38 +07:00
MooglyGuy
6784650038 unsp: Created a SunPlus u'nSP recompiler. [Ryan Holtz] 2019-01-12 12:51:22 +01:00
mooglyguy
dc8834b8dc Last round of macro removals before the freeze. (nw)
-sound/discrete, okim6295: Removed MCFG macros. [Ryan Holtz]

-norautp, osi, audio/mario: Removed MACHINE_CONFIG macros. [Ryan Holtz]

-vsmile: Split into its own driver from vii.cpp. [Ryan Holtz]

-vii: Fixed broken controller inputs. [Ryan Holtz]

-konamim2: Massive update. Most games work, but are still marked non-working due to rare MAME crashes in the PPC DRC. [Phil Bennett, Ryan Holtz]
2018-12-22 17:06:47 +01:00
DavidHaywood
90fef4da16 add derived CPU type for AX51-CORE (used by AX208 and others) so that we can start to customize disassembly and execution 2018-12-14 11:54:49 +00:00
yz70s
bac960a725 i386.cpp: move cpuid and msr routines to new file cpuidmsrs.hxx ... (nw)
... and add placeholders for athlonxp msrs.
2018-12-09 13:57:13 +01:00