Commit Graph

176 Commits

Author SHA1 Message Date
mooglyguy
7b4440920a -o2.cpp: Added CRIME and MACE skeleton devices. [Ryan Holtz]
-mips3.cpp: Various changes: [Ryan Holtz]
 * Added an #ifdef to display DPRINTF calls from the SGI O2 PROM.
 * Switched R4000BE/LE, R4400BE, R4600BE, and R5000BE to 64-bit data bus.
 * Fixed a bug that caused a crash with 64-bit data bus and the DRC.

-indy_indigo2.cpp: Moved a number of devices into HPC3. [Ryan Holtz]

-hpc3.cpp: Fixed an oversight with IRQs. [Ryan Holtz]
2018-11-18 21:51:53 +01:00
Patrick Mackinlay
9df6cfe087 r3000: call it like it is (nw) 2018-11-06 17:21:01 +07:00
yz70s
4f5f5c6c92 i386.cpp: prepare to change hxx files into regular cpp files (nw)
-change order of include files at top of i386.cpp
-move some routines between i386.cpp and i386priv.h
-move part of x87ops.hxx into new file x87priv.h
.
Now you only have to rename the hxx files to cpp and add the following
at the top of each one
.
 #include "emu.h"
 #include "i386.h"
 #include "i386priv.h"
 #include "x87priv.h"
 #include "cycles.h"
 #include "debugger.h"
 #include "debug/debugcpu.h"
 #undef i386
2018-11-03 10:25:11 +01:00
Patrick Mackinlay
8740d148c1 v53: final tidy (nw)
* changed copyright holder due to near-complete replacement
* name changed to v5x which better reflects actual use
* minor comment cleanup
2018-11-01 11:47:28 +07:00
mooglyguy
27ee4f3915 -sun4: Added a sun4c MMU device. Currently wraps the functionality of S4-buffer, S4-cache, and S4-MMU, will eventually be split. [Ryan Holtz]
-sun4: Significant optimization, from 150% -> 330% unthrottled on an i7-5930K. [Ryan Holtz]
2018-09-22 19:41:10 +02:00
mooglyguy
40efe9785f -st62xx: Added a skeleton driver for the STmicro ST6 series of microcontrollers. [Ryan Holtz]
New machines marked as NOT_WORKING
----------------------------------
Catherine Wheel [f205v, Ryan Holtz]
2018-08-25 00:18:07 +02:00
Olivier Galibert
6e0bf6736a tms57002: Trick to reduce the compiler memory usage [O. Galibert] 2018-08-23 19:20:33 +02:00
Vas Crabb
012cbee2c3 Amiga keyboard overhaul:
* Implement Mitsumi Amiga 500, 600, and 2000/3000/4000/CDTV keyboards
* Add unlabeled keys to UK layout
* Restrict available keyboards depending on system type
* Note that C-A-A reset is now broken on "big box" Amigas as MAME doesn't implement it properly, and the hack providing a fake dedicated reset line has been removed

6502 MCU: fix execute loop

6500/1: implement as device with onboard peripherals

Fix some bogus comments
2018-08-23 00:25:21 +10:00
arbee
31a32f451d h8: H8/3003 support [R. Belmont] 2018-08-02 20:27:11 -04:00
David Haywood
88b1546f30 Flesh out TLCS870 core (#3763)
* rewrote most of the execution for my tlcs870 core

* no longer the case (nw)

* note updates (nw)

* address concerns, const qualify more things where possible (nw)

* more const (nw)

* oops (nw)

* consistency (nw)
2018-07-23 10:24:10 +10:00
mooglyguy
eed782f1e3 ps2sony: Some basic VU1 support, major file reshuffling, nw 2018-07-21 10:07:00 +02:00
mooglyguy
5db11a5e02 ps2sony: Checkpoint, nw 2018-07-17 18:14:24 +02:00
Patrick Mackinlay
44d80b6fb0 proposal: move z80daisy* to devices/machine (#3572)
* proposal: move z80daisy* to devices/machine

Seems to me this is a machine, not a CPU? Main reason was to stop the Z80 CPU from being dragged into systems that don't have one just because they use a Z80 family peripheral.

* missed this one (nw)

* missed a spot (nw)
2018-05-15 17:53:07 +10:00
hap
0fae49dc31 sm5*: added sm530 disasm (nw) 2018-05-12 17:37:41 +02:00
David Haywood
6627a9e480 start looking at the extra opcodes in the SSD 2000 type XaviX chip (s… (#3514)
* start looking at the extra opcodes in the SSD 2000 type XaviX chip (seems some undocumented 6502 opcodes are replaced with more custom ones)

* (nw)

* the xavix memory mapping gets stranger with each piece of new evidence (nw)
2018-05-04 12:22:18 -04:00
Vas Crabb
08dde5eb0a srcclean and regenerate localisations (nw) 2018-03-25 02:03:24 +11:00
Vas Crabb
b787818d0c dsp16: move most core state into DRC cache - keeps a lot of details out of the main header (DRC is still stubbed out) (nw) 2018-03-21 21:01:36 +11:00
Vas Crabb
724c602fd5 prettier way of adding DRC framework on-demand (nw) 2018-03-20 20:27:49 +11:00
Vas Crabb
5976a48035 dsp16: start adding recompiler boilerplate (nw) 2018-03-17 06:51:50 +11:00
Vas Crabb
245f822e7d use more constexpr and literal classes in UML to give compiler more optimisation opportunities (nw) 2018-03-17 00:58:54 +11:00
angelosa
bb11fbd2bd Blind faith fixed long names for almost all CPUs (nw)
mb86235.cpp: renamed pcs_ptr into pcp, and added a file for future interpreter core (nw)
2018-03-15 18:07:39 +01:00
Vas Crabb
0bf88bda8f Cycle-accurate DSP16 core (disabled in QSound for performance reasons) 2018-03-15 19:02:43 +11:00
R. Belmont
5ffc8a79a4
Merge pull request #3266 from JoakimLarsson/diablo_1
WIP: Diablo printer CPU
2018-02-28 14:03:10 -05:00
Vas Crabb
8dad4881f6 srcclean (nw) 2018-02-25 01:34:04 +11:00
joakim
35a7f3e628 WIP: Diablo printer CPU 2018-02-24 02:32:36 +01:00
Olivier Galibert
109e2dadb8 NUON disassembler [O. Galibert] 2018-02-18 22:56:53 +01:00
David Haywood
1e09ab0ceb create derived 6502 type for XaviX because it has at least one custom… (#3154)
* create derived 6502 type for XaviX because it has at least one custom 4-byte opcode that doesn't fit any other type.
treating that opcode as NOP for now.

have a feeling it might be something to do with the other integrated hardware, might be 'execute co-processor code chain at this address' or something similar
It isn't a standard JSL (Jump Subroutine Long)  like the SNES cpu opcode in the same place as this, it seems to point at some code-like structures tho)
could also be a secondary operation mode with different encoding like ARM's Thumb mode tho I guess.

We currently only have a single XaviX based dump (taitons1) but there are more on the way.  I'm going to see if the code flow makes any sense at all with these missing, or if any of it gives a clue as to what they should actually do.

* xavix - let's call these callf and retf then

after further investigation these are some kind of extra 'long jump' subroutine / task handlers, the 0x80 also being a custom opcode was throwing me off trying to identify them before.

looks like they might have been hacking 65816 features into the regular 6502 core?

* prepare for extra address bits (nw)

* better program flow (nw)
2018-02-02 14:34:12 -05:00
mooglyguy
ce54579557 -e132xs: fix botched DRC merge, nw 2017-12-29 22:46:36 +01:00
mooglyguy
5d36ef2d30 fixed build errors, nw 2017-12-29 13:43:36 +01:00
hap
e08f42a74e tms1000c: added correct microinstructions pla (nw) 2017-12-21 23:50:29 +01:00
Firehawke
9ece34eb21 Revert "Revert "Merge branch 'master' of https://github.com/mamedev/mame""
This reverts commit 54155441e9.
2017-12-13 21:31:27 -07:00
Firehawke
54155441e9 Revert "Merge branch 'master' of https://github.com/mamedev/mame"
This reverts commit f537428e5a, reversing
changes made to 0d70d79810.
2017-12-13 21:01:10 -07:00
mooglyguy
5d51e91100 no help = no hyperstone drc, nw 2017-12-06 21:51:34 +01:00
mooglyguy
bccc962b69 e132xs: initial work on drc, nw 2017-12-02 04:02:37 +01:00
mooglyguy
495df45315 e132xs: initial drc work, and templated conditional db/b, nw 2017-12-02 04:02:37 +01:00
Olivier Galibert
6caef2579a dvdisasm: Overhaul [O. Galibert]
Disassemblers are now independant classes.  Not only the code is
cleaner, but unidasm has access to all the cpu cores again.  The
interface to the disassembly method has changed from byte buffers to
objects that give a result to read methods.  This also adds support
for lfsr and/or paged PCs.
2017-11-26 17:41:27 +01:00
hap
7a900dd692 i8085: moved opcode macros to main file, will convert these to functions (nw) 2017-11-14 16:55:12 +01:00
hap
2e857fa8bd rename misleading i8085cpu.h to i8085ops.hxx (nw) 2017-11-14 03:02:39 +01:00
Dirk Best
faeedc757c einstein: Major cleanup, add a ADC0844 device
The analogue joystick is now emulated. Also fixed a few minor issues
with the memory map.

This also adds a generic Z80 dasisy chain device, for use in drivers
with non-Z80 peripherals.
2017-11-06 20:47:38 +01:00
Vas Crabb
4c29419cab srcclean (nw) 2017-10-22 12:34:30 +11:00
David Haywood
7851b3786c Preliminary SH3 / SH4 recompiler [David Haywood] (#2711) 2017-10-11 22:23:26 +02:00
David Haywood
c0ee79f3db use 'sh' instead of 'superh' 2017-10-02 19:47:35 +01:00
David Haywood
48aabf4122 move sh2 / sh4 to a folder called superh 2017-10-02 17:31:38 +01:00
AJR
ac06279df0 Create explicit i386dasm include for x86 DRC (nw) 2017-08-01 00:55:59 -04:00
Vas Crabb
01decf78b0 need this for debug trace logging on DRC cores (nw) 2017-08-01 14:37:05 +10:00
AJR
3b4315a4b5 Fix single build for i386-based drivers (nw) 2017-07-31 19:53:12 -04:00
fulivi
5201a7f6bf Begin of HP80 emulation (#2448)
What works:
* HP85A machine with 16K of RAM
* Capricorn CPU works
* Keyboard works (with minor issues)
* CRT text / graphics modes work (correct speed is not emulated yet so service ROM complaints)
* BASIC is usable

What is missing (and I'll have hopefully working soon):
* HW timers
* Beeper
* Integral printer
* DC100 cassette drive
* Extension ROMs
* I/O modules (especially the HPIB interface so that we can hook up floppy drives)
* Other models in the family (e.g. HP86)
2017-07-08 19:31:42 +10:00
David Haywood
907115ed06 create c-chip device with correct CPU type in it and a bunch of notes (pinout etc.)
create a uPD78C11 derived CPU type for this purpose, with internal ROM map
use internal ROM map for other uPD78C10 chips as it's always present.
add missing NO_DUMP definitions to various games using C-Chips with correct size etc.
pump megablast through the device code as really all it ever does is bank the c-chip window and test the RAM.
2017-07-05 01:45:09 +01:00
Vas Crabb
5ada035d17 Rewrote 4004 core and disassembler:
* Renamed to MCS-40.
* Emulated 8-clock instruction cycle, interruptible at any point.
* Converted TEST input to an input line.
* Added SYNC and CM output lines.
* Added support for 4040 CY output, logical operations, extended registers, ROM banking and disassembly.
* Made I/O space mapping more flexible to support the variety of peripherals available.
* Notable missing features are 4040 interrupt and halt, and "program memory" space.
2017-06-27 04:25:18 +10:00
hap
bca24133da sm510: made KB1013VK12 device a clone of SM5A (nw) 2017-06-23 00:34:16 +02:00
AJR
b201ad2cc0 Update cpu.lua properly (nw) 2017-05-26 17:20:31 -04:00
AJR
d1fb75b2e7 Quick and dirty split of most MC6801/MC6803/HD63701 features from base M6800 class (nw)
The code remains generally archaic and awful and in need of a sweeping rewrite. At least one static variable is no more.
2017-05-26 17:08:54 -04:00
dankan1890
f09ba1e562 Fixed some inaccuracies in file names in lua scripts. 2017-05-21 15:22:03 +10:00
Vas Crabb
0f0d39ef81 Move static data out of devices into the device types. This is a significant change, so please pay attention.
The core changes are:
* Short name, full name and source file are no longer members of device_t, they are part of the device type
* MACHINE_COFIG_START no longer needs a driver class
* MACHINE_CONFIG_DERIVED_CLASS is no longer necessary
* Specify the state class you want in the GAME/COMP/CONS line
* The compiler will work out the base class where the driver init member is declared
* There is one static device type object per driver rather than one per machine configuration

Use DECLARE_DEVICE_TYPE or DECLARE_DEVICE_TYPE_NS to declare device type.
* DECLARE_DEVICE_TYPE forward-declares teh device type and class, and declares extern object finders.
* DECLARE_DEVICE_TYPE_NS is for devices classes in namespaces - it doesn't forward-declare the device type.

Use  DEFINE_DEVICE_TYPE or DEFINE_DEVICE_TYPE_NS to define device types.
* These macros declare storage for the static data, and instantiate the device type and device finder templates.

The rest of the changes are mostly just moving stuff out of headers that shouldn't be there, renaming stuff for consistency, and scoping stuff down where appropriate.

Things I've actually messed with substantially:
* More descriptive names for a lot of devices
* Untangled the fantasy sound from the driver state, which necessitates breaking up sound/flip writes
* Changed DECO BSMT2000 ready callback into a device delegate
* Untangled Microprose 3D noise from driver state
* Used object finders for CoCo multipak, KC85 D002, and Irem sound subdevices
* Started to get TI-99 stuff out of the TI-990 directory and arrange bus devices properly
* Started to break out common parts of Samsung ARM SoC devices
* Turned some of FM, SID, SCSP DSP, EPIC12 and Voodoo cores into something resmbling C++
* Tried to make Z180 table allocation/setup a bit safer
* Converted generic keyboard/terminal to not use WRITE8 - space/offset aren't relevant
* Dynamically allocate generic terminal buffer so derived devices (e.g. teleprinter) can specify size
* Imporved encapsulation of Z80DART channels
* Refactored the SPC7110 bit table generator loop to make it more readable
* Added wrappers for SNES PPU operations so members can be made protected
* Factored out some boilerplate for YM chips with PSG
* toaplan2 gfx
* stic/intv resolution
* Video System video
* Out Run/Y-board sprite alignment
* GIC video hookup
* Amstrad CPC ROM box members
* IQ151 ROM cart region
* MSX cart IRQ callback resolution time
* SMS passthrough control devices starting subslots

I've smoke-tested several drivers, but I've probably missed something.  Things I've missed will likely blow up spectacularly with failure to bind errors and the like.  Let me know if there's more subtle breakage (could have happened in FM or Voodoo).

And can everyone please, please try to keep stuff clean.  In particular, please stop polluting the global namespace.  Keep things out of headers that don't need to be there, and use things that can be scoped down rather than macros.
It feels like an uphill battle trying to get this stuff under control while more of it's added.
2017-05-14 21:44:11 +10:00
Lord-Nightmare
3d18cb2faa Add preliminary Sharp SM590 CPU core [Lord Nightmare, hap] 2017-05-09 14:24:39 -04:00
Vas Crabb
fb087b6c92 Cherry-pick some features from self-registering drivers PoC:
* Use size_t for sizes and <algorithm> for algorithms
* Fix up some files that were getting linked into multiple libs
* Add missing virtual method to sh2 peripheral class
* Put shortname in driver struct for locality
* Use shared pointers in config LRU cache for safety
2017-02-16 12:20:35 +11:00
ajrhacker
a59a5cbbb5 preliminary TLCS-870 disassembler - Work in Progress (#1967) 2017-02-05 16:36:06 -05:00
Vas Crabb
06e22ce79d m6805: added skeleton CMOS devices
* Added m146805 and m68hc05 to unidasm
* Made opcode tables configurable in m6805_base_device, provided tables for HMOS, CMOS and HC families
* Implemented MUL instruction, made unimplemented STOP and WAIT raise fatal error
* Added skeleton MC68HC05C4 with RAM and ROM in correct locations in memory map
2017-01-30 23:10:51 +11:00
R. Belmont
5bb61a8965 Merge pull request #2016 from pmackinlay/interpro
Interpro
2017-01-24 14:02:51 -05:00
Patrick Mackinlay
875f3c9d12 initial pull request 2017-01-24 21:53:51 +07:00
R. Belmont
da169d7fe0 Merge pull request #2002 from wilbertpol/hcd62121
hcd62121/cfx9850: several small cleanups (nw)
2017-01-20 15:29:12 -05:00
Wilbert Pol
fc16e06975 hcd62121: several small cleanups (nw) 2017-01-19 22:50:30 +01:00
Curt Coder
9d371eb5ba cop400: Properly separated COP444L from COP444C. [Curt Coder] 2017-01-16 22:06:11 +02:00
Curt Coder
af0805d848 cop400: Removed non-working, incomplete COP440 code. (nw) 2017-01-16 20:13:31 +02:00
Vas Crabb
02d69ca65a m6805: refactoring and improvements
* Moved 68705 devices into their own file.
* Made P3, P5 and U3 variants and made them load bootstrap ROMs.
* Implemented EPROM control (write is stubbed out with a logerror).
* Implemented differences for open drain I/O ports.

(nw) Base device with peripherals should really derive from the 6805
device directly, not the 68705 devices, as I/O ports are present on mask
devices (e.g. 6805P2).  All drivers and devices that were using
M68705_NEW have been changed to M68705P5 - someone who knows the drivers
better should fix them up.
2017-01-12 19:05:12 +11:00
Ville Linde
dbcf903c78 Added preliminary MB86235 recompiler [Ville Linde] 2016-12-17 22:09:09 +02:00
Nathan Woods
dc4086847a Put necv_dasm_one() into a header file 2016-11-16 08:07:33 -05:00
fulivi
5f54097e53 nanoprocessor: initial support. Disassembler only is known to work at this point. 2016-11-03 14:52:41 +01:00
Nathan Woods
293bfef845 Merging Konami disassembler with M6809/HD6309 disassemblers 2016-10-23 21:27:45 -04:00
Nathan Woods
81294aa08f Merged the M6809 and HD6309 disassemblers, and changed to properly use streams 2016-10-23 18:03:36 -04:00
angelosa
f4749d03f7 Base WatchDog Timer device 2016-09-27 18:36:59 +02:00
angelosa
f6ad513ab0 Written stub SH7604 BUS device (not hooked up to SH2 yet). 2016-09-27 16:21:54 +02:00
Miodrag Milanovic
a9e89e4f17 Fixed separate compile of drivers using sharc/ADSP21062 cpu (nw) 2016-07-23 11:10:17 +02:00
therealmogminer@gmail.com
ff04ed4cc0 Convert SPARCv8 ops to document-described functionality 2016-06-23 14:20:24 +02:00
Vas Crabb
a1625d2220 improve SPARC disassembler: [Vas Crabb]
* Support SPARCv9
* Allow plug-in ASI comments
* Fix format of some opcodes
* Produce clr synthetic
* Allow running in v7, v8 and v9 modes
2016-06-22 04:39:56 +10:00
therealmogminer@gmail.com
6d50e3cb36 Add majority of SPARC integer ops 2016-06-18 13:37:06 +02:00
therealmogminer@gmail.com
579d4873a6 Initial MB86901 diassembler 2016-06-17 15:09:39 +02:00
hap
396c2a0946 fix compile problem 2016-06-05 21:46:48 +02:00
Ville Linde
958731ef5a Added highly experimental SHARC recompiler (disabled by default) [Ville Linde] 2016-05-28 18:58:54 +03:00
Felipe Corrêa da Silva Sanches
deb38446ea Further improvements to the Patinho Feio driver & CPU 2016-05-25 10:32:24 -03:00
hap
262524206b tms7000/e0c6200: renamed hxx(inc) to cpp 2016-05-01 21:39:40 +02:00
Miodrag Milanovic
be67262fc2 INC -> HXX makes editors and code analyzers see it as C++ (nw) 2016-05-01 20:27:50 +02:00
Miodrag Milanovic
13855d2404 Fixed ti drivers (nw) 2016-05-01 12:55:22 +02:00
Miodrag Milanovic
a0829452f1 fix for mb86235 (nw) 2016-05-01 11:06:06 +02:00
Miodrag Milanovic
949fddaaa8 hec2hrp and arcompact fix (nw) 2016-05-01 09:51:51 +02:00
Miodrag Milanovic
50361fcc23 R3000 is separate CPU, helps building some drivers with SOURCES (nw) 2016-04-28 18:26:37 +02:00
Olivier Galibert
5607ec442e h8: Add dtc, dma, watchdog (WIP) [O. Galibert]
h8: Fixes, lots of [O. Galibert]
cybiko: Make work a little emore, add v1 flash [O. Galibert]
2016-04-27 21:55:58 +02:00
Miodrag Milanovic
e55035391e fix for v25 building (nw) 2016-04-23 14:38:20 +02:00
hap
d981b66bba sm500: start on opcodes 2016-04-11 12:43:55 +02:00
hap
10cadefbe2 sm500 file placeholders 2016-04-05 11:33:05 +02:00
Miodrag Milanovic
9b3788035c scrclean on lua scripts (nw) 2016-03-29 08:49:47 +02:00
hap
d76a9644cf tms1k: split part 3, done 2016-03-16 02:59:29 +01:00
hap
1a479042cf tms1k: split part 2, renamed folder tms0980 to tms1000 2016-03-16 01:33:56 +01:00
hap
ce5cb07631 tms1k: split part 2, renamed files 2016-03-16 01:26:37 +01:00
AJR
0d8df9d595 Make generic VTLB implementation a modern device interface (nw) 2016-02-07 01:42:58 -05:00
Miodrag Milanovic
700683468a Removed dead PPC code (nw) 2015-12-09 10:25:40 +01:00
Felipe Corrêa da Silva Sanches
0618c642ba adding a basic machine driver for the Patinho Feio and setting up build system for the driver and the CPU module 2015-12-06 13:32:03 -02:00
Miodrag Milanovic
1fe2587c86 This one is not used in compile (nw) 2015-11-15 12:20:35 +01:00
Miodrag Milanovic
0f8471d937 Finished adding to lua, some included cpp renamed to inc (nw) 2015-11-12 15:00:07 +01:00
Miodrag Milanovic
5deec43cbc update build scripts for rename c - > cpp (nw) 2015-11-08 13:26:29 +01:00