Commit Graph

55388 Commits

Author SHA1 Message Date
AJR
bc6c34e784 swtpc09: Much saner implementation of DAT banking (nw) 2017-11-30 23:50:38 -05:00
AJR
dcba5a1edc swtpc09: Memory banking modernization (nw) 2017-11-30 22:17:14 -05:00
AJR
0a22db8f2b swtpc09: Change baud clock to MC14411; clean up some shared code (nw) 2017-11-30 20:49:46 -05:00
AJR
fc87d24cf6 swtpc: Preliminary SS-50 I/O bus 2017-11-30 19:37:07 -05:00
AJR
45f27ffaab validity.cpp: Prevent insane recursion when multiple slot devices have the same tag (nw) 2017-11-30 19:34:03 -05:00
Robbbert
c00efe9e95 (nw) debugcmd : exiting isn't an error 2017-12-01 10:25:54 +11:00
Olivier Galibert
08e2b24551 Reset m_dasm on source switch (nw) 2017-11-30 20:08:18 +01:00
Olivier Galibert
585460619b Fix non-initialized member of debugcpu (nw) 2017-11-30 19:40:41 +01:00
Vas Crabb
199f92a2b0 (nw) misc cleanup: start replacing auto_alloc_* with smart pointers, get
rid of reference constants in the debugger in favour of capturing the
value in the bind/lambda (less ugly casting)
2017-12-01 05:34:53 +11:00
AJR
19addd3df5 poly88.cpp: Update notes (nw) 2017-11-30 11:29:42 -05:00
Dirk Best
02ba6e2b99 micro3d: Add terminal to the DrMath board 2017-11-30 16:58:31 +01:00
Vas Crabb
4f7e8703c8 MCS-40 is paged (nw) 2017-12-01 02:42:59 +11:00
Robbbert
0ade7803cb (nw) hg_frd : added devices 2017-12-01 02:04:05 +11:00
MetalliC
bc34e45957 typo (nw) 2017-11-30 15:50:05 +02:00
Vas Crabb
87da3c3b5e Better layout views for et3400 including display labels and clickable keypad (github #2862) 2017-11-30 22:31:56 +11:00
Olivier Galibert
7c8a1fa409 Pet peeving with extreme prejudice (nw) 2017-11-30 12:29:32 +01:00
MetalliC
29825789a8 ymz774: assume each sequencer have its own current bank (nw) 2017-11-30 12:51:59 +02:00
MetalliC
f24f509165 ymz774: add sequencer, blind work based on KOF98UM rom data, not tested at all (nw) 2017-11-30 12:24:41 +02:00
Vas Crabb
475cf95575 arm7: fix unaligned 16-bit loads 2017-11-30 19:58:51 +11:00
SSTSylvain
4854fdf2c6 Update MAME French translation 2017-11-30 18:20:16 +11:00
Olivier Galibert
0584df8b9c fixes (nw) 2017-11-30 08:12:28 +01:00
briantro
be8d7e2908 zn.ccp: Accurate information about rom labels for the Judge Dredd sets (nw) 2017-11-30 00:21:45 -06:00
Ivan Vangelista
0a9ecfb75d cdi.cpp: decapped and dumped quizard3 MCU [Team Europe] 2017-11-30 07:15:42 +01:00
Justin Kerk
7541310165 New working software list additions
-----------------------------------
ibm5150: A-10 Tank Killer (1.1), A-10 Tank Killer (1.5), IBM Personal Computer DOS (Version 1.10, Master diskette), IBM Personal Computer DOS (Version 2.00, Master diskette), IBM Personal Computer DOS (Version 2.10, set 3) [Justin Kerk]
ibm5170: 1869 - Erlebte Geschichte Teil I (German), Classic Road 2 [Justin Kerk]

New NOT_WORKING software list additions
---------------------------------------
ibm5170: 1942 - The Pacific Air War [Justin Kerk]
2017-11-29 21:40:29 -08:00
AJR
970ec09d1e rs232: Add DCE RxC/TxC callbacks (untested) and table of standard signals (nw) 2017-11-30 00:30:51 -05:00
MetalliC
7c314ec44d
Merge pull request #2869 from DavidHaywood/251117
new NOT WORKING
2017-11-30 06:08:46 +02:00
R. Belmont
7e9d2f8f44
Merge pull request #2705 from katananja/patch-3
Update for Brazilian Portuguese
2017-11-29 21:51:19 -05:00
David Haywood
a319b456c9 new NOT WORKING
The King of Fighters '98: Ultimate Match HERO (China, V100, 09-08-23) [ Peter Wilhelmsen, Morten Shearman Kirkegaard, David Haywood]
2017-11-30 01:38:30 +00:00
Vas Crabb
c9dd10f1d9 fix build (nw) 2017-11-30 12:07:52 +11:00
hap
0f361b73b0 New working machine added
--------
Fidelity Designer Mach III Master 2265 [hap, yoyo_chessboard]
2017-11-29 23:19:03 +01:00
cracyc
5d72416979
Update alphatpx.cpp 2017-11-29 15:45:03 -06:00
cracyc
8d870b5c63 alphatpx: fix more keys (nw) 2017-11-29 14:46:00 -06:00
Olivier Galibert
b709fb78df Fix save 2017-11-29 20:19:09 +01:00
cracyc
de2c6d95fa
Update terminals.cpp 2017-11-29 11:00:51 -06:00
cracyc
5ff96b9691 new not working machines
--------------
Triumph-Adler alphatronic P2 [rfka01, helwie44]
Triumph-Adler alphatronic P30 [rfka01, helwie44]

alphatpx: many improvements [rfka01, helwie44, Carl]
2017-11-29 09:52:20 -06:00
Robbbert
4f536b2d0d New Not Working machine : Konami Picno 2017-11-30 01:51:52 +11:00
smf-
57cdf5a9d8 fix for Visual Studio 2017 (nw) 2017-11-29 12:30:09 +00:00
smf-
53eb635ddd remove debug code (nw) 2017-11-29 11:43:22 +00:00
Olivier Galibert
c46e1007a8 emumem: API change [O. Galibert]
* direct_read_data is now a template which takes the address bus shift
  as a parameter.

* address_space::direct<shift>() is now a template method that takes
  the shift as a parameter and returns a pointer instead of a
  reference

* the address to give to {read|write}_* on address_space or
  direct_read_data is now the address one wants to access

Longer explanation:

Up until now, the {read|write}_* methods required the caller to give
the byte offset instead of the actual address.  That's the same on
byte-addressing CPUs, e.g. the ones everyone knows, but it's different
on the word/long/quad addressing ones (tms, sharc, etc...) or the
bit-addressing one (tms340x0).  Changing that required templatizing
the direct access interface on the bus addressing granularity,
historically called address bus shift.  Also, since everybody was
taking the address of the reference returned by direct(), and
structurally didn't have much choice in the matter, it got changed to
return a pointer directly.

Longest historical explanation:

In a cpu core, the hottest memory access, by far, is the opcode
fetching.  It's also an access with very good locality (doesn't move
much, tends to stay in the same rom/ram zone even when jumping around,
tends not to hit handlers), which makes efficient caching worthwhile
(as in, 30-50% faster core iirc on something like the 6502, but that
was 20 years ago and a number of things changed since then).  In fact,
opcode fetching was, in the distant past, just an array lookup indexed
by pc on an offset pointer, which was updated on branches.  It didn't
stay that way because more elaborate access is often needed (handlers,
banking with instructions crossing a bank...) but it still ends up with
a frontend of "if the address is still in the current range read from
pointer+address otherwise do the slowpath", e.g. two usually correctly
predicted branches plus the read most of the time.

Then the >8 bits cpus arrived.  That was ok, it just required to do
the add to a u8 *, then convert to a u16/u32 * and do the read.  At
the asm level, it was all identical except for the final read, and
read_byte/word/long being separate there was no test (and associated
overhead) added in the path.

Then the word-addressing CPUs arrived with, iirc, the tms cpus used in
atari games.  They require, to read from the pointer, to shift the
address, either explicitely, or implicitely through indexing a u16 *.
There were three possibilities:

1- create a new read_* method for each size and granularity.  That
   amounts to a lot of copy/paste in the end, and functions with
   identical prototypes so the compiler can't detect you're using the
   wrong one.

2- put a variable shift in the read path.  That was too expensive
   especially since the most critical cpus are byte-addressing (68000 at
   the time was the key).  Having bit-adressing cpus which means the
   shift can either be right or left depending on the variable makes
   things even worse.

3- require the caller to do the shift himself when needed.

The last solution was chosen, and starting that day the address was a
byte offset and not the real address.  Which is, actually, quite
surprising when writing a new cpu core or, worse, when using the
read/write methods from the driver code.

But since then, C++ happened.  And, in particular, templates with
non-type parameters.  Suddendly, solution 1 can be done without the
copy/paste and with different types allowing to detect (at runtime,
but systematically and at startup) if you got it wrong, while still
generating optimal code.  So it was time to switch to that solution
and makes the address parameter sane again.  Especially since it makes
mucking in the rest of the memory subsystem code a lot more
understandable.
2017-11-29 10:32:31 +01:00
Dirk Best
5676444d8c jvc_dsk: Fix MT #06779 2017-11-29 10:19:03 +01:00
Justin Kerk
1826aa157e New NOT_WORKING software list additions
---------------------------------------
ibm5150: IBM Personal Computer DOS (Version 1.10) (International master disk) [Justin Kerk]
2017-11-28 22:10:26 -08:00
briantro
bf38dfa679 bloodbro.cpp: Remove outdated comment, ROMs were bitswapped, not bad / corrupt (nw) 2017-11-28 22:32:31 -06:00
R. Belmont
ee500b2098
Merge pull request #2861 from DavidHaywood/271117
weststory: verified sprite data by converting original mask rom into …
2017-11-28 21:27:23 -05:00
R. Belmont
b94da90623
Merge pull request #2864 from SSTSylvain/patch-1
Update MAME French translation
2017-11-28 21:26:05 -05:00
R. Belmont
07ef6eba87
Merge pull request #2859 from pmackinlay/interpro
interpro: cpu and mmu improvements
2017-11-28 21:24:55 -05:00
Vas Crabb
f9609d1487 goodbye strcmp, hello polymorphism (nw) 2017-11-29 13:01:11 +11:00
Scott Stone
3a4ad35721 Demoted brdrlinet due to bad rom dump (never should have been considered working) (nw) 2017-11-28 19:31:52 -05:00
Vas Crabb
d556b01583 Merge branch 'master' into release0192 2017-11-29 08:50:34 +11:00
Vas Crabb
d771f54227 version bump (nw) 2017-11-29 05:24:46 +11:00
smf-
45cbbc5f0a fix TLCS870 disassembly (nw) 2017-11-28 17:37:47 +00:00