Commit Graph

1132 Commits

Author SHA1 Message Date
Aaron Giles
b3a8dd2113 Oops, fixed misaligned 32-bit accesses in RSP DRC.
Also  disabled DRC_SQV implementation as it breaks music in mtetrisc.
2010-01-01 00:16:45 +00:00
Aaron Giles
289a309cd3 Cleanups and version bump. 2009-12-31 22:03:37 +00:00
Phil Bennett
f7b4dbfea1 Fixed x86 HLT instruction handling [Phill Harvey-Smith]
Date: Mon, 28 Dec 2009 00:29:31 +0000
From: Phill Harvey-Smith <afra@aurigae.demon.co.uk>
To: submit@mamedev.org
Subject: i86 patch

Hi,

Attatched is a patch correcting the operation of the hlt instruction in 
the i86 core. I have done test builds with both the current mame and 
mess source for both debug and normal builds, and all seems to be ok.

Cheers.

Phill.

-- 
Phill Harvey-Smith, Programmer, Hardware hacker, and general eccentric !

"You can twist perceptions, but reality won't budge" -- Rush.
2009-12-31 00:56:09 +00:00
Ryan Holtz
c0d0d89d1b Fixed a few DRC-ized vector load/store opcodes in the RSP core. [Harmony] 2009-12-30 07:56:09 +00:00
Aaron Giles
152d8a7db0 Explicitly sign-extend 32-bit indexes for load/loads/store on 64-bit
machines to prevent overflow issues. Fixes DRC crash in mtetrisc.
2009-12-30 06:51:42 +00:00
Aaron Giles
31c7c2c219 Fixed error in codegen for drol/dror opcodes in the x86 back-end.
Re-implemented misaligned memory handling in the RSP DRC as before.
2009-12-30 06:19:08 +00:00
Aaron Giles
ad010bc54e Fix some errors the 4.4.3 compiler complains about in C++ mode. 2009-12-30 02:57:38 +00:00
Roberto Zandona
1284b17000 added two opcodes in the nec cpu; this is a temporary fix; we need to check if cb2001 use a custom cpu; in this case we need to split different cpu
cb2001: added more opcodes
2009-12-29 21:39:49 +00:00
Aaron Giles
81523f2e10 gcc 4.5.0 compilation fixes. 2009-12-29 14:35:54 +00:00
Ryan Holtz
50fbe1b27c Fixes the debug build. 2009-12-28 22:08:29 +00:00
Ryan Holtz
7858c436fc Converted a number of vector opcodes to the RSP DRC core. [Harmony]
Unrolled and optimized a number of vector opcodes in the interpreter RSP core. [Harmony]
2009-12-28 16:50:06 +00:00
Aaron Giles
45d1ff4d1e Cleaned up braces in the code so that they are properly balanced. [Atari Ace] 2009-12-28 09:09:20 +00:00
Aaron Giles
bd24fb23c1 Results of running the latest srcclean. 2009-12-28 09:04:00 +00:00
Aaron Giles
f20a2e6b17 Fixes so we can compile as C++ again. 2009-12-28 07:34:17 +00:00
Aaron Giles
c285eb9bcd Cleanups and version bump. 2009-12-23 18:10:25 +00:00
Aaron Giles
79b8f09ad8 From: Samuele Zannoli <samuele.zannoli@sparkbio.it>
Date: Tue, Dec 22, 2009 at 11:57 AM
Subject: Core for PIC 16c62x series of processors
To: submit@mamedev.org


Hello,
         this patch contains a core for the PIC 16c62x series of processors.

It has been made starting from the pic16c5x that is already present.
This version stil misses the various internal devices, however the
opcodes and i/o ports work, and it is enough to run the emulation of
the security pics used with the gd-roms.

Bye,
       Samuele Zannoli
2009-12-23 18:01:49 +00:00
Aaron Giles
505f0d7caf From: Atari Ace <atari_ace@verizon.net>
Date: Tue, Dec 22, 2009 at 4:44 PM
Subject: [patch] Fix srcclean/src2html bugs, misbalanced tokens and
visible whitespace errors
To: submit@mamedev.org
Cc: atariace@hotmail.com


Hi mamedev,

While experimenting with srcclean and src2html as indentation
validators, I stumbled across a couple of bugs.  The first is that
srcclean doesn't properly handle /*...*//.  It sees the last / char at
the end as the second / of an inline comment, where it might be a
division token or the start of either type of comment.

The second bug is that src2html improperly handles strings with
embedded quotes preceded by escaped backslashes, e.g. "ab\\\"cd".  It
believes the string terminated in the middle, and the last quote
starts a new string.  This issue is unlikely in actual code, but
should be handled correctly.

The first patch fixes these, and a some cases where there are
dangling/missing tokens which my validation tools are noticing.  These
occur in some unused macros, dead code sections, and in some macros
that are deliberately misbalanced (v9938.c, psx.c).  In the deliberate
cases, I balanced the braces by making exactly one open and one close
macro and using those throughout.

The second patch is then a set of visible whitespace "problems". Cases
where the closing brace isn't at the same indent level as the open
brace, and some cases where the indent level isn't a multiple of four.
In the case of ssv.c I folded the assignments into init_ssv() to
simplify the code and restore the brace balance, otherwise I kept to
simply adding or removing whitespace.

~aa
2009-12-23 17:59:08 +00:00
Aaron Giles
a825a2427f ---------- Forwarded message ----------
From: Barry Rodewald <bsr@xnet.co.nz>
Date: Wed, Dec 23, 2009 at 2:37 AM
Subject: Yet more i386 fixes
To: submit@mamedev.org


Hi,

Here's two more small i386 fixes.

First, is an implementation of the LSL protected mode instruction.
While it's far from perfect (ie: it doesn't check for anything other
than a null segment selector), it does help get a little bit further
for some FM Towns applications.

Second, is a fix for the REP instruction when used with a segment
prefix.  Essentially, it reverses the use of the segment_override and
segment_prefix variables compared to other instructions.  This fixes
sprite data copied into sprite RAM on the FM Towns version of Raiden
Trad.

Thanks,
Barry Rodewald
mailto:bsr@xnet.co.nz
2009-12-23 17:53:33 +00:00
Aaron Giles
d0af9ba1e8 First round of fixes for post-initialization allocs.
In the process, converted 7474, 74148, and 74153 to
devices.
2009-12-20 23:57:25 +00:00
Aaron Giles
30d57e3f48 Minor drc improvments:
- simplified RSP's misaligned memory accesses
 - removed now-unnecessary shifts from direct memory accesses in
    mips3/powerpc drcs
 - optimized AND with 0xff/0xffff/0xffffffff cases for x86/x64
 - added rudimentary memory/register tracking in x86 backend to
    remove redundant loads
2009-12-20 15:21:26 +00:00
Aaron Giles
c3fb047204 Added new profiler bucket for DRC recompilation.
Removed a number of extraneous sign extensions from the RSP DRC.
2009-12-19 08:50:34 +00:00
Ryan Holtz
2e65d4a968 RSP recompiler improvements / optimizations: [Harmony]
- Split SATURATE_ACCUM into a signed and unsigned version to reduce stack usage.
 - Corrected an issue with the 0h variants of VMRG, VAND, VNAND, VOR, VNOR, VXOR and VNXOR.
 - Slightly optimized unaligned reads and writes
 - Optimized unaligned dword reads
 - Corrected an issue where badly-written RSP programs could jump to invalid addresses
2009-12-18 23:14:19 +00:00
Miodrag Milanovic
ef4d608713 SCMP assert fix (No whatsnew is needed) 2009-12-18 11:55:30 +00:00
Ryan Holtz
0534f875b9 Fixing the RSP disassembler, no whatsnew. 2009-12-17 02:18:15 +00:00
Ryan Holtz
f9045e7268 [RSP] Preliminary RSP recompiler, with all vector ops stubbed out to C functions for now. [Harmony] 2009-12-16 23:26:58 +00:00
Aaron Giles
8bccdbd5cc Enhanced the UML opcodes for LOAD, LOADS, and STORE to support
arbitrary scaling factors. Previously, specifying a size implied
a scaling factor equal to the size (i.e., specifying DWORD meant
the index was scaled by 4). This is still the default. However,
now you can specify the scale explicitly for other cases. For
example, you can specify DWORD_x1 to fetch a DWORD but don't
scale the index at all, or BYTE_x8 to fetch a BYTE while scaling
the index by 8. Updated all backends to make this work.
2009-12-13 20:01:26 +00:00
Phil Bennett
907c61c43e i386 core improvements: [Barry Rodewald]
* Fixed EIP displacement when executing FPU instructions with no 80387 present
* Added 32-bit implementations of SLDT and STR


---------- Forwarded message ----------
From: Barry Rodewald <bsr@xnet.co.nz>
Date: Wed, Dec 9, 2009 at 2:02 AM
Subject: More i386 fixes
To: submit@mamedev.org


Hi,

Here's two more small fixes for the i386 core.

First, is FPU instructions used on 80386.  On a system without a
80387, FPU instructions should have no effect.  Part of the FM Towns
TBIOS (runs as an MS-DOS device driver, providing extra system
functions) initialises the FPU, and tries to detect it.  Upon hitting
the FSTCW instruction, though, it doesn't increase EIP enough when an
extra displacement byte is needed.  So, I've added a call to GetEA to
the escape() function (called when there is no FPU) which will fetch
the extra byte if necessary.

Second, is a 32-bit implementation of the SLDT and STR instructions.
Basically, I copied it from the 16-bit versions, and modified it to
use 32-bit registers.

Thanks,
Barry Rodewald
mailto:bsr@xnet.co.nz
2009-12-10 09:12:35 +00:00
Phil Bennett
c8608dcc22 Cleaned-up several drivers; added missing prototypes and removed dead ones,
marked non-exported functions as static and removed cases of #include "deprecat.h" [Atari Ace]

---------- Forwarded message ----------
From: Atari Ace <atari_ace@verizon.net>

Date: Sat, Dec 5, 2009 at 7:18 AM
Subject: [patch] Header cleanups
To: submit@mamedev.org
Cc: atariace@hotmail.com

Hi mamedev,

This patch improves the quality of the mame driver headers, by adding
missing prototypes and source comments, removing dead prototypes, and
marking some non-exported functions as static within the drivers.  It
also eliminates about a dozen cases of #include "deprecat.h".

~aa
2009-12-08 14:54:29 +00:00
Phil Bennett
54570e176e Fixed srcclean handling of embedded comments within strings [Atari Ace]
(Update of r7501)

---------- Forwarded message ----------
From: Atari Ace <atari_ace@verizon.net>
Date: Sun, Dec 6, 2009 at 5:51 PM
Subject: [patch] srcclean bugfix
To: submit@mamedev.org
Cc: atariace@hotmail.com


Hi mamedev,

My srcclean changes to track C-style quotes didn't handle all the
special cases correctly (for instance, '\"' and "\\\"").  This fixes
it, and adds some /* ... */ to m68k_in.c so that src2html.exe does a
better job on it.

~aa
2009-12-07 11:13:54 +00:00
Aaron Giles
fd34a32091 Added new functions:
memory_install_ram() to assign a un-named bank to a region and specify
    a pointer to where the RAM lives. If this is called in the DRIVER_INIT
    function or MACHINE/SOUND/VIDEO_START functions, then it is permissible
    to specify NULL, in which case the memory system will allocate memory
    and register it for save states.

  memory_install_rom() is like the above except that it only installs a
    read handler.

  memory_install_writeonly() is like the above except that it only installs
    a write handler.

Updated several instances in the code that were assigning banks to these
sorts of static RAM regions and simplified the code.

Also fixed several regressions reported by Tafoid.
2009-12-07 08:32:02 +00:00
Aaron Giles
0fd8c755ff Memory shares are now specified by tag instead of index.
The AM_SHARE() macro now takes a tag parameter. All existing
shares have been bulk renamed to "share##". However, the name
does not matter, so please use descriptive tags going forward.

Also added tag validation for bank and share tags.

Added flag to tagmap_add functions that optionally will
replace existing objects if a duplicate is found.
2009-12-05 20:19:04 +00:00
Aaron Giles
ee315fe99d Renamed functions:
memory_install_read/write_port_handler -> 
        memory_install_read/write_port

   memory_install_read/write_bank_handler -> 
        memory_install_read/write_bank
2009-12-05 07:59:31 +00:00
Aaron Giles
9eda9e163e More memory system cleanup. Removed SMH_* macros entirely. In
their place are a series of expanded macros and new memory
installation helpers. Some mappings below (not all are new):

   AM_READ(SMH_RAM)                       -> AM_READONLY
   AM_WRITE(SMH_RAM)                      -> AM_WRITEONLY
   AM_READWRITE(SMH_RAM, SMH_RAM)         -> AM_RAM
   AM_READ(rhandler) AM_WRITE(SMH_RAM)    -> AM_RAM_READ(rhandler)
   AM_READ(SMH_RAM) AM_WRITE(whandler)    -> AM_RAM_WRITE(whandler)
   AM_DEVREAD(tag, rhandler) AM_WRITE(SMH_RAM) 
                                  -> AM_RAM_DEVREAD(tag, rhandler)
   AM_READ(SMH_RAM) AM_DEVWRITE(tag, whandler) 
                                  -> AM_RAM_DEVWRITE(tag, whandler)

   AM_READ(SMH_ROM)                       -> AM_ROM
   AM_WRITE(SMH_ROM)                      -> (was a no-op)

   AM_READ(SMH_NOP)                       -> AM_READNOP
   AM_WRITE(SMH_NOP)                      -> AM_WRITENOP
   AM_READWRITE(SMH_NOP, SMH_NOP)         -> AM_NOP

For dynamic memory handler installation of the various types,
use the new functions:

   memory_unmap_read()
   memory_unmap_write()
   memory_unmap_readwrite() -- unmaps a section of address space

   memory_nop_read()
   memory_nop_write()
   memory_nop_readwrite() -- nops a section of address space

Cleaned up the internals of the address_map_entry structure, and
also normalized the way the address map macros work to remove a
lot of redundancy.
2009-12-05 07:54:11 +00:00
Aaron Giles
0069237f20 Memory banks are now referenced by tag rather than index.
Changed all memory_bank_* functions to specify a tag.
Bulk-converted existing banks to be tagged "bank##" in
order to ensure consistency. However, going forward, the
tags don't matter, so please name them something useful.

Added AM_BANK_READ/AM_BANK_WRITE macros to let you specify
bank tags. Also changed AM_ROMBANK and AM_RAMBANK macros to
accept tags as well.

Added new functions memory_install_read_bank_handler and
memory_install_write_bank_handler to install banks by tag
name, similar to input ports.

Changed internals of memory system to dynamically allocate
all banks. The first time a bank with an unknown tag is
installed, a new bank object is created and tracked 
internally. Removed all SMH_BANK(n) references outside of
the main code; these should never, ever be useful anymore.
2009-12-03 08:16:38 +00:00
Jonathan Gevaryahu
5dffcb6c6c mostly resolved mix of intel and motorola notation in tms32025 disassembler 2009-12-02 15:32:57 +00:00
Fabio Priuli
0180f1b0a8 > Subject: Fix for cp1610 cpu
>
> The cp1610 CPU is only used by the Intellivision (in MESS). However the
> disassembler produces garbage. Also I noticed a tiny error in the CPU
> itself.
>
> Here are the fixes:
>
> Firstly, the CPU, a one-line change. In cp1610.c, at line 3515, you may
> notice that 2 flags are sharing the same bit. Please change the V flag
> to
> use 0x20 (instead of 0x10). That's all there.
>
> Next, the disassembler. It assumes oprom to be 16 bits when in fact it
> is 8.
> I could not see a way of specifying the size of oprom, so assuming it
> is
> always 8 bits. If that's the case, please replace 1610dasm.c with the
> enclosed one.
>
> Thanks and have a great day :)
>
> - Robbbert
2009-12-01 10:56:41 +00:00
R. Belmont
5dc02c1d32 Fix assert on valid 68k variant. (no credit necessary) 2009-12-01 01:41:41 +00:00
Aaron Giles
b5c3081f3e Cleanups and version bump. 2009-11-30 01:46:32 +00:00
Phil Bennett
a6dc556396 Fixed i386 REP prefix to use segment:SI when address size is 16-bit (ie: when using OUTSB or OUTSW). [Barry Rodewald]
---------- Forwarded message ----------
From: Barry Rodewald <bsr@xnet.co.nz>
Date: Sat, Nov 28, 2009 at 6:55 AM
Subject: Another i386 fix
To: submit@mamedev.org


Hi,

Small fix this time.  This fixes an issue with the FM Towns version of
MS-DOS where it was feeding nonsense parameters to the CD-ROM
controller.  MS-DOS uses REP OUTSB to send the parameters, and I
noticed that the expected data was not what was sent to the I/O port.
Looking at the i386 code, I saw that it always used segment:ESI,
regardless of address size.  This fix makes it use segment:SI when
address size is 16-bit (ie: when using OUTSB or OUTSW).

Patch is based on 0.135u1.

Thanks,
Barry Rodewald
mailto:bsr@xnet.co.nz
2009-11-28 18:26:43 +00:00
Miodrag Milanovic
149c6aa7ca CF clear after binary operations on Intel 8008 CPU core 2009-11-26 09:37:12 +00:00
R. Belmont
c80aaff52c Fixed GCC compile error in SC/MP.
I assumed the as-edited line was the intent of the code, if not Micko will need to fix it :)
2009-11-23 17:44:36 +00:00
Miodrag Milanovic
7b1aa92c4d INS 8060 SC/MP II support (using clock divider 2), main model renamed to INS 8050 SC/MP 2009-11-23 11:19:15 +00:00
Miodrag Milanovic
d98fa09e1f Added Intel 8008 and National Semiconductor SC/MP CPU cores 2009-11-23 08:19:29 +00:00
Wilbert Pol
bcd6cff1fe tms7000: Fixed disassembly of PCREL addressing mode. 2009-11-20 18:53:06 +00:00
Aaron Giles
f0cdba5b11 Cleanups and version bump. 2009-11-20 06:50:40 +00:00
Aaron Giles
ad062c9e43 Fix TLBMOD exceptions so they also properly set BadVAddr. 2009-11-18 15:46:52 +00:00
Aaron Giles
693024974e Fix assertion in DRC. 2009-11-18 06:12:50 +00:00
Aaron Giles
aeca44b1ca Fix PowerPC 603 translation so it doesn't get stuck in an infinite
loop after the first fixup.
2009-11-17 15:43:06 +00:00
Aaron Giles
39957739fd Fix broken DRC logging. 2009-11-17 15:40:48 +00:00
Aaron Giles
ccefa6749d MIPS3 TLB fixes:
- fixed bug in vtlb code that caused us to lose track of previously
    registered fixed page ranges
 - fixed MIPS3 behavior that would not clear out invalid page ranges
    from the VTLB under certain circumstances
 - added support for TLB sizes less than 48 entries
2009-11-17 06:09:38 +00:00
Aaron Giles
19bf1b46ea MIPS3 TLB fixes:
- now properly generating TLB fill exceptions under correct circumstances
 - TLB exceptions no longer trash low 4 bits of Context
 - exceptions with the EXL bit set always go to vector 0x180
2009-11-16 06:45:54 +00:00
Ryan Holtz
2a9387c49d Reverting bad fix 2009-11-16 02:45:46 +00:00
Ryan Holtz
4cef27ecc9 - Fixed Context usage and TLB exception vectors in the MIPS core [Harmony] 2009-11-16 00:04:37 +00:00
R. Belmont
fa216ba6f9 MC680x0 update
- Reworked PMMU/core interface so PMMU now sees all cop 0 instructions
- Improved disassembly of PMMU instructions
- Preliminary 68LC040 support
- Fixed disassembly for EC/LC variants of '030/'040
2009-11-14 18:28:47 +00:00
Ryan Holtz
6df78b8321 Added missing BLTZAL opcode to the RSP core. [angrylion] 2009-11-12 22:47:57 +00:00
Phil Bennett
448de6a3e9 i386 core fixes: [Barry Rodewald]
* Added Nested Task flag, and I/O Privilege flags.  They aren't
  implemented in any way, but can now be set or reset.  Can be used to
  detect a 80386 or later CPU.
* Implemented ENTER instruction.
* Made IRQ vectors treated as 8 bytes when in protected mode, and made
  the addresses pushed onto the stack 32-bit if the gate descriptor used
  is a 386 interrupt or trap gate (also when in protected mode, will
  always be 16-bit if in real mode).


---------- Forwarded message ----------
From: Barry Rodewald <bsr@xnet.co.nz>
Date: Tue, Nov 3, 2009 at 10:12 PM
Subject: i386 update
To: submit@mamedev.org


Hi,

Here's a few small fixes for the i386 core, based from the work I've
been doing on emulating the FM Towns in MESS.  Mostly based from the
i386 Programmer's Reference Manual.

The fixes are as follows:

* Added Nested Task flag, and I/O Privilege flags.  They aren't
implemented in any way, but can now be set or reset.  Can be used to
detect a 80386 or later CPU.

* Implemented ENTER instruction, this is used by the FM Towns version of MS-DOS.

* Made IRQ vectors treated as 8 bytes when in protected mode, and made
the addresses pushed onto the stack 32-bit if the gate descriptor used
is a 386 interrupt or trap gate (also when in protected mode, will
always be 16-bit if in real mode).

I've tested a few i386 games (Seibu SPI, PC-AT, and Wolf System) in
MAME 0.135, with no obvious regressions.

Diff is based on MAME 0.135.

Thanks,
Barry Rodewald
mailto:bsr@xnet.co.nz
2009-11-05 13:17:33 +00:00
Andrew Gardner
45dfc2315a Adds save state support to plygonet.c and the DSP56156 CPU core. 2009-11-04 05:20:00 +00:00
Dirk Best
3cfb47f7dd Z80: Check for NOP in interrupt mode 0. This allows code like ei / halt / di to work correctly. A better solution would be to implement full support for arbitrary opcodes in mode 0. 2009-11-03 16:54:46 +00:00
Jonathan Gevaryahu
19ea3c4ef9 Change to consistently use Intel notation for hex values in TMS32010 disassembler, rather than a mix of Motorola and Intel notation. 2009-11-02 23:15:40 +00:00
Aaron Giles
5ecfb2044b Cleanups and version bump. 2009-10-31 22:47:46 +00:00
Aaron Giles
a2a25f17e3 Changed 32010 unknown opcode to output in $xxx format like
all other hex values.
2009-10-31 19:50:29 +00:00
Andrew Gardner
e2bcc78b99 Changes to the dsp56156 cpu core. [Andrew Gardner]
* Added JF table decode function.
* Added ABS, IMAC, and TFR2 opcodes.
* Fixed various flags for TST, INC24, SUB, CMP, and CMPM.
* Added hack to DO function to accommodate for the CPU core's inaccurate math.


(Polygonet Commanders goes 'ingame' yet again, but it's because of a hack I added 
to the hardware DO function to ignore negative values.  The do loop, of course, should 
not be getting negative values, but that will require accurate math functions with 
accurate rounding and limiting, and I'm not there yet.  Oddly enough, i've also
broken the sky ROZ layer.)
2009-10-30 09:05:47 +00:00
R. Belmont
55c2b7c84a 680x0 update:
- Support PMOVE modes from PMMU
- Allow the FPU to be used for both '030 and '040
- Add byte and word FPU loads/stores
- Fixed buggy FPU 64-bit stores in the (An) addressing mode


If anyone has any ideas on how to sanely handle the 68k FPU's 96-bit "take
that, Intel" mode let me know ;-)
2009-10-28 02:31:21 +00:00
Phil Bennett
2055d5b438 03487: All Drivers using z180 cpu: Access Violation [Phil Bennett]
Should fix the compile warning/error too.
2009-10-26 19:54:03 +00:00
Aaron Giles
eb2ba6cf6c Cleanups and version bump. 2009-10-25 05:34:14 +00:00
Phil Bennett
8b28c00872 Minor speed improvement to the e132xs core - don't pass opcode parameter when calling instruction handlers [Christophe Jaillet]
> -----Original Message-----
> From: Christophe Jaillet [mailto:christophe.jaillet@wanadoo.fr]
> Sent: Saturday, October 17, 2009 9:00 AM
> To: submit@mamedev.org
> Subject: Speed up emu\cpu\e132xs
>
> Hi,
>
> this patch speeds up the emulation of the CPU e132xs.
>
> For the emulation of this CPU, two structures are used :
>     - '_hyperstone_state' which keep track of the state of the
> processor
>     - 'regs_decode' which is used when decoding the opcode being
> executed
>
> Both of these structures have a field 'op' but only the one of
> 'regs_decode'
> is actually used.
>
> The emulation of the CPU is done this way :
>     - read the opcode
>     - call the corresponding function which emulate this opcode. Two
> parameters are passed :
>         o a pointer to hyperstone_state
>         o the opcode itself
>     - the opcode is then stored in the relevant field of a local stack
> stored 'regs_decode' structure.
>
> The field 'op' of  '_hyperstone_state' is never used.
>
>
> So the proposed patch does the following :
>     - use the 'op' field of '_hyperstone_state' instead of the one of
> 'regs_decode'
>     - initialise this 'op' field before calling the function which
> emulate
> this opcode
>     - remove the need of the second parameter ('opcode') of these
> functions
>     - remove the now useless 'op' field of the structure 'regs_decode'
>
> Doing so removes the need of pushing a parameter on the stack for each
> opcode simulated and give a average speed up of 1 % or 2 % of the
> emulation.
>
> Hope this help.
> Best regards,
>
> CJ
2009-10-21 11:27:56 +00:00
Aaron Giles
59a1941469 > -----Original Message-----
> From: Atari Ace [mailto:atari_ace@verizon.net]
> Sent: Saturday, October 17, 2009 12:14 PM
> To: submit@mamedev.org
> Cc: atariace@hotmail.com
> Subject: [patch] Remove dead prototypes
> 
> Hi mamedev,
> 
> This patch mostly removes dead prototypes, especially in source files
> as opposed to header files which I've previously audited.  It also
> migrates a few prototypes to existing header files, and adds missing
> prototypes to segamsys.h.
> 
> ~aa
2009-10-21 05:20:23 +00:00
Aaron Giles
d81f1f98d3 > From: atari_ace@verizon.net
> To: submit@mamedev.org
> CC: atariace@hotmail.com
> Subject: [patch] Eliminate more .data
> Date: Wed, 7 Oct 2009 08:51:56 -0700
> 
> Hi mamedev,
> 
> Most variables in .data are likely to lead to multisession bugs, so it
> is best to eliminate them and add explicit init/reset code for them
> instead. This patch does that for almost all the cases, with a few
> changes deserving some comments:
> 
> z180: cc was global when it should be per-cpu.
> nesapu: the noise table would be different run to run in multisession
> which probably wasn't intended.
> astring: i constified the dummy string to make it impossible to
> modify.
> mediagx: hits was separated from the constant data
> tecmosys: i reduced the number of exports and renamed them to use
> tecmosys_ as a prefix.
> atari: i moved the renderer function into ANTIC.
> naomibd: the array provided to x76f100 was too small and might have
> caused memory corruption.
> n64: i constified the one and zero colors, requiring many more const
> qualifiers to be added.
> ldverify: i encapsulated the audio and video variables to reduce the
> amount of global state.
2009-10-21 05:18:32 +00:00
Andrew Gardner
b1183137b9 Fixed dsp56156 DO & BSCC opcode bugs. [Andrew Gardner]
(Also makes the code prettier in parts)
(The dsp now goes into its calculation loop, but some
opcode doesn't set flags properly, so it never drops
out of the loop).
2009-10-20 06:11:07 +00:00
Luca Elia
5f3eb963b3 Dynax.c update [Luca Elia]
New games added or promoted from NOT_WORKING status
---------------------------------------------------
Mahjong Gekisha [Luca Elia, Guru, Dyq, Bnathan]

New clones added
----------------
Hana Jingi (Japan, Bet) [Luca Elia, Guru, Brian Troha, Yasuhiro Ogawa]
2009-10-18 19:41:22 +00:00
Angelo Salese
57dd9e65f1 i386: implemented SLDT & STR opcodes 2009-10-17 17:02:27 +00:00
Couriersud
1e4c12db82 c++ fix. new is a reserved word in c++ 2009-10-16 23:50:08 +00:00
Aaron Giles
2d22e450f2 Cleanups and version bump. 2009-10-12 08:45:25 +00:00
Aaron Giles
357e36fc84 Eliminated osd_cpu.h.
Types are pretty much unified now.
Multiply operations are handled by eminline.h.
Divide operations were just silly in macros.
64/32-bit combination/extraction macros moved to osdcomm.h and renamed.

Also fixed compile errors in recent 68k changes.
2009-10-12 08:37:04 +00:00
R. Belmont
17fc4a4a78 m680x0 update:
- Added working PMMU address translation (not feature complete, but sufficient
  to boot several 68030 Macs in MESS)
- Fixed up disassembly of some PMMU instructions
- Added "68020 with 68851" CPU type
2009-10-12 02:50:35 +00:00
R. Belmont
0585b0a309 m68k: throw F-line trap correctly when PMMU instructions are hit on non-equipped CPUs. 2009-10-05 04:26:11 +00:00
Aaron Giles
aff6be5877 Cleanups and version bump. 2009-10-04 05:08:50 +00:00
Aaron Giles
08a4572e09 > -----Original Message-----
> From: Atari Ace [mailto:atari_ace@verizon.net]
> Sent: Wednesday, September 30, 2009 7:56 AM
> To: submit@mamedev.org
> Cc: atariace@hotmail.com
> Subject: [patch] More static qualifiers
> 
> Hi mamedev,
> 
> This patch makes more of MAME static, primarily targeting functions
> exported by header files that are in fact unused outside their own
> file, and the chip emulators in machine/snes.c.  It also degenericizes
> some exported names in archimds, bublbobl, and lucky74.
> 
> ~aa
2009-10-03 06:53:27 +00:00
Aaron Giles
fe289e67f5 > -----Original Message-----
> From: Atari Ace [mailto:atari_ace@verizon.net]
> Sent: Sunday, September 27, 2009 7:58 AM
> To: submit@mamedev.org
> Cc: atariace@hotmail.com
> Subject: [patch] More _NAME macros
> 
> Hi mamedev,
> 
> MAME's idiom for function/data macros is to first implement
> <name>_NAME, then implement the other macros in terms of the _NAME
> macro.  Then in principle only a single line needs editing to change
> the naming convention.
> 
> This patchset implements this idiom more completely.  The first patch
> adds some missing _NAME macros and fixes cases in source files that
> should be using the macros.  The second patch then changes header
> files where the macros should have been used, but weren't.  This
> required changing the idiom for removing a machine driver function
> pointer from MDRV_<FUNCTION>(NULL) to MDRV_<FUNCTION>(0), to avoid
> problems with NULL being macro expanded.  This actually unifies the
> handling of all such cases, as we already had ipt_0 and driver_init_0.
> It also required reworking the devtempl.h implementation in a way that
> triggered a warning on MSVC about using empty macros, so vconv.c
> needed to be updated.  The third patch then renames all the _NAME and
> _0 macros to verify that all the cases have been covered, so it isn't
> intended to be applied.
> 
> ~aa
2009-10-01 17:27:29 +00:00
R. Belmont
42951f5c7a M680x0 update
- Add CPU types 68EC030, 68030, and 68EC040
- Start of 030/040 PMMU, including stubbed PMOVE
2009-09-27 23:39:39 +00:00
R. Belmont
d12b0394b5 m68k: disassemble PMOVE instruction (move to/from PMMU) 2009-09-27 03:15:34 +00:00
Ryan Holtz
b012b88ca5 Don't mention in whatsnew - puts the BSD optimization back in. 2009-09-26 22:33:20 +00:00
Ryan Holtz
43898fb85f Fleshed out SCC68070 definition in m68k core, for CD-i use in MESS [Harmony] 2009-09-26 22:25:33 +00:00
Andrew Gardner
50f6cfc475 Hacked in the dsp56156's "Long Interrupts." Added SUB opcode. [Andrew Gardner]
Polygonet Commanders now goes in-game!
2009-09-26 17:31:48 +00:00
Aaron Giles
1f7a6caba9 Cleanups and version bump. 2009-09-24 07:56:15 +00:00
Aaron Giles
d8aa6627f5 > -----Original Message-----
> From: Atari Ace [mailto:atari_ace@verizon.net]
> Sent: Sunday, September 20, 2009 9:54 AM
> To: submit@mamedev.org
> Cc: atariace@hotmail.com
> Subject: [patch] Eliminate more #ifdef LSB_FIRST
> 
> Hi mamedev,
> 
> This patch recodes more cases where LSB_FIRST is used to conditionally
> compile separate code for LSB and MSB targets.  The atari.h chunk was
> dead code (both in MAME and MESS) so I simply removed it.
> 
> ~aa
2009-09-24 07:14:58 +00:00
Curt Coder
b0c5844b7a i8085:
- RIM instruction now shows the current status of RST5.5 and RST6.5 pins.
2009-09-23 20:25:57 +00:00
Couriersud
f75ca12698 Move fake I/O ports into enum 2009-09-19 19:37:21 +00:00
Couriersud
398572a694 Verified irq handling (please credit Quench)
- moved irq handling out of set_irq_line
2009-09-19 19:29:21 +00:00
Couriersud
203e2e538d Fix bugs introduced in last commit
- abstract SP handling
2009-09-19 19:00:52 +00:00
Couriersud
d2182ce269 - Added S2650_FO_PORT fake port for flag output line.
- Made CHECK_IRQ_LINE an inline
2009-09-19 14:30:53 +00:00
Ryan Holtz
980eb45e70 Fixed disassembly of NEG Rd,Rs instruction in ARM7TDMI Thumb mode [Harmony] 2009-09-18 21:04:09 +00:00
Andrew Gardner
77a3badd32 Fixed various issues with the dsp56156 disassembler. [Andrew Gardner]
(Off the record)
I verified this thing against IDA Pro's 56156 disassembler and the docs.
Every time I found a bug in IDA's disassembler, I cross-referenced the
manual.  There remain 3 opcodes which are questionably disassembled,
since even the manual is ambiguous on the details, but beyond that, 
this thing should be 100% correct.

Whew.  This might have actually fleshed out a bug in the 
disassembly/execution.  Time will tell...
2009-09-18 04:37:47 +00:00
R. Belmont
5e33f4fd5c m68k: don't save signal contexts on *BSD and Mac OS X [scarlet, R. Belmont] 2009-09-16 03:25:28 +00:00
Wilbert Pol
45c5b38c2d lr35902: do not clear the interrupt flag when the cpu is halted and no interrupt is taken. 2009-09-15 16:56:04 +00:00
Wilbert Pol
540bc6e613 lr35902 cpu core: Improved handling of the DI+HALT bug. 2009-09-14 19:17:19 +00:00
Michaël Banaan Ananas
d84af18926 i386: improved handling of override prefixes after a rep instruction [Gabriele Gorla] 2009-09-14 12:30:36 +00:00
Aaron Giles
e47035e834 Cleanups and version bump. 2009-09-10 08:39:42 +00:00
Aaron Giles
fa68c11272 > From: Atari Ace [mailto:atari_ace@verizon.net]
> Sent: Monday, September 07, 2009 8:08 PM
> To: submit@mamedev.org
> Cc: atariace@hotmail.com
> Subject: [patch] const/static/include fixes
> 
> Hi mamedev,
> 
> A result of some code auditing, this patch adds missing static and
> const qualifiers, and fixes up some header files.
> 
> ~aa
2009-09-10 08:35:37 +00:00
Aaron Giles
647b726571 i386 fixes: [Gabriele Gorla]
- Add missing arpl instruction
 - Fixed BCD carry
 - Fixed disassembly of group D8 when modrm > 0xc0
 - Add fucompp instruction to disassembler
2009-09-10 07:20:37 +00:00
Angelo Salese
cd8063446c G65816: Fixed a bug with SBC opcode N flag behaviour in Decimal Mode [Angelo Salese] 2009-09-09 17:30:56 +00:00
Quench
740ae26ae6 PIC16C5x CPU - Count input fix
- Fixed the T0CKI count input being controlled by the wrong edge sensing
2009-09-09 13:58:19 +00:00
Aaron Giles
50b4a43bfd Fix CPP_COMPILE (except for internal compiler error on snes.c). 2009-09-08 16:58:02 +00:00
Aaron Giles
96d7f2cf3b Remove remaining references to machine->cpu[n]. Removed cpu[n] array.
Replaced with machine->firstcpu which is a fast access to the head
of the list of CPUs.
2009-09-08 09:13:10 +00:00
Curt Coder
2e98a0f2de [Z8] Fixed disassembler argument order. 2009-09-07 12:47:40 +00:00
Aaron Giles
8fbe10c91f Cleanups and version bump. 2009-09-07 01:34:34 +00:00
Aaron Giles
03b5da1a55 Added 'options' parameter to the CPU_DISASSEMBLE prototype. For now, the
debugger always passes 0 for this. unidasm has been updated to accept a
mode parameter, which is passed for the options.
2009-09-07 00:26:56 +00:00
Aaron Giles
191fe9cdc3 > From: Atari Ace [mailto:atari_ace@verizon.net]
> Sent: Sunday, September 06, 2009 7:25 AM
> To: submit@mamedev.org
> Cc: atariace@hotmail.com
> Subject: [patch] Deglobalize input.c
> 
> Hi mamedev,
> 
> These patches deglobalize input.c.  The first adds running_machine to
> some driver apis.  The (large) second patch adds the machine parameter
> to the most input_code_pressed apis (generated by script, not
> compilable).  The last patch then actually changes those apis and
> others to take running_machine, and adds struct _input_private to hold
> the input state variables.
> 
> ~aa
2009-09-06 22:28:58 +00:00
Aaron Giles
ad2a5144ad > From: Gabriele Gorla [mailto:gorlik@penguintown.net]
> Sent: Saturday, September 05, 2009 2:11 PM
> To: submit@mamedev.org
> Subject: I386: fix loop instructions when address_size is 16-bit
> 
> Original code always assume address_size to be 32-bit
> The patch will use the correct size based on the status of the
> address_size flag.
>
2009-09-06 21:56:17 +00:00
Curt Coder
814b15eaf3 Fixed 64-bit MSVC compile. 2009-09-06 13:48:20 +00:00
Ryan Holtz
3548990629 Fixed carry handling in ADC, ADCI, SBC and SBCI opcodes. Fixes many SNES SuperFX bugs. [Harmony] 2009-09-05 04:34:51 +00:00
Curt Coder
1c56a127d5 Added preliminary Zilog Z8 CPU core for MESS. 2009-09-04 12:40:47 +00:00
Ryan Holtz
f09c9059f9 Added a compile-time flag to select between ABI and Manual register names in the MIPS core. [Harmony]
Fixed a MESS-side compile warning in the SNES S-DD1 code. [Harmony]
2009-09-04 11:40:49 +00:00
Ryan Holtz
faf695bfc9 SNES updates: [R. Belmont, Harmony]
- Corrected ROM loading behavior for SuperFX games
- Added more ROM mirroring needed by certain SuperFX 2 games
- Corrected the behavior of certain bit-restricted SuperFX registers.  Doom, Yoshi's Island, Dirt Trax FX and Voxel Demo show things now.
- Improved S-DD1 emulation, neither game using S-DD1 boots yet
2009-09-04 05:00:05 +00:00
Ryan Holtz
b54790792a Fixed numerous opcodes in the AVR8 core [Harmony]
Fixed a register naming issue in the MIPS core [Harmony]
Numerous SuperFX updates: [Harmony]
 - Hooked up RAM and ROM buffering
 - Inlined several more functions
 - Removed debug spew
 - Added the ability to define an external IRQ line callback, and hooked it up to the 65C816
 - Fixed flag calculation for HIB opcode
 - Hooked SuperFX chip up to the SNES machine driver
2009-09-03 23:53:43 +00:00
R. Belmont
85d9b4decb M377xx: fix CLB/SEB when not in bank 0 2009-09-03 23:21:51 +00:00
Ryan Holtz
a9a3f05218 SuperFX updates: [Harmony]
- Inlined a number of functions for possible speed increase
- Removed some memory buffering cruft, to be re-added later
- Fixed behavior of ASR opcode
- With additional MESS-side changes, Stunt Race FX is playable, and Vortex shows much more.
2009-09-02 23:28:18 +00:00
Ryan Holtz
64b84113e9 SuperFX fixes: [Anonymous]
- At least partly fixed PLOT and RPIX behavior.  This fixes many gfxs in Star Fox and Vortex, but no polys yet.
2009-08-31 02:53:53 +00:00
Ryan Holtz
8b572ae6f8 SuperFX updates [Anonymous]
- Fixed disassembly of LMULT/FMULT ops
- Fixed reads using LDW/LDB
- Fixed writes using STW/STB
- Fixed SBC carry behavior
- Fixed GETC ROM access behavior
- Some SuperFX games begin to show things in MESS
2009-08-30 22:20:17 +00:00
Quench
e77505b9a2 Fixes to the PIC16C5x CPU core:
- Indirect addressing was not taking into account special purpose memory mapped locations.
 - 'iorlw' instruction was saving the result to memory instead of the W register.                               
 - 'tris' instruction no longer modifies Port-C on PIC models that do not have Port-C implemented.


Also added difficulty DIP to BigTwin
2009-08-30 14:16:50 +00:00
Michaël Banaan Ananas
4f4af5ca30 > Shouldn't you also add a return statement?
yes, but it doesn't matter: ifs/cases afterwards would be FALSE anyway
2009-08-30 11:25:29 +00:00
Michaël Banaan Ananas
4bb09d5632 fixed i386 carry/borrow flag in ADC/SBB [Gabriele Gorla]
> -----Original Message-----
> From: Gabriele Gorla [mailto:gorlik@penguintown.net]
> Sent: Saturday, August 29, 2009 5:39 AM
> To: submit@mamedev.org
> Cc: Gabriele Gorla
> Subject: Re: i386: fix carry/borrow flag in ADC/SBB
>
> > the original code implements ADC and SBB as 2 consecutive ADDs.
> > This will not produce the correct result when the carry is generated
> by
> > the first addition as it is overwritten by the second operation.
>
> updated patch, fixes a typo.
2009-08-30 11:19:07 +00:00
Aaron Giles
81d248c448 MSVC compile fixes. 2009-08-30 02:04:21 +00:00
Aaron Giles
5df39c5473 Cleanups and version bump. 2009-08-29 23:18:28 +00:00
Aaron Giles
1173ae9493 Fixed dependencies for the 57002dasm 2009-08-29 21:54:42 +00:00
Ryan Holtz
23dd52a582 SuperFX changes: [Anonymous]
- Fixed overflow flag calculation on ADDI / ADCI
- Fixed lack of register reset after ADD / ADC / ADDI / ADCI
2009-08-29 10:00:14 +00:00
Ryan Holtz
0915000ffa SuperFX updates: [Anonymous]
- Disabled RAM/ROM clocking, going with instant transfer for now
- Understood and re-enabled pipelined instruction architecture, Star Fox runs farther
- Fixed a ridiculous typo in ROL instruction
2009-08-29 04:28:36 +00:00
Ryan Holtz
25d5307394 SuperFX core updates: [Anonymous]
- Corrected carry flag behavior in ROL opcode
- Corrected BRA target address calculation (maybe still wrong)
- Corrected LOOP target address calculation
- Made sure that FROM sets cpustate->sreg_idx
2009-08-27 04:47:58 +00:00
Ryan Holtz
67fc4827bb Multiple SuperFX updates: [Anonymous]
- Added LSR and ROL opcodes
- Updated instructions to use the safer superfx_gpr_write: LOOP, PLOT, INC, DEC
- Added missing register writeback to LMS
2009-08-27 01:59:38 +00:00
Ryan Holtz
4e3a2c0e17 Argonaut SuperFX core: [Anonymous]
- Improved disassembler to more gracefully handle ALT* opcode effects.
- Corrected instruction behaviors: STOP, SUB, SBC, SUBI, CMP
2009-08-26 06:29:36 +00:00
Michaël Banaan Ananas
7e2794ad21 Fixed IM2 interrupt cycles [eke]
http://www.mameworld.info/ubbthreads/showthreaded.php?Cat=&Number=199853&page=0&view=expanded&sb=5&o=&fpart=1&vc=1
I don't know this z80 emulator well enough to look into his first two points. Juergen?

1/ In the cc_xy[] table which lists instructions with DD or FD prefixes, "illegal" combos are returning 4 cycles when they should return 4 + cc_op (the normal instruction being executed). Another way to handle this correctly is to call EXEC(z80,fd,xx) or EXEC(z80,dd,xx) instead of op_xx(z80) when such pair of opcode is detected, to be sure the correct amount of cycles is used.

2/ According to Sean Young, R register is NOT incremented when chaining multiple DD or FD prefixes: [...]

This one was already fixed, dunno when:
2/ In the cc_ed[] table, INI (ED A2) and IND (ED AA) should return 16 cycles, like other instructions from this group, not 12. This seems to be a typo error.
2009-08-24 11:57:26 +00:00
Ryan Holtz
89d4356142 Improved some aspects of SuperFX emulation, Star Fox now executes SuperFX code, but does not stop. [Anonymous] 2009-08-24 01:57:02 +00:00
Ryan Holtz
eb25141647 Fixed a handful of SuperFX core bugs. Star Fox begins to run code. [Anonymous]
Over to you, Kale...
2009-08-23 15:19:30 +00:00
Ryan Holtz
2618dfaabc Hooked up Branch instructions in the Argonaut SuperFX core. [Anonymous] 2009-08-23 08:23:09 +00:00
Ryan Holtz
a820e450c3 Fixes the build. 2009-08-23 08:10:51 +00:00
Ryan Holtz
76a4664cb9 Implemented basic Argonaut SuperFX support, needs to be hooked to the SNES driver. [Anonymous] 2009-08-23 08:06:50 +00:00
Olivier Galibert
26dee2df8e Fix the i386 disassembler duplication. 2009-08-22 19:55:33 +00:00
Aaron Giles
f474114e1d Added infrastructure to compile universal standalone disassembler:
- added unidasm to the tools build
 - split the disassemblers out of libcpu and into new libdasm
 - ensured the disassembly entry points for all disassemblers are
    in the source file for the disassembler (sometimes new generic
    versions were created)

Still needs command line options and file loading, but the 
fundamentals are present, and it links.
2009-08-22 06:25:07 +00:00
Curt Coder
b2dcbb3b68 Intel 8085:
- refactored callbacks to use devcb
- added 8080A variant
2009-08-21 08:19:17 +00:00
Aaron Giles
ac3d58fad5 Cleanups and version bump. 2009-08-21 01:52:51 +00:00
Wilbert Pol
dd46ee883a Added support TMS1000 family models TMS1000/1070/1100/1200/1270/1300.
Added support for configuration of output PLA to the tms0980/tms1000 interface.
2009-08-20 19:15:30 +00:00
R. Belmont
6106e6bae4 mcs51: fix GCC 64-bit warning 2009-08-19 20:48:21 +00:00
Michaël Banaan Ananas
93d7716c87 - fixed cycle deduction on unconditional CALL / RET, it took about half too many cycles
- added cycle tables and cleaned up source layout. This was done very carefully, it should be errorfree.
- removed HLT cycle eating (earlier, HLT after EI could theoretically fail)
- fixed parity flag on add/sub/cmp. Bug was caused by z80 overflow detection accidentally left in
- renamed temp register XX to official name WZ
- renamed flags from Z80 style S Z Y H X V N C  to  S Z X5 H X3 P V C, and fixed X5 / V flags where accidentally broken due to flag names confusion
2009-08-19 15:42:35 +00:00
Michaël Banaan Ananas
8a74f58d3b obsolete file 2009-08-19 15:30:28 +00:00
Michaël Banaan Ananas
06829cb2f7 Z80 changes:
- Fixed X/Y flags in CCF/SCF/BIT, ZEXALL is happy now
- Simplified DAA, renamed MEMPTR (3.8) to WZ (same temp register as the officially named WZ in the 8080), added TODO

the cycle fix by Marshmellow, in the 3.9 z80.c comments was already committed in june, just added there for documentation
2009-08-19 15:27:22 +00:00
Aaron Giles
df435f8701 Attempt to define an I64FMT string that can be used for printf'ing 64-bit
integers. This is defined to be "I64" on MSVC and recent mingw compilers,
and "ll" for all others.

Updated all instances of 64-bit prints to use the new macro.
2009-08-19 08:49:01 +00:00
Aaron Giles
03d5253dca Added some missing casts and other minor tweaks. 2009-08-19 04:58:54 +00:00
Aaron Giles
e3f1f454f8 Cleanups and version bump. 2009-08-13 05:56:25 +00:00
Aaron Giles
6f8be150e6 From: hoge hoge [c8cv@hotmail.com]
Sent: Friday, August 07, 2009 9:33 AM
To: submit@mamedev.org
Subject: z180 daatable removed
Since I removed the daatable from i8085, and the z180 one is exactly the 
same, I might as well remove that one too, see attached diff.

hap
2009-08-13 05:07:00 +00:00
Aaron Giles
8ff3556c40 From: hoge hoge [c8cv@hotmail.com]
Sent: Friday, August 07, 2009 6:45 AM
To: submit@mamedev.org
Subject: spacwalk dips and player2 support
Hello,

Attached is a diff for 0133u1 Space Walk that adds game time and coinage 
DIP switches, as well as service mode and input test. DIP switches 5 and 6 
are still unknown. It also adds support for the 2nd controller and 
coincounter, similar to clowns. I've removed the GAME_NOT_WORKING flag, since 
other than a glitch with the CPU controlled pad on the left side, the gameplay 
is working fine. The fact that the middle section is inaccessible looks 
deliberate: there's probably a vertical-shape object in the original artwork 
the clown (astronaut in this case:P) can bump into.

Greets,
hap
2009-08-13 05:04:23 +00:00