Commit Graph

1500 Commits

Author SHA1 Message Date
Angelo Salese
c97ddb40d3 Fixed LLDT [reg], LTR and LMSW instructions, and added preliminary implementations of VERR, VERW and LAR in the i386 CPU core. [Barry Rodewald] 2011-02-12 13:59:59 +00:00
Miodrag Milanovic
fd5b5140a5 Removed short name as parameter from device_config this way it is not mandatory any more.
Most of files is rolled back to previous state. (no whatsnew)
2011-02-11 10:10:39 +00:00
Curt Coder
391c093c96 Added missing device type. (no whatsnew) 2011-02-11 09:28:11 +00:00
Miodrag Milanovic
601056b130 - Added shortname to devices in order to make ROM loading per device possible. [Miodrag Milanovic]
- Updated all devices containing ROM regions to have short names and all modern devices too
- Created new validation to check existence of short name if device contain ROM region defined
2011-02-10 19:08:37 +00:00
Aaron Giles
c7ff741eb9 Define new macro ALLOW_SAVE_TYPE which can be used to declare enums as
valid save types on a case-by-case basis.

Updated the cosmac CPU core to do this for its mode and state enums,
which were previously failing.
2011-02-10 07:25:44 +00:00
Michaël Banaan Ananas
45e080abeb (typofix) 2011-02-09 21:22:18 +00:00
Aaron Giles
4fa610aa02 Cleanups and version bump. 2011-02-09 15:01:01 +00:00
Aaron Giles
a38c67f27b Get rid of state_save_register_device_* macros in favor of direct
calls on the device object.

Regex used:

state_save_register_device_item( *)\(( *)([^,]+), *([^,]+),( *)([^ )]+)( *)\)
\3->save_item\1\(\2NAME\(\6\),\5\4\7\)

state_save_register_device_item_array( *)\(( *)([^,]+), *([^,]+),( *)([^ )]+)( *)\)
\3->save_item\1\(\2NAME\(\6\),\5\4\7\)

state_save_register_device_item_2d_array( *)\(( *)([^,]+), *([^,]+),( *)([^ )]+)( *)\)
\3->save_item\1\(\2NAME\(\6\),\5\4\7\)

state_save_register_device_item_bitmap( *)\(( *)([^,]+), *([^,]+),( *)([^ )]+)( *)\)
\3->save_item\1\(\2NAME\(\*\6\),\5\4\7\)

state_save_register_device_item_pointer( *)\(( *)([^,]+), *([^,]+),( *)([^,]+), *([^ )]+)( *)\)
\3->save_pointer\1\(\2NAME\(\6\),\5\7,\5\4\8\)

this->save_
save_

(save_item[^;]+), *0( *)\);
\1\2\);

(save_pointer[^;]+), *0( *)\);
\1\2\);
2011-02-09 05:51:04 +00:00
Aaron Giles
4f7efb1ca4 Moved the state saving system to C++. For now the registration macros
are still intact. The new state_manager class has templatized methods
for saving the various types, and through template specialization can
save more complex system types cleanly (like bitmaps and attotimes).

Added new mechanism to detect proper state save types. This is much
more strict and there will likely be some games/devices that fatalerror
at startup until they are remedied. Spot checking has caught the more
common situations.

The new state_manager is embedded directly in the running_machine, 
allowing objects to register state saving in their constructors now.

Added NAME() macro which is a generalization of FUNC() and can be
used to wrap variables that are registered when directly using the
new methods as opposed to the previous macros. For example:

  machine->state().save_item(NAME(global_item))

Added methods in the device_t class that implicitly register state
against the current device, making for a cleaner interface.

Just a couple of required regexes for now:

state_save_register_postload( *)\(( *)([^,;]+), *
\3->state().register_postload\1\(\2

state_save_register_presave( *)\(( *)([^,;]+), *
\3->state().register_presave\1\(\2
2011-02-08 06:48:39 +00:00
R. Belmont
7a3d9310ee G65816: fixed operation on PowerPC Linux where char is unsigned [R. Belmont, billb] 2011-02-07 01:05:39 +00:00
R. Belmont
bf505cd350 tms57002: significantly improved build speed on lower-end h/w [R. Belmont]
No-whatsnew explanation: this takes OPTIMIZE=3 compile time for this core from 
over 1 hour down to about 2 minutes on PS3 Linux.  (Yes, the tms57002 itself 
took over an hour to compile before - the thing has 256 MB of RAM and 
a very slow HDD so when it hits swap, swap hits back).
2011-02-06 23:46:37 +00:00
Aaron Giles
feb6e77be3 As promised, the bulk update of timer calls:
timer_adjust_oneshot(t,...)  => t->adjust(...)
timer_adjust_periodic(t,...) => t->adjust(...)
timer_reset(t,...)           => t->reset(...)
timer_enable(t,...)          => t->enable(...)
timer_enabled(t)             => t->enabled()
timer_get_param(t)           => t->param()
timer_get_ptr(t)             => t->ptr()
timer_set_param(t,...)       => t->set_param(...)
timer_set_ptr(t)             => t->set_ptr(...)
timer_timeelapsed(t)         => t->elapsed()
timer_timeleft(t)            => t->remaining()
timer_starttime(t)           => t->start()
timer_firetime(t)            => t->expire()

Also remove some stray legacy cpuexec* macros that were 
lurking in schedule.h):

cpuexec_describe_context(m)     => m->describe_context()
cpuexec_boost_interleave(m,...) => m->scheduler().boot_interleave(...)
cpuexec_trigger(m,...)          => m->scheduler().trigger(...)
cpuexec_triggertime(m,...)      => m->scheduler().trigger(...)

Specific regex'es used:

timer_adjust_oneshot( *)\(( *)([^,;]+), *
\3->adjust\1\(\2

timer_adjust_periodic( *)\(( *)([^,;]+), *
\3->adjust\1\(\2

(->adjust.*), *0( *)\)
\1\2\)

timer_reset( *)\(( *)([^,;]+), *
\3->reset\1\(\2

(->reset *\(.*)attotime::never
\1

timer_enable( *)\(( *)([^,;]+), *
\3->enable\1\(\2

timer_enabled( *)\(( *)([^,;)]+)\)
\3->enabled\1\(\2\)

timer_get_param( *)\(( *)([^,;)]+)\)
\3->param\1\(\2\)

timer_get_ptr( *)\(( *)([^,;)]+)\)
\3->ptr\1\(\2\)

timer_timeelapsed( *)\(( *)([^,;)]+)\)
\3->elapsed\1\(\2\)

timer_timeleft( *)\(( *)([^,;)]+)\)
\3->remaining\1\(\2\)

timer_starttime( *)\(( *)([^,;)]+)\)
\3->start\1\(\2\)

timer_firetime( *)\(( *)([^,;)]+)\)
\3->expire\1\(\2\)

timer_set_param( *)\(( *)([^,;]+), *
\3->set_param\1\(\2

timer_set_ptr( *)\(( *)([^,;]+), *
\3->set_ptr\1\(\2

cpuexec_describe_context( *)\(( *)([^,;)]+)\)
\3->describe_context\1\(\2\)

\&m_machine->describe_context
m_machine.describe_context

cpuexec_boost_interleave( *)\(( *)([^,;]+), *
\3->scheduler().boost_interleave\1\(\2

cpuexec_trigger( *)\(( *)([^,;]+), *
\3->scheduler().trigger\1\(\2

cpuexec_triggertime( *)\(( *)([^,;]+), *
\3->scheduler().trigger\1\(\2
2011-02-06 21:23:00 +00:00
Aaron Giles
0e627f1a54 Convert emu_timers to objects. Move implementation and management of
timers into the scheduler. Retain TIMER devices as a separate wrapper
in timer.c/.h. Inline wrappers are currently provided for all timer
operations; a future update will bulk clean these up.

Rather than using macros which hide generation of a string-ified name
for callback functions, the new methods require passing both a function
pointer plus a name string. A new macro FUNC() can be used to output
both, and another macro MFUNC() can be used to output a stub-wrapped
class member as a callback.

Also added a time() method on the machine, so that machine->time() gives
the current emulated time. A wrapper for timer_get_time is currently
provided but will be bulk replaced in the future.

For this update, convert all classic timer_alloc, timer_set, 
timer_pulse, and timer_call_after_resynch calls into method calls on 
the scheduler. 

For new device timers, added methods to the device_t class that make 
creating and managing these much simpler. Modern devices were updated
to use these.

Here are the regexes used; some manual cleanup (compiler-caught) will
be needed since regex doesn't handle nested parentheses cleanly

1. Convert timer_call_after_resynch calls
timer_call_after_resynch( *)\(( *)([^,;]+), *([^,;]+), *([^,;]+), *([^);]+)\)
\3->scheduler().synchronize\1\(\2FUNC(\6), \5, \4\)

2. Clean up trailing 0, NULL parameters
(synchronize[^;]+), 0, NULL\)
\1)

3. Clean up trailing NULL parameters
(synchronize[^;]+), NULL\)
\1)

4. Clean up completely empty parameter lists
synchronize\(FUNC\(NULL\)\)
synchronize()

5. Convert timer_set calls
timer_set( *)\(( *)([^,;]+), *([^,;]+), *([^,;]+), *([^,;]+), *([^);]+)\)
\3->scheduler().timer_set\1\(\2\4, FUNC(\7), \6, \5\)

6. Clean up trailing 0, NULL parameters
(timer_set[^;]+), 0, NULL\)
\1)

7. Clean up trailing NULL parameters
(timer_set[^;]+), NULL\)
\1)

8. Convert timer_set calls
timer_pulse( *)\(( *)([^,;]+), *([^,;]+), *([^,;]+), *([^,;]+), *([^);]+)\)
\3->scheduler().timer_pulse\1\(\2\4, FUNC(\7), \6, \5\)

9. Clean up trailing 0, NULL parameters
(timer_pulse[^;]+), 0, NULL\)
\1)

10. Clean up trailing NULL parameters
(timer_pulse[^;]+), NULL\)
\1)

11. Convert timer_alloc calls
timer_alloc( *)\(( *)([^,;]+), *([^,;]+), *([^);]+)\)
\3->scheduler().timer_alloc\1\(\2FUNC(\4), \5\)

12. Clean up trailing NULL parameters
(timer_alloc[^;]+), NULL\)
\1)

13. Clean up trailing 0 parameters
(timer_alloc[^;]+), 0\)
\1)

14. Fix oddities introduced
\&m_machine->scheduler()
m_machine.scheduler()
2011-02-06 07:15:01 +00:00
R. Belmont
3361ca5199 drcbex64: fix compile on Apple GCC (no whatsnew) 2011-02-05 18:07:18 +00:00
R. Belmont
3ec54f4216 drcuml: fix compile on systems that use the C backend [R. Belmont] 2011-02-05 17:18:15 +00:00
smf-
1d0cf8d526 stop LOG_BIOSCALL triggering dbe when outputting parameters. 2011-02-05 03:31:52 +00:00
Aaron Giles
f534d245c0 Attotime bulk conversion step:
attotime_zero                 => attotime::zero
attotime_never                => attotime::never
ATTOTIME_IN_SEC(s)            => attotime::from_seconds(s)
ATTOTIME_IN_MSEC(m)           => attotime::from_msec(m)
ATTOTIME_IN_USEC(u)           => attotime::from_usec(u)
ATTOTIME_IN_NSEC(n)           => attotime::from_nsec(n)
ATTOTIME_IN_HZ(h)             => attotime::from_hz(h)

Also, changed the following MCFG macros to require a full
attotime specification:

MCFG_TIMER_ADD_PERIODIC
MCFG_QUANTUM_TIME
MCFG_WATCHDOG_TIME_INIT
2011-02-03 09:06:34 +00:00
Aaron Giles
1e88333178 Converted attotime to a class, with proper operators. Removed old
global functions which are now superceded by the operators and
methods on the class. [Aaron Giles]

Required mappings are:

attotime_make(a,b)            => attotime(a,b)
attotime_to_double(t)         => t.as_double()
double_to_attotime(d)         => attotime::from_double(d)
attotime_to_attoseconds(t)    => t.as_attoseconds()
attotime_to_ticks(t,f)        => t.as_ticks(f)
ticks_to_attotime(t,f)        => attotime::from_ticks(t,f)
attotime_add(a,b)             => a + b
attotime_add_attoseconds(a,b) => a + attotime(0, b)
attotime_sub(a,b)             => a - b
attotime_sub_attoseconds(a,b) => a - attotime(0, b)
attotime_compare(a,b) == 0    => a == b
attotime_compare(a,b) != 0    => a != b
attotime_compare(a,b) < 0     => a < b
attotime_compare(a,b) <= 0    => a <= b
attotime_compare(a,b) > 0     => a > b
attotime_compare(a,b) >= 0    => a >= b
attotime_mul(a,f)             => a * f
attotime_div(a,f)             => a / f
attotime_min(a,b)             => min(a,b)
attotime_max(a,b)             => max(a,b)
attotime_is_never(t)          => t.is_never()
attotime_string(t,p)          => t.as_string(p)

In addition, some existing #defines still exist but will go away:

attotime_zero                 => attotime::zero
attotime_never                => attotime::never
ATTOTIME_IN_SEC(s)            => attotime::from_seconds(s)
ATTOTIME_IN_MSEC(m)           => attotime::from_msec(m)
ATTOTIME_IN_USEC(u)           => attotime::from_usec(u)
ATTOTIME_IN_NSEC(n)           => attotime::from_nsec(n)
ATTOTIME_IN_HZ(h)             => attotime::from_hz(h)
2011-02-03 07:52:45 +00:00
Aaron Giles
6fa241b445 Converted TMS3203X to a modern device.
Also removed redundant m_machine from the state and execute
interfaces to fix ambiguity when using m_machine from within
a device that inherits from these.
2011-01-31 16:36:16 +00:00
Miodrag Milanovic
3ddbeb2975 Fixed interrupt vector in F8 CPU core [Sandro Ronco] 2011-01-30 11:35:53 +00:00
R. Belmont
eef37b5e13 ARM7: Fix an LDM base register write-back bug. [Tim Schuerewegen] 2011-01-30 00:41:11 +00:00
Miodrag Milanovic
82263d0988 arm7: - Improved LDM/STM unaligned word access in THUMB mode. [Tim Schuerewegen]
-Fixed LDM unaligned read in THUMB mode.
2011-01-29 10:23:02 +00:00
Roberto Zandona
e19a6bfa39 v25: added commented line useful for decryption process 2011-01-29 08:23:18 +00:00
Aaron Giles
554823374b C++-ified the DSP32 code so Andrew has something modern to work from. 2011-01-28 15:06:49 +00:00
Andrew Gardner
95dc70a4f2 Completed the DSP16A disassembler. [Andrew Gardner]
Notes out of whatsnew.txt
* It's sure to have bugs, but it should get the job done for now.
* It's unbelievable how many typos (major or otherwise) docs like this have.
* I haven't heard from s_bastian about making the ROM images available in the
  monkey project, but we'll have 'em up as soon as he pops up again.
* Does anyone know of any hardware that incorporated one of these?  I'm looking
  for things to disassemble in the meantime :).
2011-01-26 05:46:08 +00:00
Curt Coder
eb93f07c04 Naming cleanups. (no whatsnew) 2011-01-25 19:57:33 +00:00
Andrew Gardner
512d2af3b4 A new WE DSP16A cpu disassembler. [Andrew Gardner]
Notes out of whatsnew.txt
* This uses modern devices, but has not been tested in a driver yet, so I may 
  have done something wrong.  I will fix it when the time comes.
* 60% of the disassembler is complete.  I will finish it over the next few days.
* There are many similarities in execution to the dsp32, and the existing 32 code
  will come in handy when it's time to write the execution engine.
* This thing is a pleasure compared to the dsp56k.
2011-01-25 16:14:13 +00:00
Fabio Priuli
79861afb8d Added the HCD62121 cpu to cpu.mak (used by MESS) 2011-01-24 07:32:14 +00:00
Fabio Priuli
59800cae39 arm7: Fix for "MOV LR, Rx" (where Rx bit 0 = 1) + "F800" situation. This fixes the lockup in GBA "Golden Sun: The Lost Age". [Tim Schuerewegen]
sync with latest MESS, before the fix got lost in source merging
2011-01-24 07:11:30 +00:00
Aaron Giles
b3d7e09292 Cleanups and version bump. 2011-01-24 05:09:05 +00:00
Wilbert Pol
ae0ec98e2a hcd62121: Fixed some instructions. No whatsnew. 2011-01-23 22:01:53 +00:00
R. Belmont
551ee8ee7e NEC DSP updates [R. Belmont, byuu, Dr. Decapitator]:
- Now supports uPD7725 and uPD96050
- Hooked up SNES common code to use uPD96050 for ST-010/011
- Removed ST-010 HLE simulation



Non-whatsnew: ST-010 is also found in some ssv.c games so this will be
hooked up there soon.
2011-01-23 16:22:36 +00:00
Miodrag Milanovic
125c2079fc Added M6504 CPU subtype and used it in allied.c driver (no whatsnew) 2011-01-23 12:34:00 +00:00
R. Belmont
ada01108c5 Add SHOW_AARON_BUG as threatened (no whatsnew)
Instructions:
- Enable SHOW_AARON_BUG and compile
- Run any Naomi game with -debug (e.g. toyfight)
- Step to the MOV.L at 00000018
- Thrill to an aligned 32-bit write causing 2 incorrect writes to a 32-bit handler, complete with wrong offset.  The memory system appears to think the 32-bit handler is a 16-bit handler or something.
2011-01-23 06:14:19 +00:00
R. Belmont
410a8d8f2d ARM7 updates [Tim Schuerewegen]:
- Fixed "MOV x, R15, LSL #y" form as tested by ARMWrestler
- Added unimplemented Thumb MOV variant used by GBA Moto GP
2011-01-23 03:22:54 +00:00
R. Belmont
ebcfde1e9c ARM7 updates [Tim Schuerewegen]:
- Disable 26-bit back compatibility for ARM7 variants other than ARM7500
- Fix carry flag issue on add/subtract in ARM mode
2011-01-22 19:21:18 +00:00
Michaël Banaan Ananas
638032fbeb i8085.c: Fixed inte callback not being called when the IE flag was cleared after the CPU received an interrupt. This fixes interrupts in n8080.c helifire and spacelnc. [Qwi Jibo] 2011-01-21 18:17:22 +00:00
Curt Coder
636a5ebc63 M6801 changes: [Curt Coder]
- implemented port 3 strobed mode
- fixed port writes some more
2011-01-21 11:21:30 +00:00
Roberto Zandona
3d307f2d42 toaplan2:
-Found a few more fixeight opcodes, by matching code in the interrupt routines with batsugun [Alex Jackson]
-Corrected fixeight V25 address map (the YM2151 and OKI6295 are at a different location than the other games) [Alex Jackson]
-Preliminary implementation of V25/V35 port output [Alex Jackson]
2011-01-20 17:35:27 +00:00
Curt Coder
a17a148fa0 M6801 changes: [Curt Coder]
- added operating mode enum
- fixed port writes
- implemented SCI status follower bits
2011-01-20 17:17:08 +00:00
Aaron Giles
ef1cb1442d Simplified UML parameters, as follows:
* immediates can be passed raw, no IMM() wrapper required (and it's gone now)
* fixed integer registers now use constants I0,I1,I2,etc instead of IREG(0),...
* same for float registers F0,F1,F2,etc instead of FREG(0)
* dynamic integer/float regs use inline functions ireg(),freg()
* MEM macro is now a lower-case inline function mem()

One further change on the horizon is to remove the UML_* macros in favor of
inlines.
2011-01-17 22:49:15 +00:00
Aaron Giles
aadd9211d2 Move memory accessors into the near cache for x64. 2011-01-17 21:30:25 +00:00
Miodrag Milanovic
1d7d5e7081 Removed PPC_MMU_ENABLED flag (no whatsnew) 2011-01-17 20:20:12 +00:00
Aaron Giles
f5c03d12e2 Redo most of the DRC/backend support as C++
Yes, it is intentional that the x86/x64 backends compile everywhere.

Backends are now derived from drcbe_interface and implement several
required overrides.

x86emit.h now uses namespaces so that the x86/x64 emitters can co-exist.

New file uml.h/uml.c actually describes the UML language, separating
out several concepts from drcuml.c.

Lots of other changes/fixes.
2011-01-17 03:43:54 +00:00
mariuszw1
7650b6d318 VC2008 compile fixes (no whatsnew) 2011-01-16 20:16:34 +00:00
Michaël Banaan Ananas
68fc4aeac3 added (but disabled) NMOS Z80 ld a,i/r quirk, see DIFF for info (no whatsnew)
btw: mlanding is playable if you enable it, but i believe it's just by luck since it posts "sound cpu error" later anyway
2011-01-16 19:10:19 +00:00
Fabio Priuli
d19c11eaa8 Fixing warning (it was a typo). 2011-01-16 17:50:47 +00:00
Angelo Salese
f1337ddfb6 Delete needless file as per AWJ 2011-01-16 14:25:12 +00:00
Angelo Salese
6d8cb11524 Added a mostly complete NEC V25/V35 CPU core, added working sound to Batsugun and hooked up proper V35-controlled interrupts in Cosmic Cop / Gallop and Kengo [Alex Jackson] 2011-01-16 14:23:07 +00:00
R. Belmont
c495397fa8 SH4: Port preliminary SH3 support from DRC. [R. Belmont] 2011-01-16 03:15:36 +00:00
R. Belmont
b85af379a8 SH4: cleanup and better common/interpreter separation [R. Belmont] 2011-01-16 00:35:56 +00:00
Curt Coder
25f1101204 Added FSAVE mode 2 support to the M68040 FPU. [Barry Rodewald] 2011-01-15 13:52:59 +00:00
R. Belmont
4e0a81e250 H8: Fix unterminated string buffer [R. Belmont, Belegdol] 2011-01-14 03:02:31 +00:00
Angelo Salese
b931b12a30 Fixed an ARM7 R15 bit ignoring behaviour while in ARM state, fixes Lupin the Third: the Typing ARM crashing when you coin it up. [Tim Schuerewegen] 2011-01-12 22:25:23 +00:00
Miodrag Milanovic
7e8ad4aae5 Fixed handling 80186 instructions [Phill Harvey-Smith] 2011-01-10 14:30:01 +00:00
Miodrag Milanovic
83768eaec6 Some HD61700 fixes from MESS (no whatsnew) 2011-01-10 14:16:06 +00:00
Aaron Giles
08d14a29e8 MSVC compatibility. 2011-01-07 05:19:45 +00:00
Miodrag Milanovic
0cc1b379e5 Added HD61700 CPU core used for emulate Casio PB-1000/PB-2000c in MESS [Sandro Ronco] 2011-01-06 22:00:43 +00:00
Aaron Giles
e884b694b2 Minor comment cleanup. 2011-01-06 18:27:05 +00:00
Aaron Giles
159e684763 C++-ified the DRC backend utility helpers. 2011-01-06 18:24:58 +00:00
Wilbert Pol
4245ddbc5e z80.c: Allow daisy chain functionality to be used in a situation where there are more interrupt sources besides the daisy chain devices. [Wilbert Pol] 2011-01-05 20:32:29 +00:00
Wilbert Pol
d195592e6c Fix compile error. 2011-01-05 20:28:26 +00:00
Aaron Giles
c12dd417cd Convert drccache to C++ 2011-01-05 16:33:00 +00:00
Miodrag Milanovic
449e97acbc Fixed debug compile (no whatsnew)
Couriersud: please take a look at my change, I have commented it but since not sure if is proper.
2011-01-05 08:50:38 +00:00
Aaron Giles
57d85d2f7f Improve TLB mismatch handling in PPC DRC, so that if we fill from
an empty entry, we re-dispatch to previously compiled code instead
of always recompiling the target. This greatly reduces the DRC
overhead on 603-based games.
2011-01-05 05:29:08 +00:00
R. Belmont
aceca7f753 V25: fix false warnings from some GCC versions [R. Belmont] 2011-01-05 02:15:53 +00:00
Aaron Giles
9e5207ce91 C++-ified drcfe and the associated frontends. You now create a
frontend by deriving from drc_frontend and implementing the
describe method.

RB, if you send me your latest SH4 WIP, I'll convert it for you
if this makes you cranky. :)
2011-01-04 15:54:16 +00:00
Aaron Giles
a5fff9c20c Include delay slots in checksum calculations.
Fixes Bomberman N64 boot.
2011-01-04 04:34:10 +00:00
Aaron Giles
5723a0da0b Fix case where branch delay slot straddles a page boundary and
the page check confirms that the block is paged in.

Fixes N64 LucasArts game booting.
2011-01-03 10:00:12 +00:00
Ryan Holtz
d899ca454f Fixed RSP core VRSQL implementation. [Harmony] 2011-01-02 23:27:52 +00:00
R. Belmont
188401b226 UPD7725: Fix compile on OSX (no whatsnew) 2011-01-02 22:26:22 +00:00
R. Belmont
b219fb7b69 Add uPD7725 16-bit DSP core and hookups for SNES hardware [byuu, R. Belmont] 2011-01-02 21:57:49 +00:00
Angelo Salese
fdb2347151 Better fix from AWJ 2011-01-02 20:24:18 +00:00
Angelo Salese
72a4a5f279 04147: raiden: crashes if you use -debug switch 2011-01-02 18:31:14 +00:00
Ryan Holtz
c8479d16ec Implemented proper TLB handling in the MIPS III interpreter. [Harmony] 2011-01-02 09:32:13 +00:00
Ryan Holtz
0b19d75add Fixed Compare interrupts in the MIPS III interpreter core. Aleck 64 games can now run under the MIPS III interpreter. [Harmony] 2011-01-02 06:28:49 +00:00
Ryan Holtz
933bd13e67 Fixed BADCOP exception handling in the MIPS III interpreter. [MooglyGuy] 2011-01-02 01:33:15 +00:00
R. Belmont
4f9b4ae380 Fix rule to ensure proper recompilation (no whatsnew) 2011-01-01 23:15:02 +00:00
R. Belmont
f8adb6f53c MIPS: make DRC selectable by #ifdef [R. Belmont] 2011-01-01 22:56:34 +00:00
R. Belmont
6af9e8dd9f ARM7+: Various cycle timing fixups [Tim Schuerewegen] 2011-01-01 20:23:46 +00:00
Miodrag Milanovic
6ac3011fa9 ARM7: fix for "39in1" (MAME) and removed a duplicate line [Tim Schuerewegen] 2011-01-01 17:44:37 +00:00
Ryan Holtz
f41e68da07 Removed fast IMEM and DMEM handlers from the RSP DRC in favor of the core memory system; fixes RSP DRC on 32-bit targets. [Harmony]
Changed DMADAC interleave in the Aleck 64 driver from 2 to 1; fixes monaural and poppy audio. [Harmony]
2011-01-01 11:58:37 +00:00
Miodrag Milanovic
db14e98dd0 - Added Rockwell PPS4 CPU core (not finished) [Miodrag Milanovic]
- Added GAME_MECHANICAL flag to mark games having mechanical interface (such as pinball,redemption, bowling games ...)
- Imported games from PinMAME as skeletons
2011-01-01 11:47:49 +00:00
Aaron Giles
99a26bc331 Cleanups and version bump. 2011-01-01 00:59:47 +00:00
Aaron Giles
5db7b9e8a3 Ok, last major rename for this round:
memory_region()        == machine->region()->base()
memory_region_length() == machine->region()->bytes()

region_info -> memory_region

Regex searches:

S: memory_region( *)\(( *)([^,&]+), *([^)]+)\)
R: \3->region\1\(\2\4\)->base\(\)

S: memory_region_length( *)\(( *)([^,&]+), *([^)]+)\)
R: \3->region\1\(\2\4\)->bytes\(\)
2011-01-01 00:41:25 +00:00
R. Belmont
6d02b55f4a ARM7: Use updated diff (no whatsnew) 2011-01-01 00:22:05 +00:00
Ryan Holtz
57917c6553 Fixed writes in the MIPS III interpreter. [MooglyGuy] 2011-01-01 00:02:30 +00:00
Aaron Giles
996e1c365c mame_rand() -> machine->rand() 2010-12-31 22:59:44 +00:00
Aaron Giles
3b41606ca0 running_device -> device_t
They both already existed. No sense in having two names for the
same object type.
2010-12-31 21:42:55 +00:00
Aaron Giles
ba6d1bd8a3 MDRV_* -> MCFG_*
There hasn't been a machine driver for many years.
2010-12-31 21:18:45 +00:00
Aaron Giles
b312c3c71f Made old MIPS interpreter compile. Whether it runs or not is a different
matter.
2010-12-31 21:00:15 +00:00
Aaron Giles
b921f65454 Add directxor parameter to direct memory accessors. Update all callers
that manually XORed addresses to pass the XOR instead.

This improves behavior when direct accessors hit non-RAM regions, or
when watchpoints are used, because we now know the original, un-xored
address and can fall back to standard read/write handlers properly.
Also fixes glitched disassembly when read watchpoints are enabled.
2010-12-31 17:55:41 +00:00
R. Belmont
3517c80e37 ARM7+ updates: [Tim Schuerewegen]
- Enhanced MMU with page fault support
- Preliminary 26-bit mode support
- Fixed bugs with S-flag operations on R15
- Fixed STRH involving R15
- Support for ARM models 7500 and 920T.
2010-12-31 16:14:01 +00:00
Ryan Holtz
0ea11333c6 Updated the RSP and RDP implementations to be largely bit-perfect and pixel-accurate. [angrylion, Harmony] 2010-12-31 07:29:47 +00:00
Angelo Salese
7ae0a6898e Fixed an ARM CPU core bug with pre-indexed addressing opcodes, that was preventing Poizone to boot [Tim Schuerewegen]
new working game
----------------------
Poizone [Tim Schuerewegen]
2010-12-28 23:24:53 +00:00
Angelo Salese
679f772779 Fixed LDM opcode register writeback in ARM CPU core [Tim Schuerewegen] 2010-12-27 14:25:05 +00:00
Phil Bennett
5f75b3dcf8 Assigned MB88xx interrupt sources unique vectors, as expected by the Arabian MCU program [Phil Bennett] 2010-12-24 11:15:18 +00:00
Aaron Giles
6f16e97623 Cleanups and version bump. 2010-12-23 09:50:42 +00:00
Angelo Salese
e8cfb9e513 Implemented a preliminary V25/V35 CPU core [Alex Jackson] 2010-12-23 02:46:39 +00:00
Phil Bennett
86fd47653b 04147: raiden: crashes if you use -debug switch [Alex Jackson]
---------- Forwarded message ----------
From: Alex Jackson <awj_in_japan@hotmail.com>
Date: Mon, Dec 20, 2010 at 3:37 AM
Subject: MT bug 04147 fix; trivial debugger fix
To: submit@mamedev.org


i86length.diff fixes MT bug 04147: raiden: crashes if you use -debug switch. My patch makes the i386 and nec disassemblers enforce the same maximum instruction length as CPUINFO_INT_MAX_INSTRUCTION_BYTES (previously the disassemblers always enforced a maximum length of 15 bytes, but the value of CPUINFO_INT_MAX_INSTRUCTION_BYTES varied between CPUs... this was my fault, sorry)

The maximum legal instruction length on the 80286 is 10 bytes, and on the 80386 and all later Intel and clone CPUs it's 15 bytes. Exceeding the limit causes an illegal instruction exception. Intel CPUs prior to the 80286, and NEC-V CPUs, don't enforce a maximum instruction length (they don't even have an "illegal instruction" exception), but the longest possible instruction without redundant prefixes is 8 bytes on both, so I've made that the maximum instruction length for disassembly purposes.

debugger.diff fixes a trivial bug in the debugger dump commands. 0x7f is not a printable character in either ASCII or UTF-8... so don't print it in the "ASCII" column when hex dumping.

--AWJ
2010-12-22 22:46:53 +00:00
Miodrag Milanovic
6387823ea6 i8085 cpu Fixed loading of reg A from debugger 'do' command [Robbbert] 2010-12-20 13:54:18 +00:00
R. Belmont
673f5bef0f H8: implement ldc #imm, ccr and rotr.w Rx for csplayh5 [R. Belmont] 2010-12-19 17:40:00 +00:00
Aaron Giles
6bfc3413e4 Cleanups and version bump. 2010-12-08 07:01:03 +00:00
R. Belmont
de0dabd29f m680x0: Many FPU and PMMU fixes and enhancements [Hans Ostermeyer] 2010-12-07 00:03:46 +00:00
Curt Coder
5bd39b69a1 Added missing CPU types to assert. (no whatsnew) 2010-11-22 15:13:16 +00:00
Miodrag Milanovic
975ae93fde Fixed interrupt handing in V810 core,and flag position in PCW [Miodrag Milanovic] 2010-11-19 13:19:26 +00:00
Angelo Salese
2ae85ae98b Added bare bones irq support to V810 CPU [Miodrag Milanovic] 2010-11-18 17:36:16 +00:00
Fabio Priuli
2917a254c3 tms7000: Corrected two opcodes: typo in inv_b
and JPZ was wrong in official TI document. [Gilles Fetis]

sent through MESS bugzilla and reviewed by Tim Lindner
2010-11-12 17:46:39 +00:00
Aaron Giles
92b3dd111f Cleanup & version bump. 2010-11-08 09:08:55 +00:00
Curt Coder
52276db123 Fixed MSVC compile. (no whatsnew) 2010-11-02 18:06:10 +00:00
Aaron Giles
a2ce61ac6c Converted the expression engine to C++, did the usual cleanup. 2010-11-01 07:48:02 +00:00
Wilbert Pol
5976655411 i286.c: Partially implemented protected mode. Fixed verw, verr, lar, lsl, and arpl instructions. [Wilbert Pol] 2010-10-31 15:29:10 +00:00
Wilbert Pol
dd12c245a8 i80186/i80286: Fixed bound instruction restart when prefixed with a segment. [Wilbert Pol] 2010-10-31 07:54:54 +00:00
R. Belmont
66ccc4c8a4 PPC: don't crash 601
(Aaron, please feel free to hate this and redo it correctly.  It does seem to work for me though).
2010-10-30 01:15:51 +00:00
R. Belmont
508c3c3677 M6805: Add extremely preliminary 68HC05EG support. 2010-10-29 02:13:12 +00:00
Wilbert Pol
ca8ed2cc36 i286.c: Moved call of i80286_urinit to CPU_INIT. Fixed display of PC in the debugger. [Wilbert Pol] 2010-10-28 20:45:35 +00:00
Andrew Gardner
1b872c9b0b Removes all std::strings from the dsp56k cpu core. (Not worth mentioning) 2010-10-23 07:05:44 +00:00
Aaron Giles
3ae00656d4 Cleanups and version bump. 2010-10-21 06:01:17 +00:00
Curt Coder
aa8bd5fbd3 Refactored the CDP1869 chip into a C++ device. [Curt Coder] 2010-10-19 13:03:57 +00:00
Curt Coder
0f268291ed Removed old CDP1802 CPU. (no whatsnew) 2010-10-19 13:01:57 +00:00
Aaron Giles
05421623da Fix custom mapping for dsp56k internal memory. 2010-10-19 04:40:28 +00:00
Curt Coder
3c3f26a66f Converted the RCA CDP1802 CPU into a C++ device. Refactored cidelsa.c to use the new RCA COSMAC CPU. [Curt Coder] 2010-10-18 12:13:58 +00:00
Aaron Giles
3e621b169b Cleanups and version bump. 2010-10-14 07:04:16 +00:00
R. Belmont
f1e355c62e SH2: Further improvements to PC_relative loads in the delay slot. 2010-10-07 03:18:08 +00:00
R. Belmont
9ea6e5de56 SH2: fix PC relative MOV in delay slot 2010-10-07 01:29:17 +00:00
Curt Coder
2fa7094eab Added INT1, INT2, INT3, DRQ0, DRQ1, TMRIN0, TMRIN1 input and TMROUT0, TMROUT1 output lines to the Intel 80186 CPU interface. [Curt Coder] 2010-10-06 12:35:12 +00:00
R. Belmont
a260f31b04 SH2DRC: Fix BSRF and JSR so delay slot insns can trash the calculated PR if they want 2010-10-05 02:07:51 +00:00
R. Belmont
caff2ee187 SH2: fix interpreter, runs fine again 2010-10-05 01:45:39 +00:00
Aaron Giles
0c9d45f0a2 Fix type found by clang. 2010-09-30 07:04:05 +00:00
Angelo Salese
e1a32f54d8 Fixed unaligned 16 and 32-bit i/o accesses in i386 CPU core [Barry Rodewald] 2010-09-29 11:42:38 +00:00
Scott Stone
1fb365862c Haze: Simplified VDP data reading to use read_word now that the RV bit of 32x is emulated (can use read-word on the 68k space without breaking Tempo Graphics)
Added a function to SH2 to allow the 32x to tell it when data is available to DMA, prevents excessive polling with high frequency timer in Chaotix, and improves performance in said game.
2010-09-29 02:01:20 +00:00
Angelo Salese
f5af59a6ff Fixed a SH-2 with TSTM opcode [R.Belmont] 2010-09-28 21:43:28 +00:00
Angelo Salese
5a212b726e Implemented support for SH-2 cycle steal mode, used by Fever Soccer [David Haywood] 2010-09-28 14:38:24 +00:00
Curt Coder
79c96d826d Fixed Fairchild F8 CPU interrupt handling. [Curt Coder] 2010-09-28 13:30:52 +00:00
Scott Stone
a038d11057 Haze: DMA fix to correct issues with Fever Soccer (no whatsnew) 2010-09-27 23:08:31 +00:00
R. Belmont
6bc248ae49 680x0: '030 MMU now emulates translation cache; fixed misinterpreted MMU opcodes [R. Belmont] 2010-09-27 16:39:18 +00:00
Angelo Salese
3f73813ebe Haze: not using the timers for the DMA causes issues in ST-V, I don't know why yet. (not worth) 2010-09-27 10:58:43 +00:00
Angelo Salese
24e2de5cc4 Give an option of how to handle the DMA timing... with or without the MAME timers (without is a lot faster..) (not worth) 2010-09-26 23:53:49 +00:00
Angelo Salese
992f1f7384 Put the SH2 DMA on a timer. This is needed because Knuckles Chaotix on the 32X can't be done with 'Instant DMA' due the SH2 DMA is used to read from a FIFO port which is being filled by the 68k during the transfer. [David Haywood]
Haze: "I need to review save state support in the core again, a few extra things probably need saving now.

It might be possible to avoid the high frequency timer if it causes too many performance issues by moving the update of the DMA to the EXECUTE loop instead.  
(I want to experiment with this before updating the save state support, however if somebody else wants to fix savestates in the meantime they're welcome, 
as long as they don't get offended if their code gets changed...)"
2010-09-26 22:55:28 +00:00
R. Belmont
2e11d3dc96 M68k: Add more conditionals and FGETEXP instruction [R. Belmont] 2010-09-21 02:25:21 +00:00
Aaron Giles
499a0d4161 Move device definitions out of the bottom of the file. They can be
declared with other variables at the top.
2010-09-19 20:57:20 +00:00
Aaron Giles
7a4744d31d Cleanups and version bump. 2010-09-19 05:09:00 +00:00
Angelo Salese
00c96e8632 Removed a misleading warning message, this is already supported by the CPU core (not worth mentioning 2010-09-13 20:49:35 +00:00
Aaron Giles
83a2fa7ba0 Convert ADSP21xx core to a modern CPU device. 2010-09-09 08:13:58 +00:00
Aaron Giles
446df7bd1f Fix unidasm compilation. 2010-09-08 19:25:41 +00:00
Aaron Giles
bd5bda4798 Minor cleanup. 2010-09-08 05:37:31 +00:00
Angelo Salese
0cbb217cdb Fixed a bogus Hu6280 CPU core bug with timer latch division values readings [Angelo Salese] 2010-09-07 17:26:42 +00:00
Aaron Giles
2dbd6f67f8 Converted ASAP CPU core from a legacy CPU core to a modern device.
Renamed device_execute_interface::m_icount to m_icountptr to avoid
commonly-named device values of m_icount.
2010-09-07 00:32:49 +00:00
Aaron Giles
0e672ba6eb Cleanups and version bump. 2010-08-30 15:20:58 +00:00
Angelo Salese
d4aa908f57 Bored about this message ... 2010-08-27 14:06:53 +00:00
Miodrag Milanovic
cf43f32176 m6800 - Fixed initial state of bit 7 and 6 of flag registers (according to documentation) [Miodrag Milanovic]
- Used lookup tables in opcode execution
m6809 - Used lookup tables in opcode execution
2010-08-27 09:12:49 +00:00
Phil Bennett
0145fb961e 03203: All sets in docastle.c and mrdo.c: Unable to enter Service Mode [Phil Bennett]
Z80: Set IFF1 and IFF2 to 0 on a reset [Phil Bennett]
2010-08-22 15:58:17 +00:00
Aaron Giles
a2f7346d90 I had originally wanted to convert the profiler to use scopes (e.g.,
create a stack class that started the profiler in the constructor
and stopped it in the destructor). Sadly, doing that causes gcc to
call out to hook up the unwind chain, and this tanks performance
quite badly, even when the profiler is off.

Since I had already class-ified profiler.c, I decided to keep the old
way of doing things but wrap it in the newer classes. So at least it
wasn't a complete waste of my time.

Search & replace:

  profiler_mark_start -> g_profiler.start
  profiler_mark_end -> g_profiler.end
2010-08-21 22:25:58 +00:00
Aaron Giles
e38adf825e Added mask-free versions of read_word/read_dword/read_qword to
address_space. Also added unaligned variants that can read
unaligned values. Rewrote the core handler as a template that
handles all cases, along with a simple unit test to verify that
everything is correct.

Updated 68k, v60, i86, and nec cores to use unaligned read/
write instead of their own stubs for handling misalinged reads.

Fixed memory management of ga2 decryption.
2010-08-21 18:40:01 +00:00
Curt Coder
d303a4f17d Imported the Hitachi HCD62121 CPU core from MESS. 2010-08-20 17:32:03 +00:00
Curt Coder
5cfa64098e ARM7 core fix from Aaron. (no whatsnew) 2010-08-20 17:29:10 +00:00
Miodrag Milanovic
8f0fae278c Fix for i286 regression (no whatsnew) 2010-08-20 16:55:22 +00:00
Angelo Salese
f487d31c1a Various sm8500 CPU core fixes [Robbbert] 2010-08-20 12:21:17 +00:00
Angelo Salese
0d99de8361 Removed excessive HALT_LINE call, fixes Jag BIOS roar sound (not worth mentioning) 2010-08-20 11:43:07 +00:00
Andrew Gardner
eb93451a1b [no whatsnew] dsp56k: Further removal of std::strings.
(svn revision #9999 - woot!)
2010-08-20 06:11:12 +00:00
Phil Bennett
a24f5b8358 Of course not, OG. 2010-08-19 20:17:55 +00:00
Aaron Giles
621a2faa2a Remove final set of legacy inlines from memory.h. Mostly affects CPU
cores, which all now cache a copy of space->direct() and use it for
direct accesses.
2010-08-19 16:10:19 +00:00
Andrew Gardner
9bbc2e2f00 [no whatsnew] dsp56k : Weaning the core off std::strings.
(Sorry for jamming this in the middle of some major system changes.
 It shouldn't collide much, if at all.)
2010-08-19 15:40:06 +00:00
Aaron Giles
44c78c4939 Remove most of the temporary inline helpers.
The only one that touched a lot of drivers is this one:

S: memory_set_decrypted_region( *)\(( *)([^,]+)( *),( *)
R: \3->set_decrypted_region\1\(\2
2010-08-19 14:19:38 +00:00
Aaron Giles
a86a4c3684 Remove a level of indirection when calling m68000 memory handlers. 2010-08-19 14:04:49 +00:00
Aaron Giles
0edda6dda2 Remove memory_read/write_byte/word/dword/qword* variants. Again, this is mostly
bulk search & replace:

S: memory_read_([bytewordq]+)_[0-9lbe_maskd]+( *)\(( *)([^,]+)( *),( *)
R: \4->read_\1\2\(\3

S: memory_read_([bytewordq]+)( *)\(( *)([^,]+)( *),( *)
R: \4->read_\1\2\(\3

S: memory_write_([bytewordq]+)_[0-9lbe_maskd]+( *)\(( *)([^,]+)( *),( *)
R: \4->write_\1\2\(\3

S: memory_write_([bytewordq]+)( *)\(( *)([^,]+)( *),( *)
R: \4->write_\1\2\(\3

Gets 99% of the cases.
2010-08-19 08:27:05 +00:00
Aaron Giles
3598b772bc Replace "const address_space" with "address_space" throughout the system.
The purpose of making it const before was to discourage direct tampering,
but private/protected does a better job of that now anyhow, and it is
annoying now.

    s/const[ \t]+address_space\b/address_space/g;

Is basically what I did.
2010-08-19 07:26:14 +00:00
Aaron Giles
dd19e512c0 Massive memory system change. This is another step along the path toward
supporting cleaner implementations of drivers in the explicitly OO world.
Expect a follow-on of several more changes to clean up from this one, which
deliberately tried to avoid touching much driver code.

Converted address_space to a class, and moved most members behind accessor
methods, apart from space->machine and space->cpu. Removed external references
to 8le/8be/16le/16be/32le/32be/64le/64be. All external access is now done via
virtual functions read_byte()/read_word()/etc. Moved differentiation between
the endianness and the bus width internal to memory.c, and also added a new
axis to support small/large address spaces, which allows for faster lookups
on spaces smaller than 18 bits. 

Provided methods for most global memory operations within the new address_space 
class. These will be bulk converted in a future update, but for now there are
inline wrappers to hide this change from existing callers.

Created new module delegate.h which implements C++ delegates in a form that 
works for MAME. Details are in the opening comment. Delegates allow member 
functions of certain classes to be used as callbacks, which will hopefully 
be the beginning of the end of fetching the driver_data field in most 
callbacks. All classes that host delegates must derive from bindable_object.
Today, all devices and driver_data do implicitly via their base class.

Defined delegates for read/write handlers. The new delegates are always
passed an address_space reference, along with offset, data, and mask. Delegates
can refer to methods either in the driver_data class or in a device class.
To specify a callback in an address map, just use AM_READ_MEMBER(class, member).
In fact, all existing AM_ macros that take read/write handlers can now accept
delegates in their place. Delegates that are specified in an address map are
proto-delegates which have no object; they are bound to their object when
the corresponding address_space is created.

Added machine->m_nonspecific_space which can be passed as the required
address_space parameter to the new read/write methods in legacy situations 
where the space is not provided. Eventually this can go away but we will
need it for a while yet.

Added methods to the new address_space class to dynamically install delegates
just like you can dynamically install handlers today. Delegates installed this
way must be pre-bound to their object.

Moved beathead's read/write handlers into members of beathead_state as an
example of using the new delegates. This provides examples of both static (via
an address_map) and dynamic (via install_handler calls) mapping using delegates.

Added read/write member functions to okim6295_device as an example of using
delegates to call devices. Updated audio/williams.c as a single example of
calling the device via its member function callbacks. These will be bulk
updated in a future update, and the old global callbacks removed.

Changed the DIRECT_UPDATE_CALLBACKs into delegates as well. Updated all users
to the new function format. Added methods on direct_read_data for configuring the
parameters in a standard way to make the implementation clearer.

Created a simple_list template container class for managing the common
singly-linked lists we use all over in the project.

Many other internal changes in memory.c, mostly involving restructuring the code
into proper classes.
2010-08-19 06:57:51 +00:00
Phil Bennett
2e53eacc98 03755: soldivid: No music after loading savestate (or -autosave) [Phil Bennett]
Added missing save-state registration entries to the SH-2 core [Phil Bennett]
2010-08-18 23:40:14 +00:00
R. Belmont
0829705164 Attempt to fix reported GCC 4.5 problems [R. Belmont] 2010-08-17 01:00:44 +00:00
Phil Bennett
e4e7afe98c Removed several exported non-const global variables from the core [Atari Ace]
---------- Forwarded message ----------
From: Atari Ace <atari_ace@frontier.com>

Date: Sat, Aug 7, 2010 at 9:38 PM
Subject: [patch] Eliminate more exported non-const globals from MAME core
To: submit@mamedev.org
Cc: atariace@hotmail.com


- Hide quoted text -
Hi mamedev,

This patch eliminates a few more non-const global vars coming out of
the MAME core.  Vectorram/vectorram_size from vector.h in fact is
unused by the core, it's really for avgdvg support, and is also
confusingly used by segag80, so most of the patch is disentangling
those uses.

~aa
2010-08-13 08:54:21 +00:00
Aaron Giles
ab18e234b0 Cleanups and version bump. 2010-08-12 04:24:53 +00:00
Andrew Gardner
88bbeda462 dsp56k.c : Remove globals from dsp56k cpu core. [AtariAce] 2010-08-10 05:25:22 +00:00
Andrew Gardner
0946c173cb dsp56k : Hooked up new execution engine. [Andrew Gardner] 2010-08-07 18:42:59 +00:00
Andrew Gardner
7543a1a9a4 The dsp561xx CPU core now generates accurate disassembly for Konami Polygonet hardware
(verified against Motorola's reference disassembler). [Andrew Gardner, Stiletto]
2010-08-04 05:11:00 +00:00
Aaron Giles
fe47da274e Return to type safety. Changed address maps back into functions that build
up the definition, rather than the whole tokenizing system, which lost type
checking. Added a new module addrmap.c which implements the address map
classes, and changed the macros to call methods on the address_map and
address_map_entry classes which are strongly typed.

Fixed a few incorrectly specified memory map entries along the way. Please
double-check to make sure the behavior is expected in: twincobr.c, lordgun.c,
galaxold.c.

This change also means that since the address_maps are now constructor
functions, they are detected when not used, so a number of #ifdef UNUSED_CODE
were added around dangling address map definitions.

Also included with this change:
- removed cputag_clocks_to_attotime() and cputag_attotime_to_clocks() in
   favor of just expanding the class
- same for cputag_suspend() and cputag_resume()
2010-08-01 21:04:03 +00:00
Aaron Giles
0bfacc56e6 Cleanups and version bump. 2010-07-29 13:59:41 +00:00
Phil Bennett
10d74db991 Fixed HD63701 SLP opcode [Sandro Ronco]
---------- Forwarded message ----------
From: Sandro Ronco <sandro.ronco@gmx.com>
Date: Mon, Jul 26, 2010 at 6:07 PM
Subject: [HD63701]Fix slp opcode
To: submit@mamedev.org


Fixed SLP opcode basing on HD63701 and HD6303 datasheet.
This is need for psion driver in MESS, but I did some testing in MAME
and I have not seen regressions.
Probably nobody noticed this before because this opcode is almost
unused in arcade machine.

If you want have a confirmation of this you can see the diagram at
page 14 of the HD63701 datasheet or at page 24 of the HD6303
datasheet, where it is clear that the "sleep cancel signal" is not
conditional at the IRQ mask.

Regards

Sandro Ronco
2010-07-29 07:08:29 +00:00
Quench
6f5d3a09d1 Corrected Ameri Darts audio playback rate.
This exposed some cycle timing errors in the TMS32010 CPU
core which are also fixed. [Quench]
2010-07-27 15:34:59 +00:00
Wilbert Pol
de1117b63a arm7.c: Added big endian version of the arm7 cpu. The 3do uses an arm6 in 32bit mode which is actually implemented by the arm7 core. 2010-07-26 16:02:45 +00:00
Wilbert Pol
18785817cb arm.c: Added a big endian version of the arm2/3/6 cpu core and cleaned up the little/big endian handling. [Wilbert Pol] 2010-07-25 13:42:34 +00:00
Wilbert Pol
73de5b8070 arm.c: Fixed word reading from non-aligned address in big endian mode. [Wilbert Pol] 2010-07-24 18:44:30 +00:00
Wilbert Pol
14b2eec6b7 arm.c: Added big endian mode support to the LDRB and STRB instructions. [Wilbert Pol] 2010-07-22 20:18:25 +00:00
Aaron Giles
7ae55db1ec Cleanups and version bump. 2010-07-22 05:24:06 +00:00
R. Belmont
9433e80b41 RSP: Fix sign issue in VCL opcode [angrylion] 2010-07-22 02:25:53 +00:00
Quench
4f7527c583 Added TMS32015 and TMS32016 CPU variants to the TMS32010 core.
Fixed LST instruction which was sometimes adjusting internal RAM
banking incorrectly.  [Quench]
2010-07-20 15:55:51 +00:00
Michaël Banaan Ananas
f03b568df8 mt 3536 bugfix (Atari Ace) 2010-07-17 19:38:48 +00:00
Wilbert Pol
76c8372f25 lr35902.c: Added the speed register to the register list to allow it to be changed and retrieved again. [Sandro Ronco] 2010-07-17 13:04:04 +00:00
Phil Bennett
5573c3f703 Allow the non-DRC RSP core to build again
(controlled by a #define like the SH-2 core) [Atari Ace]

---------- Forwarded message ----------
From: Atari Ace <atari_ace@verizon.net>

Date: Mon, Jul 5, 2010 at 3:50 PM
Subject: [patch] Fixup non-DRC rsp core
To: submit@mamedev.org
Cc: atariace@hotmail.com

Hi mamedev,

This patch fixes the non-DRC rsp core to be buildable again
(controlled by a #define like the sh2 core).  It also cleans up the
whitespace/commented-out code in that core as well.

~aa
2010-07-15 11:22:07 +00:00
Phil Bennett
84d2bf08e9 Added some missing makefile dependencies [Atari Ace] 2010-07-15 11:15:35 +00:00
Phil Bennett
616ea71eb6 * Fixed some bugs in the MB88xx CPU core [Alex Jackson] 2010-07-15 10:53:29 +00:00
R. Belmont
53b25817d0 MAMEdev kant spel (Ubuntu/Canonical cares about this) [wallyweek] 2010-07-08 14:10:23 +00:00
Aaron Giles
20fe094c0e Remove the global clock accessors and cpu_* aliases:
cpu_get_clock -> device_get_clock
cpu_set_clock -> device_set_clock
cpu_get_clockscale -> device_get_clock_scale
cpu_set_clockscale -> device_set_clock_scale

Search: device_get_clock([ \t]*)\(([ \t]*)([^)]+)
Replace: \3->unscaled_clock\1\(\2

Search: device_set_clock([ \t]*)\(([ \t]*)([^,]+),[ \t]*
Replace: \3->set_unscaled_clock\1\(\2

Search: device_get_clock_scale([ \t]*)\(([ \t]*)([^)]+)
Replace: \3->clock_scale\1\(\2

Search: device_set_clock_scale([ \t]*)\(([ \t]*)([^,]+),[ \t]*
Replace: \3->set_clock_scale\1\(\2
2010-07-07 21:01:36 +00:00
R. Belmont
9580049784 Fix SH-2 interpreter [Atari Ace] 2010-07-07 01:27:54 +00:00
Aaron Giles
30662dcdef Cleanups and version bump. 2010-07-06 17:30:28 +00:00
Aaron Giles
5d21c672af Moved debugging structure away from CPUs only and attached to all
devices. Debugger now creates one for each device. C++-ified most
debugger operations to hang off the debugging class, and updated
most callers. This still needs a little cleanup, but it fixes most
issues introduced when the CPUs were moved to their own devices.

Got rid of cpu_count, cpu_first, cpu_next, etc. as they were badly 
broken. Also removed cpu_is_executing, cpu_is_suspended,
cpu_get_local_time, and cpu_abort_timeslice.

Some minor name changes:
  state_value() -> state()
  state_set_value() -> set_state()
2010-07-06 00:52:36 +00:00
Aaron Giles
c70c5fee5a Created CPU-specific device types for all CPUs, using new macros
DECLARE_LEGACY_CPU_DEVICE and DEFINE_LEGACY_CPU_DEVICE. Changed CPUs
to be their own device types, rather than all of type CPU with a
special internal subtype. Note that as part of this process I removed
the CPU_ prefix from the ALL-CAPS device name, so CPU_Z80 is just
plain old Z80 now. This required changing a couple of names like
8080 to I8080 so that there was an alphabetic first character.

Added memory interfaces to the list of fast-access interfaces. To do
this properly I had to add a separate method to devices which is
called immediately after construction, when it is possible to perform
dynamic_casts on fully-constructed objects. (This is just internal,
no changes necessary to the devices themselves.)

Some additional notes:
 * SH2 and SH4 had typedefs that conflicted with their CPU_-less names
    so I bulk renamed to structures to sh2_state and sh4_state; RB, feel
    free to choose alternate names if you don't like 'em
 * SCSP was caught doing something to the 3rd indexed CPU. Since several
    systems that use SCSP don't even have 3 CPUs, I had no idea what
    this was supposed to do, so I changed to it reference "audiocpu"
    assuming that stv was the assumed target. This is really gross and
    should be a configuration parameter, not a hard-coded assumption.
2010-07-03 00:12:44 +00:00
Aaron Giles
553ec7f427 Some more cases to directly access the state interface instead of using the old
cpu_* macros. Also changed the ADSP21xx callbacks to take a cpu_device.
2010-07-02 15:12:58 +00:00
Aaron Giles
de771cbfeb Remove the following functions:
cpu_get_total_cycles()   == cpudevice->total_cycles()
  cpu_clocks_to_attotime() == cpudevice->cycles_to_attotime()
  cpu_attotime_to_clocks() == cpudevice->attotime_to_cycles()

In some cases, I updated existing code that fetched and cached 
devices to fetch them as cpu_device so that these can be called
without casting.

In other cases, I did the quick & dirty thing which was to downcast
a generic device to a cpu_device and then call the function.

Note that cpu_clocks_to_attotime() and cpu_attotime_to_clocks()
were previously mapping to the device-level functions
clocks_to_attotime() and attotime_to_clocks(). This was different
behavior than before the big devices change, so with this update
I have fixed it to match the previous behavior (i.e., map cycles
not clocks).

This may impact timing of drivers that used these functions on
CPUs that have clock dividers or multipliers.
2010-07-01 00:34:46 +00:00
Aaron Giles
dfc04871c4 Remove most other instances of cpu_get_total_cycles. 2010-06-30 23:35:26 +00:00