direct byte, word, dword, and qword accessors for all bus sizes,
there are now masked word, dword, and qword accessors for all
bus sizes.
IMPORTANT: masks that are passed to the _masked_* functions are
NOT inverted. Although inverted masks are still passed to callback
functions, when you request a masked read or write the masks should
represent the bits you want.
Updated the various MIPS cores that use these functions to invert
their masks.
Added support in the T-11 core for an external vector via irq_callback.
Apparently the hardware actually did support this and it is necessary
for emulating the BK 0010/11 computer in MESS.
accordingly.
Added new functions for dynamically installing device memory
read/write handlers.
Updated install_memory_XXX_handler() functions to take a machine
parameter. Updated all drivers accordingly.
Merged installation of read and write handlers where appropriate.
Simplified memory.c code for dynamic installation so that a single
function handles all the work; a NULL read or write handler
indicates not to install anything for reads or writes.
src/emu/cpu/m68000/m68kmame.c:
src/emu/cpu/minx/minx.c:
- Fixed compilation errors on CPU cores not enabled in MAME
src/emu/inptport.c:
src/emu/inptport.h:
- Readded input_port_set_digital_value() (which is needed for natural
keyboard inpout in MESS)
- Added a running_machine parameter to inputx_update()
only remaining form is the one that takes a pointer parameter.
Added macros for STATE_PRESAVE and STATE_POSTLOAD to define common
functions. Added machine parameter to these functions.
Updated all drivers and CPU/sound cores to use the new macros
and consolidate on the single function type. As a result pushed
the machine parameter through a few initialization stacks.
Removed unnecessary postload callbacks which only marked all tiles
dirty, since this is done automatically by the tilemap engine.
trace through in a debug build, yet should operate the same as before.
Created a complete set of functions for all databus sizes (8,16,32,64) and
all endiannesses. A few functions are redundant, but it is now very clear
which functions to use in which scenarios. It is also now possible to rely
on being able to access values of 8, 16, 32 or 64 bits via the built-in
accessors without fear of crashing.
Updated all cores using 8-bit handlers to explicitly call the 8-bit handlers
with the appropriate endianness.
Fixed a few games which were calling n-bit handlers directly to use the
generic forms. In the future, this is all the access drivers will have.
fixed reading from SXYP
fixed reading from IRGB
fixed writing to LZCR
fixed sign extension of GTE control registers
fixed writing to FLAG
New games added or promoted from NOT_WORKING status
---------------------------------------------------
1 on 1 Government (JAPAN)
Added ability to test the instruction/data cache ram. The scratchpad and BIU register are now handled internally to the CPU.
All writes are performed with masks. SWL/SWR used to be implemented with two writes ( one byte and one word ) when writing three bytes, now it only ever performs one. Byte and Word writes use masks as they leave the rest of the register on the bus, which can be picked up by larger registers.
The read/write functions to use are cached when the SR bits are updated, as are the bad address masks.
Added coprocessor 1 & 3 support, though they don't do anything useful.
All loads now go through the delay pipeline, a lwl/lwr will grab the value out of the pipeline if it's updating the same register.
Added undocumented behaviour of BLEZ/BGTZ. The comparison for zero can be changed by specifying an alternate register in the RT field ( the documentation says you should always use register 0 ).
Restricted to 16 COP0 registers & generate an exception if any of the 5 for the MMU are used.
Added BCF/BCT instructions, although I have found no conditions that affect them yet.
Generates an exception if any MMU instructions are executed.
Sets the CE instruction for all exceptions, not just those involving a coprocessor. The bits of the opcode that specify the coprocessor are grabbed no matter what the instruction.
Added TAR register and BT bit in SR. When an exception occurs during a branch, BT determines whether it was taken or not. The TAR register gets set to the destination of the branch.
Fixed the BD bit when you are in a branch delay slot and you didn't take the branch, this shows up in the pipeline as !pc.
Fixed branches within a branch delay slot.
Multiply & divide instructions can be aborted if you write to HI/LO before reading the result.
Added data breakpoints, you don't appear to be able to set breakpoints on any of the addresses internal to the CPU.
Multiply/divide/GTE instructions can execute when an exception is taken, although the EPC indicates that it hasn't. The BIOS avoids rerunning GTE instructions as they are destructive, so you have to make sure they run.
Added bus error handling, PSXCPU is limited to 8mb of ram & any access outside this range will trigger an exception. I believe this is to be an internal limit.
Added CXD8611R as a specific CPU type, System 12 appears to allow more than 8mb of ram & it's possible that this is different.
Mapped out all instructions to either generate an exception or ignore bits.
Updated the disassembler to match the decoding.
Fixed disassembling of branch instructions in a branch delay slot.
Lui checks for a ori/addiu following and will show you the result.
Added step over/out support.
Fixed standalone disassembler.
All occurrences of ACCESSING_LSB, ACCESSING_MSB, ACCESSING_LSB16, ACCESSING_MSB16, ACCESSING_LSB32, ACCESSING_MSB32, ACCESSING_LSW32, ACCESSING_MSW32 & simple mem_mask checks have been replace with the new macros.
The old macros are gone.
- implemented serial input/output
- fixed XAD/LDD, XIS1, RMB3 opcodes
- fixed clock divider
- fixed internal memory map size
- added some cpu variants
As a result, Draco at least initializes the AY-8910 now.
Subject: SH-4 debugger output fix
This patch fixes "garbage" (newlines) in the debugger window when
debugging the SH-4 CPU.
It also conatins a small comment fix in video/playch10.c and the
removal of some yet unused or just obsolete macros in emu/cpuint.h.
This is still WIP bug I've been working on it for sveral weeks and I want to get it out before leaving for holidays.
- Fixed Alpha 8201/830x MCU simulation.
- all hacks from the equites driver removed
- fixed equites restart position after going underground
- fixed hvolume, splndrbt 2 players
- removed hacks from exctsccr2
- fixed CPU gameplay in shougi
- Gekisou promoted to working
- added dump of Alpha 8201 MCU to games that use it (the ROM isn't used yet, HMCS44 CPU core needs to be written first)
- major cleanup of the mess in equites.c:
- many thanks to Corrado Tomaselli for precious hardware info.
- implemented bg perspective scrolling using PROMs
- fixed sprite flip & disable
- fixed bg color
- converted bg to tilemaps
- fixed fg banking
- fixed screen flip
- removed meaningless banking of player inputs
- added UI adjuster for MSM5232 frequency
- MSM5232 volume control
- fixed MSM5232 noise LFSR formula (done by Jarek Burczynski; thanks to Corrado Tomaselli for samples)
- changed MSM5232 emulator to output channels separately
- added output of SOLO channels to MSM5232 emulator.
- mametesters bugs fixed:
- 00217 splndrbt: On boot the pcb displays a clean light blu screen while in mame there is a black road.
- 00220 splndrbt: Concerning the gfx, on the pcb the background is not linear as shown in mame.
- 00223 splndrbt: On the first level when you pass the asteroid belt the star road should be light blue instead of black like mam
- fixed champbas inputs
- merged talbot with champbas, some driver clenaup
- fixed shougi inputs
- switched exctsccb to use the correct gfx ROMs (matches screenshot found in 01058 exctsccb: Exciting soccer bootleg should be placed in champbas.c.)
- fixed sprite bpp in exctscrr, removed the horrible hacks that were used to fix colors and transparency.
- fixed sound clipping in exctsccr
Subject: small fix to cpu.mak
Attached please find a small patch to include M68000 CPU only when you're
compiling a build with the M68K. this is needed to e.g. compile tiny
builds .
Subject: patch for SVP (Sega Virtua Processor) emulation
hello,
this patch adds support for Sega Virtua Processor, to run
Genesis/MegaDrive version of Virtua Racing, intended to be used by
MESS. It consists of a CPU core SSP1601, and updates in megadriv.c:
* SSP1601 replaces SSP1610, as it has been confirmed by Stiletto and
other sources that SVP actually contains SSP1601. The current SSP1610
is placeholder only (nearly completely unimplemented) anyway.
* Changes in megadriv.c add a new driver for Genesis/MegaDrive+SVP
combination, also add SVP memory controller logic and memory map.
The diff has already been reviewed by Reip and SSP1610 removal was one
of his suggestions (SSP1610 is not used by any drivers).
Changed slapstic management to always install an opbase handler to more
aggressively catch code executing in the slapstic region. Updated all
drivers to separate the slapstic region of ROM into a different ROM
section from the fixed ROM.
MRA*_BANK*/MRA*_BANK* -> SMH_BANK*
MRA*_RAM/MRA*_ROM -> SMH_RAM
MRA*_ROM/MWA*_ROM -> SMH_ROM
MRA*_NOP/MWA*_NOP -> SMH_NOP
MRA*_UNMAP/MWA*_UNMAP -> SMH_UNMAP
This removes the silly need for a bunch of redundant constants
with faux type definitions that didn't buy anything.
Moved some memory system constants into memory.c.
Converted address maps to tokens. Changed the address_map structure
to house global map-wide information and hung a list of entries off
of it corresponding to each address range. Introduced new functions
address_map_alloc() and address_map_free() to build/destroy these
structures. Updated all code as necessary.
Fixed several instances of porttagtohandler*() in the address maps.
Drivers should use AM_READ_PORT() macros instead.
ADDRESS_MAP_EXTERN() now is required to specify the number of
databits, just like ADDRESS_MAP_START.
Removed ADDRESS_MAP_FLAGS() grossness. There are now three new macros
which replace its former usage. ADDRESS_MAP_GLOBAL_MASK(mask)
specifies a global address-space-wide mask on all addresses. Useful
for cases where one or more address lines simply are not used at
all. And ADDRESS_MAP_UNMAP_LOW/HIGH specifies the behavior of
unmapped reads (do they come back as 0 or ~0).
Changed internal memory mapping behavior to keep only a single
address map and store the byte-adjusted values next in the address
map entries rather than maintaining two separate maps. Many other
small internal changes/cleanups.
All callers that used 0 for the screen number now use machine->primary_screen
As a gap meassure, Where necessary, create a parallel set of video_screen_*_scrnum functions that take scrnum
All callers that specified a specific screen number now call the *_scrnum versions
Changed game info screen and overlay UI to display the screen tag instead of screen number
Updated all call-through handlers appropriately. Renamed read8_handler to
read8_machine_func, replicating this pattern throughout.
Defined new set of memory handler functions which are similar but which
pass a const device_config * in place of the running_machine *. These are
called read8_device_func, etc. Added macros READ8_DEVICE_HANDLER() for
specifying functions of this type. Note that some plumbing still needs to
happen in memory.c before this will work.
This check-in should remove the need for the global Machine and in turn
"deprecat.h" for a lot of drivers, but that work has not been done. On
the flip side, some new accesses to the global Machine were added in the
emu/ files. These should be addressed over time, but are smaller in
number than the references in the driver.
suffixed with _func. Did this throughout the core and
drivers I was familiar with.
Fixed gcc compiler error with recent render.c changes.
gcc does not like explicit (int) casts on float or
double functions. This is fracking annoying and stupid,
but there you have it.
video_screen_get_time_until_update().
Fixed CCPU and QB3 to no longer rely on cpu_scalebyfcount().
Fixed busted timing in the CCPU core. Changed watchdog to
count internally rather than using external watchdog support.
Altered CCPU to accept interrupt signals from the driver.
Updated clocks in the cinemat driver to be derived from the
clock crystal.
* added ATTR_FORCE_INLINE to osdcomm.h
* added ATTR_NONNULL
* moved U64 S64 fram mamecore.h to osdcomm.h
* define SETJMP_GNUC_PROTECT() in osdcomm.h for use in ppc602, ppc603
- Added a video_screen_register_vbl_cb() function for registering VBLANK callbanks
- Changed inptport.c and debugcpu.c to make use the VBLANK callbacks
- Added video_screen_get_time_until_vblank_start()
- CCPU and anything using cpu_scalebyfcount() are currently broken
- I did some fairly extensive testing, but this is a very signficant internal change,
so some things may have broke
Subject: uPD7801, uPD78C05, and uPD78C06 cpu cores added to the uPD7810
cpu core
This patch adds basic support for the NEC uPD7801, uPD78C05, and
uPD78C06 cpus to the uPD7810 cpu core.
- I still left drawgfx.c as is, the only piece of code that used any of the functions in drawgfx
was s2636.c -- everything else uses 8-bit bitmaps as a replacement for a two dimensional array
* verinfo: New syntax.
verinfo now uses the following syntax: verinfo.exe -b windows|winui|mess.
Does not depend on compile time defines any longer.
* makefile will include - if it exists - src/osd/$(CROSS_BUILD_OSD)/build.mak.
This was necessary to enable cross builds for winui. winui adds mkhelp to build tools and the rules for mkhelp thus had to be moved outside src/osd/winui/winui.mak
* Tested on Linux 64bit, Linux 32bit, Windows 32bit mingw, Windows 32bit MSVC
* Cross build environment to be posted to the list
Hi mamedev,
Here's my periodic batch of code cleanups. The usual batch of adding static/const plus some include fixes. In addition, I reverted some of the changes to build.mak from u1 which made some MSVC builds fail, and adjusted/optimized an m10.c gfx_layout. I also added some missing cores to cpuintrf.c, sndintrf.c and added some missing #if's to 5220intf.c.
~aa
moved decryption table setup to 'config' struct for the CPU.
added latest tables from robiza, making Risky Challenge playable, promoted it to working
told CPU core to not decrypt code after brkn instruction, enabling it again on iret, allowing me to remove several 'don't decrypt range' hacks in robiza's code.
updated all drivers accordingly.
currently the disassembly is a bit weird now, this will need looking at.
Samuele Zannoli:
- Add SH4 I/O ports
- Connected the 93C46 of the naomi and the x76f100 of the rom board and filled them with dummy data to satisfy the BIOS
- Implemented some of the JVS transfers that will be needed to use the controls
- Implemented ROM board DMA
- Set proper NAOMI RAM sizes (32 MB main, 8 MB for AICA)
- Improved PVR-TA graphics emulation
Deunan Knute:
- Set proper ARM7 clock. (Yes, it's really that slow!)
Subject: [patch] CPU/SOUND independence fixes
Hi mamedev,
Here's some updates to the CPU/SOUND cores to improve build
independence. While I was at it, I rescued the M65CE02 core from
bitrot hell (perhaps m65ce02.[ch] should just be deleted), and fixed
some MESS cores that were broken by the deprecat.h changes.
Subject: [patch] Fix some comments
Hi mamedev,
The following patch updates the initialization comments at the top of
mame.c and corrects/adds a few filename declarations at the top of a
handful of files.
~aa
- Added some instructions to the H8/30xx CPU:
or.l ERs, ERd
rotl/shal.l ERd
not.l/neg.l ERd
exts.w Rd
sub/or/xor.l #Imm:32, ERd
bset/bnot/bclr.b Rn, @ERd
bst/bist.b #Imm:3, @ERd
bnot.b #Imm:3, @ERd
- Added H8/3007 & H8/3044 variants with their memory maps.
Preliminary implementation of the H8/3007 timers.
(a make clean is required)
P.S.
I've moved the docs we have in docs/cpu/H8-30xx and added a couple more.
Roms are in roms/current/p/puzzlet.zip
a new compile-time define (ENABLE_DEBUGGER). This means that MAME_DEBUG no longer means
"enable debugger", it simply enables debugging features such as assertions and debug code
in drivers.
Also removed the various levels of opbase protection in memory.h and always just turned
on full bounds checking.
Fixed build break due to missing ampoker.lay -> ampoker2.lay renaming.
The idea is to create extra work if a driver wants to use these and hopefully
gives an incentive to look for an alternate solution
- Added #include of deprecat.h that rely on these contructs
- Removed a bunch of unneccassary #include's from these files
Subject: z80gb cpu core patch
Changes:
- Small timing fixes when leaving HALT state.
- Fixed bug in retrieving Z80GB_SPEED pseudo register.
--
From: Wilbert Pol [mailto:wilbert@jdg.info]
Subject: Re: timer_set_global_time patch
This patch for the z80gb cpu core also fixes my problems without the
need to recode a lot of things:
- Split the execution of an instruction into separate fetch and
execute phase.
Subject: [patch] Fix C4305 warnings, other MSVC tweaks
Hi mamedev,
This patch is a bit of a potpourri. It is the result of enabling most
of the suppressed warnings when using MSVC compilers and seeing what
issues arose with different compilers (I used 70,71,80,90). Two of
the warnings were judged to be useful to enable and methodically fix.
Some issues spotted by the other warnings were also fixed.
1. Fixed issues flagged by MSVC warning C4305 (type truncation).
Almost all of these are harmless double->float narrowing in
initializers, but one warning spotlighted a bug in segasyse.c, where
code to use a higher sprite number had no effect due to the
insufficient range of UINT8.
2. Removed /wd4550 for VS7/VS71 compilers (expression evaluates to a
function which is missing an argument list). There are no cases of
this warning currently, and if there were they would most certainly be
bugs. This also allowed the warning suppression lists to be remerged
for VS7 and VS2005.
3. Decoupled intrinsic support decisions from PTR64 in eivc.h.
4. Fixed some VS7-specific issues (OPTIMIZE=0 at least compiles now).
That compiler doesn't support "long long" or "ll" (rsp.c/dkong.c).
5. Added a missing case statement in sm8500d.c. Noticed while
reviewing dead code warnings.
6. Replaced a number of static constants with an enum in sidenvel.h.
This is unrelated to the rest of this patch, but it was overdue to be
done.
- Final pass on single-stepping behavior [SGINut]
- Corrected VRCP element lookup [SGINut]
- Corrected unaligned DMA behavior [Ville Linde] (Ville, do you mind that I submit this?)
> This one line fix addresses the crash reported in newui0118u4ora. I
> think most of the other issues reported in the bug are fixed by this
> as well, but I didn't test this thoroughly. Perhaps we should close
> the bug and have the testers file a new bug if remaining issues are
> found.
Updated drivers accordingly.
Major cleanup to the ddragon driver:
- improved video and interrupt timing
- consolidated common memory maps and input ports
- added save state support
- correct clocks
Changes:
- Re-fixed RSP single-step activation behavior
- Reading the RSP PC returns only the least significant 12 bits
- Fixed flag behavior when read out via CFC2
Oh God, why Nintendo, why? Why make the RSP immediately stop when the main CPU sets single-stepping, but have the RSP execute one instruction before entering single-stepping mode when it sets it on itself? "You manaics! Damn you! God damn you all to hell!"
Changes:
- Initialize RSP registers to 0 in lieu of mame_rand
- Re-fix RSP single-stepping mode when set by a CPU other than the RSP
* 8085 has an internal clock divider by 2. Changed i8085.c to reflect this for I8085. I8080 still at 1.
Games using I8085:
* Changed clock to reflect internal clock divider now in i8085.c
* Added some FIXME: comments where clocks for I8085 are outside specs
Quite possibly the most useless RSP change I'll ever make, given that no game should ever be affected by these changes. But, eh, accuracy. Apparently only the accumulator registers are initialized to a non-random value on power-on, and apparently the RSP executes exactly one instruction before kicking over into single-step mode when it's set in the status register.
- Fixed accumulator state on powerup by testing against real hardware
- Fixed single-step behavior by testing against real hardware
The system 10 & 12 clock speeds have been raised as they run on an upgraded chipset.
All clocks are currently set to divide by 2 externally, I don't know if this is correct.
The clock is also divided internally as we have no wait states, incorrect dma timing, no gpu timing, no dma bus stealing and no gte timing.
Updated all CPU cores to return a CPUINFO_INT_CLOCK_MULTIPLIER of 1.
Changed the core to actually respect both CPUINFO_INT_CLOCK_MULTIPLIER and CPUINFO_INT_CLOCK_DIVIDER.
Updated a number of drivers to use cpunum_get_clock() instead of Machine->drv->cpu[x].clock.
***** Raw input clock speeds should now be specified for all CPUs in the MACHINE_DRIVER. *****
Removed explicit divisors from all drivers using the following CPU types,
which were already specifying non-1 values for CPUINFO_INT_CLOCK_DIVIDER:
* COP4x0
* I8039/8048 families
* M68(7)05, HD63705
* M6809E
* PIC16C5X
* TMS32010
* TMS340x0
In a few cases, it appears that the divisor was not being used, so I guessed in those cases whether or not
the specified clock speed was raw.
Cleaned up jaguar driver:
* proper video timing, configured by the chipset
* 32-bit rendering, removing 16bpp hacks
* support for borders
* proper object processor timing, including multiple passes per line
* added R3041 as a clone of the R3000
* fixed XTALs based on documentation
* fixed movd instructions
* add MB8884 and M58715 cpu types
* moved timer hack to M58715
* added ram_mask for internal ram access
* added R.A11 as 'M' to dasm flags
* added EA "IO" port
* mario now uses M58715 as sound cpu
Removed hack in setting the timer in the MIPS core, which caused missed timers on the aleck64 games.
Fixed icount management in the RSP core which caused it to report negative cycle counts.
Fixes aleck64_0120red and mtetrisc0115u1red.
This fixes the winwork.c and poly(new).c meory leaks in the viper.c
driver. I didn't look at the x86drc.c, because Aaron said it will be
changed soon and there is no need to investigate those leaks at all.
As I wanted to update my own personal TODO about that fix I
recognised it only happens in viper.c as well, so I took a stab at
it. It was just anothe rmissing cleanup function and I also cleaned
up the *_exit() potions/usage of the cores supporting DRC a bit.
- removed years from copyright notices
- removed redundant (c) from copyright notices
- updated "the MAME Team" to be "Nicola Salmoria and the MAME Team"
This is an updated version of my earlier ATTR_PRINTF patch. It was
reviewed by Atari Ace to use ATTR_PRINTF properly and fixes even more
format errors. I also reviewed the whole source again and it is now
used in all possible places.
Removed ui_popup(). Drivers should always be using popmessage() instead (has been this way for a while).
Augmented popmessage() so that you can pass NULL to immediately dismiss any messages.
The attached patch adjusts most conditional logging in MAME to use the
idiom "do { if (VERBOSE) logerror x; } while (0)". This has the
benefit that the compiler checks the syntax of the logging even in the
case it will be eliminated, and in fact a number of cases here needed
adjustments to compile because of this.
Here is a fix I've done to the Z80 CPU core that removes the increasing
of the R register from each IX/IY related (FD xx or DD xx) instruction.
This corrects the amount the R register should increased to to 2,
instead of 3. Documentation I've read suggests that the R register is
increased by 1 for each instruction with no prefix, and by 2 for each
instruction with a prefix (DD, FD, ED, CB, DD CB and FD CB). This fixes
some protected cassette loaders in the MESS Amstrad CPC driver, and
maybe others, which require the R register to be correct for the next
routine to be decoded correctly. I'd doubt that there is much, if any,
noticeable impact for MAME, as the R register is really only useful to a
program as a simple random number generator (or seed).
I've tested the fix with Pacman, in MAME, and when it comes across a LD
IX,xxxx or ADD IX,xx it will increase R by 2, whereas previously, it
increased R by 3.
Added artifical Z offset of -2 to make the full screen show in crusnexo.
Really fixed TMS3203x interrupt handling.
Added hack to catch invalid SP values during 32031 execution (debug mode only).
* fixed interrupt handling
* added support for edge-triggered interrupts on '32
* expanded interrupt support for the '32
* updated drivers using TMS3203x core to deassert interrupts
* added externally accessible functions for converting '3x floating point format
* updated gaelco3d driver to use new functions
Zeus2 (+related) updates:
* fixed save states for DCS games
* cleaned up Zeus2 waveram handling
* added Zeus2 save state support
* added preliminary model and quad rendering support for Zeus2
* added support to timekpr for the ZPRAM used on Zeus2
* hooked up ZPRAM in Zeus2 games
* hooked up controls in Zeus2 games
* updated poly.c to ensure it is idle before saving state
This patch should complete the addition of static qualifiers to all
MAME symbols that aren't explicitly exported. It primarily handles
generated code (e.g. amspdwy.c), plus a handful of cases I'd
previously missed and some new cases introduced in the last update.
One interesting bit was the discovery that the 32-bit scanline
routines in drawgfx.c are unused. I debated eliminating them but
decided instead to just export them. Various internal drawgfx
functions were conditionally removed by examining a new RAW define,
although one routine (blockmove_8toN_alphaone) was determined to be
dead code.
While investigating constifying MESS, I came across a few core APIs
that were missing const qualifiers which this patch fixes. I also
consted up tx1.c while I was at it.
This small patch makes some minor "code quality" improvements to MAME.
First off, some remaing static/const qualifier missed cases were
addressed. Secondly, a few cases of missing #include "foo.h" were
added. Thirdly, a few global names were modified to make them less
generic/more consistent (voodoo.c, vrender0.c, lethal.c, rungun.c,
zac2650.c). Fourthly, some dead/useless code was removed
(i8051.c,model1.c,romcmp.c).
* Cleaned up zeus wave RAM accessors.
* Changed rendering code to allow for greater parallelism on multicore systems.
* Removed some vestigial zeus 2 hacks.
* Reduced visible area to remove artifacts.
* Made right/bottom vertices inclusive to fix some gapping issues.
* Fixed invasn lightgun offset.
* Marked invasn as playable.
Zeus 2 hardware:
* Fixed ROM loading, added banking support.
* Separated zeus 2 video implementation from zeus implementation.
* Implemented direct pixel accesses; enough to get startup screens to show.
ADSP-2100:
* Properly documented ADSP-2104 internal memory map.
