from the CPU cores.
Disabled the use of PULSE_LINE for any input lines except NMI and RESET.
Added a helper function generic_pulse_irq_line() for doing a single-cycle
assert/deassert for those few drivers remaining that were trying to use
PULSE_LINE directly.
This is a reworked/expanded version of the patch I sent yesterday.
This one is split into three parts:
1. This introduces function macros for SAMPLES_START,
CUSTOM_{START,STOP,RESET}, and ANTIC_RENDERER.
2. This introduces running_machine *machine throughout MAME.
Principally it adds running_machine *machine = Machine to the top of
functions, but in some static functions the parameter is added
directly. Some similar changes in 99xxcore.h, v9938.c, v9938mod.c,
galaxold.c, psx.c, taito_l.c are also made to eliminate Machine
params. No global API is changed.
3. This changes the APIs introduced in the first part to pass device
or space as appropriate. A few similar changes in some other global
apis are made as well.
The net result of this sequence of patches is to remove 40% of the
Machine references and 27 deprecat.h includes.
~aa
Sent: Sunday, December 07, 2008 1:48 PM
To: submit@mamedev.org
Cc: atariace@hotmail.com
Subject: [patch] Pointerify sharc core
Hi mamedev,
The attached patch pointerifies the sharc core. If this has already
been done, no great loss, it only took about an hour and a half to do
this.
~aa
Sent: Sunday, December 07, 2008 9:43 AM
To: submit@mamedev.org
Cc: atariace@hotmail.com
Subject: [patch] Introduce KONAMI_SETLINES_CALLBACK
Hi mamedev,
Aaron indicated the KONAMI_SETLINES_CALLBACK change from my previous
patch overlapped with work already committed but was otherwise a
desired change, so this patch submits just that change relative to the
committed work.
~aa
Sent: Saturday, December 06, 2008 4:52 PM
To: submit@mamedev.org
Cc: atariace@hotmail.com
Subject: [patch] Deprecat.h cleanup
Hi mamedev,
This patch changes some global Machine references to use machine,
device->machine, ... instead, and removes any unneeded #include
"deprecat.h" lines as well (about 10% of them in fact). It was
generated using the attached script, and then reverting some cases
where it was overzealous.
~aa
config, and the devices attached to it are enumerated there.
Eventually, the PCI config read/write functions should be moved
to well-known functions within the device, but for now they are
kept separate.
activecpu -= 138
pass a device. Updated and de-deprecat-ed the drivers that used
it. Fixed interrupt handling to follow more recent behavior
expectations (no PULSE_LINE on non-NMI lines).
(Used cpustate naming convention. Moved iCount into state struct.)
(Tested with arkanoid, bootleg bubble bobble, etc.)
(Next cpu I'll look at is the ARM.)
appropriate, and to keep all global variables hanging off the
machine structure. Once again, this means all state registration
call sites have been touched:
- state_save_register_global* now takes a machine parameter
- state_save_register_item* now takes a machine parameter
- added new state_save_register_device_item* which now uses
the device name and tag to generate the base name
Extended the fake sound devices to have more populated fields.
Modified sound cores to use tags from the devices and simplified
the start function.
Renumbered CPU and sound get/set info constants to align with
the device constants, and shared values where they were perfectly
aligned.
Set the type field in the fake device_configs for CPU and sound
chips to a get_info stub which calls through to the CPU and sound
specific get_info functions. This means the device_get_info()
functions work for CPU and sound cores, even in their fake state.
Changed device information getters from device_info() to
device_get_info() to match the CPU and sound macros.
Sent: Tuesday, December 02, 2008 10:14 AM
To: Aaron Giles
Subject: Another 8080/85 change from me
Hi Aaron,
I have noticed that there are some problems in interrupt handling in 8080 implementation. Thing is that there are some cases that made a problem while implementing one
computer emulation. Thing is that there is same computer with Z80 and 8080 cpu and ROM's are same, but interrupts were not triggered. So I have searched and found
two problems fixed with this patch.
1. previous implementation cleared interrupt enable bit on interrupt trigger which is wrong since interrupts should stay enabled
2. serve interrupt number was not cleared after interrupt is executed, so if same one is triggered it will not be catched.
I have tested with 8080 MESS drivers, and picked some of MAME drivers using 8080 and 8085, and there were no bad things found.
Regards,
Micko
Removed ATTOTIME_TO_CYCLES() and ATTOTIME_IN_CYCLES(). Replaced them
with functions in cpuexec: cpu_clocks_to_attotime() and
cpu_attotime_to_clocks(), both of which take CPU devices instead of
indexes. Updated all callers, many of which were using the functions
dubiously.
works. Added callback parameters to the expression engine. Improved
CPU parsing so you can use a CPU tag or index in most commands that
take one. Switched to passing CPU and address space objects around
where appropriate. Lots of other minor tweaks.
Moved memory global state into a struct hanging off of the machine.
Updated almost all memory APIs to take an address_space * where
appropriate, and updated all callers. Changed memory internals to
use address spaces where appropriate. Changed accessors to point
to the memory_* functions instead of the address space-specific
functions. Improved internal handling of watchpoints.
Added cputag_* functions: cputag_reset(), cputag_get_index(),
cputag_get_address_space(). These just expand via macros to an
initial fetch of the CPU via cputag_get_cpu() followed by the
standard CPU call.
Added debugger_interrupt_hook() and debugger_exception_hook() calls
which intelligently look at the debugger flags before calling.
Did minimal cleanup of debugger, mainly moving CPU-specific data
to hang off of the CPU classdata for more direct access.
return a boolean indicating whether the given address was successfully
located in a bank. Change raw/decrypted access to look at this result, and
if the given address is not in a bank, calls through to the standard read
handlers.
In theory, this should prevent crashes when accessing opcodes. It does in
fact prevent mp_col3 from crashing.
Fixed address space mapping handlers to invalidate direct access regions
if a change is made to the mapping. This is needed to prevent the Sega
dynamic memory mapping chips from falling over.
H8:
- Added support for 8-bit H8 family MCUs, starting with the H8/3344
- Pointer-ified all H8 cores
- Some cleanup and renames toward additional future work
System 23:
- Added extremely preliminary support for I/O boards with the H8/3344
- Added new game: Motocross Go! (MG3 Ver. A) [credit Guru]
Removed opbase globals to the address_space structure.
Cleaned up names of pointers (decrypted and raw versus rom and ram).
Added inline functions to read/write data via any address space.
Added macros for existing functions to point them to the new functions.
Other related cleanups.
into the core proper and removed unused macros. Changed all
external interfaces to pass the CPU device. Enabled 64-bit
operations by default. Re-derived the interface functions to
cascade and share code more aggressively.
These changes also seem to have cured the taito_f3 issues as
far as I can tell (at least pbobble3 seems right now).
state_save_combine_module_and_tag() function in favor of passing
the tag when registering. Revisited all save state item registrations
and changed them to use the tag where appropriate.
are broken.
Changed READ/WRITE handlers to accept an address_space * instead of a
machine *. The address_space object was enhanced to contain a machine
and a pointer to the relevant CPU object.
Fixed a number of errors found by the compiler, mostly in the core and
CPU/sound handlers, but there is a lot remaining to fix.
Added new function cpu_get_address_space() to fetch the address space
for calling in manually to these functions. In some instances, code
which should eventually be converted to a device is hard-coding fetching
the program space of CPU #0 in order to have something valid to pass.
related APIs now take a device pointer instead of an index.
All functions that take a CPU device are prefixed with cpu_*
All functions that are globally related to cpu execution
are prefixed with cpuexec_*. Below is a list of some of the
mappings:
cpu_boost_interleave -> cpuexec_boost_interleave
cpunum_suspend -> cpu_suspend
cpunum_resume -> cpu_resume
cpunum_is_suspended -> cpu_is_suspended
cpunum_get_clock -> cpu_get_clock
cpunum_set_clock -> cpu_set_clock
cpunum_get_clockscale -> cpu_get_clockscale
cpunum_set_clockscale -> cpu_set_clockscale
cpunum_get_localtime -> cpu_get_local_time
cpunum_gettotalcycles -> cpu_get_total_cycles
activecpu_eat_cycles -> cpu_eat_cycles
activecpu_adjust_icount -> cpu_adjust_icount
cpu_trigger -> cpuexec_trigger
cpu_triggertime -> cpuexec_triggertime
cpunum_set_input_line -> cpu_set_input_line
cpunum_set_irq_callback -> cpu_set_irq_callback
In addition, a number of functions retain the same name but
now require a specific CPU parameter to be passed in:
cpu_yield
cpu_spin
cpu_spinuntil_time
cpu_spinuntil_int
cpu_spinuntil_trigger
cpu_triggerint
Merged cpuint.c into cpuexec.c. One side-effect of this
change is that driver reset callbacks are called AFTER the
CPUs and devices are reset. This means that if you make
changes to the CPU state and expect the reset vectors to
recognize the changes in your reset routine, you will need
to manually reset the CPU after making the change (since it
has already been reset).
Added a number of inline helper functions to cpuintrf.h for
managing addresses
Removed cpu_gettotalcpu(). This information is rarely needed
outside of the core and can be obtained by looking at the
machine->cpu[] array.
Changed CPU interrupt acknowledge callbacks to pass a CPU
device instead of machine/cpunum pair.
Changed VBLANK and periodic timer callbacks to pass a CPU
device instead of machine/cpunum pair.
Renamed all information getters from cpu_* to cpu_get_* and
from cputype_* to cputype_get_*.
context ones (which are going away), the disassembler (which should
have no dependencies on the live CPU), and the validity check.
Removed global token from all pointer-ified CPU cores that don't
have internal read/write callbacks (which still need to reference it).
* added a set of cpu_* calls which accept a CPU device object;
these are now the preferred means of manipulating a CPU
* removed the cpunum_* calls; added an array of cpu[] to the
running_machine object; converted all existing cpunum_* calls
to cpu_* calls, pulling the CPU device object from the new
array in the running_machine
* removed the activecpu_* calls; added an activecpu member to
the running_machine object; converted all existing activecpu_*
calls to cpu_* calls, pulling the active CPU device object
from the running_machine
* changed cpuintrf_push_context() to cpu_push_context(), taking
a CPU object pointer; changed cpuintrf_pop_context() to
cpu_pop_context(); eventually these will go away
* many other similar changes moving toward a model where all CPU
references are done by the CPU object and not by index
* cpu/i8x41 should be renamed to UPI-4x, since UPI-41/42 was an intel chip family
postponed for now until core moved to pointers.
* removed I8041 definition from mcs48
* removed I8x41 cpu definition and config struct
* added I8041, I8741, I8042, I8242 and I8742 cpus to i8x41.c
* added internal memory maps
* internal ram now uses DATA memory space
* updated drivers
* increased interleave to 70 in decocass. This fixes decocass hanging in countdown around 13
No idea when this bug was introduced.
Sent: Wednesday, November 05, 2008 8:22 AM
To: submit@mamedev.org
Cc: atariace@hotmail.com
Subject: [patch] Add ADDRESS_MAP_NAME macro
Hi mamedev,
In theory, MAME's interface macros should completely hide the naming
conventions from the drivers and sound/cpu cores. So as an
experiment, I renamed all the core apis and looked to see what broke.
The most common api coupling was with address maps in the CPU cores,
which this patch addresses by introducing a new macro,
ADDRESS_MAP_NAME (mimicing what is done in devintrf.h). There were a
handful of related problems in some drivers which this patch also
fixes. Some remaining issues I left alone (laserdisk apis reference
rom, video_update, machine_config, ksys573 use of nvram_handler,
megadriv use of ipt), in principle all the apis need _NAME variants to
encode the conventions.
~aa
* Added proper clock speed to plygonet.c and internal divider to dsp56k.c
* Fixed up disassembler add/sub, 05xx, and bsr ops.
* Handle mysterious uuuuF instruction found in plygonet add op.
* Partially implemented add, sub, mac, mpy, inc, cmpm, macr, asr16, jscc, lea, and movec ops.
* Added dual X memory read and data move with short displacement parallel moves.
* Merged DS5002FP
* Disassembler now uses type specific memory names
* Merged DS5002FP disasm
* added 83C751 memory names to disassembler
* delete DS5002FP specific files
* removed unnecessary cpu callback in wrally
* DATA_MAP ==> IO_MAP in wrally
working on something, hold off syncing.
Defined macros for core CPU functions: CPU_INIT, CPU_RESET, CPU_EXIT,
CPU_EXECUTE, along with macros for the name and for calling, in the
spirit of the devintrf.h macros. More will come later.
Changed init, reset, exit, and execute interfaces to be passed a
const device_config * object. This is a fake object for the moment,
but encapsulates the machine pointer and token. Eventually this will
be a real device.
Changed the CPU IRQ callbacks to a proper type, and added a device
parameter to them.
Updated all CPU cores to the new macros and parameters.
Note that this changes the way we "pointer"-ify cores. I'll send an
update shortly.
Began the process of pruning options from the 68000 core, hard-coding it
for MAME's needs. We've hacked on it sufficiently that it is no longer
generic, so this is a good opportunity to simplify the code so that it
can actually be followed.
means of setting the minimum useful scheduling quantum, and clamping
all quanta to that value.
Changed interleave/boost handling to use scheduling quanta instead
of timers.
Added machine parameter to cpu_boost_interleave.
Updated cpuexec to compute the "perfect" interleave value taking into
account the minimum number of cycles per instruction specified by the
CPU core. Updated Z80 core to indicate that the minimum cpi is 2. Fixed
incorrect minimum cpi in the 68020+ cores.
Simplified a bit of logic in cpuexec_timeslice.
Sent: Sunday, November 02, 2008 1:04 AM
To: Aaron Giles
Subject: Z80 CPU change
Hello Aaron,
For a long time there was undiscovered internal register (MEMPTR) inside Z80 CPU which was visible by using BIT n,(HL) instruction in undocumented bits of flag, in
last few months lot of things have been discovered by team of Russian programmers. There was a test on real machine which showed status of flags after each instruction.
I am sending you now patch for Z80 with MEMPTR implemented, there is also one more bug fixed (BIT 6,(XY+o) was not implemented good it used BIT 4,(XY+o) code).
As a proof that things are now valid, I am sending screens before patch on Z80 cpu core, and after with compare of results on real machine.
I am also sending you a TZX file (for ZX Spectrum) since tests are done inside that driver.
Please inform me about status. Hope this could fix some issues in drivers using Z80, since some games used this flags.
Regards,
Miodrag Milanovic
adds/removes entries in header files, and fixes a few potential
multisession issues by explicitly adding initializers. asic65.c has
significant changes to accomodate using a struct instead of 16
variables, otherwise the changes in this patch are modest and obvious.
[Atari Ace]
There's an issue with the debugger handling of the 6502 instructions as
there's a mismatch between the core and what the debugger shows.
The changes are detailed in the spreadsheets that I've attached that
compares the core to the dasm.
Attachments:
m6502fix.zip contains the diff file
6502 debugger disassembly changes.zip contains an excel spreadsheet
(in both xls and xml formats) detailing the reasons/changes.
* improved prefetch timing calculation
* prefetch timing now also used by V20 and V33
* moved some static variables into cpu context
* nec_reset now explicitly clears context variables
* all cpus now share nec_execute
Sent: Fri 10/17/2008 11:45 AM
To: submit@mamedev.org
Subject: 65c02 core bugfix
Hi,
This patch fixes a subtle bug in the 65c02 emulation where the result of
the BIT instruction differs on the 65c02 (from the 6502), when executed
in immediate mode.
Cheers,
Phill.
* Remaining games checked and adapted to changes in cpu core
* Cardline still broken. I need the exact and complete cpu name.
* Added more variants 803X, 80CXX, AT89C4051
* Fix segas18.c (segaic16.c) mcu maps.
* Fix sslam.c
* Fix limenko.c videopkr.c : Issue with core allocation of ram (duplicate savestate)
* improved serial port timing (f15se (micro3d.c) sound board now works)
* better infrastructure for adding more variants like DS5002
* Fixed port reading
* Rewrote Macros for better readibility
* Fixed and rewrote Interrupt handling
* Now returns INTERNAL_DIVIDER, adjusted cycle counts
* Remove unnecessary and duplicated code
* Remove unnecessary functions
* Rewrite to have sfr-registers stored in int_ram.
* Debugger may now watch sfr-registers as well.
* implemented interrupt callbacks (HOLD_LINE now supported)
* Runtime switch for processor type - remove ifdefs
* internal memory maps for internal rom versions (internal ram now displayed in debugger)
* more timer cleanups from manual
micro3d:
* serial port communication between main cpu and sound board works
* sound board now works
m72 - lohtb2:
* full emulation of protection device
* Samples are now piped through the mcu
* Added additional branch, move and bitfield ops.
* Plygonet now passes its memory test and uploads a new program.
[[Next step is to install an opbase handler and let the dsp56k run further into its new proggie.]]
* Complete rewrite focusing on legibility and extensibility.
* 27/121 opcodes (mostly) implemented.
* Bugfix for reset status of interrupt priority bits.
* Bugfix for disassembly of register-to-register parallel data move.
[[These changes bring the driver up to the point where the plygonet hardware begins banking memory. The behavior is understood, so I should have the driver back to where it was before the rewrite soon. Then real progress can be made.]]
(also added a to-check note, 16-bit wide DMA is currently using 32-bit functions, is this correct?)
Removed Speedups from CPS3 / PsikyoSH, while they do still give a decent speed boost they're not really needed with the DRC and just clutter the code.
Added preliminary LD-V1000 emulation. Not fully working yet, but mostly
there.
Cleaned up and normalized the three existing laserdisc emulations.
Removed obsolete code from the laserdisc core.
Sent: Fri 9/26/2008 10:15 AM
To: submit@mamedev.org
Cc: Philip Bennett
Subject: fix for Cube Quest Line CPU emulation
I found a bug in the emulation of the Cube Quest Line CPU.
Proof of bug:
After looking at .diff,
Assume 'ci' is 1, and assume 'r' and 's' are both 0xFFF
(0xFFF equals -1, as these numbers are 12-bit signed).
The result should be mathematically equivalent to -1 - (-1)
which is 0.
~0xFFF is 0xF000, so you'd have 0xF000 + 0x0FFF + 1 which equals
0x10000 but since 'res' is 16-bits this is truncated to 0x0.
'C' then becomes 0 and 'V' becomes 1 (as I recall). The result of
0 is correct, but the flags are wrong; V should be 0 and C should
be 1.
Under my proposed fix, you'd have 0x000 + 0x0FFF + 1, which equals
0x1000, so the lower 12 bits are 0 (correct) and C is 1 and V is 0
(correct).
I discovered this bug while disassembling the line CPU's ROM.
means that multiple changes without any execution will be seen as
atomic. It also means that PULSE_LINE no longer works for signalling
IRQs.
Added checks in the debug build to catch people who try to use
PULSE_LINE for non-NMI and non-RESET input lines on CPUs that no
longer support direct interrupt generation. Over time expect this
list to increase.
Added new item to the interface which is the tag of a CPU
to take the base clock from. Are there any known cases
where the base clock does NOT come from the CPU directly?
Changed Z80 daisy chain interface to simply be a list of
devices in the chain. Interrupt callback functions are now
fetched via the standard device interface and referenced by
the daisy chain code.
Changed Z80 PIO interrupt callback to pass a device instead
of the machine. All device callbacks should provide the
device.
Sent: Tuesday, September 23, 2008 4:46 AM
To: Aaron Giles
Subject: 8080 bug
To fix this bug : http://mametesters.org/mantis/view.php?id=2322
a part of my code should be removed.
It seams that this feature I have added is only available on KP580BM80A (Russian clone of this processor).
So until I make a new patch (that support this clone processor) please apply this to fix MAME drivers.
Thanks,
Miodrag
Sent: Sunday, September 21, 2008 10:45 AM
To: submit@mamedev.org
Cc: atariace@hotmail.com
Subject: [patch] More static qualifiers
Hi mamedev,
Another static function update from yours truly, almost entirely
affecting code added in the last few months to MAME. The fixes are
the usual lot, changing enum definitions so they aren't declared,
decorating dead code/declarations with #if...#endif, and of course,
adding static where appropriate. In addition, I fixed a bunch of
UNUSED_FUNCTON symbols to be spelled correctly (I didn't introduce
this).
~aa
* Removes arbitrary opcode groupings in favor of flat decode model.
* Fixes a number of small issues with unknown opcodes.
* Added the final ALU parallel move ops.
metadata with pre-decoded frame information. Modified chdman to
automatically produce this for CHDs that are of the appropriate
parameters. To fix up existing CHDs, use chdman -fixavdata on the
CHD.
Modified the laserdisc core to leverage the pre-decoded frame
metadata, which is now required. This improves seek times when
searching and allows the player-specific emulation access to the
VBI data as soon as it would really be available. Changed update
callback timing to fire just before the first line of VBI data
would be read; at that point, the frame selection is assumed to
be committed.
Converted PR-8210 emulation over to using the actual MCU from the
laserdisc player. This MCU controls low-level functions such as
slider position and laser on/off, and receives decoded vertical
blanking data in order to make decisions. Removed old HLE behavior.
Note that the overlay text is displayed via the UI; this is
temporary and will be fixed shortly.
Converted Simutrek-hacked laserdisc emulation to using the actual
MCU from the game, which in turn hands off commands to the PR-8210
MCU. This is still not 100% but is pretty close at this point and
achieves the correct behaviors in most cases.
Fixed Cube Quest overlay scaling to cover the whole screen.
Changed laserdisc video parameters to position the screen area at
the bottom rather than the top, since this corresponds more closely
to standard line numbering.
Extended the vbiparse code to support pack/unpack, and to more
fully document all the meanings of the VBI codes.
Updated ldplayer to support slow/fast forward movement, frame/chapter
display, and separate controls for scanning/stepping.
Added new built-in variable "frame" to the debugger.
Fixed device-based ROM loading to support loading ROMs from the
game's ZIP as well.
Subject: [patch] Even more reset/multisession cleanup
Hi mamedev,
These two patches try to reduce the amount of variable in .data, which
usually point to multisession/reset bugs or missing const qualifiers.
The first patch just adds const to a number of items, moving them from
.data to .rdata. The second patch sets other items to zero (moving
them to .bss), adding reset/init code where appropriate.
~aa
Found few things not right in 8080/8085 implementation.
1. ANA/ANI instruction, HF flag was not set right because error in calculation of it (missing brackets)
2. 8080 have NF flag always set (it is not used flag but bit is always set)
3. On unused ports/not connected memory values from status word were readed not 00 or FF, that is why I add it as a new internal register, it can also be buffered by some external hardware, so this could help other implementations too.
Regards,
Miodrag Milanovic
the driver's memory maps.
Reverted recent changes to MCS-48 core that were very hacky and which crashed
many games. You can now properly override the internal memory map and do
your own banking.
Also fixed 02204: masao: Memory bank error.
This contains three different patches:
20080829.patch
Introducing the running_machine* parameter in a few more places. Next
step would be to make the execute_* function aware of it, if that's
OK. Also used the machine parameter in memory.c were it's available.
20080829_1.patch
The already discussed and probably being rejected removal of
dreprecat.h from debugger.h. I think this is a low-risk patch (we had
worse cleanups) and it lowers the risk of new code using deprecated
function beign introduced in MAME/MESS, because there is no invisible
inclusion of deprecat.h anymore (I think one driver - kofball.c - got
it with deprecated code).
20080829_2.patch
The last Machine -> machine conversion I had sitting in my local
tree. I know the proper way is to turn them into devices, but I still
haven't looked into that.
* Adds MCS48_INTERNAL_ROMBANK define to header
* Drivers which need to control the ea line have to initialize banking for internal/external rom
This is not yet optimal but works as expected with existing drivers and modified mario.c
* MB8884 is a I8035 ==> 12 addr, no internal rom map
* EA line high: external access - this is "default"
The whole EA implementation is as Aaron named it, cheeky. EA=1 external rom access, EA=0 internal rom access.
But all variants are treated the same, i.e. for i8035, MB8884, I8039, the external rom is used in the same
way as the internal.
These ports are actually ports which sink current on logical 0. With a logical 1, they are in high impedance mode and may be read. The high impedance is treated as logical 1 by TTL gates connected to them.
Sent: Monday, August 25, 2008 8:16 AM
Subject: [patch] Remove useless backslashes
Hi mamedev,
I've been using pmd 4.2.2 to analyze the MAME codebase for duplicate
code, and it's C parser complains about useless backslashes and
dangling defines in #if...#endif sections. Here's a patch that fixes
this, and additionally fixes one real bug, a string in djmain.c was
malformed, it's curious it compiled.
~aa
Subject: Profiler related #2 (v2)
Hi, this a revised version of a patch I sent yesterday.
This one is much more cleaner, and the speed improvement is now significant
enough to come out of the profiling noise.
More over, this one compiles correctly... ;-)
Best regards,
Christophe Jaillet
mechanism; instead, you must access the sliders via the main menu. While in
the menu, you can use the ~ key to turn off the menu display and leave only
the bar display, in order to see more of the screen.
* removed redundant and unused definitions from header file
* renamed constants and functions to be MCS48* prefixed
* re-verified all opcode behaviors and timing
* changed illegal opcodes to count 1 cycle to avoid infinite loops
* changed EA behavior so that it is a push from the driver instead of a pull on each opcode fetch
(this may change further in the future).
* reimplemented IRQ generation and timer behavior according to documentation
* updated all drivers accordingly
* fixed several uses of PULSE_LINE, which no longer works
Register access is still performed using direct memory accesses,
but the pointers are fetched through the memory system. Now you can
see i8039 RAM in the debugger. Added internal memory maps of the
appropriate size so that drivers don't need to declare this RAM.
Added a number of variants from the MCS-48 family as it was not
clear which variants had what capabilities. All documented variants
now have internal memory maps for internal ROM and RAM. Removed
memory maps from drivers using embedded ROM/EPROM/OTPROM since
they are defined by the core now.
Added some initial logic to boot and run the PR-8210 ROM (i8049)
in ldplayer.c. Currently this is disabled behind a compile-time
switch. Once this is working, the plan is to incorporate this into
the existing PR-8210 emulation, but we're not there yet.
Before this patch a:
cpunum_set_input_line(5, ASSERT_LINE);
cpunum_set_input_line(3, ASSERT_LINE);
cpunum_set_input_line(3, CLEAR_LINE);
loses the state of line 5. This patch fixes it by adding an explicit
but optional "virtual irq line" support to the 68k interface.
Fix m68k interrupt handling by some drivers.
Clearing the NMI line to clear all the IRQ lines worked, but it just
doesn't make sense. Now that the irq lines are really independant,
the handling can be simplified.
Subject: Various cleanups
A couple of minor cleanups sitting on my disk for a while:
- removed obsolete ENABLE_DEBUGGER occurance
- removed more unprintable characters in SH-2 disassembler
- memset() usage cleanups
- removed duplicated TMS5110 entry in sound.mak
- use machine in uigfx.c where it's already available
This handler works for both disc-only games and those with overlays.
For disc-only games, the base macro is sufficient. For games with
overlays, an additional set of configuration macros are provided:
MDRV_LASERDISC_OVERLAY - specifies update function, width, height,
and bitmap format of the overlay
MDRV_LASERDISC_OVERLAY_CLIP - specifies the visible area of the
overlay bitmap
MDRV_LASERDISC_OVERLAY_POSITION - specifies default x,y position
MDRV_LASERDISC_OVERLAY_SCALE - specifies default x,y scale factors
The update function provided to MDRV_LASERDISC_OVERLAY is identical to
a normal VIDEO_UPDATE callback, so a standard one can be used. All
existing laserdisc drivers have been updated to support this new
rendering mechanism, removing much duplicated code.
Added the ability to configure the overlay position and scale
parameters at runtime. Added OSD menus to control them. Added logic
to save/restore the data in the game's configuration file.
Added new macros MDRV_LASERDISC_SCREEN_ADD_NTSC and _PAL, which
defines a standard screen with the correct video timing characteristics
and update function for laserdiscs. Updated all drivers to use these
macros instead of defining their own screens.
Added DISK_REGIONS to all laserdisc drivers.
Added DISK_IMAGE_READONLY_OPTIONAL to support games (like Cube Quest)
where the disk is non-essential to the game's operation.
Fixed bug in identifying the custom sound driver for the laserdisc.
Updated ldverify to identify blank regions of the disc for post-
processing.
Fixed rendering 16bpp with alpha using bilinear filters (fixes
screenshots of laserdisc games with overlays).
Included support for parsing .gdi files in chdman. [ElSemi]
Added new driver for Cube Quest. This includes CPU cores for the three
bitslice processors, as well as laserdisc support for the hacked
laserdisc that was used to drive the games.
[Philip Bennett, Joe Magiera, Warren Ondras]
Note that the SHA1/MD5 for the laserdisc will likely undergo at least
one more change before being finalized.
- Moved IRQ handling front-end into recompiled code
- Added TSTM/ANDM/XORM instructions
- Added SH-1 CPU support, including lower precision on MAC.W and locking out SH-2 only instructions
Subject: [patch] Collapse timer callbacks
Hi mamedev,
The following patch collapses timer callbacks in some cases to avoid
duplicating code. In the case of crystal.c, it also refactors two DMA
handlers and shuffles the init/reset code around a bit. I noticed
while doing this that h8_itu_read8 is missing cases 0x96,0x97 which is
almost certainly a bug, but I left it alone.
~aa
Subject: [patch] Fix i386 bsr implementation
Hi mamedev,
The i386 cpu emulator will return the wrong result for bsr when the
highest bit is set (0 instead of 15 or 31). The attached patch fixes
this.
~aa
Subject: [patch] Fix 1802 cybrcomm, raveracw, raveracj, raveraja,
ridgerac, ridgerab, ridgeraj, acedrvrw, victlapw: No sound in games
after reloading via the MAME UI
Hi mamedev,
The problem with namcos22 games losing sound when running multisession
is actually an m37710 cpu initialization bug. The attached patch
fixes it, and also collapses all the timer callbacks together as an
unrelated code cleanup.
Note: namcos22 has a lot of uninitialized state, so I wouldn't be
surprised if there are other multisession issues.
The structures/names were getting too complex for my macros to handle. They would require hand editing and my computer is too slow to keep re-compiling.
Passes a clean compile.
to whole functions. The other one I'm not so sure about. Commented
code is usually hilighted differently, making it very easy to spot.)
Hi mamedev,
This set of patches has one aim only, to identify chunks of code that
have been disabled by the use of C/C++ comments, and to disable them
instead by using the preprocessor. The C comment approach to
disabling code isn't safe (embedded comments will trip it up), and the
C++ comment approach isn't elegant (you shouldn't need to touch every
line to disable a chunk of code). Using #if...#endif is preferable
always, excepting perhaps if (0) { ... }.
The patch has three parts. The first only handles cases where full
functions were disabled. The second handles cases where parts of
functions were disabled. The third then tries to restore the
whitespace that the use of comments converted from tabs to spaces via
srcclean.exe. It also cleans up the whitespace in a handful of the
files in areas outside of the original two patches.
~aa
Subject: a few cleanups
This patch contains:
- removal of unprintable chars (newlines) in SH-2 disassembler (I
submitted this in the past nd it wasn't included)
- a few unnecessary checks after malloc_ort_die() calls
- changes two romload.c warnings to use GAMENOUN instead
- adds "deprecat.h" in a few src/mame/drivers files (would be
necessary, if the debugger.h one would be removed)
- cleans up the mame.mak by adding all missing defines and grouping
them based on cpu.mak
- renamed video_exit() to winvideo_exit() for consistency in function
names
The ROL/ROR/SHL/SHR opcodes provide the carry flags typically generated by
almost all CPUs. The RORC/ROLC opcdes map directly to the rotate through
carry of most CPUs as well.
integer value, regions are now referred to by a region class and
a region tag. The class specifies the type of region (one of CPU,
gfx, sound, user, disk, prom, pld) while the tag uniquely specifies
the region. This change required updating all the ROM region
definitions in the project to specify the class/tag instead of
region number.
Updated the core memory_region_* functions to accept a class/tag
pair. Added new memory_region_next() function to allow for iteration
over all memory regions of a given class. Added new function
memory_region_class_name() to return the name for a given CPU
memory region class.
Changed the auto-binding behavior of CPU regions. Previously, the
first CPU would auto-bind to REGION_CPU1 (that is, any ROM references
would automatically assume that they lived in the corresponding
region). Now, each CPU automatically binds to the RGNCLASS_CPU region
with the same tag as the CPU itself. This behavior required ensuring
that all previous REGION_CPU* regions were changed to RGNCLASS_CPU
with the same tag as the CPU.
Introduced a new auto-binding mechanism for sound cores. This works
similarly to the CPU binding. Each sound core that requires a memory
region now auto-binds to the RGNCLASS_SOUND with the same tag as the
sound core. In almost all cases, this allowed for the removal of the
explicit region item in the sound configuration, which in turn
allowed for many sound configurations to removed altogether.
Updated the expression engine's memory reference behavior. A recent
update expanded the scope of memory references to allow for referencing
data in non-active CPU spaces, in memory regions, and in EEPROMs.
However, this previous update required an index, which is no longer
appropriate for regions and will become increasingly less appropriate
for CPUs over time. Instead, a new syntax is supported, of the form:
"[tag.][space]size@addr", where 'tag' is an optional tag for the CPU
or memory region you wish to access, followed by a period as a
separator; 'space' is the memory address space or region class you
wish to access (p/d/i for program/data/I/O spaces; o for opcode space;
r for direct RAM; c/u/g/s for CPU/user/gfx/sound regions; e for
EEPROMs); and 'size' is the usual b/w/d/q for byte/word/dword/qword.
Cleaned up ROM definition flags and removed some ugly hacks that had
existed previously. Expanded to support up to 256 BIOSes. Updated
ROM_COPY to support specifying class/tag for the source region.
Updated the address map AM_REGION macro to support specifying a
class/tag for the region.
Updated debugger windows to display the CPU and region tags where
appropriate.
Updated -listxml to output region class and tag for each ROM entry.
- Rewrote core logic, communications, and interfaces.
- Added three parallel memory moves to the disassembler.
- Initial interrupt logic in place.
Plygonet.c updates.
- All communication hacks have been removed.
- Memory maps have been temporarily reverted while new DSP56k cpu core catches up.
Subject: [patch] Conditional code cleanup resubmit
Hi mamedev,
This is a resubmit of a previous patch. The earlier version would not
compile with 32-bit MSVC, due to the fact that its linker required
external dependencies in dead code to be met before dead code
elimination was done, causing linker errors. The proper fix for this
would be to add the necessary dependencies, so I instead simply left
the conditional code in place in winalloc.c and chd.c.
~aa
Original submission email below:
----
Conditionally compiled code tends to bitrot, so MAME should try to
avoid it as much as possible. I sent a patch six months ago to
eliminate conditional code associated with logging, here's another
patch that does more of this. Some notes:
1. drc_ops.c: I couldn't find a LOG_CODE anywhere, so I used if (0).
2. romload.c: I converted all the users of debugload to use
LOG((...)) instead, following the traditional conditional logging
pattern.
3. windows/sound.c: I eliminated the separate sound log and directed
the few outputs to the error log.
~aa
Subject: [patch] .data removals to fix reset/multisession bugs
Hi mamedev,
One nice artifact of properly constifying data structures in MAME is
that it makes it relatively easy to spot a class of reset/multisession
bugs, namely that almost any object in .data is probably in error.
Unless the value is properly initialized in a reset routine the
initial non-zero value can't be relied upon, so there's no need to
have a non-zero value to begin with.
With that in mind, here's a patch to move more items out of .data by
either applying const, removing the non-zero initializer (if its
overwritten by init/reset) or by adding appropriate initialization
code. In most cases I tried to add initialization code to a reset
routine, but in some cases I chose an init routine, possibly leaving a
reset bug intact.
Some interesting bits:
1. tms9900 core. The use of .data to initialize the irq_level wasn't
correct in some cases as the layout of the structure was core
dependent.
2. bfcobra.c. By introducing a VIDEO_START routine a hack in
VIDEO_UPDATE could be removed.
~aa
convert between attotimes and a clock tick at an integral frequency.
Changed the 6532 RIOT device into a proper device. Rewrote the
logic to be simpler and leverage the new attotime functions. Changed
the I/O port setters to specify a mask, and changed the I/O port
callbacks to pass in the previous value. Updated tourtabl and
gameplan drivers to use the new device interface.
Converted audio/starwars.c, audio/exidy.c, and audio/gottlieb.c to
use the new RIOT implementation instead of rolling their own.
Began gottlieb.c cleanup. Converted palette calculations to resistor
weights. Corrected video timing. Reduced the number of separate
machine drivers. Fixed incorrect spriteram sizes. Populated full
memory maps for the main CPU and the rev 1 sound board. More to
come.
- Rearranged decoding behavior.
- Updated code style to MAME standards.
- Tested each single-word opcode with custom ROMs.
(This is a precursor to other major dsp56k changes I have made. I just gotta' get plygonet commanders up and running to do some tests)
- TGP now correctly uses table roms (model1/2 updated accordingly)
- removed FIFO hack on srallyc (game now runs)
- added analog ports reading for model 2A/B/C
- fixed some loading instructions in the TGP. that fixes srallyc automatic transmission bug
well, the fix is not that but changing them this way:
program_write_dword_32le(i960.r[I960_FP]-16, i960.PC);
program_write_dword_32le(i960.r[I960_FP]-12, i960.AC);
in take_interrupt.
It seems it came from a partial fix in the ret instruction. the manual says that PC is saved at FP-16 and AC at FP-12
it was reversed in mame, so when trying to fix it, i suppose Ernesto forgot to change the push too.
I've tested this fix and apart from having daytona working, pilot kids 2A works too (that I think has been broken for ages).
EEPROM data, and the size is in terms of units, not bytes. Updated all
drivers accordingly.
Changed the ROM loading code to actually alter the region flags based
on the CPU endianness and bus width when creating the region, rather
than fixing them up on the fly. This means that callers to
memory_region_flags() will get the correct results.
Changed the expression engine to use two callbacks for read/write rather
than relying on externally defined functions.
Expanded memory access support in the expression engine. Memory accesses
can now be specified as [space][num]<size>@<address>. 'space' can be
one of the following:
p = program address space of CPU #num (default)
d = data address space of CPU #num
i = I/O address space of CPU #num
o = opcode address space of CPU #num (R/W access to decrypted opcodes)
r = direct RAM space of CPU #num (always allows writes, even for ROM)
e = EEPROM index #num
c = direct REGION_CPU#num access
u = direct REGION_USER#num access
g = direct REGION_GFX#num access
s = direct REGION_SOUND#num access
The 'num' field is optional for p/d/i/o/r, where is defaults to the
current CPU, and for e, where it defaults to EEPROM #0. 'num' is required
for all region-related prefixes. Some examples:
w@curpc = word at 'curpc' in the active CPU's program address space
dd@0 = dword at 0x0 in the active CPU's data address space
r2b@100 = byte at 0x100 from a RAM/ROM region in CPU #2's program space
ew@7f = word from EEPROM address 0x7f
u2q@40 = qword from REGION_USER2, offset 0x40
The 'size' field is always required, and can be b/w/d/q for byte, word,
dword, and qword accesses.
- All games on all drivers should work as before except "colmns97" and "stress" which crash due to sound system trouble.
- All idle skips are still included. They are quite a bit less effective than they were on the interpreter, but they still give a boost.
- Fast RAM bypass is not included yet so this does not represent final performance. That said, it's consistently faster than the interpreter even now. Example: sfiii3 on 0.126 gets 609% on the interpreter and 961% on the DRC.
Major thanks to Aaron for his assistance with several sticky core bugs and other issues encountered writing this.
* marked IDT instructions for R4650 only
* accounted for time taken in throwaway likely branch slots
* fixed jalr to respect the correct link register
* fixed c.eq, c.lt, c.le to fail if unordered
* fixed swxc1, sdxc1 to use the correct source register (fixes many Gauntlet problems)
* fixed CCR31 display in debugger
Subject: another Machine -> machine cleanup
This cleans up most of the Machine stuff in src/emu/machine. There is
a bit left to clean up, but it's mostly stuck at some interfaces now.
Subject: [patch] make MSVC_BUILD=1 -j<n> build fix
Hi mamedev,
The following build tweak fixes make MSVC_BUILD=1 -j2. It also fixes
an oversight in the cross-build support.
~aa
Subject: [patch] Fix minor CPU/SOUND core build issues
Hi mamedev,
This small patch fixes a few build problems with the cpu/sound cores
M65CE02, ALPHA8201, TMC0285, TMS5200 and corrects the dependencies for
the mips core.
~aa
macro from the source code. All MAME builds now include
the debugger, and it is enabled/disabled exclusively by
the runtime command-line/ini settings. This is a minor
speed hit for now, but will be further optimized going
forward.
Changed the 'd' suffix in the makefile to apply to DEBUG
builds (versus DEBUGGER builds as it did before).
Changed machine->debug_mode to machine->debug_flags.
These flags now indicate several things, such as whether
debugging is enabled, whether CPU cores should call the
debugger on each instruction, and whether there are live
watchpoints on each address space.
Redesigned a significant portion of debugcpu.c around
the concept of maintaining these flags globally and a
similar, more complete set of flags internally for each
CPU. All previous functionality should work as designed
but should be more robust and faster to work with.
Added new debugger hooks for starting/stopping CPU
execution. This allows the debugger to decide whether
or not a given CPU needs to call the debugger on each
instruction during the coming timeslice.
Added new debugger hook for reporting exceptions.
Proper exception breakpoints are not yet implemented.
Added new module debugger.c which is where global
debugger functions live.
- connected EEPROM (doesn't seem to affect much)
- cleaned up system register access
GTI Club driver:
- altered network IRQ clear to fix several problems
- added Guru readme
- fixed crashes due to missing inputs
- gticlub "works" again
ZR107 driver:
- added Guru readme
- cleaned up system register access
- these games work again with altered network IRQ timing
NWK-TR driver:
- added Guru readme
DRC frontend:
- now passes pointer to previous instruction when describing
PPC frontend:
- attempts to roughly take into account branch and CR logical
folding in timing computations
- Added configurable i8x41/i8x42 subtype support.
- Fixed carry flag handling in ADDC A,#N instruction.
- Fixed carry flag handling in RLC A instruction.
* added save state support to the SHARC CPU core
* added save state support to the PowerPC recompiler
* added save state support to the virtual TLB system
* added save state support to the RF5C400 sound core
* added save state support to konppc module
* added save state support to K056800 host controller
* added save state support to the Konami hornet driver
Fixed poor default CLUT handling in the voodoo driver
Subject: [patch] memory_region madness reloaded
Hi mamedev,
The memory_region and memory_region_length functions are probably the
two most common functions in MAME that don't take a machine parameter
but should given the syntax of the related apis memory_region_type and
memory_region_flags. Clearly they didn't get the parameter because of
the sheer number of changes needed to change the apis. This pair of
patches makes the change, and deals with the consequences.
The second patch then changes the api for memory_region and
memory_region_length, and fixes the fallout. It generally plumbs
through machine parameters where needed, except for the case of sound
apis which I deferred doing so till later. This increased the number
of deprecat.h includes by ~50. Given it is a massive patch, there are
bound to be a few mistakes in it (I had to make ~20% of the changes by
hand), but I exercised care and reviewed the patch several times to
minimize the problems.
* added save state support to the MIPS3 recompiler
* added save state support to CAGE audio system
* added save state support to the voodoo emulator
* added save state support to the smc91c9x emulator
* added save state support to the kinst, seattle, and vegas drivers
* fixed core video handling of save states with dynamic screen resolutions
SMC91C9x:
* converted to proper device
* updated seattle and vegas drivers to allocate devices
* added separate 91C96 device for eventual 2049 use
* cleaned up code
- reactivated back-end validation mechanism
- added back-end validation for ADD/SUB/MUL/DIV/CMP forms
- fixed several errors in dealing with more obscure flag combinations
Subject: 8080/8085 fix
Hello Aaron,
While working on drivers for some 8080 machines, I have noticed that there are some errors in flags settings in CPU implementation.
I have done fixes and now sending patch for code . Also there are changes to set right timings for both 8080 and 8085 since not all timings are up to documentation.
Regards,
Miodrag
Subject: [patch] Static qualifiers, header file cleanups, and new
include files for MAME
The first patch adds static qualifiers where appropriate, adds missing
#include statements, source comments and header declarations, as well
as removes dead declarations. The only part that required judgement
was deciding whether audio/galaxian.c declarations should be in
galaxold.h or galaxian.h, it doesn't make sense for them to be
declared in both. This exercise did find a bug, galaxold_init_stars
was declared incorrectly in video/fastfred.c.
* fixed adc/sbb so that they don't optimize out ever
* fixed detection of special and/or/xor cases
* fixed GETFLGS opcode so that it doesn't return anything other than requested flags
* changed LZCNT/BSWAP to be more flexible in register selection
C back-end:
* implemented flag variants of SEXT/ROLAND/ROLINS/LZCNT/BSWAP
PPC DRC:
* added more symbols for debugging
* fixed lmw/stmw if rA is one of the loaded/stored registers
* removed unnecessary variables & structure members
* optimized for the XER and CR0 case where XER doesn't need an overflow calculation
*
* changed SPU receive model to a push model; updated drivers accordingly
* added macros for setting the SPU transmit handler and sending bytes
* cleaned up ppc.h
* added detection of MMU enablement in 403GCX case
* fixed bug in protection bounds violation detection for 4XX to get ppd
to the "ppc4xx_spu_rx_data unimplemented" message
* fixed conflicting layout (not super happy with the technique...)
x64 back-end:
* added a "hop" around the prolog of the HANDLE opcode to allow fall-through
x86 back-end:
* redesigned stack management to keep the stack at the same 16-byte alignment
PPC DRC:
* fixed parameter ordering for masked reads/writes
* Added VBLANK IRQ clear
* Added ATAPI IRQ clear
* Tried to add UART IRQ clear but it doesn't yet work
* Most of the games start to show something again with these changes
* Added fast RAM region
PPC DRC:
* Fixed TLB filling for 4XX protection ranges
PC16552d:
* Tried to wire up assert/clear signals for this chip based on guesswork
(anyone want to implement it properly? :)
* reduced address bus width of 4xx series to 31 bits per the
documentation
PPC DRC:
* fixed bug that would jump to incorrect PC after filling the
TLB during a mismatch event
* added explicit address truncation to 31 bits for 4xx series
* added new PPCDRC_ACCURATE_SINGLES option, which removes the
excessive (and very likely unecessary) extra rounding when
performing the "fast" single-precision floating point ops
Konami drivers:
* designated fast RAM accesses for work RAM
* removed unnecessary mirroring
Model 3:
* identified and fixed VBLANK bit in real3d status which was
causing the system to hang at startup
* designated fast RAM accesses for work RAM
53C810:
* changed read/write handles to proper READ8/WRITE8_HANDLER
callbacks so they can eventually be used directly
* changed from tracking "live" registers to tracking "necessary" registers
* genericized register tracking to be more flexible
* added previous instruction pointer to opcode descriptions
PowerPC frontend/DRC:
* cleaned up register tracking implementation
* fixed numerous errors and shortcomings in the tracking
* added support for removing unnecessary XER CA and CR0 computations
* updated UML logging to output new frontend statistics
MIPS3 frontend/DRC:
* tweaked register tracking to match new DRC frontend system
* updated UML logging to output new frontend statistics
* fixed DIVS/DIVU opcode so they properly compute SZ flags when requested;
fixes camera wackiness in nbapbp
PPC DRC:
* added support for 4xx protection registers via the MMU
* added TLBH, TLBU, and DEC to the list of registers in the debugger
* turned off "end of transfer" DMA signals in favor of "transfer count 0"
signals; fixes memory-to-memory DMA in fiveside
* Converted sysreg_r/w to 8-bit handlers
* Added hack to make network IRQs work; brings some games back to life
UML:
* Fixed STORE opcode description to allow immediate source operands
x86/x64 back-ends:
* Added flag support to SEXT, ROLAND, ROLINS, LZCNT opcodes
PPC DRC:
* Rewrote lswi/stswi as subroutines
* Made accesses to tempdata explicitly dword or qword
* Fixed SRR0 when generating a syscall
* Removed no longer necessary TESTs on extsb/w, rlwinm, rlwnm, rlwimi, cntlzw
* Fixed bug where the SO flag was not being computed for compares
* Fixed flag computations for mulhw/mulhwu/mullw
* Fixed subtlety of shifts between 32 and 63 in srw/sraw
* Fixed mffs/mtfsf to use FP registers
* Fixed mtfsfi to use the immediate value properly
* Now marking terminal count bit in DMA status register
* Added simple symbol table to the UML for improved disassembly
* Changed optional disassembler cache parameter to a drcuml object
PPC DRC:
* Added symbols for most common variables
* Fixed bug in handling XER carry flag for subo. forms
* Simplified flag insertion logic for opcodeo. forms
* Added logic to simplify opcodes as much as possible at the UML layer.
* Removed similar logic in the x86 and x64 back-ends.
* Added stricter parameter validation for registers and mapvars
* Removed explicit flag requests from the shorthand opcodes
* Added optimization function to drcuml which is called at block end
* Added logic to compute the necessary flags based on upcoming opcodes
and only select those flags which are required
* Updated the PPC and MIPS3 DRCs to no longer explicitly specify flags
* Wrote new disassembler based on enhanced opcode info structure.
* Moved disassembler into drcuml.c and removed old code.
* Extended disassembler buffer sizes to at least 256 bytes.
* Added more extensive per-opcode information in preparation for UML
optimization step.
* Made validation more thorough using the extended information.
* Disabled back-end validation for now until it can be revisited
using the new tables.
* Changed GETFLGS encoding so that the mask is in parameter 2 instead
of the flags field.
- rewrote PowerPC implementation as a dynamic recompiler on top
of the universal recompiler engine
- wrote a front-end to analyze PowerPC code paths and register usage
- wrote a common shared module with C implementations of tricky
CPU behaviors
- added separate CPU types for the variants supported, instead of
relying on a hidden model enum
- rewrote the serial port emulation for the 4xx series to be more
accurate and not rely on separate DMA handlers
- rewrote the MMU handling to implement a software TLB that faults
in pages and handles changed bits appropriately
- implemented emulation of the PowerPC 603's software TLB, which
allows the model 3 games to run without a hack to disable the MMU
Updated the PowerPC disassembler to share constants with the rest of
the core, and to more aggressively use simplified mnemonics, especially
for branches. [Aaron Giles]
Universal recompiler:
- fixed frontend to handle opcode widths different from bus width
- added several new opcodes:
* (D)GETFLGS - copies the UML flags to a destination operand
* FDRNDS - rounds a double precision value to single precision
- renamed several opcodes:
* SETC -> CARRY
* XTRACT -> ROLAND
* INSERT -> ROLINS
- consolidated the following opcodes:
* LOAD?U -> LOAD
* LOAD?S -> LOADS
* STORE? -> STORE
* READ?U -> READ
* READ?M -> READM
* WRITE? -> WRITE
* WRITM? -> WRITEM
* SEXT? -> SEXT
* FTOI?? -> FTOINT
* FFRI? -> FFRINT
* FFRF? -> FFRFLT
- removed some opcodes:
* FLAGS - can be done with GETFLGS/LOAD4/ROLINS
* ZEXT - can be achieved with AND
* READ?S - can be achieved with READ/SEXT
- updated C, x86, and x64 back-ends to support these opcode changes
- updated disassembler to support these opcode changes
MIPS3 dynamic recompiler:
- updated to use new/changed opcode forms
- changed context switch so that it only swaps a single pointer
Konami Hornet changes: [Aaron Giles]
- updated to new PowerPC configurations
- updated some memory handlers to be native 8-bit handlers
- cleaned up JVS implementation to work with new serial code
- added fast RAM for the work RAM to give a small speed boost
Konami GTI Club changes: [Aaron Giles]
- updated to new PowerPC configurations
- updated some memory handlers to be native 8-bit handlers
Konami Viper/ZR107 changes: [Aaron Giles]
- updated to new PowerPC configurations
Sega Model 3 changes: [Aaron Giles]
- updated to new PowerPC configurations
- reimplemented/centralized interrupt handling
- these games are broken for the moment
Fixed crasher due to some Konami games using 8 layers in
the K056832 implementation, even though it was only written
for 4. [Aaron Giles]
Added fisttp opcode to i386 disassembler. [Aaron Giles]
- Added Microbus support, clock divisor selection, and CKO mode selection to the COP420
- Changed Thayer's Quest keyboard interface to at least slightly resemble the schematics
- Styling changes
- Added instruction cycle counts.
- Added interrupt support.
- Added HALT support.
- Fixed INT instruction.
- Added incomplete support for DIV and MUL instructions.
- Fixed MOV [#nnnn],BA and MOV [#nnnn],HL instructions.
1. In the MIPS core:
- renamed struct mips3_config -> mips3_config
- updated all drivers to the new names
- removed MIPS3DRC_STRICT_COP0 flag, which is no longer used
- a few minor cleanups
2. In the CPU interface:
- added new 'intention' parameter to the translate callback to
indicate read/write/fetch access, user/supervisor mode, and
a flag for debugging
- updated all call sites to pass an appropriate value
- updated all CPU cores to the new prototype
3. In the UML:
- added new opcode SETC to set the carry flag from a source bit
- added new opcode BSWAP to swap bytes within a value
- updated C, x86, x64 back-ends to support the new opcodes
- updated disassembler to support the new opcodes
4. In the DRC frontend:
- fixed bug in handling edge case with the PC near the 0 or ~0
Subject: [patch] More Machine->machine changes, add machine to irq
callbacks
Hi mamedev,
Here are two more patches to eliminate Machine globals. The first
patch was autogenerated by the attached fixup script. That script has
been updated to catch additional cases which it previously missed
(when Machine is the last parameter to a function or Machine is used
in an assignment). This makes ~50 more files deprecat.h free.
A sizable chunk (~20%) of the remaining uses of the Machine global in
the drivers are due to irq callbacks for sound and machine updates.
Typically such callbacks need to call cpunum_set_input_line, which
requires a machine parameter, so if the callbacks don't pass the
machine parameter, these routines have no choice but to reference the
global variable.
The second patch attempts to address most cases of this by adding the
machine parameter to the callback interfaces. This allows us to
remove #include "deprecat.h" from ~150 files, at the cost of having to
fix up hundreds of callbacks.
In total, these patches reduced the number of files with deprecat.h
from 783 to 575.
~aa
Subject: saturn CPU patch
Dear MAMEDev,
The attached patch corrects several bugs in the emulation of the saturn
CPU. These corrections are needed to make new HP48 drivers (to be
submitted to MESS imminently) work.
AFAIK, MESS is the only place where this CPU is used, so, the patch
should
not cause any regression in MAME.
The patch is against 0125u1.
Best regards,
-
Antoine Mine
* Added new opcode LZCNT which returns the number of leading zeros in
a parameter.
* Added new opcode XTRACT which is a combined rotate/mask (basically
rlwinm from PowerPC)
* Added new opcode INSERT which is a combined rotate/mask/blend
(basically rlwimi from PowerPC). Best. Opcode. Ever.
* Updated all back-ends to support these new opcodes.
* Fixed several bugs relating to shifts/rotates and optimizing out
cases incorrectly.
MIPS3 DRC changes:
* Updated to use INSERT and XTRACT where appropriate
* Cleaned up register usage to enable an additional direct mapping;
this means Linux gets 1 now and Windows gets 3
machine registers if the machine supports it. Currently only x64 on
Windows has enough free registers to do so, though PowerPC will almost
certainly be able to take advantage of this. Gives a minor speedup.
* Fixed front-end so that virtual no-op instructions are still targeted
as branch targets.
* Fixed front-end to mark the beginning of each sequence as needing TLB
validation, since any sequence can be jumped to from anywhere.
* Redid the MIPS3 TLB implementation. Fixed the exception vector and
type handling. Changed the bitfields to directly map from the MIPS TLB
format. Added distinction between TLB fill and TLB valid/modified
exceptions.
* Added separate modes for user, supervisor, and kernel modes. Each mode
does proper verification of addresses now and generates address errors
for invalid accesses.
* Fixed several bugs in the TLB implementation; not everything works
yet but it's a lot closer.
* Made COP0 access checking mandatory in non-kernel modes.
* Fixed several crashes when recompiling virtual no-ops.
* Fixed TLB bug where entries for virtual address 0 were present by
default.
* Fixed bug in the map variable implementation that would sometimes
result in incorrectly recovered values.
This will be expanded in the future.
Added two new opcodes: SAVE and RESTORE to save and restore the entire
virtual machine state for examination/setup.
Added new back-end function get_info() which returns information from
the back-end about how many actual registers will be mapped.
Fixed a bug that mapped the high a low parts of registers to the same
address. This should help the C back-end run better on big-endian
architectures.
Subject: [patch] Remove opbase globals from the public interface
Hi mamedev,
There are several variables associated with opbase handling which are
global and documented in memory.h and thus their use is not well
controlled. This patch attempts to remedy this. Because they are
used in various inline memory functions, they can't yet be made local
to memory.c, but by rescoping their declaration they can be hidden,
much like we hide totalcpu.
Most of the uses are in OPBASE_HANDLER() macros, so by encapsulating
the opbase state into a struct and adding that to the handler
interface those can be converted to local variable manipulation. There
is one use in missile.c in a MACHINE_START that I simply removed, it
shouldn't be needed.
One side effect of this patch is that the various unsafe memory macros
can't be used directly, they will be a compiler error now. That is
probably for the best.
~aa
is drcuml.c, which defines a universal machine language
syntax that can be generated by a frontend recompiler and
then retargeted via a generic backend interface to any of
a number of different architectures. A disassembler for the
UML is also included to allow examination of the generated
UML code.
Currently supported backend architectures include 32-bit x86,
64-bit x86, and a platform-neutral interpreted C backend that
can be used as a fallback for platforms without native
support. The C backend also performs additional validation
to ensure assumptions are met.
Along with the new architecture is a new MIPS III/IV
recompiler frontend. This frontend has been rewritten from
the old x64-specific recompiler to generate UML opcodes
instead. This means that the single recompiler can be used
to target multiple backend architectures and should in
theory produce identical results across all of them.
The old 32-bit and 64-bit MIPS recompilers are now officially
retired. The new system provides similar performance (within
5% generally) to the old system and has similar compatibility.
The only currently known issues are some problems with the
two Gauntlet 3D games.
Subject: [patch] Small deprecat.h related cleanup
Hi mamedev,
While doing some work on eliminating some uses of deprecat.h, I came
across a few files that didn't have it that used deprecated features.
A little investigation revealed they were getting it through
debugger.h, typically by referencing m68000.h. Since deprecat.h is
intended to document the files that need updating (otherwise it would
just be included in a common header), I reworked debugger.h to not
import it when the debugger is not enabled, and fixed the files that
broke as a result.
~aa
Subject: [patch] Remove more Machine globals, #include "deprecat.h"
Hi mamedev,
The attached patch goes through and converts a number of Machine
globals to machine locals, and then removes #include "deprecat.h" if
appropriate. The script that generated it is included, since the
patch itself is rather large and would have been time consuming to
produce otherwise.
The script doesn't convert cases of Machine that aren't in common
macros. I'll try to tackle those later if someone doesn't beat me to
it.
~aa
Subject: [patch] Eliminate assignments in conditionals
Hi mamedev,
Assignments in conditionals are never really needed in C and are
occasionally just plain bugs (== gets typed as =). As such, it would
be good to remove these from MAME so that compilers that warn on this
construct can flag the likely bugs (MSVC does this for example). The
attached patch does just that. In addition, it refactors some
repeated code which had this in taito_f3.c into a couple macros. Using
inline functions would unfortunately have required more significant
changes, perhaps I'll tackle that another day.
~aa
Hello Aaron,
I have found few more things not ok in T11, this time I have fixed it myself.
1. HALT - should call interrupt vector
2. ILLEGAL - had PC=0 at the end which makes code not run fine
3. MARK - now it is implemented
Can you please check if your drivers are working fine with these cahanges.
After adjustments I have some things working finaly.
Please inform me,
Miodrag Milanovic
direct byte, word, dword, and qword accessors for all bus sizes,
there are now masked word, dword, and qword accessors for all
bus sizes.
IMPORTANT: masks that are passed to the _masked_* functions are
NOT inverted. Although inverted masks are still passed to callback
functions, when you request a masked read or write the masks should
represent the bits you want.
Updated the various MIPS cores that use these functions to invert
their masks.
Added support in the T-11 core for an external vector via irq_callback.
Apparently the hardware actually did support this and it is necessary
for emulating the BK 0010/11 computer in MESS.
accordingly.
Added new functions for dynamically installing device memory
read/write handlers.
Updated install_memory_XXX_handler() functions to take a machine
parameter. Updated all drivers accordingly.
Merged installation of read and write handlers where appropriate.
Simplified memory.c code for dynamic installation so that a single
function handles all the work; a NULL read or write handler
indicates not to install anything for reads or writes.
src/emu/cpu/m68000/m68kmame.c:
src/emu/cpu/minx/minx.c:
- Fixed compilation errors on CPU cores not enabled in MAME
src/emu/inptport.c:
src/emu/inptport.h:
- Readded input_port_set_digital_value() (which is needed for natural
keyboard inpout in MESS)
- Added a running_machine parameter to inputx_update()
only remaining form is the one that takes a pointer parameter.
Added macros for STATE_PRESAVE and STATE_POSTLOAD to define common
functions. Added machine parameter to these functions.
Updated all drivers and CPU/sound cores to use the new macros
and consolidate on the single function type. As a result pushed
the machine parameter through a few initialization stacks.
Removed unnecessary postload callbacks which only marked all tiles
dirty, since this is done automatically by the tilemap engine.
trace through in a debug build, yet should operate the same as before.
Created a complete set of functions for all databus sizes (8,16,32,64) and
all endiannesses. A few functions are redundant, but it is now very clear
which functions to use in which scenarios. It is also now possible to rely
on being able to access values of 8, 16, 32 or 64 bits via the built-in
accessors without fear of crashing.
Updated all cores using 8-bit handlers to explicitly call the 8-bit handlers
with the appropriate endianness.
Fixed a few games which were calling n-bit handlers directly to use the
generic forms. In the future, this is all the access drivers will have.
fixed reading from SXYP
fixed reading from IRGB
fixed writing to LZCR
fixed sign extension of GTE control registers
fixed writing to FLAG
New games added or promoted from NOT_WORKING status
---------------------------------------------------
1 on 1 Government (JAPAN)
Added ability to test the instruction/data cache ram. The scratchpad and BIU register are now handled internally to the CPU.
All writes are performed with masks. SWL/SWR used to be implemented with two writes ( one byte and one word ) when writing three bytes, now it only ever performs one. Byte and Word writes use masks as they leave the rest of the register on the bus, which can be picked up by larger registers.
The read/write functions to use are cached when the SR bits are updated, as are the bad address masks.
Added coprocessor 1 & 3 support, though they don't do anything useful.
All loads now go through the delay pipeline, a lwl/lwr will grab the value out of the pipeline if it's updating the same register.
Added undocumented behaviour of BLEZ/BGTZ. The comparison for zero can be changed by specifying an alternate register in the RT field ( the documentation says you should always use register 0 ).
Restricted to 16 COP0 registers & generate an exception if any of the 5 for the MMU are used.
Added BCF/BCT instructions, although I have found no conditions that affect them yet.
Generates an exception if any MMU instructions are executed.
Sets the CE instruction for all exceptions, not just those involving a coprocessor. The bits of the opcode that specify the coprocessor are grabbed no matter what the instruction.
Added TAR register and BT bit in SR. When an exception occurs during a branch, BT determines whether it was taken or not. The TAR register gets set to the destination of the branch.
Fixed the BD bit when you are in a branch delay slot and you didn't take the branch, this shows up in the pipeline as !pc.
Fixed branches within a branch delay slot.
Multiply & divide instructions can be aborted if you write to HI/LO before reading the result.
Added data breakpoints, you don't appear to be able to set breakpoints on any of the addresses internal to the CPU.
Multiply/divide/GTE instructions can execute when an exception is taken, although the EPC indicates that it hasn't. The BIOS avoids rerunning GTE instructions as they are destructive, so you have to make sure they run.
Added bus error handling, PSXCPU is limited to 8mb of ram & any access outside this range will trigger an exception. I believe this is to be an internal limit.
Added CXD8611R as a specific CPU type, System 12 appears to allow more than 8mb of ram & it's possible that this is different.
Mapped out all instructions to either generate an exception or ignore bits.
Updated the disassembler to match the decoding.
Fixed disassembling of branch instructions in a branch delay slot.
Lui checks for a ori/addiu following and will show you the result.
Added step over/out support.
Fixed standalone disassembler.
All occurrences of ACCESSING_LSB, ACCESSING_MSB, ACCESSING_LSB16, ACCESSING_MSB16, ACCESSING_LSB32, ACCESSING_MSB32, ACCESSING_LSW32, ACCESSING_MSW32 & simple mem_mask checks have been replace with the new macros.
The old macros are gone.
- implemented serial input/output
- fixed XAD/LDD, XIS1, RMB3 opcodes
- fixed clock divider
- fixed internal memory map size
- added some cpu variants
As a result, Draco at least initializes the AY-8910 now.
Subject: SH-4 debugger output fix
This patch fixes "garbage" (newlines) in the debugger window when
debugging the SH-4 CPU.
It also conatins a small comment fix in video/playch10.c and the
removal of some yet unused or just obsolete macros in emu/cpuint.h.
This is still WIP bug I've been working on it for sveral weeks and I want to get it out before leaving for holidays.
- Fixed Alpha 8201/830x MCU simulation.
- all hacks from the equites driver removed
- fixed equites restart position after going underground
- fixed hvolume, splndrbt 2 players
- removed hacks from exctsccr2
- fixed CPU gameplay in shougi
- Gekisou promoted to working
- added dump of Alpha 8201 MCU to games that use it (the ROM isn't used yet, HMCS44 CPU core needs to be written first)
- major cleanup of the mess in equites.c:
- many thanks to Corrado Tomaselli for precious hardware info.
- implemented bg perspective scrolling using PROMs
- fixed sprite flip & disable
- fixed bg color
- converted bg to tilemaps
- fixed fg banking
- fixed screen flip
- removed meaningless banking of player inputs
- added UI adjuster for MSM5232 frequency
- MSM5232 volume control
- fixed MSM5232 noise LFSR formula (done by Jarek Burczynski; thanks to Corrado Tomaselli for samples)
- changed MSM5232 emulator to output channels separately
- added output of SOLO channels to MSM5232 emulator.
- mametesters bugs fixed:
- 00217 splndrbt: On boot the pcb displays a clean light blu screen while in mame there is a black road.
- 00220 splndrbt: Concerning the gfx, on the pcb the background is not linear as shown in mame.
- 00223 splndrbt: On the first level when you pass the asteroid belt the star road should be light blue instead of black like mam
- fixed champbas inputs
- merged talbot with champbas, some driver clenaup
- fixed shougi inputs
- switched exctsccb to use the correct gfx ROMs (matches screenshot found in 01058 exctsccb: Exciting soccer bootleg should be placed in champbas.c.)
- fixed sprite bpp in exctscrr, removed the horrible hacks that were used to fix colors and transparency.
- fixed sound clipping in exctsccr
Subject: small fix to cpu.mak
Attached please find a small patch to include M68000 CPU only when you're
compiling a build with the M68K. this is needed to e.g. compile tiny
builds .
Subject: patch for SVP (Sega Virtua Processor) emulation
hello,
this patch adds support for Sega Virtua Processor, to run
Genesis/MegaDrive version of Virtua Racing, intended to be used by
MESS. It consists of a CPU core SSP1601, and updates in megadriv.c:
* SSP1601 replaces SSP1610, as it has been confirmed by Stiletto and
other sources that SVP actually contains SSP1601. The current SSP1610
is placeholder only (nearly completely unimplemented) anyway.
* Changes in megadriv.c add a new driver for Genesis/MegaDrive+SVP
combination, also add SVP memory controller logic and memory map.
The diff has already been reviewed by Reip and SSP1610 removal was one
of his suggestions (SSP1610 is not used by any drivers).
Changed slapstic management to always install an opbase handler to more
aggressively catch code executing in the slapstic region. Updated all
drivers to separate the slapstic region of ROM into a different ROM
section from the fixed ROM.
MRA*_BANK*/MRA*_BANK* -> SMH_BANK*
MRA*_RAM/MRA*_ROM -> SMH_RAM
MRA*_ROM/MWA*_ROM -> SMH_ROM
MRA*_NOP/MWA*_NOP -> SMH_NOP
MRA*_UNMAP/MWA*_UNMAP -> SMH_UNMAP
This removes the silly need for a bunch of redundant constants
with faux type definitions that didn't buy anything.
Moved some memory system constants into memory.c.
Converted address maps to tokens. Changed the address_map structure
to house global map-wide information and hung a list of entries off
of it corresponding to each address range. Introduced new functions
address_map_alloc() and address_map_free() to build/destroy these
structures. Updated all code as necessary.
Fixed several instances of porttagtohandler*() in the address maps.
Drivers should use AM_READ_PORT() macros instead.
ADDRESS_MAP_EXTERN() now is required to specify the number of
databits, just like ADDRESS_MAP_START.
Removed ADDRESS_MAP_FLAGS() grossness. There are now three new macros
which replace its former usage. ADDRESS_MAP_GLOBAL_MASK(mask)
specifies a global address-space-wide mask on all addresses. Useful
for cases where one or more address lines simply are not used at
all. And ADDRESS_MAP_UNMAP_LOW/HIGH specifies the behavior of
unmapped reads (do they come back as 0 or ~0).
Changed internal memory mapping behavior to keep only a single
address map and store the byte-adjusted values next in the address
map entries rather than maintaining two separate maps. Many other
small internal changes/cleanups.
All callers that used 0 for the screen number now use machine->primary_screen
As a gap meassure, Where necessary, create a parallel set of video_screen_*_scrnum functions that take scrnum
All callers that specified a specific screen number now call the *_scrnum versions
Changed game info screen and overlay UI to display the screen tag instead of screen number
Updated all call-through handlers appropriately. Renamed read8_handler to
read8_machine_func, replicating this pattern throughout.
Defined new set of memory handler functions which are similar but which
pass a const device_config * in place of the running_machine *. These are
called read8_device_func, etc. Added macros READ8_DEVICE_HANDLER() for
specifying functions of this type. Note that some plumbing still needs to
happen in memory.c before this will work.
This check-in should remove the need for the global Machine and in turn
"deprecat.h" for a lot of drivers, but that work has not been done. On
the flip side, some new accesses to the global Machine were added in the
emu/ files. These should be addressed over time, but are smaller in
number than the references in the driver.
suffixed with _func. Did this throughout the core and
drivers I was familiar with.
Fixed gcc compiler error with recent render.c changes.
gcc does not like explicit (int) casts on float or
double functions. This is fracking annoying and stupid,
but there you have it.
video_screen_get_time_until_update().
Fixed CCPU and QB3 to no longer rely on cpu_scalebyfcount().
Fixed busted timing in the CCPU core. Changed watchdog to
count internally rather than using external watchdog support.
Altered CCPU to accept interrupt signals from the driver.
Updated clocks in the cinemat driver to be derived from the
clock crystal.
* added ATTR_FORCE_INLINE to osdcomm.h
* added ATTR_NONNULL
* moved U64 S64 fram mamecore.h to osdcomm.h
* define SETJMP_GNUC_PROTECT() in osdcomm.h for use in ppc602, ppc603
- Added a video_screen_register_vbl_cb() function for registering VBLANK callbanks
- Changed inptport.c and debugcpu.c to make use the VBLANK callbacks
- Added video_screen_get_time_until_vblank_start()
- CCPU and anything using cpu_scalebyfcount() are currently broken
- I did some fairly extensive testing, but this is a very signficant internal change,
so some things may have broke
Subject: uPD7801, uPD78C05, and uPD78C06 cpu cores added to the uPD7810
cpu core
This patch adds basic support for the NEC uPD7801, uPD78C05, and
uPD78C06 cpus to the uPD7810 cpu core.
- I still left drawgfx.c as is, the only piece of code that used any of the functions in drawgfx
was s2636.c -- everything else uses 8-bit bitmaps as a replacement for a two dimensional array
* verinfo: New syntax.
verinfo now uses the following syntax: verinfo.exe -b windows|winui|mess.
Does not depend on compile time defines any longer.
* makefile will include - if it exists - src/osd/$(CROSS_BUILD_OSD)/build.mak.
This was necessary to enable cross builds for winui. winui adds mkhelp to build tools and the rules for mkhelp thus had to be moved outside src/osd/winui/winui.mak
* Tested on Linux 64bit, Linux 32bit, Windows 32bit mingw, Windows 32bit MSVC
* Cross build environment to be posted to the list
Hi mamedev,
Here's my periodic batch of code cleanups. The usual batch of adding static/const plus some include fixes. In addition, I reverted some of the changes to build.mak from u1 which made some MSVC builds fail, and adjusted/optimized an m10.c gfx_layout. I also added some missing cores to cpuintrf.c, sndintrf.c and added some missing #if's to 5220intf.c.
~aa
moved decryption table setup to 'config' struct for the CPU.
added latest tables from robiza, making Risky Challenge playable, promoted it to working
told CPU core to not decrypt code after brkn instruction, enabling it again on iret, allowing me to remove several 'don't decrypt range' hacks in robiza's code.
updated all drivers accordingly.
currently the disassembly is a bit weird now, this will need looking at.
Samuele Zannoli:
- Add SH4 I/O ports
- Connected the 93C46 of the naomi and the x76f100 of the rom board and filled them with dummy data to satisfy the BIOS
- Implemented some of the JVS transfers that will be needed to use the controls
- Implemented ROM board DMA
- Set proper NAOMI RAM sizes (32 MB main, 8 MB for AICA)
- Improved PVR-TA graphics emulation
Deunan Knute:
- Set proper ARM7 clock. (Yes, it's really that slow!)
Subject: [patch] CPU/SOUND independence fixes
Hi mamedev,
Here's some updates to the CPU/SOUND cores to improve build
independence. While I was at it, I rescued the M65CE02 core from
bitrot hell (perhaps m65ce02.[ch] should just be deleted), and fixed
some MESS cores that were broken by the deprecat.h changes.
Subject: [patch] Fix some comments
Hi mamedev,
The following patch updates the initialization comments at the top of
mame.c and corrects/adds a few filename declarations at the top of a
handful of files.
~aa
- Added some instructions to the H8/30xx CPU:
or.l ERs, ERd
rotl/shal.l ERd
not.l/neg.l ERd
exts.w Rd
sub/or/xor.l #Imm:32, ERd
bset/bnot/bclr.b Rn, @ERd
bst/bist.b #Imm:3, @ERd
bnot.b #Imm:3, @ERd
- Added H8/3007 & H8/3044 variants with their memory maps.
Preliminary implementation of the H8/3007 timers.
(a make clean is required)
P.S.
I've moved the docs we have in docs/cpu/H8-30xx and added a couple more.
Roms are in roms/current/p/puzzlet.zip
